TW200402787A - Semiconductor wafer and process for producing the semiconductor wafer - Google Patents

Semiconductor wafer and process for producing the semiconductor wafer Download PDF

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TW200402787A
TW200402787A TW92122298A TW92122298A TW200402787A TW 200402787 A TW200402787 A TW 200402787A TW 92122298 A TW92122298 A TW 92122298A TW 92122298 A TW92122298 A TW 92122298A TW 200402787 A TW200402787 A TW 200402787A
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wire
semiconductor wafer
scope
semiconductor wafers
patent application
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TW92122298A
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TWI286351B (en
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Gerhard Palme
Maximilian Kaeser
Manfred Grundner
Johann Steiner
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Wacker Siltronic Halbleitermat
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23DPLANING; SLOTTING; SHEARING; BROACHING; SAWING; FILING; SCRAPING; LIKE OPERATIONS FOR WORKING METAL BY REMOVING MATERIAL, NOT OTHERWISE PROVIDED FOR
    • B23D57/00Sawing machines or sawing devices not covered by one of the preceding groups B23D45/00 - B23D55/00
    • B23D57/003Sawing machines or sawing devices working with saw wires, characterised only by constructional features of particular parts
    • B23D57/0053Sawing machines or sawing devices working with saw wires, characterised only by constructional features of particular parts of drives for saw wires; of wheel mountings; of wheels
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B28WORKING CEMENT, CLAY, OR STONE
    • B28DWORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/04Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by tools other than rotary type, e.g. reciprocating tools
    • B28D5/045Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by tools other than rotary type, e.g. reciprocating tools by cutting with wires or closed-loop blades

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Processing Of Stones Or Stones Resemblance Materials (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Weting (AREA)

Abstract

The invention relates to a semiconductor wafer made from silicon as based material for the fabrication of electronic components, which has a gloss of at least 70% and a roughness Ra of 0.1 μ m to 0.5 μ m, which are achieved by wire-sawing of a single crystal as the only mechanical processing step in the production of the semiconductor wafer. The invention also relates to a process for producing the semiconductor wafer.

Description

200402787 五、發明說明(1) 一、【發明所屬之技術領域】 矽半導體晶圓係製作電子元件 用途之半導體晶圓,至少一個面必須全二適於作此 常,採用許多機械加工步驟始可使該S 2 所以通 該等機械加工步驟包含:自I 7 /、有此類性能。 丰V體晶圓之精研、研磨及拋光。 v體阳13及該 本發明可達成之目的B · 彻 及符作電子元件所需主要材料2要二得一半導體晶圓 ♦I可的是’依照本發明製造半導曰 之外,不再需要其他機械加工㈣,例:.铲:鋼絲鋸割 拋光。視切割實施之方式而定,為使半導俨::、研磨及 因其他機械力口卫步驟省5 , ^ 步驟將幸交為有利。 伏昭士饮^坏噌略所以本方法特別經濟。 依”、、本發明製造之半導體晶圓,1 米,尤以100至3 00微米更佳,本又取低為100礒 時形成許多肤_主道 胃’專°鋼、絲害丨J可同 ,導引^上®。該鋼絲隸繞在鋼絲鑛之鋼 ί磨劑將 到縣…该#斗 該4研磨劑係黏合在鋸鋼絲上或以鋸 而由雜鋼絲帶至切割位置。鑛鋼絲會受 曰kb # ΐ m ί蝕,若所考量之鋸鋼絲部分區段用於自單 :=ί肢晶圓之時間愈久’該區段之磨蝕程度則增 加。此種If形對離開單晶體之半導體晶圓之厚度分佈且有 不良f響,蓋因位於單晶體-端之半導體晶圓係在有因磨 蝕而變細之鋸鋼絲部分區段存在之情況下離開單晶體。該 第5頁 ϋΐ義 200402787 五、發明說明(2) 等半導體晶圓 曾承受負荷或 之情況下離開 就本發明 間隔設計為並 間隔及鋼絲之 關鍵性影響。 成之直徑減小 之尽度分佈變 值與預期值之 半導體晶圓之 附圖僅將 割方法所得結 溝槽間之間隔 溝槽間之間隔 所示係經放大 情形。採用方 較來自單晶體另一端者為厚 至少曾承受fe柄名-+ μ A 且係在有未 單晶體。 鋼絲部分區段存在 之觀點而f,藉將鋼絲—導引輥上溝槽 非恆常不變以抵消該不利效果。因溝槽間之 直徑對離開單晶體之半導體晶圓之厚^具有 利用對應較窄之溝槽間隔以抵消因磨=^造 。結果1同時離開單晶體之許多半導體晶圓 得非常嚴格。厚度分佈(亦即晶圓厚度實際 差異)以最多± 10微米為佳(以一次鋸割所^寻 數目為基準)’尤以± 5微米更佳。 本發明所用不同鋼絲-導引輥不同之兩種切 果加以比較。在方法Α中,所用鋼絲-導引輥 恆常不變,但在方法B中,所用鋼絲-導引輕 自鋼絲進入側至鋼絲外出側逐漸減小。該圖 後之溝槽間隔及所得半導體晶圓之厚度分佈 法B,可製得實質上厚度均勻之半導體晶圓 二、【先前技術】200402787 V. Description of the invention (1) 1. [Technical field to which the invention belongs] Silicon semiconductor wafers are semiconductor wafers used for the manufacture of electronic components. At least one side must be suitable for this purpose. Many mechanical processing steps are required. Making the S 2 through these machining steps includes: since I 7 /, has such properties. Fine grinding, polishing and polishing of V-body wafers. v Tiyang 13 and the object that can be achieved by the present invention. B. Completely meet the main materials required for electronic components. 2 Obtain a semiconductor wafer. ♦ I ca n’t make semiconductors in accordance with the present invention. Requires other mechanical processing, such as: shovel: wire saw polishing. Depending on the way the cutting is carried out, in order to save the semiconducting 俨:, grinding and other mechanical force guard steps 5, ^ The steps will be fortunately handed. This method is particularly economical. According to the ", the semiconductor wafer manufactured by the present invention, 1 meter, especially 100 to 300 micrometers is better, when this book is taken as low as 100 礒, many skins are formed. At the same time, guide ^ Shang. The steel wire is wound around the steel wire and the steel abrasive is going to the county ... The # 斗 4 4 abrasives are bonded to the saw wire or sawed and brought from the wire to the cutting position. Mine The steel wire will be etched by kb # ΐ m ί, if the section of the saw wire used is considered to be used from a single order: = ί the longer the wafer is, the greater the degree of abrasion. This If-shaped pair leaves The thickness distribution of single-crystal semiconductor wafers has a bad fuzzer. The semiconductor wafer located at the single-crystal end of the cover leaves the single crystal in the presence of a section of the saw wire that has become thinner due to abrasion. This page 5ϋΐ 200200402787 V. Description of the invention (2) Other semiconductor wafers that have been subjected to load or leave under the critical influence of the design of the interval of the present invention and the interval and the steel wire. The degree of variation and expected value of the reduced diameter distribution The drawings of the semiconductor wafer are only between the junction trenches obtained by the dicing method. The distance between the spaced grooves is shown enlarged. It is thicker than the one from the other end of the single crystal. It has at least been subjected to the fe-name-+ μ A and has a single crystal. The point of view of the existence of some sections of the wire, f The non-constant grooves on the wire-guiding roller are used to offset this adverse effect. The diameter between the grooves is thicker than the thickness of the semiconductor wafer leaving the single crystal. Result. 1 Many semiconductor wafers leaving the single crystal at the same time are very strict. The thickness distribution (that is, the actual difference in wafer thickness) is preferably at most ± 10 micrometers (based on the number found by one sawing). ± 5 microns is better. The two wire-guiding rollers used in the present invention are compared with two different cuts. In method A, the wire-guiding roller used is constant, but in method B, the wire-guiding roller used is constant. The lightening gradually decreases from the wire entry side to the wire exit side. The groove interval after the figure and the thickness distribution method B of the obtained semiconductor wafer can produce a semiconductor wafer with substantially uniform thickness. 2. [Previous technology]

使用一種鋼絲鋸割方法以形成低度起伏半導體晶圓亦 屬適合。舉例言之,德國專利DE-10054265 A1中曾述及此 類方法。該方法之重·要特徵是:鋼絲運動之方向重複變換 (振盪法),鋸鋼絲速率恆常不變之時段遠較鋸鋼絲加速或 減速之時段為短。It is also suitable to use a wire sawing method to form a low-wavy semiconductor wafer. By way of example, such a method is described in German patent DE-10054265 A1. The important and important feature of this method is that the direction of the wire movement is repeatedly changed (oscillation method). The time period when the wire speed is constant is much shorter than the time period when the wire is accelerated or decelerated.

200402787200402787

德國專利DE-1 00542 65中所引證恆常速率時 間與增加速率或減低速率時段持續期間之比值以低於=1 為佳。 、· 依照德國工業標準DIN 4774,起伏度Wt之定義 旦 測片段起伏度圖中最高點與最低點間之垂直距離。自里曰 體分開之半導體晶圓之起伏度至多為8微求, 曰^ 微米更佳。 主夕馮d 半導體晶圓之光澤度係用光加以測定,例如·兩射光 ,以特定角度(40。至80。,尤以60。更佳)輻射在;導體 晶圓上,並量測反射部分。所用參考標準係依照德國工業 標準DIN 675 30/國際標準化組織iso 2813内之標準a。本、 發明半導體晶圓之光澤度以至少70%為佳,尤以至少9〇%更 佳’粗度Ra以0 · 1微米至〇 · 5微米為佳,尤以〇 ·丨5至〇 · 3 5微 米更佳。 依照DIN 4768,粗度Ra係粗度剖面圖與總剖面圖中心、 f所有差異之算術平均值。粗度之測定係利用一可商購之 量測裝置(例如:附有量測針、稱之aPerthometer者)掃 描一特定片段(例如:5公厘)以測定上述之差異。 三、【發明内容】 本發明之内容係一由矽製之半導體晶圓及製造該矽半 _ 導體晶圓之方法 本發明之内容係一由石夕製成、用作製作電子元件主要 材料之半導體晶圓,該半導體晶圓之光澤度至少為7〇%及 粗度Ra為0· 1微米至〇· 5微米,該等特性係藉製造半導體晶The ratio of the constant rate time to the duration of the increasing or decreasing rate period cited in German patent DE-1 00542 65 is preferably below = 1. ·· According to the German Industrial Standard DIN 4774, the definition of the undulation degree Wt Once measured, the vertical distance between the highest point and the lowest point in the undulation diagram of the segment. The undulation of semiconductor wafers separated from the inside is at most 8 micron, preferably ^ micron. Gong Feng d semiconductor wafer's gloss is measured with light, for example, · two shots of light, radiated at a specific angle (40. to 80., especially 60. better); conductor wafers, and measurement of reflection section. The reference standard used is in accordance with standard a within the German Industrial Standard DIN 675 30 / ISO 2813. The gloss of the present and invented semiconductor wafers is preferably at least 70%, more preferably at least 90%. The thickness Ra is preferably from 0.1 μm to 0.5 μm, and especially from 0.5 to 5 μ. 3 5 microns is better. According to DIN 4768, the roughness Ra is the arithmetic mean of all differences between the center and f of the coarse profile and the gross profile. The measurement of the coarseness is performed by scanning a specific segment (for example, 5 mm) with a commercially available measuring device (for example, a person with a measuring pin and called aPerthometer) to determine the above difference. III. [Content of the Invention] The content of the present invention is a semiconductor wafer made of silicon and a method for manufacturing the silicon semi-conductor wafer. The content of the present invention is a material made of Shi Xi and used as a main material for making electronic components. A semiconductor wafer having a gloss of at least 70% and a roughness Ra of from 0.1 μm to 0.5 μm. These characteristics are obtained by manufacturing semiconductor crystals.

_δ% 第7頁 200402787 五、發明說明(4) 圓過程中唯一機械加工步驟鋼絲鋸割單晶體而達成。 該半導體晶圓最好用作製作電子元件之主要材料。 本發明之内容係一種由矽製造半導體晶圓之方法,在 該方法中,該半導體晶圓,連同許多半導體晶圓係在有經 由鋼絲-導引親之溝槽内運轉之鋼絲鋸鋼絲存在之情況下 ,自單晶體鋸割而成,其中由鋼絲鋸鋸割成半導體晶圓係 用以製造半導體晶圓之唯一機械加工步驟。 μ 四、【實施方式】 可增加半導體晶圓之光澤度並障 採用下列措施之一 低其粗度。 ,藉鋼絲鋸割自單晶體分開之半導體晶圓加以 蝕刻係用以改良半導體晶圓光澤度 χ 。 _兀,甲厌夂粗度之唯一加工步屬 之半導體晶圓加以餘刻並 用以改良半導體晶圓光澤 將藉鋼絲鋸割自單晶體分開 隨後加以清洗,且姓刻及清洗係 度及粗度之僅有加工步驟。 在半導體晶圓之蝕刻作用過程 硝酸(ΗΝΟ3)者為佳。為移除接近 ,所用蝕刻劑以含有 用自晶圓每個面移除之材科 面之晶體損傷,蝕刻作 用以清洗―清、含有界面活性_δ% Page 7 200402787 V. Description of the invention (4) The only mechanical processing step in the circle process is achieved by cutting a single crystal with a wire saw. The semiconductor wafer is preferably used as a main material for making electronic components. The present invention is a method for manufacturing a semiconductor wafer from silicon. In the method, the semiconductor wafer, together with a plurality of semiconductor wafers, is present in a wire saw wire running in a groove through a wire guide. In the case, it is cut from a single crystal. The semiconductor wafer sawed by a wire saw is the only mechanical processing step used to manufacture the semiconductor wafer. μ IV. [Embodiment] The gloss of semiconductor wafers can be increased and one of the following measures can be adopted to reduce its thickness. The etching of a semiconductor wafer separated from a single crystal by a wire saw is used to improve the gloss χ of the semiconductor wafer. _ Wu, the only processing step of the semiconductor wafer with a rough thickness is for a while and used to improve the gloss of the semiconductor wafer. It is separated from the single crystal by wire sawing and then cleaned. Only processing steps. In the etching process of semiconductor wafers, nitric acid (ΗΝΟ3) is preferred. In order to remove access, the etchant used contains crystal damage on the material surface removed from each side of the wafer, and the etching is used to clean-clear and contain interfacial activity

米至1一2微米更佳。 ㈤達35微米為佳,尤以8微 佳 200402787 圖式簡單說明 五、【圖式簡單說明】 第一圖A :示方法A之厚度分佈情形,特徵為溝槽間隔為等 距離。 第一圖B :示方法B之厚度分佈情形,不同者為溝槽間隔之 距離不同。 _Meters to 1 to 2 microns are more preferred. It is better to reach 35 micrometers, especially 8 micrometers. 200402787 Simple illustration of the diagram 5. [Simplified description of the diagram] The first diagram A: shows the thickness distribution of the method A, which is characterized by the equal spacing of the grooves. The first figure B: shows the thickness distribution of method B. The difference is that the distance between the grooves is different. _

第9頁Page 9

Claims (1)

200402787 六、申請專利範圍 1 · 一種由矽製成、用作製作電子元件主要材料之半導體 晶圓,其特徵為該半導體晶圓之光澤度至少為7〇%及粗度Ra 為0· 1微米至〇· 5微米,該等特徵係藉製造半導體晶圓過程 中唯一機械加工步驟鋼絲鋸割單晶體而達成。 2· 如申請專利範圍第1項之半導體晶圓,其中該半導體 晶圓係由區域〜抽拉之矽所組成且係用作製作電子元件之 主要材料。 3 :二,由石夕製造半導體晶圓之方法,在該方法中,該半 導體曰曰圓連同許多半導體晶圓,係在有經由鋼絲—導引較 之溝槽内運轉之鋼絲鋸鋼絲存在之情況下,自單晶體鋸割 而成其特彳政為由鋼絲鋸鋸割成半導體晶圓係用以萝生 導體晶圓之唯一機械加工步驟。 4辞-導如引申:之專二範圍第3項之方法’其中該鑛鋼絲通過鋼 、、、糸導引輥之溝槽内且該等溝槽係沿軸向各硐 兩溝槽間之間隔自鋼今道^丨和一娃2? ^ 相鄰 J丨和目綱綠,導引輥一鳊至鋼絲_導 端逐漸減小。 守W视對面一 5·如申請專利範圍第3或4項之方法,其中自單曰辦、 之半導體晶圓係加以叙刻日钟列作田# 平日日燈分開 圓光澤度之方法中唯一之加工步驟。 千導體晶 6·如申請專利範圍第3或4項之方法,其中自 之半導體晶圓係加以蝕刻並隨後加以清洗, :$開 清洗工作係用以增加半導體晶圓光澤度之方法中^用及 工步驟。 A之加 7. 如申請專利範圍第4、5或6項之方法,其中自單 晶體200402787 VI. Scope of patent application 1. A semiconductor wafer made of silicon and used as the main material for electronic components, characterized in that the semiconductor wafer has a gloss of at least 70% and a roughness Ra of 0.1 micron To 0.5 microns, these features are achieved by wire sawing single crystals, the only mechanical processing step in the manufacture of semiconductor wafers. 2. For example, the semiconductor wafer under the scope of patent application No. 1 in which the semiconductor wafer is composed of a region ~ drawn silicon and is used as the main material for making electronic components. 3: Second, a method for manufacturing a semiconductor wafer from Shixi. In this method, the semiconductor circle and many semiconductor wafers are in the presence of a wire saw wire running through a wire guide. In the case, the single crystal sawing process is the only mechanical processing step for sawing semiconductor wafers by wire sawing to produce conductive wafers. 4 words-Introductory: The method of item 3 of the second scope 'where the ore steel wire passes through the grooves of the steel, steel, and guide rollers and the grooves are axially between the two grooves. The interval is from steel to steel ^ 丨 and a baby 2? ^ Adjacent to J 丨 and mesh gang green, the guide rollers slump to the wire _ leading end gradually decreases. 5. Watch the opposite side. 5. If the method of the patent application scope item 3 or 4, the method is the only one among the methods of the semiconductor wafers of the Japanese and Japanese, and it is engraved. Processing steps. Thousands of conductor crystals 6. If the method of the scope of patent application No. 3 or 4, the semiconductor wafers are etched and then cleaned, the cleaning process is used to increase the gloss of semiconductor wafers. And work steps. The addition of A 7. If the method in the scope of patent application No. 4, 5 or 6 is applied, 第10頁 Cd.*% 200402787 六、申請專利範圍 分開之許多半導體晶圓具有之厚度分佈為至多± 1 0微米( 以一次鋼絲鋸之切割量為基準)。 8 · —種鋼絲鋸所用之鋼絲-導引輥,其沿軸向各自隔開 之溝槽係用以容納一鋸鋼絲,其特徵為在鋼絲-導引輥一 端兩相鄰溝槽間之間隔較在鋼絲-導引輥相對端者為窄。Page 10 Cd. *% 200402787 6. Scope of Patent Application Many separated semiconductor wafers have a thickness distribution of at most ± 10 microns (based on the cutting amount of a single wire saw). 8 · —A wire-guiding roller used for a wire saw. The grooves spaced apart in the axial direction are used to accommodate a saw wire, which is characterized by the interval between two adjacent grooves at one end of the wire-guiding roller. It is narrower than the opposite end of the wire-guiding roller. 第11頁Page 11
TW92122298A 2002-08-14 2003-08-13 Semiconductor wafer and process for producing the semiconductor wafer TWI286351B (en)

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DE2002137247 DE10237247B4 (en) 2002-08-14 2002-08-14 Method of manufacturing a silicon wafer

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TWI286351B TWI286351B (en) 2007-09-01

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JP2009094156A (en) * 2007-10-04 2009-04-30 Tohoku Univ Semiconductor substrate and semiconductor device
JP5256910B2 (en) * 2008-07-30 2013-08-07 株式会社Sumco Groove roller structure
CN101659089B (en) * 2008-08-28 2012-02-15 上海九晶电子材料股份有限公司 Method for slotting guide roller of multi-line cutting machine
DE102010005718B4 (en) * 2010-01-26 2011-09-22 Schott Solar Ag Wire guide roller for use in wire saws
CN102950660B (en) * 2011-08-26 2015-04-08 昆山中辰矽晶有限公司 Wire cutting device, main wheel structure thereof and method for manufacturing main wheel structure
DE102015200198B4 (en) * 2014-04-04 2020-01-16 Siltronic Ag Method for cutting semiconductor wafers from a workpiece with a saw wire
DE102017202314A1 (en) 2017-02-14 2018-08-16 Siltronic Ag Wire saw, wire guide roller, and method of simultaneously separating a plurality of disks from a rod
EP3943265A1 (en) * 2020-07-21 2022-01-26 Siltronic AG Method and device for simultaneously separating a plurality of plates from a workpiece

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3273163B2 (en) * 1996-09-06 2002-04-08 シャープ株式会社 Multi wire saw
DE19841492A1 (en) * 1998-09-10 2000-03-23 Wacker Siltronic Halbleitermat Method and device for separating a large number of disks from a brittle hard workpiece
DE19936834A1 (en) * 1999-08-05 2001-02-15 Wacker Siltronic Halbleitermat Saw wire and method for lapping severely brittle workpieces
DE10014445C2 (en) * 2000-03-23 2002-01-24 Wacker Siltronic Halbleitermat Process for cutting a semiconductor rod
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