1286274 九、發明說明： 【發明所屬之技術領域】 本發明提供一種產生對準記號之方法以及其光罩，尤指一種 產生可應用於兩種不同曝光機的對準記號之方法以及其光罩。 【先前技術】 在半導體製程的領域之中，微影製程已經是製作過程中不可 或缺的步驟之-；如業界所習知，微影過程包含有下觸幾個步 驟·於基板上方塗佈光阻，細光料基板上的光阻進行曝光以 疋義電子產對應的電路圖案(circuitpattem)，如此才能夠對光阻 下的基板進行接下來的姓刻過程，以形成所需的電路圖案；當 然’ -個電子產品的完成，必須重複執行數次上述的步驟，以液 曰曰面板作為例子來說，就有五個光罩必須進行微影，來分別完成 汲極層(source dmin，SD)，接觸層(contact h〇le，CH)，畫素電極層 (pixel electrode，PE)五個不同層的電路圖案。 如業界所習知’在執行前述祕光過程之前，鮮必須先正 確地對準基板，如此才㈣使電關雜準確地投影到基板上。 而對準兄號(alignmentmark)，顧名思義，便是用來支援前述光罩 與基板之間的對準操作。_般來說，前述對朗極層（第一層)的 光罩’不但具有電子產品所對應的祕亦具有預先定義好 的對準^ ’目此當執行閘極層祕光操作時，對準記號便會同 時L由閘極層的鮮軸於基板之上；而之後的油光罩(譬如前 1286274 述對應半導體層’馳欲極層，接觸層，晝素電極層的各個光罩) 上亦已具有預先定義好的對準記號，因此於執行半導體層 沒極層，接綱，晝素電極層的曝絲作之前，係彻光罩上面 •的鮮記號去鮮输形餅絲上_解記號，如此便可確 . 保曝光彳呆作的精確度。 ，然而，解記胁基板上·成的位置，會直接影響到整個 製程的結果’在此請參閱第丨圖，第丨圖說明了不同位置的對準 記號與曝細__龍_。魏，對於雜層(第—層)的曝 光操作而言，在實際操作中，第—層的曝光免不了會有變形的現 象(如圖中曲線100)。 纟此假設祕層光罩攸義賴準峨欲曝絲舰位置 11〇，但是如前所述，由於第一層的曝光會有變形的現象，因此對 • 準記號於基板形成的位置會比預定位置110更為内縮；因此當其 後的數層光罩要進行曝光時，光罩上的對準記號便會落於基板上 對準記號的外側，這造成曝光出來的電路圖案(如第丨圖中虛線150) 亦具有内縮的情形。 另一方面，若假設閘極層光罩所定義的對準記號係預定曝光 於預定位置120，但也由於變形的現象，對準記號12〇於基板形成 的位置會較為外擴，因此當其後的數層光罩要進行曝光時，光罩 上的對準記號便會落於基板上對準記號的内側，這造成曝光出來 1286274 的電路圖案(如第1圖中虛線⑽)亦具有外擴的情形。 由此可知’解記號的不同位置，對於電關案的形成位置 曰xe成誤差(如第1圖令的差量D);但是由於這五道光罩的微影製 程一般都S由同-㈣光機所完成，對於同—機台來說，五道光 罩係利用相同的-組對準記號進行曝光，因此曝光出來的電路圖 案也不會有太大的誤差。 但是各液晶面㈣造财時會制兩種不_曝光機進行液 晶面板的製程。由於生產速度的考量，會考慮以兩種曝光機 混搭的方式，來生產液晶面板。舉例來說，業者可以先利用第一 種曝光機(譬如C_曝光機)完成數道光罩，再於第二種曝光機 (譬如Nikon曝光機)完成其餘的數道光罩。 在此請參閱第2圖，第2圖為習知閘極層光罩2〇〇的示意圖。 由於兩種曝光機的規格不同，其對準記號互不相同，並且對應不 同曝光機的對準記號，其擺放位置亦有所差異；因此在閘極層光 罩進行曝光時，便會把不同曝光機的對準記號形成於玻璃基板的 不同位置。如前所述，當兩曝光機混搭來製造液晶面板時，前數 道光罩是依第一對準記號210進行曝光，而其餘的光罩則是依第 二對準記號220進行曝光，由於不同曝光機對準記號的擺放位置 不一，曝光出來的電路圖案便會具有相對應的誤差；換句話說， 電路圖案可能會有不同的重疊(overlap)情形。 1286274 【發明内容】 因此本發明之主要目的之一在於提供一種可應用於兩種不同 曝光機的對準記號之方法以及其光罩，以解決習知技術中的問題。 根據本發明之一實施例，本發明提供一種於一基板產生對準 記號(alignmentmark)之方法，該方法包含有：提供一光罩，該光 罩係疋義至少一對準δ己號組，該對準記號組包含一第一曝光機可 修 使用之一第一對準記號與一第二曝光機可使用之一第二對準記 號；以及於該第一曝光機利用該光罩以於該基板上產生該第一對 準記號以及該第二對準記號；其中該第一對準記號係大致上 (substantially)緊鄰該第二對準記號。 根據本發明之一實施例’本發明另提供一種光罩，該光罩可 於一基板產生對準記號(alignment mark)，並且該光罩包含有··至 鲁 少一對準記號組，該對準記號組包含有··適用於一第一曝光機之 一第一對準記號；以及適用於一第二曝光機之一第二對準記號； 其中該第一對準記號係大致上（substantially)緊鄰該第二對準記 號。 本發明的對準記號組中，對應兩機台的對準記號相互緊鄰， 因此在進行液晶面板的製程時，不會由於對準記號間的距離過 大，而導致電路圖案重疊(overlap)偏移過大的情形，換句話說，本 - 發明可以降低電路圖案的曝光誤差，提高良率，也使得混搭兩機 1286274 台來製作液晶面板的方式更為可行。 【實施方式】 在以下的麻巾’亦液晶面板的餘作為本發明之 ，例。請參閱第3圖，第3圖為本發_極層光罩.的示意圖。 ，、包含有液晶面板的電路_ 33G以及多數對準記號組34〇，盆 每一對準記齡亦包含有—第—解記號⑽一第二對料 號320，該第一對準記號31〇係為Can〇n曝光機之對準記號該 第-對準記號320係為Nikon曝光機之對準記號，而在每一個對 準記號組340卜該第-對準記號31〇與該第二對準記號3 是相互緊鄰的。 由於本發明之該第-對準記號31G與該第二對準記號3 互緊鄰，因此在閘極層光罩3〇〇進行曝光製程時在玻璃基板上 的該第-對準記號31〇與該第二對準記號32〇亦會緊鄰。該第一 #對準記號310與該第二對準記號32()擺放位置的差距會導致電路 圖案不同的重疊(overiap)狀況；如本發明的該第一對準記號31〇 與該第二對準記號32〇相互緊鄰時’可使該第—對準記號篇與 該第二對準記號320的間距達到最小。t光罩必須於不同的曝光 機執行曝光操作時，由於該第一對準記號310與該第二對準記號 320的位置幾乎對應基板上的同一個位置，曝光出來的電路圖案也 不會有太大的誤差，因此，本發明可有效降低電路圖案的重疊 (overlap)誤差。 ^286274 此外，請參閱第4圖，第4圖為第3圖所示之對準記號組34〇 的局部放大圖。一般來說，在進行對準操作時，係對於對準記號 中的島區域(island)或是窗區域(window)進行對準；因此於第4圖 •所示，本發明的對準記號組340巾，該第-對準記號31〇的島區 ' 域311與記號320的島區域321緊緊相鄰，這樣的配置可以使得 a己號310與記號320的距離達到最小，並且由於該第一對準記號 .310的島區域311與該第二對準記號320的島區域321並沒有相互 重疊，因此也不會影響到其後各道光罩對準操作的進行。當然， 本發明並未限制兩圖樣的相鄰方式，換言之，若欲利用窗區域進 行對準，那麼亦可將兩§己號的窗區域以相互相鄰進行配置，如此 的相對應變化，亦不違背本發明的精神。 雖然在先前的揭露之中，皆以液晶面板的製程作為本發明之 一實施例；然而，本發明並未限制所應用的領域；各種各樣的電 •子產品均可利用本發明的精神，混搭兩種不同的曝光機製造之， 因此’玻璃基板亦為本發明之一實施例，而非本發明之限制，本 發明亦可實施於一般的晶圓(wafer)上，如此的相對應變化，亦屬 本發明的範疇。 此外’各種不同的曝光機均可利用本發明的精神加以混搭， 來製作所需的電子產品，如此的相對應變化，亦屬本發明的範疇。 相較於習知技術，本發明的對準記號組中，對應兩曝光機的 1286274 對準記號相互㈣，因此在進行液晶面板的製程時，不會由於對 準記號_距離過大，叫致電路_續則咖移過大的情 形，換句話說，本發明可以降低電路圖案的曝光誤差，提高良率， 也使得混搭兩曝光機來製作液晶面板的方錢為可行。 以上所述僅為本發明之較佳實施例，凡依本發明申請專利範 圍所作之均㈣化與修飾，皆應屬本㈣之涵蓋範圍。 【圖式簡單說明】 第1圖說明了不同位置的對準記號與曝光關樣的械應關係。 第2圖習知閘極層光罩的示意圖。 第3圖為本發明閘極層光罩的示意圖。 第4圖為第3圖所示之對準記號組的局部放大圖。 【主要元件符號說明】1286274 IX. Description of the Invention: [Technical Field] The present invention provides a method of producing an alignment mark and a reticle thereof, and more particularly to a method of producing an alignment mark applicable to two different exposure machines and a reticle thereof . [Prior Art] In the field of semiconductor manufacturing, the lithography process is already an indispensable step in the manufacturing process; as is well known in the industry, the lithography process involves several steps of coating the substrate. The photoresist, the photoresist on the fine-light substrate is exposed to the circuit pattern corresponding to the electronic product, so that the substrate under the photoresist can be subjected to the next process to form the desired circuit pattern. Of course, - the completion of an electronic product, the above steps must be repeated several times. With the liquid helium panel as an example, there are five masks that must be lithographed to complete the drain datum (source dmin, SD), contact layer (CH), pixel electrode (PE), five different layers of circuit patterns. As is well known in the art, it is necessary to correctly align the substrate before performing the aforementioned secret light process, so that (4) the electrical capacitance is accurately projected onto the substrate. The alignment mark, as the name suggests, is used to support the alignment between the reticle and the substrate. _ In general, the aforementioned mask for the polar layer (the first layer) not only has the pre-defined alignment of the electronic product corresponding to the secret of the electronic product, but when performing the gate layer secret light operation, The standard mark will be simultaneously L on the substrate from the fresh axis of the gate layer; and then the oil mask (such as the first 1286274 corresponding to the semiconductor layer 'quiet pole layer, contact layer, each mask of the halogen electrode layer) It also has a pre-defined alignment mark, so before performing the semiconductor layer no-polar layer, the outline, and the exposure of the halogen electrode layer, the fresh mark on the top of the mask is used to freshen the shape of the cake. Solve the mark, so that you can confirm the accuracy of the exposure. However, the location of the substrate on the substrate will directly affect the results of the entire process. Please refer to the figure below. The figure shows the alignment marks and exposures at different locations. Wei, for the exposure operation of the hetero layer (the first layer), in actual operation, the exposure of the first layer is inevitably deformed (curve 100 in the figure).假设 This assumes that the secret layer mask 攸 赖 赖 赖 曝 曝 曝 曝 曝 曝 曝 曝 曝 曝 曝 曝 曝 曝 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 The predetermined position 110 is more retracted; therefore, when a plurality of subsequent masks are to be exposed, the alignment marks on the mask will fall outside the alignment marks on the substrate, which causes the exposed circuit patterns (eg, The dotted line 150) in the figure also has a contraction. On the other hand, if it is assumed that the alignment mark defined by the gate layer mask is predetermined to be exposed to the predetermined position 120, but due to the phenomenon of deformation, the alignment mark 12 is more outwardly expanded at the position where the substrate is formed, so when When the subsequent layers of the mask are to be exposed, the alignment marks on the mask will fall on the inside of the alignment marks on the substrate, which causes the circuit pattern of 1,282,274 (such as the dotted line (10) in Fig. 1) to be exposed. Expansion situation. It can be seen that 'the different positions of the deciphering marks, the position 曰xe of the electric switch case is an error (such as the difference D of the first figure); but since the lithography process of the five masks is generally S is the same - (four) The optical machine is completed. For the same machine, the five masks are exposed by the same-group alignment mark, so the exposed circuit pattern does not have much error. However, each liquid crystal surface (4) will produce two kinds of liquid crystal panels without the exposure machine. Due to the production speed considerations, it is considered to produce a liquid crystal panel by mixing two exposure machines. For example, the operator can first complete the reticle with a first exposure machine (such as a C_exposure machine) and the remaining reticle with a second exposure machine (such as a Nikon exposure machine). Please refer to FIG. 2, which is a schematic diagram of a conventional gate layer mask 2〇〇. Due to the different specifications of the two exposure machines, the alignment marks are different from each other, and the alignment marks of different exposure machines are also different in position; therefore, when the gate layer mask is exposed, it will be The alignment marks of the different exposure machines are formed at different positions on the glass substrate. As described above, when the two exposure machines are mashed together to manufacture the liquid crystal panel, the first reticle is exposed by the first alignment mark 210, and the remaining reticle is exposed by the second alignment mark 220, due to the difference. The positions of the exposure machine alignment marks are different, and the exposed circuit patterns have corresponding errors; in other words, the circuit patterns may have different overlap situations. SUMMARY OF THE INVENTION It is therefore one of the primary objects of the present invention to provide a method of aligning marks that can be applied to two different exposure machines and a reticle thereof to solve the problems in the prior art. According to an embodiment of the present invention, the present invention provides a method for generating an alignment mark on a substrate, the method comprising: providing a photomask, the photomask being at least one aligned with the δ self group, The alignment mark set includes a first exposure machine repairable using a first alignment mark and a second exposure machine usable second alignment mark; and the first exposure machine utilizes the light cover to The first alignment mark and the second alignment mark are generated on the substrate; wherein the first alignment mark is substantially immediately adjacent to the second alignment mark. According to an embodiment of the present invention, the present invention further provides a photomask capable of producing an alignment mark on a substrate, and the photomask includes a pair of alignment marks. The alignment mark group includes a first alignment mark suitable for one of the first exposure machines; and a second alignment mark applied to one of the second exposure machines; wherein the first alignment mark is substantially Basically adjacent to the second alignment mark. In the alignment mark group of the present invention, the alignment marks corresponding to the two machines are in close proximity to each other, so that when the process of the liquid crystal panel is performed, the circuit pattern overlap is not caused due to the excessive distance between the alignment marks. In the too big situation, in other words, the present invention can reduce the exposure error of the circuit pattern and improve the yield, and also makes it more feasible to mix and match two 1262774 sets of liquid crystal panels. [Embodiment] The following linens are also used as the examples of the present invention. Please refer to FIG. 3, which is a schematic diagram of the present invention. , a circuit _ 33G including a liquid crystal panel, and a plurality of alignment mark groups 34 〇, each of the alignment ages of the basin also includes a first-descriptive number (10) and a second pair of material numbers 320, the first alignment mark 31 The 〇 is the alignment mark of the Can〇n exposure machine. The first alignment mark 320 is an alignment mark of the Nikon exposure machine, and the first alignment mark 31〇 and the first alignment mark group 340 The two alignment marks 3 are in close proximity to each other. Since the first alignment mark 31G and the second alignment mark 3 of the present invention are in close proximity to each other, the first alignment mark 31 on the glass substrate during the exposure process of the gate layer mask 3 is The second alignment mark 32〇 will also be in close proximity. The difference between the first # alignment mark 310 and the second alignment mark 32 () placement position may result in different overiap conditions of the circuit pattern; the first alignment mark 31 and the first aspect of the present invention When the two alignment marks 32 〇 are in close proximity to each other, the distance between the first alignment mark and the second alignment mark 320 can be minimized. When the mask is required to perform an exposure operation on different exposure machines, since the positions of the first alignment mark 310 and the second alignment mark 320 almost correspond to the same position on the substrate, the exposed circuit pattern does not have any Too large an error, therefore, the present invention can effectively reduce the overlap error of the circuit pattern. ^286274 In addition, please refer to FIG. 4, which is a partially enlarged view of the alignment mark group 34A shown in FIG. Generally, in the alignment operation, the island or the window in the alignment mark is aligned; therefore, as shown in FIG. 4, the alignment mark group of the present invention 340 towel, the island area 311 of the first alignment mark 31〇 is closely adjacent to the island area 321 of the mark 320, such a configuration that the distance between the a number 310 and the mark 320 is minimized, and The island area 311 of the alignment mark .310 and the island area 321 of the second alignment mark 320 do not overlap each other, and thus do not affect the progress of the subsequent mask alignment operations. Of course, the present invention does not limit the adjacent manner of the two patterns. In other words, if the window area is to be used for alignment, the window areas of the two § hex numbers may be arranged adjacent to each other, and the corresponding change is also It does not contradict the spirit of the invention. Although in the foregoing disclosure, the process of the liquid crystal panel is taken as an embodiment of the present invention; however, the present invention does not limit the field of application; various electrical and electronic products can utilize the spirit of the present invention. Mixing and manufacturing two different exposure machines, so the 'glass substrate is also an embodiment of the invention, and not the limitation of the invention, the invention can also be implemented on a general wafer, such a corresponding change It is also within the scope of the invention. In addition, various exposure machines can be mashed together to make desired electronic products by using the spirit of the present invention, and such corresponding changes are also within the scope of the present invention. Compared with the prior art, in the alignment mark group of the present invention, the 1826274 alignment marks of the two exposure machines are mutually mutually (four), so that when the process of the liquid crystal panel is performed, the alignment mark _ distance is not too large, so that the circuit is called _Continuously, the coffee is oversized. In other words, the invention can reduce the exposure error of the circuit pattern and improve the yield, and also makes it feasible to mix and match the two exposure machines to make the liquid crystal panel. The above description is only the preferred embodiment of the present invention, and all the (four)izations and modifications made by the patent application scope of the present invention should be covered by the present invention. [Simple description of the diagram] Figure 1 illustrates the relationship between the alignment marks at different positions and the exposure. Figure 2 is a schematic view of a conventional gate layer mask. Figure 3 is a schematic view of a gate layer mask of the present invention. Fig. 4 is a partially enlarged view of the alignment mark group shown in Fig. 3. [Main component symbol description]
預定位置 110、120 電路圖案 150 、 160 、 230、330 第一對準記號 210、310 第二對準記號 220、320 閘極層光罩 --- ------ 200、300 對準記號組 340 島區域 311 ^ 321 差量 DPredetermined position 110, 120 circuit pattern 150, 160, 230, 330 first alignment mark 210, 310 second alignment mark 220, 320 gate layer mask ---------- 200, 300 alignment mark Group 340 island area 311 ^ 321 difference D