TWI281985B - System and method for resistance measuring - Google Patents

System and method for resistance measuring Download PDF

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Publication number
TWI281985B
TWI281985B TW93139955A TW93139955A TWI281985B TW I281985 B TWI281985 B TW I281985B TW 93139955 A TW93139955 A TW 93139955A TW 93139955 A TW93139955 A TW 93139955A TW I281985 B TWI281985 B TW I281985B
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Taiwan
Prior art keywords
impedance
measurement
current
board
host
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TW93139955A
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Chinese (zh)
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TW200622259A (en
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Po-Jui Chen
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Inventec Corp
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Publication of TWI281985B publication Critical patent/TWI281985B/en

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Abstract

A kind of system and method for resistance measuring, linked with the mainframe to measure the resistance of mechanic plate. The plural contacts of the connecting unit are linked electrically with the mechanic plate. The positive or negative current signal emitted from the current control unit of the mainframe and is transited into the connecting unit. The relative resistances are generated according to the current signals. The sequence signals are generated from the measuring control signals of resistance measuring system. The resistance of testing points of the mechanic plate can be read sequentially. The signals which are read must be transferred using digital signal transmission and transited into measuring mainframe. The resistances are shown from display unit linked with the measuring mainframe received the digital signals.

Description

1281985 九、發明說明: 【發明所屬之技術領域】 本發明係一種有關於自動量測機扳阻抗之量測系統 及方法’特別係有關於一種藉由正反向電流方式量測機板 阻抗以此判定機板狀況之量測系統及方法。 【先前技術】 伞所周知’機板品質之優劣與否,攸關於該機板所). =電子設備運作狀態正常與否,故此,為確保電子^ 。口貝’-般而言,機板於生產後,均須進行嚴格檢測。 習知機板檢測方法中,係透過人力作業及時域反射累 、、則狀°ηΓη Reflect°meter)進行,時域反射器其連接有成 人員兩手各執—測試棒以觸及該機板上所欲 ==觸點’藉由該時域反射器所產生之電= 需電流回路以進行阻抗測試。由於此種作法 作掌較為够:且:板的每一接觸點各別測試’故使得檢測 、糊乂為’、頊且需耗費諸多時間;況且 故測試人員將測試棒誤觸其 : 行量測;量測之不正確’即導致需反覆連 此些處理不僅影響工作進度,而且影響產品質量, 更甚者,殃及公司之產品信譽。 里 動丄以,於我國專利公告第448299號案提出-種半自 、反阻“測系統’其係透過電腦以操控時域反射器 18153 5 1281985 之運作並判讀測試值,而時測反射器之運作並判斷無數組 於末端接設有伸縮探針之高頻纜線,以逐一量測機板各焊 點之阻抗值,進而替代人力操作,故節省時間及人力負擔, 且提高量測之準確性。 然而,此種半自動主機板阻抗量測系統卻仍存有若干 缺點。以特定電子零件而言,例如以PN接面所構成之電 晶體或二極體等電子元件,電流由P極(陽極)流經N極 (陰極)時電路導通且阻抗為零值,此即判斷為短路;而 由陰極流經陽極時電路截止且阻抗為無窮大,會判斷為開 路。由此可知,此種半自動主機板阻抗量測系統僅僅提供 單向量測的情況下,並無法對該機板上所欲量測之接觸點 測得正確阻抗。 另外,此種半自動主機板阻抗量測系統需透過時域反 射器進行量測,故增加硬體成本。 再者,上述之半自動主機板阻抗量測系統對大規模量 產之機板之量測作業而言,其並無法提供有關於機板正常 運作下所輸出的標準阻抗值與此類多數機板阻抗量測後所 得量測結果比較之機制,從而需對各個機板——進行量 测,亦需花費相當多的時間完成機板量測,並無法有效提 升量測效率。 爲此,如何提供一種機板阻抗量測系統,以圖改善前 述技術之缺失’得令機板阻抗量測作業更有效率,而快速 及省事地找出機板故障點,乃是目前業界亟待解決之難題。 【發明内容】 6 18153 1281985 於上34習知技術之缺點,本發明之主要目的係在於 種阻抗量測系統及方法,其係應用於機板阻抗量測 二加^達職化操作之流程,縮短量測時間,進而大幅 曰加里測之效率以符合量產之要求。 方、去本ί:月之又一目的係在於提供一種阻抗量測系統及 量測方;試處理,其對高阻抗接觸點 選仃改進 ^问其1測之準確性。 丨的係在於提供-種阻抗量測系統及 :可; :達職抗夏測處理,故可有效降低硬體成本。 ”、、達上述及其它目的,本發明提供—種阻 及方法。本發明之阻抗量測系統係用以透過糸、、先 機板之複數個待測點進行阻抗量測, =機以對 複數個連接點之接頭單元,用以各別電性連括:具有 猶待測點;係分別與該量測主機及接= = 號以輸出正向電流或負向電流信號’並將控制信 單元之連接點,以使該機板之待測點 ^亥接頭 產生相對應的阻抗;分別與該量測主機電=號 =序邏輯單元,接收該量測主機== 制L號,以根據該量測控制信號產生順 θ 工 讀取該接頭單元之連接點所對應Ά ’得以順序 以及分別與該量測主機及接^^相點的阻抗; 換器,用以接收該量測主機二=接的類比數位轉 所毛出的轉換錢,以接收透 18153 7 1281985 過=接頭單元之連接點所接收到的對應阻抗,並將該阻抗 =仃數位轉換,以將轉換後所得的數位信號傳送至量 2主機,進而使該量測主機根據所接收到的 其電性連接的顯示單元顯示該數位信號所代表的阻抗y、 本發明之阻抗量測方法,係應用於與量測 接的阻抗量測系統上,得 ^ 測,該方法至少包括以下進行阻抗量 有複數個連接點之接頭單 j糸、冼透過具 接,令該阻抗量測系統根據量測主機所 =連 諕以輸出正向電流或負向電 、书机工制h 口口- k號,並將其傳送5兮掉-石 早兀之連接點,以使該機板之待測 ,δ亥接頭 產生相對的阻抗;令該阻抗量測系统根=、㈣電流信號 的量測控制信號以產生順序信號 广豕里:J主機所發出 2之連接點所對應之機板上待測點:二:序接頭單 夏測系統根據該量測主機所發出二/令該阻抗 接,單元所讀取到的阻抗進行數位信號2,’以將透過該 所侍的數位信號傳送至量測主機,、且將轉換後 所接收到的數位信號令與其電性連=而,该I測主機根據 位信號所代表的阻抗。 的頭不單元顯示該數 口此’透過上述之阻抗量測系統及 地對機板待測點進行之阻抗量測, 方法,可更有效率 速,且簡化操作之流程,縮短測試::!二量測作業更為迅 =度,進而大幅增加量測之效率以二旦:提高量測之 【實施方式】 τ ^里產之要求。 18153 8 1281985 ::1係藉,特定的具體實例說明本發明之實施方 工,无、;此技藝之人士一 瞭解本發明之並μ 曰所揭不之内容輕易地 的具體實例加財功效。本發明亦可藉由其他不同 =不同觀點與應用,在卿本發;=== 修飾與變更。 1肖评卜進仃各種 如第1圖所示者係用以說 基本架構方塊示意圖。 =月^則几置測系統的 以透過量測主機2 二:阻k量測系統1係用 以圖示)進行阻抗量二待測點(在此未予 單元10、正反向單元u Λ丨广几里測系統1至少包括接頭 換器(ADC) 13。、順序邏輯單元12及類比數位轉 電腦裝置,且該4量::::::土型電腦或筆記型電腦等 測資訊的顯示單元20,該顯示:= 妾了用以顯示阻抗量 CRT螢幕等。 70 20例如LCD螢幕或 該機板3係例如主機 般而言,該機板3上設有二二 圖不),該連接埠係用以將 、接埠(在此未予以 傳輸,以及將欲輸入至該機板 所需輸出的資料對外 收及處理,且該機板3所設之 貝料供該機板3對内接 (Ρπι),例如3〇或6〇腳等。該2蜂係具有複數個連接腳 有複個連接點(在此未予以圖=从板3之連接埠係透過具 明之阻抗量測系統 Θ不)的接頭單元]0而與本發 連接進而達到對機板3之複數個待 18153 1281985 測點進行阻抗量測,其中,該待 〇 , λΑ ^ 寸只J ”、、占知才日例如設於該機板 3上連接埠的連接腳。且本發 ϋ 之阻抗置測糸統1之接頭 早广:係:如小型電腦系統介面(Smau c * s_ —W⑶)' 周邊元件元件連接介面(penpheral1281985 IX. Description of the Invention: [Technical Field] The present invention relates to a measuring system and method for measuring the impedance of an automatic measuring machine, particularly relating to measuring the impedance of a board by a forward-reverse current method. This measurement system and method for determining the condition of the board. [Prior Art] Umbrella is well known. The quality of the board is not good or bad, about the board.) = The operating status of the electronic equipment is normal or not, so to ensure the electronic ^. In general, after the production of the machine board, strict inspection is required. In the conventional method for detecting the machine board, the manual field reflection is performed by the manual operation, and the time domain reflector is connected to the human body. The test rod is connected to the test board to touch the board. The == contact's electricity generated by the time domain reflector = current loop required for impedance testing. Because this method is more than enough: and: each contact point of the board is tested separately, so it makes the detection, the paste is ', and it takes a lot of time; otherwise, the tester mistakes the test stick: The measurement is not correct. This leads to the need to repeatedly deal with these processes not only affect the progress of the work, but also affect the quality of the product, and more importantly, the company's product reputation. In the case of China Patent Announcement No. 448299, a semi-self- and anti-resistance "measurement system" is operated by a computer to manipulate the time domain reflector 18153 5 1281985 and read the test value, while the time measuring reflector The operation and judging that there is no high-frequency cable with the telescopic probe at the end, to measure the impedance value of each solder joint of the board one by one, instead of manpower operation, saving time and manpower, and improving the measurement Accuracy. However, such a semi-automatic motherboard impedance measurement system still has several disadvantages. For a specific electronic component, for example, an electronic component such as a transistor or a diode formed by a PN junction, the current is from the P pole. When the anode (anode) flows through the N pole (cathode), the circuit is turned on and the impedance is zero, which is judged to be a short circuit; and when the cathode flows through the anode, the circuit is turned off and the impedance is infinite, and it is judged to be an open circuit. The semi-automatic motherboard impedance measurement system only provides a single vector measurement, and can not measure the correct impedance of the contact point to be measured on the board. In addition, this semi-automatic motherboard impedance measurement system It is necessary to measure through the time domain reflector, so the hardware cost is increased. Moreover, the semi-automatic motherboard impedance measurement system described above cannot provide relevant information for the mass production of the machine board. The mechanism of comparing the standard impedance value outputted under normal operation of the board with the measurement result obtained by measuring the impedance of most of the boards, so that it is necessary to measure each board, and it takes a considerable amount of time to complete the machine. The measurement of the board does not effectively improve the measurement efficiency. To this end, how to provide a board impedance measurement system to improve the lack of the above technology, so that the board impedance measurement operation is more efficient, and quickly and economically Finding the fault point of the machine board is a difficult problem to be solved in the industry at present. [Abstract] 6 18153 1281985 The disadvantage of the prior art is that the impedance measuring system and method are applied. In the process of measuring the impedance of the board, the process of the operation is shortened, and the measurement time is shortened, so that the efficiency of the measurement is greatly increased to meet the requirements of mass production. It is to provide an impedance measurement system and measurement method; trial processing, which improves the accuracy of the high-impedance contact point and selects the accuracy of the measurement. The system is to provide an impedance measurement system and: The utility model can effectively reduce the hardware cost. The invention provides the resistance and the method. The impedance measuring system of the invention is used for impedance measurement through a plurality of points to be tested of the first board and the first board, and the joint unit of the plurality of connecting points is used for each electrical connection: Waiting for the measurement point; respectively, the measurement host and the == number to output the forward current or negative current signal 'and the connection point of the control unit to make the board to be tested Corresponding impedance; respectively, with the measuring host electric = number = sequence logic unit, receiving the measuring host == system L number, according to the measuring control signal generating the θθ work to read the joint point of the joint unit Corresponding to Ά 'the order and the impedance of the measurement host and the connection point respectively; the converter is used to receive the conversion money of the analog-to-digital conversion of the measurement host 2 to receive the 18153 7 1281985 The corresponding impedance received by the connection point of the connector unit, and the impedance=仃 digit is converted to transmit the digital signal obtained after the conversion to the volume 2 host, thereby making the measurement host according to the received The electrically connected display unit displays the digital letter The impedance y represented by the number, the impedance measuring method of the present invention is applied to the impedance measuring system connected to the measuring, and the method includes at least the following joints for performing a plurality of connection points of the impedance amount.糸, 冼 through the connection, so that the impedance measurement system according to the measurement of the host = connected to output forward current or negative power, book machine h port - k number, and send it 5 - off - The connection point of the stone early 兀, so that the board is to be tested, the δ hai joint produces a relative impedance; so that the impedance measurement system root =, (4) the current signal measurement control signal to generate the sequence signal Guangli: J The point to be measured on the board corresponding to the connection point issued by the host 2: 2: The serial joint system of the summer test system according to the measurement unit sends the second/order of the impedance connection, and the impedance read by the unit carries out the digital signal 2 , 'to transmit the digital signal transmitted through the device to the measurement host, and to electrically connect the digital signal received after the conversion, and the I test host according to the impedance represented by the bit signal. The head does not display the number of ports. The impedance measurement by the above-mentioned impedance measurement system and the ground-to-measurement point of the board can be more efficient, and the operation process is simplified, and the test is shortened::! The second measurement operation is more rapid, and the efficiency of the measurement is greatly increased to two: to improve the measurement [embodiment] τ ^ production requirements. 18153 8 1281985 ::1 is a specific example to illustrate the implementation of the present invention. The invention may also be modified and altered in the present invention by means of other different = different viewpoints and applications. 1 Xiao Ju Bu Jin Yu various As shown in Figure 1 is used to say the basic architecture block diagram. = month ^ then several measurement systems to pass through the measurement of the host 2 2: resistance k measurement system 1 is used to illustrate) the impedance level of the two points to be measured (in this case, the unit 10, the forward and reverse units u Λ丨 几 几 测 测 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 顺序 顺序 顺序 顺序 顺序 顺序 顺序 顺序 顺序 顺序Display unit 20, the display: = 用以 used to display the impedance amount CRT screen, etc. 70 20 such as LCD screen or the machine board 3 is, for example, a host, the board 3 is provided with two or two diagrams, The connection system is used for connecting and connecting (the data is not transmitted here, and the data to be input to the board is required to be received and processed, and the material of the board 3 is provided for the board 3 Inscribed (Ρπι), for example, 3〇 or 6〇, etc. The 2 bee has a plurality of connecting legs with multiple connecting points (not shown here = connected from the board 3 through a well-defined impedance measuring system)接头 ) 的 接头 ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] ] 阻抗In the middle, the λΑ^ inch is only J ”, and the acquaintance day is set, for example, on the connecting pin of the connecting plate on the board 3. The impedance of the present invention is as early as the connector: Such as small computer system interface (Smau c * s_ - W (3)) 'peripheral component connection interface (penpheral

Component Interconnect ; PCI )或锸而乂丄 „ rn 1 T r 」次又面針腳定義記憶體模Component Interconnect ; PCI ) or „ 锸 „ rn 1 T r ”Second-side stitch definition memory phantom

組(Dual ln-lme Mem〇 M 介而,菇m立 les,DIMM)等型態的插槽 w面,猎此連接該機板3。 u亥正反向單元1 1、順序 哭(ADCM ·η尨\ 饵早兀12及類比數位轉換 透過例如8255介面卡的微電腦控制 向單二二用接頭單元11電性連接,其中,該正反 早兀11 k用以接收該量測主 面卡所笋出的+枝2透過例如上述8255介 心:;的:_信號以輸出正向電流或負向電流之 有;=查 電流信號傳送至該接頭單元10,使該且 有複數個連接點的接頭單 ^ 至該機板3之待測點,、以使夂個; (其係利㈣靖她㈣生相對應的阻抗 如上述^係用以接收該量測主機2透過例 控制俨泸產:w戶斤發出的量測控制信號,以根據該量測 接點所對應連接之機板3上待測點的阻抗。 連 係用以接收該量測主機2透過例如上述 、Λ 卡所發出的轉換信號,以根據該轉抑f卢而接收 透過該接頭單元1 〇夕坫从 和供L就而接收 阻抗逸—、D 接點所接收到的對應阻抗,並將該 丁到口號轉,以將轉換後所得的數位信號傳送 18153 1281985 至里測主機2中’進而使該 位信號令與其電性連接」主私2根據所接收到的數 代表的阻抗。 、早兀2〇顯示該數位信號所 本舍明之/1 且抗q 主機2的控制軟體而發出泰、ώ 、 D内建且執行於該量測 轉換信號,以達到對機板二號、量測控制信號及 不須透過習知之時域反射 :〜占的阻抗谓測處理。除 電性連接的特定電子零件亦對於该機板3之待測點所 該待測點所電性連接的電子、^測到較精確的阻抗,例如 透過本發明之阻抗二^為電晶體或二極體時,可< 向電流或反向電产,从π' 〇早兀11所輸出的正 處理,而有效排除阻抗量::::二路或斷路的兩種谓測 阻抗量測系統僅提供單向量;“二=板:解決習知 測之待測點測得正確阻^ …去對錢板3上所欲量 如第2圖所示者伤 統1之正反向單元u t、、·田;;明本發明之阻抗量測系 圖。以下僅就阻抗量測“:心單"112的電路架構示意· 單元u詳細說明。在^先1之正反向單元η及順序邏輯 而成的箭頭,偏示例如是,以粗線繪製 該機板3上具有多個待測點^夕個心號之排線,由於 所接收的阻抗接頭單元1〇 由繼電器(relay)111耸午\ Π亥正反向早兀11係至少 單元1驗少由複數個組成,而該順序邏輯 成。該量測主機2透過例= 120等電子零件所組 例如上述8255介面卡而發出正向電 18153 11 1281985 肌或負向電流之電流信號至該 向單元u❺正向電流或負…反广广11,流經該正反 該繼電器、U1之運作,亦、即包抓此未予圖示)而切換 向單元11之繼恭哭111:1 ,產生電子式開關,使該正反 流而對庫切換:二,艮據所感應到的正向電流或負向電 頭單元1Π、,人 反向電流信號並輸出至該接 、早兀10,以令該接頭單元10 妾 該機板3之待測點產生相對應的阻抗。j的一“而使 菸屮沾旦方面’ 5玄里測主機2透過例如上述8255介面卡 2二Γ制信號而將其傳至該順序邏輯單元12時,即 刑正:二型正反器120依序產生觸發信號,其中該此D ;:…0係透過其清除信號腳(咖)及時脈; 虮P(CLK Pln)與量測主機2電性連接,且該些d刑正 ^器⑽之時脈信號腳(CLK Pm)亦與該接頭單元^ ,性連接,故當該量測主機2啟動職時,使該順序邏輯 ^ 12及接頭單元1G可獲得與該量測主機2相同的時脈 L號,使该接頭單兀1 〇依序接收到該順序邏輯單元12所 傳送的觸發信號,進而使該接頭單元1G之連接點根據觸發 信號而依序傳送該接頭單元1〇之連接點所對應之機板 上待測點的阻抗至ADC13中。 本發明之阻抗量測系統之另一實施例中,該量測主機 2或阻抗量測系統1中可内建資料儲存區,用以儲存正常 機板各個待測點之標準阻抗值以作為量測其他機板3阻 值之參考。 如第3圖所示者係用以說明本發明之阻抗量測方法之 12 18153 !281985 運竹流程示意圖。如圖輪_ 過接頭單元ίο而與該機不’、發明之阻抗量測系統1透 該量測主機2執;f亍内建的^連接埠的待測點連接,並使 測系統丨及與其電性連::!體,以使本發明之阻抗量 行步㈣,該量測二:機上2開始運作。首先執 電流控制信號,以令該i反向;4 8255介面卡發出 電流之電浐俨垆、,。早兀丨1軚出正向電流或負向 。之电級仏唬,亚將該電流信號 10之連接點,接著進至步驟S2。至越頭早兀 於該步驟S2中,令爷且古 '串杜u 收到的電流信號傳接點的接頭單元10將接 測點,以料此= 連接點電性連接的機板3之待 占 使该些待測點所電性連接的電子元+ 4 & 的阻抗,接著進至步驟〜 ^子兀件產生相對應 於該步驟S3中,入缔旦、、糾+以 介面+ ' 7 μ里川主機2透過例如上述8255 面卡發出量測控制信號,接著進至步驟S4。 2所::步驟S4,令該順序邏輯單元12接收該量測主機 2所發出的量測如u & # 械 抑?卢心,s广以根據該量測控制信號產生順 U順序地令該接頭單元1G之連接點輸出與其電 ,機板3待測點的阻抗,接著進至步驟S5。 亥步驟S5中,令該量測主機2透過例如上述奶5 Ji面卡發出轉換信號,以使該 說而接收透i…… 據邊量測控制信 接收透過该接頭早A 10之連接點所接 二^繼數位信號轉換,且將轉換後所= 。虎傳廷至量測主機2令,接著進至步驟%。 於该步驟S6 t,令該量測主機2根據所接收到的數 】8]53 13 1281985 位信號使與其電性連接的顯示 代表的阻抗。 〇頒不該數位信號所 此外,於進行該步驟s 機2將其所接收到的數位信復可令該量測主 電性連接的顯示單元2㈣示^^儲存區,使與其 供後續阻抗量測時之參考。^ 唬所代表的阻抗,以 存的正常機板阻抗,i可便由該資料儲存區所預 行阻抗量測,以令量測 里且相同機型之機板進 而提高量測作業的效率。、P _出機板正常與否,進 由上可知,本發明 測作举旻A俅 几里測糸統及方法,使阻抗量 時間,if古曰、, 了間化刼作之流程,縮短量測之 ^產確,進而大幅增加量測之效率以符 ;/要未。再者,本發明之阻抗量測李统及方法不項 使用時域反射器而改j h 里a π…死及万法不須 #、、% Μ 較低的電子零件即可量測機板 待測點的阻抗,故有效降低量測成本。 :士:述僅為本發明之較佳實施方式而已,並非用以 因:Γ Γ!ί圍’亦即,本發明事實上仍可做其他改變, 本凡沾白5亥項技術者在未脫離本發明所揭示之精神 1術思想下所完成之—切等效修飾或改變,仍應由後述 之申請專利範圍所涵蓋。 【圖式簡單說明】 第1圖所示者^;用以說明本發明之阻抗量測系統的基 本架構方塊示意圖; 第2圖所示者係用以說明本發明之阻抗量測系統之正 ]8153 14 1281985 反向單元及順序邏輯單元内部的電路架構示意圖;以及 第3圖所示者係用以說明本發明之阻抗量測方法之運 行流程示意圖。 【主要元件符號說明】 1 阻抗量測系統 10 接頭單元 11 正反向單元 111 繼電器 12 順序邏輯單元 120 D型正反器 13 類比數位轉換器(ADC) 2 量測主機 20 顯示單元 3 機板 S1 至 S6 步驟 15 18153Group (Dual ln-lme Mem〇 M, mushroom m les, DIMM) and other types of slots w face, hunting this connection board 3. u Hai positive reversal unit 1 1. Sequence crying (ADCM · η尨 \ bait early 12 and analog digital conversion are electrically connected to the single two two connector unit 11 through microcomputer control such as 8255 interface card, wherein the positive and negative 11 k early to receive the measurement of the main surface card, the shoot 2 through 2, for example, the above-mentioned 8255 core:: _ signal to output forward current or negative current; = check current signal is transmitted to The joint unit 10 is configured such that the joints having the plurality of joints are connected to the points to be measured of the machine plate 3, so as to be 夂; (the tying (4) jing her (four) raw corresponding impedance is as described above The measurement control signal sent by the measurement host 2 is controlled by the example: the voltage of the measurement point to be measured on the board 3 connected to the connection point according to the measurement. The measuring host 2 receives the conversion signal from the card, for example, according to the above-mentioned card, to receive the impedance through the connector unit 1 and receive the impedance, and the D contact receives the signal according to the inversion. Corresponding impedance to the corresponding impedance, and the Ding to the slogan to transfer the digital signal obtained after the conversion 18153 1281985 In the test host 2, 'and then make the bit signal electrically connected to it'. The main private 2 is based on the impedance represented by the received number. 2, the display of the digital signal is /1 and is resistant. q The control software of the host 2 is issued with the built-in, ώ, and D signals and is executed by the measurement conversion signal to achieve the control signal of the second board, the measurement control signal and the time domain reflection without the need of: The specific electronic component of the electrical connection is also connected to the electrons electrically connected to the point to be tested of the board 3, and the impedance is measured, for example, by the impedance of the present invention. In the case of a transistor or a diode, it is possible to < current or reverse electrical output, from π' 〇 early 兀 11 output positive processing, and effectively eliminate the impedance: ::: two two-way or open circuit The impedance measurement system only provides a single vector; "two = board: solve the correct measurement of the point to be measured by the conventional measurement ^ ... to the amount of money on the money board 3 as shown in Figure 2 To the unit ut,, · Tian;; the impedance measurement system of the invention. The following is only the impedance measurement ": heart single & qu Ot; 112 circuit architecture diagram · Unit u detailed description. In the forward and reverse unit η of the first 1 and the logical logic of the arrow, the partial example is as shown in the thick line, the board 3 has multiple points to be measured ^ The line of the heart of the heart, because the received impedance joint unit 1〇 by the relay (relay) 111 noon Π 正 正 正 兀 兀 兀 系 系 系 系 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少 至少The measuring host 2 sends a positive current signal of 18153 11 1281985 muscle or negative current to the unit u ❺ forward current or negative through a group of electronic components such as 120=such as the above-mentioned 8255 interface card. Wide 11, through the forward and reverse of the relay, the operation of U1, that is, the packet is not shown in the figure) and switched to the unit 11 after the death of crying 111:1, resulting in an electronic switch, so that the positive and negative flow Switching to the library: Second, according to the sensed forward current or negative head unit 1Π, the human reverse current signal is output to the connection, early 10, so that the connector unit 10 妾 the board 3 The point to be measured produces a corresponding impedance. The j's "and the soot is dimmed" 5 Xuan Li test host 2 transmits the signal to the sequential logic unit 12 through, for example, the above 8255 interface card 2 binary signal, that is, the sentence is positive: the type II flip-flop 120 sequentially generates a trigger signal, wherein the D;:...0 is cleared by the signal foot (cafe) and the pulse; 虮P(CLK Pln) is electrically connected to the measurement host 2, and the d is positively connected The clock signal pin (CLK Pm) of (10) is also connected to the connector unit, so that when the measurement host 2 starts the job, the sequence logic 12 and the connector unit 1G can be obtained the same as the measurement unit 2 The clock L number causes the connector unit 〇1 to sequentially receive the trigger signal transmitted by the sequence logic unit 12, so that the connection point of the connector unit 1G sequentially transmits the connector unit according to the trigger signal. The impedance of the point to be measured on the board corresponding to the connection point is in the ADC 13. In another embodiment of the impedance measuring system of the present invention, the measuring unit 2 or the impedance measuring system 1 can have a built-in data storage area. It is used to store the standard impedance value of each point to be tested on the normal board to measure the resistance of other board 3 As shown in Fig. 3, it is used to illustrate the impedance measurement method of the present invention. 12 18153 !281985 Bamboo flow diagram. The figure wheel _ connector unit ίο and the machine does not, the impedance measurement of the invention The system 1 passes through the measurement host 2; the built-in connection point of the connection is connected, and the measurement system is electrically connected with the ::! body to make the impedance of the invention step (4), The measurement 2: the onboard 2 starts to operate. First, the current control signal is executed to make the i reverse; the 4 8255 interface card emits a current, and the forward current or the negative direction The electric level 仏唬, the junction point of the current signal 10, then proceeds to step S2. To the end of the step S2, the current signal transmission point received by the geek and the ancient 'string Du u The connector unit 10 will be connected to the measuring point, so that the impedance of the electronic component + 4 & which is electrically connected to the board to be tested is to be occupied by the board 3 electrically connected to the connecting point, and then proceeds to step ~ ^Sub-component generation corresponds to the step S3, the input, the correction + the interface + '7 μLichuan host 2 through, for example, the above 8255 surface The measurement control signal is sent, and then proceeds to step S4. 2:: Step S4, the sequence logic unit 12 receives the measurement issued by the measurement host 2, such as u &#机械抑? According to the measurement control signal, the connection point of the connector unit 1G is sequentially outputted to the impedance of the connection point of the connector unit 1G, and the impedance of the board 3 to be measured, and then proceeds to step S5. In step S5, the measurement unit 2 is passed through. For example, the above-mentioned milk 5 Ji face card sends a conversion signal, so that the receiving and receiving is transparent. According to the side measurement control signal, the second digital signal is switched through the connection point of the connector A 10 early, and will be converted. ==. Hu Chuan Ting to measure the host 2 command, then proceed to step %. In the step S6 t, the measuring host 2 causes the impedance of the display representative connected thereto to be electrically connected according to the received number of signals 8:53 13 1281985. In addition, the digital signal is not provided. In this step, the machine 2 recovers the digital signal received by the machine 2, so that the display unit 2 (4) of the measurement main electrical connection is shown as a storage area, so as to provide a subsequent impedance amount. Reference for time measurement. ^ The impedance represented by 唬, with the normal board impedance, i can be measured by the impedance of the data storage area, so that the board of the same model can be measured to improve the efficiency of the measurement operation. , P _ out of the board is normal or not, the above can be seen, the invention is measured as a 旻 A 俅 里 糸 及 及 及 及 及 及 及 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗 阻抗The measurement is confirmed, and the efficiency of the measurement is greatly increased; / or not. Furthermore, the impedance measurement method and method of the present invention does not use a time domain reflector and changes jh in a π...dead and 10,000 methods are not required #,,% Μ lower electronic parts can be measured on the board Measuring the impedance of the point, so effectively reduce the cost of measurement. :士: The description is only a preferred embodiment of the present invention, and is not used for: Γ Γ! 围 ' 亦 亦 亦 亦 亦 亦 亦 亦 亦 亦 亦 亦 亦 亦 亦 亦 亦 亦 亦 亦 本 本 本 本 本 本 本 本 本 本 本 本 本The equivalent modification or modification performed under the spirit of the invention disclosed in the present invention should be covered by the scope of the patent application described later. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing the basic structure of the impedance measuring system of the present invention; Fig. 2 is a view showing the positive of the impedance measuring system of the present invention] 8153 14 1281985 Schematic diagram of the circuit structure inside the reverse unit and the sequential logic unit; and FIG. 3 is a schematic diagram showing the operation flow of the impedance measurement method of the present invention. [Main component symbol description] 1 Impedance measurement system 10 Connector unit 11 Forward and reverse unit 111 Relay 12 Sequence logic unit 120 D-type flip-flop 13 Analog-to-digital converter (ADC) 2 Measurement host 20 Display unit 3 Board S1 To S6 Step 15 18153

Claims (1)

Ϊ281985 十申晴專利範圍: L —種阻抗量測系、统,係用以透過 數個待測點進行阻抗量測,其至少包括對機板之複 3接員單&其具有複數個連接點,用以夂幻 接於該機板之複數個待測點; 用以各別電性連 正反向單兀,其係分別與該量 性連接,用以接收該量測主機 屮^ 碩單兀電 輪出正向電&及g h x的電流控制信號以 H 爪及負向電流其中一種電流信號,:^將1捕 迗至該接頭單元之連接點,以 琥亚將其傳 經的電流信號產生相對應的阻抗;^板之待測點根據流 順序邏輯單元,其係分別盥 電性連接,用以接收該量測主機=二=頭單元 唬,以根據該量測控制信號產生順 工= 取該接頭單元之連接點 “虎*以順序讀 抗;以及 ‘ #二'之枝板上待測點的阻 換器,其係分別與該㈣主 於 運接2所接收到的對應阻 二阻抗進行數位信號轉換,以將轉㈣所得的 位尨號傳送至量測主機,進而使 收到的數位信號令與其電性連接的 ,根據:接 位信號所代表的阻抗。 早兀“該數 2· ^申請專利範圍第】項之阻抗量測系統,其中,該 早4才曰小型電腦系統介自(s脱】】如⑽⑽、 ]8153 ]6 1281985 Interface ; SCSI )、周邊元件元件連接介面(penpherai Component Interconnect ; ρα )及雙面針腳定義記憶體 模組(Dual In-line Memory Modules ; DIMM )之其中一 者’以連接該量測主機及機板D 3·如申請專利範圍第丨項之阻抗量測系統,其中,該正反 向單元係至少由繼電器(relay)所組成。 4.如"奮專利範圍第3項之阻抗量測系統,其中,該正反 向^元,收量測主機所發出的正向電流及負向電流其 =士種免抓k號後,使得該繼電器根據所感應到的正向 電:及負向電流其中一種電流信號而產生切換,使該正 :^及負向電流之其中—者流至該接頭單元,而使與 :、电性連接的機板之待測點根據流經的電流信號產生 相對應之阻抗。 5· 範圍第4項之阻抗量測系統,其中,該量測 斤备出的電流控制信號係透過執 的控制軟體而達成者。 j主械 6.如申請專利範 邏輯單元〜— 抗里測糸統,其中,該順序 耳早兀‘由祓數個〇型正反器組成。 7 ·如申請專利笳囹 型正反器之、、阻抗量測系統,其中,該些D Pln )係月戒腳(CLR Pm)及時脈信號腳(CLK 电連接於量測主機,且該些D型正反器之時 脈k諕腳係盥桩 — 人口口(日寸 過哕旦 。員早兀琶性連接,使該順序邏輯單元透 接之接 ^出的里測控制信號可對與其電信連 '凡的連接點進行多次測量。 18J53 17 1281985 8. 如申請專利範圍第}項之阻抗量測|统, 主機係内建有機板之待測點阻抗參考值1用於=測 常機板各個待測點夕挪、隹! iT'用於儲存正 參考。寺則點之標準阻抗值以作為量測阻抗值之 9. 二?阻抗量測方法,係應用於與量測主機電性她 抗置測丰續卜,/曰 电〖生連接的阻 μ、、、 仔以對機板之待測點進行阻f曰、st 方法至少包括巧㈣: 進仃^I測,該 ”令該阻抗量測系統透過具有複數 早元=與該機板之待測點電性連接;"、之接頭 制疒:;亥:抗!測系統根據量測主機所發出的電流押 ^以輪出正向電流及負向電流其中—種電流/ t:並將其傳送至該接頭單元之連接點,以使二板之 m 點根據流經的電流信號產生相對的阻抗. 制且f量IJ系統根據量測主機所發出的量測控 4產生順序信號,得以順序讀取該接頭單元之遠 點所對應之機板上待測點的阻抗;以及、 7 D亥阻抗1測系統根據該量測主機所發出的轉換 以將透過該接頭單元所讀取到的阻抗進行數位信 、隹::」ί將轉換後所得的數位信號傳送至量測主機, ^ D亥里測主機根據所接收到的數位信號令盘並+ :生連,如單元顯示該數位信號所代表的:抗… •。十月專利範圍第9項之阻抗量測方法,其中,該接頭 早兀係指SCSI、PCI及DmM插槽之其中一者,、 接该量測主機及機板。 18153 18 1281985 U :凊專利範圍第9項之阻抗量測方法,其中,該正向 迅/瓜及負向電流其中一種電流信號係透過繼電器所组 成的電路而輪出者。 12·如申請專利範圍第9項之阻抗量測方法,其中、 主機所發出的電流控制信號係 : 的控制軟體而達成者。 矾仃U里測主機 13.如申請專利範圍第9項之阻抗量 量測系統所產生的碌序 π力’其中,該阻击 正反器所組成的電略而輪;;者以至少由複數個D型 18153 ]9Ϊ281985 十申晴 Patent Range: L - an impedance measurement system, system for impedance measurement through several points to be measured, which at least includes a complex 3 receivers for the board & a point for smashing a plurality of points to be tested connected to the board; for each of the electrical connected positive and negative singles, which are respectively connected to the quantity for receiving the measurement host 屮^ The single-turn electric current output positive current & and ghx current control signal with H claw and negative current one of the current signals, : ^ capture 1 to the connection point of the joint unit, the current passed by Hu Ya The signal generates a corresponding impedance; the to-be-measured point of the board is according to the stream sequence logic unit, which is respectively electrically connected to receive the measurement host=two=head unit唬, to generate the control signal according to the measurement Work = take the connection point of the joint unit "Tiger * in order to read the resistance; and the switch of the point to be measured on the branch of the # #二", which corresponds to the corresponding received by the (4) main transport 2 The resistance of the two impedances is converted by digital signals to obtain the position obtained by the transfer (four) The number is transmitted to the measuring host, and the received digital signal is electrically connected thereto, according to: the impedance represented by the positioning signal. The impedance measuring system of the "2, ^ patent application scope" Among them, the early 4 曰 small computer system from (s off)] such as (10) (10), ] 8153] 6 1281985 Interface; SCSI), peripheral component connection interface (penpherai Component Interconnect; ρα) and double-sided pin definition memory One of the modules (Dual In-line Memory Modules; DIMMs) is connected to the measuring unit and the board D 3. The impedance measuring system according to the scope of the patent application, wherein the forward and reverse unit is At least consist of a relay. 4. For example, the impedance measurement system of the third part of the patent scope, wherein the forward and reverse ^ yuan, the measurement of the forward current and the negative current generated by the host = the species is not caught after the k number, The relay is caused to switch according to the sensed forward electric power and one of the negative current currents, so that the positive: ^ and the negative current flow to the joint unit, and the: The point to be measured of the connected board generates a corresponding impedance according to the current signal flowing through. 5. The impedance measurement system of item 4, wherein the current control signal prepared by the measurement is achieved by the control software of the control. j main machinery 6. If you apply for a patent paradigm ~ - anti-Li measurement system, which, the order ear 兀 兀 ‘ consists of a number of 〇 type flip-flops. 7 · If applying for a patented type flip-flop, the impedance measuring system, wherein the D Pln is a monthly foot (CLR Pm) and a pulse signal pin (CLK is electrically connected to the measuring host, and the The clock of the D-type positive and negative device is the foot of the D-type — pile - the population mouth (the day is too long. The early connection is made, so that the measured control signal of the sequential logic unit can be connected to Telecommunication has repeatedly measured multiple connections. 18J53 17 1281985 8. If the impedance measurement of the scope of the patent application is the same, the reference value of the impedance of the built-in organic board of the host system is used for the measurement. The various points to be measured on the board are moved, 隹! iT' is used to store the positive reference. The standard impedance value of the point is used as the measured impedance value. 9. The impedance measurement method is applied to the measurement host. She is resistant to the test, and the resistance of the raw connection is μ,, and Let the impedance measurement system pass through a plurality of early elements = electrically connected to the point to be tested of the board; ", the joint System:; Hai: anti-test system based on measuring the current sent by the host to take the forward current and negative current, which is the current / t: and transfer it to the connection point of the joint unit, The m-point of the second board generates a relative impedance according to the current signal flowing through. The f-quantity IJ system generates a sequence signal according to the quantity measurement and control 4 issued by the measuring host, and can sequentially read the far point of the joint unit. The impedance of the point to be measured on the board; and, the 7 D-impedance 1 measurement system performs a digital signal according to the conversion sent by the measuring unit to perform the digital signal through the connector unit, 隹::" The digitized signal obtained after the conversion is transmitted to the measuring host, and the ^D hai test host makes the disc according to the received digital signal: +, and the unit displays the digital signal to represent: anti-... October patent The impedance measurement method of the ninth item, wherein the connector refers to one of a SCSI, a PCI, and a DmM slot, and is connected to the measurement host and the board. 18153 18 1281985 U: 凊 Patent scope No. 9 Impedance measurement method, wherein One of the current signals is transmitted through the circuit formed by the relay. 12 · The impedance measurement method according to claim 9 of the patent scope, wherein the current control signal issued by the host is: The control software is the winner. 矾仃U 里测主机13. The π-force generated by the impedance measurement system of claim 9th, wherein the blocking flip-flop consists of a slight ;; to at least by a plurality of D-type 18153 ] 9
TW93139955A 2004-12-22 2004-12-22 System and method for resistance measuring TWI281985B (en)

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Cited By (2)

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CN104459326A (en) * 2014-12-01 2015-03-25 苏州博众精工科技有限公司 Measuring component
TWI799974B (en) * 2021-07-16 2023-04-21 新煒科技有限公司 Impedance measurement system

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CN106840216A (en) * 2015-12-04 2017-06-13 财团法人交大思源基金会 Impedance-to-digital converter, impedance-to-digital conversion device and method
TWI732167B (en) * 2019-01-03 2021-07-01 和碩聯合科技股份有限公司 Method of checking impedance
CN116008664B (en) * 2023-03-28 2023-08-29 石家庄杰泰特动力能源有限公司 Impedance detection device for fuel cell controller

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104459326A (en) * 2014-12-01 2015-03-25 苏州博众精工科技有限公司 Measuring component
TWI799974B (en) * 2021-07-16 2023-04-21 新煒科技有限公司 Impedance measurement system

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