TWI269406B - Flexible capacity memory IC - Google Patents

Abstract

A control pad is added as a selector pad on to an IC, when a client wants double capacity memory IC, corresponding pads of two neighboring ICs are coupling with each other, under the control of the selector pad, a double capacity memory IC is provided.

Description

1269406. V. INSTRUCTIONS (1) _ 1. TECHNICAL FIELD The present technology is applicable to the design of the memory Ic, and is particularly suitable for the design of the memory I C which can elastically expand the memory capacity. '2. Prior Art - The prior art is not illustrated in FIG. 1 by two adjacent memory ICs 10 on a wafer as an example, each of the memory ICs 10 has a plurality of " Solder pad (pad) 12, which includes a "signal pad" and a "power pad" (p 〇werpad). The soldering iron 12 is used for electrical connection to an external circuit. When the customer orders a single-capacity memory IC, the 16-single company cuts the horizontal line and the vertical cutting line V according to the horizontal line shown in FIG. The wafer is diced to obtain a single single-capacity memory IC 1 0. The figure shows that two single-capacity memory ICs can be obtained after dicing. 1 0 ° If the customer orders a memory IC of twice the capacity, according to the conventional skill The ordering company must design a new mask for this "double-capacity memory IC" product to provide customers with twice the capacity of the memory IC. Similarly, when customers order more different capacity memory ICs, it is necessary to design a relative number of masks. Thus, for the order company, not only the cost increases, but also the production control in the administrative and product categories. On the 'all increase a lot of costs. The present technology first discloses an I C design that can arbitrarily expand the memory capacity, which can save a large amount of cost to the ordering company, such as labor cost, production control cost, and administrative management.

1269406 . V. Description of invention (2) Cost...etc. 3. The content of the art The inventor of the art first conceived: in order to save the cost of the reticle, and to match the elasticity of the memory capacity of the customer, the original single memory IC is set in addition to the original signal pad. The "Separator Pad" (se 1 ect 〇rpad) is used to control the selection of multiple memory ICs to achieve the design of the memory IC of the elastic capacity. • For example, two adjacent single memory ICs on a wafer, each of which is provided with a “selector pad”; and then all the pads corresponding to the two single memory ICs are electrically connected. You can get twice the memory capacity of the IC. When the customer orders a single-capacity memory IC, the ordering company provides the original layer mask and the memory IC when making the connection, and when the metal wire is connected, the "selector solder joint" is vacant, according to each unit. The horizontal cutting line and the vertical cutting line can be cut after the wafer is cut and shipped. When the customer orders multiple capacity memory ICs, IC products with the same memory capacity can be produced in the same mask. At the end of the process, as long as the operation of the second layer mask is added, the "selector solder joints" will be provided. All the pads of the adjacent two memory ICs are connected, using the "selector pad"

Page 6 1269406 . V. Description of the invention (3) By selecting the control of the first IC or the second IC, the function of the multi-capacity memory I C can be easily achieved. 4. Embodiment 2. Fig. 2. Embodiment 1 of the present technology shows two adjacent memory ICs on the wafer of the prior art, each of which has a plurality of pads, three pads in the figure, plus one The selector pad is described as an example. The figure shows that the memory I C 2 0 of the present technology has a plurality of general pads 12 and, in addition, a selector pad 24 is provided. And ® then pull out a preset metal wire 2 6 for each pad. When the customer orders a single-capacity memory I C, the "selector solder joint" is vacant, and then the wafer is cut and then shipped according to the horizontal cutting line and the vertical cutting line of each unit shown in FIG. Figure 3 is a second embodiment of the present invention showing two memory chips IC 20 adjacent to the wafer having a general pad 1 2 and a selector pad 2 4; a preset vertical gold _ Line 2 6. By connecting all the pads corresponding to the two memory ICs with the horizontal metal stomach line 28-8, and then using the control pad 2 4 control, the memory ICs on both sides can be used, thus forming a double Memory IC of capacity.

1269406 V. INSTRUCTIONS (4) In terms of process, Figure 3 requires only two layers of reticle to be added compared to Figure 2. The first layer of reticle is used to make the metal contact direction vertical. The second layer of the mask is used to make a horizontal "wired metal" (c ο η nect 〇rmeta 1 ) 2 8 for connecting the opposing pads of the adjacent two memory ICs; The same mask can be selected to be a single-capacity memory IC or a flexible requirement for a multiple-capacity memory IC. When the customer orders a memory IC of twice the capacity, according to the two memory ICs shown in FIG. 3 as the respective units, the wafer is cut and then shipped according to the horizontal cutting line and the vertical cutting line V of each unit. Or, package > shipping can be. When using the client, only one of the two memory ICs must be selected for wiring. Because the two memory IC pads are connected, it is automatically controlled by the "selector pad 2 4". A double-capacity memory IC can be achieved. Similarly, the art can also increase the number of "selector pads 24" in a single memory IC, and sequentially add two layers in the uppermost mask, and the uppermost mask is cheaper and does not add much cost. At the same time, the elastic design with multiple g can be achieved, so that the capacity requirements of different customers can be achieved in a set of masks. Figure 4. This technical example 2

1269406 V. INSTRUCTIONS (5) The figure shows the memory IC of twice the capacity of Figure 3, which is composed of two memory ICs. It can also be based on the dotted line of the figure. The horizontal cutting line and the vertical cutting line V will be Wafer dicing becomes a two-fold capacity memory IC shipment. The memory I C of the flexible capacity of the present technology may further include more than one selector pad, and the parallel memory I C of the same block provides twice or more than the memory capacity. The foregoing description of the preferred embodiments and the embodiments of the invention are intended to The implementation of the present invention, or the scope of the scope of the invention, which is covered by the scope of the patent application, is the scope of the applicant's claims.

1269406 - Brief description of the drawing _ 5. Brief description of the drawing Fig. 1. Conventional art Fig. 2. Embodiment 1 of the present technology Fig. 3 of the second embodiment of the present technology Fig. 4 of the embodiment of the art. Body IC 1 0, 2 0 Pad 1 2

Selector pad 2 4 • Preset vertical wire 2 6 Horizontal wire metal 2 8 Horizontal cutting wire 垂直 Vertical cutting line V

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Claims (1)

1269406 VI. Patent Application No. 1. A memory IC with elastic capacity, comprising: two memory blocks of the same memory IC, providing memory capacity; and a selector pad disposed in each of the aforementioned block memory ICs, controlled The output of the data of the two blocks of the memory IC described above. 2. The memory IC of the elastic capacity as described in claim 1 of the patent scope, further comprising: metal wiring, so that the corresponding soldering of the same two blocks of the foregoing two blocks is electrically coupled to provide a multiple capacity Memory IC. 3. The memory I C of the elastic capacity as recited in claim 1 further comprises: more than one selector pad, paralleling the same memory I C of multiple blocks, providing a higher multiple of memory capacity. 4. The memory I C of the elastic capacity as described in claim 2, wherein the multiple is said to be twice or more than twice.