1263296 1 5694tvvf.doc/g 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種線路基板製程與線路基板社 構，且特別是有關於一種減少銲罩材料殘留並且增進被f 罩層裸露出之金屬層的平整度的線路基板製程與線路義: 結構。 一 土板 【先前技術】 、卩返者半導體技術的不斷發展，小型化與輕薄化已纟<τ<成 為電子產品主要的發展趨勢之一。又由於在諸多電子元件 之中，線路基板具有高佈線密度、細線寬、組裝緊凑及性 能良好等種種優點，使得線路基板的使用在電子產品的輕 薄化、小型化以及其他方面均具有良好的功效。因此，線 路基板便成為一種業界廣為使用的基本元件之一。 ^ 心^圖1Α〜1G繪示為習知線路基板製程之流程示意圖。 請參照圖1A，在習知線路基板的製程中，首先需提供一基 板1〇〇其中基板100之表層具有一金屬層100a。金屬層 100a的形成方式係先在基板1〇〇之一表面上形成一銅箔 層之後利用微影（Photolithography)與蝕刻（etching) 的方式將此銅^層圖案化，m彡成金屬層1⑻a。請參照圖 1B ’對金屬層施之表面進行祕化處理（roughening treatment)，以在金屬層隐上形成一粗糙表面。此粗糙 化處理的步驟依序有微飿、水洗、酸洗、化以 及烘乾。 请茶照圖1C ’將一層銲罩層110 (soldermask)形成 1263296 1 5694twf;doc/g 於金屬層100a上。接著續夂 _ D 圖 猎由光罩200對銲 罩層11G進4Tb(exp_,e)。接著如圖 光後的銲罩層⑽進行顯影（—Μ)，將銲罩層= 圖案化亚且形成多個開口。其中銲罩層uq之開口係暴赁 出金屬層隐。值得注意的是，雖然祕ϋ 層撕與銲罩層U0之間具有良好的接合效果，但 層110顯影後，亦相對容易導致被暴露出之 上殘留銲罩材料。 然後’請參照圖1F，利用硫酸與雙氧水進行一道微姓 處理，以移除殘留在被暴露出之金屬I刚a上之 料’並且降低被暴露出之金屬層職的表面她度。之 後，請參照® 1G，形成抗氧化層12G於被暴露出之^ 離上，其中抗氧化層12Q形成之方法為利用 ^ 地形成一鎳層與一金層。 β ^基於上述，將金屬層粗糙化處理後，銲罩層會牢固地 附著於金屬層上，使得銲罩材料難以於顯影製程時完全移 除’進而造成銲罩材料殘留在金屬層上。如此一來，便容 易造成後續製程中抗氧化層的剝離。若欲完全移除殘留: 金屬層上之杯罩材料，則需要再以硫酸與雙氧水進行一、曾 微蝕處理。然而，即便增加微蝕處理，仍然會有少量之^ 罩材料殘留在金屬層上。此外，為了使金屬^之 的表面粗糙度更為均自’以利後續之麵與金層的電鑛製 择。線路基板製程中亦必須藉由第二次的微餘處理，^降 低粗糙表面的粗糙度，以獲得較平整的表面。然 5 丨 !263296 1 5694twf.doc/g 進行了上述之彳放银處理，其平整化的情形亦不盡理想。 【發明内容】 ⑩心 基於上述，本發明的目的就是在提供一線 程，將欲移除之鲜罩材料完全移除，並且避免欲移除= 罩材料殘留於金屬層上。 本發明的另一目的就是在提供一種線路基板製程，用 以避免抗氧化層的剝離。 本發明的再-目的就是在提供一種線路基板製程，來 ^抗氧化層與金屬層之間的平整度，使得抗氧化層得以 平整地形成於金屬層上。 本發明提出-種線路基板製程，其步驟包括先提供— 二反。之後’形成—圖案化光阻層讀 至少—金屬表層。接著，形成—圖案化銲罩2 阻声，以吴^= 屬表層上。然後，移除圖案化光 丨層以恭路出部份之金屬表層。 本發明提出一種線路基板製程 基板，其中此基板具有至少—金屬表層供： 案化光阻層於金屬表層上。然後 ㈣ $ =，全面性地形成—銲罩材料層於金屬表mr 罩材料層，以形成: 罩日，暴露出先前被圖案化光阻層所覆:'干 本發明提出一種線路基板製程層。 基板，其t此基板具有至少一全括先提供— 孟屬表層。之後，形成一圖 1263296 1 5694twf.doc/g 案化光阻層於金屬表層上Q然後，對圖案化光阻層所暴露 的金屬表層進行一粗糙化處理◦接著，分別進行一光阻: 1步驟與一銲罩層形成步驟，以移除圖案化光阻層，並^ 於金屬表層上形成一圖案化銲罩層，以暴露圖案化 所覆蓋之金屬表層。 曰 制依照本發明的較佳實施例所述之上述三種線路基板 製程，其中在形成圖案化光阻層於金屬表層之前，例二 φ 包括對金屬表層進行微蝕處理。 制依照本發明的較佳實施例所述之上述三種線路基板 製程，其中形成圖案化光阻層於金屬表層的方法例如包括 先全面性地形成一光阻材料層於金屬表層上。之後，將光 阻材料層圖案化以形成圖案化光阻層。 制依照本發明的較佳實施例所述之上述三種線路基板 4私，其中圖案化光阻材料層的方法例如包括曝光、顯影。 ,依照本發明的較佳實施例所述之上述三種線路基板 衣私其中粗彳造化處理依序例如包括微钱、水洗、g參、、矣 _抗氧化、水洗以及烘乾等動作。 ^先、 ,依照本發明的較佳實施例所述之上述三種線路基板 製程，其中形成該圖案化銲罩層的方法例如包括先全面性 地形成一銲罩材料層於金屬表層上，且銲罩材料層覆蓋圖 案化光阻層。之後，將銲罩材料層圖案化以形成圖案化銲 罩層。此外，銲罩材料層係感光材料，而圖案化銲罩材料 層的方法例如包括曝光、顯影。 依J3、?、本發明的較佳貫施例所述之上述三種線路基板 8 1263296 1 5694twf.doc/g 3罩圖案化銲罩層之後，例如更包括對圖案 依照本發明& ^ 製程，其巾麵=|實_所述之上述三種線路基板 抗氧化層於圖宰似^光阻層之後，例如更包括形成一 法例如包括依序電鑛―錄層與—金層於圖 木化㈣層所暴露之該金屬表層上。 製程依ίίΓ明的較佳實施例所述之上述三種線路基板 形成圖案化光阻層之前，例如更包括先對金 屬表層進行圖案化的動作。 制f 明的較佳實施例所述之上述三種線路基板 二Γ二在形成圖案化光阻層之前，基板之金屬表層上 係已形成有-抗氧化層。 制。依照本發明的較佳實施例所述之上述三種線路基板 =私係例如藉由一溶劑來移除圖案化光阻層。並且，此 &劑包括氫氧化鉀或氫氧化鈉。 安t發明提出一種線路基板結構，包括一基板以及一圖 木化1于罩層。基板具有一金屬表層。圖案化銲罩層配置於 f板上’並暴露部份之金屬表層，其中圖案化銲罩層所暴 路之金屬表層以及被圖案化銲罩層所覆蓋之金屬表層分別 具有不同之表面粗糙度。 依A?、本發明的較佳實施例所述之線路基板結構，更包 括—抗氧化層，其係配置於圖案化銲罩層所暴露之金屬表 層上。 1263296 15694tvvf.doc/g 依照本發明的較佳實施例所述之線路基板結構，豆 抗氧化層包括一鎳/金層。 〃 在本發明之線路基板製程中，由於欲形成 、===，，因此不會有銲罩材料移‘ =的問題。再者，金屬層表面受到圖案化光= 心化處理時不會受到蝕刻，因此本發明亦能 的^ 路基板製程中所形成之抗氧化層表面不平整 為=本發明之上述和其他目的、特徵和優點 2下Γ文特舉較佳實施例，並配合所附圖式，作詳細ί 【實施方式】 行步驟s]，提供—基板，並且J基： 之:屬二其:+此金屬層例如可以是已圖案化 層。於步驟S3中，對被圖案化光二 為 ^屬表層進行粗棱化處理’ 蔣咚 几虱化水洗以及烘乾。於步驟s4中，、隹— 銲罩層的步驟。其方式例如採用乾ΐ: 戈疋濕式去級的方式，將圖案化紘層移除。並且， 1263296 15694tvvf.doc/g 於至屬層上形成圖案化之銲罩層，以暴露出配置於圖案化 光阻層下方之部份金屬表層。基於上述之線路基板製程之 步驟說明，在此以下述兩項實施例再加以詳細說明。 〔第一貫施例〕 圖3A〜圖3H繪示為本發明第一實施例之線路基板製 程的流程示意圖。請參照圖3A，首先提供一基板3〇〇，並 且基板300至少具有一金屬表層3〇〇&。值得注意的是，基 板300並非限定於僅具有一層金屬表層3〇如，基板3〇〇例 如更可以為經由加成法（additive㈣⑽$ )、減成法 (subtractive process )或半加成法（semi_additive 卩職％ ) 所製作出的具有多層金屬層之多層板結構。此外，金屬表 =300a例如可以是已經過微影熱刻製程後的圖案化金 屬表層。 祖® &、圖3B ’例如利用旋轉塗佈法，將—層光阻材 ^ 1〇形成於金屬表層300a上。之後，例如利用紫外光， 曝ί具二?=樣的光罩_ ’對光阻材料層31〇進行 =，=圖c’例如利用乾式去光阻或濕式去光阻的 •llI Φ光阻材料層310進行顯影，以移除部份之光阻材 =::=化光_·雖然二= 當之光罩4。:: = = = =用適 果。值得注意的是，於㈣i末獲传相同的圖案化結 光阻材料層31〇 主 步驟之前，即將-層 加-道絲層鳥之前，更例如可以增 逼祕處理。此㈣處理係利用 ^ 11 1263296 1 5694twf.d〇c/g 滑的金屬表層3〇〇a具有適當的粗链度’以增加光阻材料層 310附著於金屬表層300a的附著效果。 請參照圖3D，對被圖案化光阻層310a暴露出之金屬 表層300a進行粗糙化處理，使得金屬表層3〇〇a具有較大 之粗糙度。粗糙化處理的程序例如依序包括微蝕、水洗、 酸洗、抗氧化、水洗以及烘乾等等。 請參照圖3E，例如利用旋轉塗佈，將一層銲罩材料層 320形成於被暴露出之金屬表層300a與圖案化光阻層31〇a 之上’其中銲罩材料層320例如是由感光性材料所組成。 由於在圖3D的步驟中，金屬表層300a已經過粗糙化處理 而具有適當的粗糙度，因此於圖3E的步驟中，銲罩材料 層320能夠良好地附著於金屬表層3〇〇a上。 明參如圖3F ’例如利用紫外光，並且透過具有圖案化 圖案之光罩410對銲罩材料層320進行曝光。之後，進行 顯影，將銲罩材料層320之部份移除以形成圖案化之銲罩 層320a ’並且暴露出圖案化光阻層31〇a。 請參照圖3G，例如以氫氧化鉀（K〇H)或氫氧化鈉 (NaOH)為溶劑，將圖案化光阻層31〇a移除，以形成線 路基板結構340。線路基板結構34〇包括—基板3〇〇以及 圖案化銲罩層320。圖案化鮮罩層32G配置於基板細 上，並且暴露出部份的金屬表層3〇〇a，其中圖案化鮮罩層 320所暴露之金屬表層遍以及被圖案化鋒罩層32〇所^ 蓋之金屬表層3_分別具有不同之表面粗操度。值得注音 的是，在本實關巾’溶_勒必彡組意制圖案化^ 12 1263296 1 5694twf.doc/g 阻層310a與圖案化之銲罩層320a在溶解度上的差異性， 以避免選用了不適當的溶劑而同時將圖案化光阻層31〇a 與圖案化之銲罩層320a移除。另外，由於與圖案化光阻層 310a接觸之金屬表層300a具有較為平滑之表面，因此^ 案化光阻層310a能夠順利地被移除，而不會有光阻材料殘 留於金屬表層300a上的問題。1263296 1 5694tvvf.doc/g IX. Description of the Invention: [Technical Field] The present invention relates to a circuit substrate process and a circuit substrate structure, and more particularly to a method for reducing the residual material of a solder mask and enhancing the mask The circuit board process and wiring meaning of the flatness of the bare metal layer: structure. A soil plate [Prior Art] The continuous development of semiconductor technology and the miniaturization and thinning have become one of the main development trends of electronic products. In addition, among the many electronic components, the circuit substrate has various advantages such as high wiring density, thin line width, compact assembly, and good performance, so that the use of the circuit substrate is good in the thinness, miniaturization, and the like of the electronic product. efficacy. Therefore, the line substrate has become one of the basic components widely used in the industry. ^心^ Figure 1Α~1G is a schematic flow chart of a conventional circuit substrate process. Referring to FIG. 1A, in the process of the conventional circuit substrate, a substrate 1 is first provided, wherein the surface layer of the substrate 100 has a metal layer 100a. The metal layer 100a is formed by first forming a copper foil layer on one surface of the substrate 1 and then patterning the copper layer by photolithography and etching to form a metal layer 1 (8)a. . Referring to Fig. 1B', the surface of the metal layer is subjected to a roughening treatment to form a rough surface on the metal layer. The steps of this roughening treatment are followed by micro-twisting, water washing, pickling, crystallization, and drying. Please refer to Fig. 1C' to form a layer of solder mask 110 (soldermask) to form 1263296 1 5694twf; doc / g on metal layer 100a. Continued _ _ D Figure Hunting by the mask 200 to the solder mask 11G into 4Tb (exp_, e). Next, development (() is performed on the solder mask layer (10) as shown in the figure, and the solder mask layer is patterned to form a plurality of openings. The opening of the solder mask layer uq is loosing out of the metal layer. It is worth noting that although the layer tearing has a good bonding effect with the solder mask U0, the layer 110 is relatively easy to cause the remaining solder mask material to be exposed. Then, please refer to Fig. 1F, using a slight treatment of sulfuric acid and hydrogen peroxide to remove the residue remaining on the exposed metal I a and reduce the surface of the exposed metal layer. Thereafter, please refer to ® 1G to form an anti-oxidation layer 12G on the exposed surface, wherein the anti-oxidation layer 12Q is formed by forming a nickel layer and a gold layer by using . Based on the above, after the metal layer is roughened, the solder mask layer is firmly adhered to the metal layer, making it difficult for the solder mask material to be completely removed during the development process, thereby causing the solder mask material to remain on the metal layer. As a result, it is easy to cause the peeling of the oxidation resistant layer in the subsequent process. If you want to completely remove the residue: the cup cover material on the metal layer, you need to use sulfuric acid and hydrogen peroxide to perform a micro-etching treatment. However, even if the microetching treatment is added, a small amount of the mask material remains on the metal layer. In addition, in order to make the surface roughness of the metal more uniform, it is preferable to make the subsequent mineral layer and the gold layer. In the circuit substrate process, the roughness of the rough surface must also be reduced by the second micro-processing to obtain a flat surface. However, 5 丨 !263296 1 5694twf.doc/g has been subjected to the above-mentioned silver discharge processing, and the flattening situation is not satisfactory. SUMMARY OF THE INVENTION Based on the above, it is an object of the present invention to provide a thread that completely removes the fresh cover material to be removed and avoids the need to remove = the cover material remains on the metal layer. Another object of the present invention is to provide a circuit substrate process for avoiding peeling of the oxidation resistant layer. A further object of the present invention is to provide a circuit substrate process for flatness between an oxidation resistant layer and a metal layer such that the oxidation resistant layer is formed flat on the metal layer. The invention proposes a circuit substrate process, the steps of which include providing - two reverse. Thereafter - forming - patterned photoresist layer read at least - metal surface layer. Next, the patterned solder mask 2 is formed to block the sound on the surface of the genus. Then, remove the patterned layer of light to remove a portion of the metal surface. The invention provides a circuit substrate process substrate, wherein the substrate has at least a metal surface layer for: the patterned photoresist layer on the metal surface layer. Then (4) $ =, comprehensively formed - the solder mask material layer is layered on the metal surface mr cover material layer to form: a cover day, exposing the previously patterned photoresist layer: 'Dry the present invention proposes a circuit substrate process layer . a substrate, wherein the substrate has at least one integral first provided - a Meng surface layer. Thereafter, a pattern 1263296 1 5694twf.doc/g is formed on the metal surface layer. Then, the metal surface layer exposed by the patterned photoresist layer is roughened. Then, a photoresist is respectively performed: 1 The step and a solder mask layer forming step are performed to remove the patterned photoresist layer and form a patterned solder mask layer on the metal surface layer to expose the patterned metal surface layer. The above three circuit substrate processes according to the preferred embodiment of the present invention are described, wherein before forming the patterned photoresist layer on the metal surface layer, the second φ includes micro-etching the metal surface layer. The above three circuit substrate processes according to the preferred embodiment of the present invention, wherein the method of forming the patterned photoresist layer on the metal surface layer comprises, for example, first forming a photoresist layer on the metal surface layer. Thereafter, the layer of photoresist material is patterned to form a patterned photoresist layer. The above three circuit substrates 4 are described in accordance with a preferred embodiment of the present invention, wherein the method of patterning the photoresist layer includes, for example, exposure and development. According to the preferred embodiment of the preferred embodiment of the present invention, the three types of circuit substrates are subjected to operations such as micro-money, water washing, g-parameter, anti-oxidation, water washing, and drying. First, in the above three circuit substrate processes according to the preferred embodiment of the present invention, the method for forming the patterned solder mask layer includes, for example, comprehensively forming a solder mask material layer on the metal surface layer, and soldering A layer of cover material covers the patterned photoresist layer. Thereafter, the layer of solder mask material is patterned to form a patterned solder mask layer. Further, the solder mask material layer is a photosensitive material, and the method of patterning the solder mask material layer includes, for example, exposure and development. According to J3, ?, the above three kinds of circuit substrate 8 1263296 1 5694twf.doc / g 3 of the preferred embodiment of the present invention, after patterning the solder mask layer, for example, further including the pattern according to the present invention & ^ process, The above-mentioned three kinds of circuit substrate anti-oxidation layers are formed after the photo-resist layer of the above-mentioned three kinds of circuit boards, for example, including a method, for example, including sequential electro-mineral-recording layer and gold layer in the figure (4) The metal surface layer exposed by the layer. The process of forming the patterned photoresist layer by the above-described three kinds of circuit substrates according to the preferred embodiment of the present invention includes, for example, an operation of patterning the metal surface layer. The three types of circuit substrates described in the preferred embodiment of the present invention have an anti-oxidation layer formed on the metal surface layer of the substrate before the formation of the patterned photoresist layer. system. The above three circuit substrates according to the preferred embodiment of the present invention are private, for example, by a solvent to remove the patterned photoresist layer. Also, this & agent includes potassium hydroxide or sodium hydroxide. Ann has invented a circuit substrate structure comprising a substrate and a layer 1 in the cover layer. The substrate has a metal skin. The patterned solder mask layer is disposed on the f-plate and exposes a portion of the metal surface layer, wherein the metal surface layer of the patterned solder mask layer and the metal surface layer covered by the patterned solder mask layer have different surface roughnesses respectively . According to A?, the circuit substrate structure of the preferred embodiment of the present invention further includes an anti-oxidation layer disposed on the metal surface exposed by the patterned solder mask layer. 1263296 15694 tvvf.doc/g In accordance with a circuit substrate structure in accordance with a preferred embodiment of the present invention, the bean oxidation resistant layer comprises a nickel/gold layer. 〃 In the circuit substrate process of the present invention, since it is desired to form, ===, there is no problem that the solder mask material is shifted by ‘. Furthermore, the surface of the metal layer is subjected to patterned light = the etching process is not subjected to etching. Therefore, the surface of the anti-oxidation layer formed in the process of the substrate of the present invention is uneven = the above and other objects of the present invention, Features and Advantages 2 The following is a detailed description of the preferred embodiment, and in conjunction with the drawings, a detailed description is provided. [Embodiment] Step s] is provided, and the substrate is provided, and the J-base: the second is: + the metal The layer can be, for example, a patterned layer. In step S3, the patterned light is subjected to coarse ribbing treatment by the genus, and the water is washed and dried. In step s4, the step of 焊-welding the layer. The method is to remove the patterned enamel layer by, for example, using a dry mashing method. Also, 1263296 15694tvvf.doc/g forms a patterned solder mask layer on the subordinate layer to expose a portion of the metal surface layer disposed under the patterned photoresist layer. Based on the above description of the circuit board process, the following two embodiments will be further described in detail. [First Embodiment] Figs. 3A to 3H are schematic views showing the flow of a circuit board process according to a first embodiment of the present invention. Referring to FIG. 3A, a substrate 3 is first provided, and the substrate 300 has at least one metal surface layer 3 & It should be noted that the substrate 300 is not limited to having only one metal surface layer 3, for example, the substrate 3 〇〇 may be, for example, an additive method (additive (four) (10) $), a subtractive process, or a semi-additive method (semi_additive).卩%%) A multilayer board structure with multiple layers of metal. Further, the metal watch = 300a may be, for example, a patterned metal surface layer which has been subjected to a microlithography process. The ancestor® &3B' is formed on the metal skin layer 300a by, for example, spin coating. Thereafter, for example, by using ultraviolet light, the reticle is exposed to the photoresist layer 31, and the image of the photoresist layer 31 is used, for example, using a dry-type photoresist or a wet-type photoresist. The resistive material layer 310 is developed to remove a portion of the photo-resistive material =::======================================== :: = = = = Use appropriate. It is worth noting that before the main step of transferring the same patterned junction photoresist layer 31 at the end of (iv) i, it is more important, for example, to increase the secret treatment before the layer-adding the layer of the bird. This (4) treatment utilizes a metal strip layer 3〇〇a of ^ 11 1263296 1 5694 twf.d〇c/g to have an appropriate thick chain degree to increase the adhesion of the photoresist layer 310 to the metal skin layer 300a. Referring to FIG. 3D, the metal surface layer 300a exposed by the patterned photoresist layer 310a is roughened so that the metal surface layer 3a has a large roughness. The roughening process includes, for example, microetching, water washing, pickling, oxidation resistance, water washing, drying, and the like. Referring to FIG. 3E, a layer of solder mask material 320 is formed over the exposed metal surface layer 300a and the patterned photoresist layer 31A from, for example, by spin coating, wherein the solder mask material layer 320 is, for example, photosensitive. Made up of materials. Since the metal skin layer 300a has been roughened to have an appropriate roughness in the step of Fig. 3D, the solder mask material layer 320 can be well adhered to the metal surface layer 3a in the step of Fig. 3E. The glazing material is exposed to the hood material layer 320 by, for example, ultraviolet light, as shown in Fig. 3F, and through a reticle 410 having a patterned pattern. Thereafter, development is performed to remove portions of the masking material layer 320 to form a patterned solder mask layer 320a' and expose the patterned photoresist layer 31A. Referring to FIG. 3G, the patterned photoresist layer 31A is removed, for example, using potassium hydroxide (K〇H) or sodium hydroxide (NaOH) as a solvent to form a line substrate structure 340. The circuit substrate structure 34 includes a substrate 3A and a patterned solder mask layer 320. The patterned fresh cover layer 32G is disposed on the substrate and exposes a portion of the metal surface layer 3a, wherein the metal surface layer exposed by the patterned fresh cover layer 320 is covered by the patterned front cover layer 32. The metal skin layers 3_ have different surface roughness degrees. It is worth noting that the difference in solubility between the resist layer 310a and the patterned solder mask layer 320a is avoided in the actual sealing towel 'Solution _ 勒 彡 彡 group ^ 12 1263296 1 5694twf.doc / g An improper solvent is selected while removing the patterned photoresist layer 31A and the patterned solder mask layer 320a. In addition, since the metal surface layer 300a in contact with the patterned photoresist layer 310a has a relatively smooth surface, the patterned photoresist layer 310a can be smoothly removed without the photoresist material remaining on the metal surface layer 300a. problem.
請參照圖3H，在進行過圖3A〜圖3G所述之步驟之 後，本貫施例之線路基板製程例如更可以在線路基板結構 340完成後，形成一抗氧化層33〇於被圖案化之銲罩層％加 暴露出之金屬表層30如上。其中，形成抗氧化層33〇的方 法例如依序電鍍一鎳層332與一金層334於被圖案化之銲 罩層32〇a暴露出之金屬表層300a上。而上述圖3A〜圖3H 所述之製程即所謂的非Gpp製程。 制口此外’本實施例更可整合於GPP(gold Plating pattern) ’以形成上述之線路基板。此Gpp製程係在形成圖 ς "阻層31〇a之前，先例如以電鑛的方式於金屬表層 為二抗氧化材料視 亚進仃上述圖3A〜圖3G的步 =。坪細而言，在進行Gpp製程與非Gpp製程之差 :將?=P:5程時，需要電鍵跡線(未緣示)的輔助才 表_上。相反地，進行 將抗氧化層㈣示）獅，便能 此外’本貫施例例如可以在形賴案化絲層3l〇a 13 1263296 1 5694t\vf.doc/g 之後並且在移除圖案化光阻層31〇a之前，進行一道固化 (curing)製程，以將圖案化之銲罩層320a固化。當然， 本實施例例如更可"以把此道固化製程延後至移除圖案化光 阻層310a之後進行。 〔第二實施例〕 圖4A〜圖4H繪示為本發明第二實施例之線路基板製Referring to FIG. 3H, after the steps described in FIG. 3A to FIG. 3G are performed, the circuit substrate process of the present embodiment can be formed, for example, after the circuit substrate structure 340 is completed, and an anti-oxidation layer 33 is formed. The weld cap layer % plus the exposed metal skin 30 is as above. The method of forming the anti-oxidation layer 33 is, for example, sequentially plating a nickel layer 332 and a gold layer 334 on the metal surface layer 300a exposed by the patterned solder mask layer 32A. The process described above with reference to Figures 3A to 3H is a so-called non-Gpp process. Further, the present embodiment can be integrated into a GPP (gold Plating pattern) to form the above-described circuit substrate. The Gpp process is preceded by the formation of the pattern < resist layer 31 〇 a, for example, by electro-minening on the metal surface layer as a second anti-oxidation material, as shown in step 3 of the above Figures 3A to 3G. In the case of ping, the difference between the Gpp process and the non-Gpp process: When ?=P: 5, the auxiliary trace of the key trace (not shown) is required. Conversely, the implementation of the antioxidant layer (four) shows the lion, and in addition, the present embodiment can be, for example, after the shape of the silk layer 3l〇a 13 1263296 1 5694t\vf.doc/g and after removal of the patterning Prior to the photoresist layer 31A, a curing process is performed to cure the patterned solder mask layer 320a. Of course, this embodiment can be performed, for example, to postpone the curing process to remove the patterned photoresist layer 310a. [Second Embodiment] Figs. 4A to 4H illustrate a circuit board system according to a second embodiment of the present invention.
程的流程示意圖◦請參照圖4A，首先提供一基板500，其 中基板500至少具有一金屬表層500a。值得注意的是，基 板500並非限定於僅具有一層金屬表層500a，基板500例 如更可以為經由加成法、減成法或半加成法所製作出的具 有多層金屬層之多層板結構。此外，金屬表層5〇〇a例如可 以是已經過微影與蝕刻製程後的圖案化金屬表層。 請參照圖4B，例如利用旋轉塗佈法，將一層光阻層 510形成於金屬表層500a上。之後，例如利用紫外光，透 過具有圖案化圖樣的光罩600，對光阻材料層51Q進行曝 光。凊茶照圖4C，例如利用乾式去光阻或濕式去光阻的方 式，對光阻材料層510進行顯影，以移除部份之光阻材料 化光阻層5版。雖然本實施例之光阻材 == 但本實施例亦可以在使用適當的光罩 音的Γ 以正光阻來麟相同的圖案化結果。值得 注思的疋’於圖4B所谈之牛驟十、， 形成於金屬表層5(ramw’即將：：層光阻層510 理。此微蝕處理係利=:如可以增加-道微蝕處 500a具有適當的細 H又氧水’使平滑的金屬表層 田的叔糙度，以增加光阻層训附著於金屬表 14 1263296 】5694twf.doc/g 層500a的附著效果。 请芩照圖4D，對被圖案化光阻層51〇所暴露出之公 屬表層500a進行粗链化處理，使得金屬表層5〇〇a具= 大之粗糙度。粗糙化處理的程序例如依序包括微蝕、水洗^ 酸洗、抗氧化、水洗以及烘乾等等。 、請參照圖4E，再次利用乾式去光阻或濕式去光阻的方 式，將圖案化光阻層510a移除，以顯露出原本為圖案化 _ 阻層510a所覆蓋之光滑的金屬表層500a。其中，由於與 圖案化光阻層510接觸之金屬表層5〇〇a係平滑平面，即^ 被粗糙化處理，因此圖案化光阻層51〇能夠順利地被浐 除，而不會有光阻材料殘留於金屬表層5〇〇a上的問題。^ 後，例如利用旋轉塗佈，將一層銲罩材料層52〇全面性地 形成於金屬表層500a之上，其中銲罩材料層52〇例如可以 由感光性材料所組成。由於在圖4D的步驟中，未被圖案 化光阻層51〇a所覆蓋之金屬表層5〇〇a已經被粗糙化處理 而具有適當的粗糙度，因此於圖4E的步驟中，銲罩材料 _層520能夠良好地附著於已被粗糙化處理過的金屬 500a 上。 9 請苓照圖4F，例如利用紫外光，並且透過光罩61〇， 對銲罩材料層520進行曝光。使得受到紫外光照射之部份 銲罩材料層520產生變化。請參照圖4G，對銲罩材料層 5^0進行顯影，以形成圖案化之銲罩層52如。值得注意的 是，在本實施例中，溶劑的選用上具有較高的自由度。其 主要原因在於，本實施例之製程中圖案化光阻層51如與銲 15 1263296 1 5694tvvf.doc/^ 罩材料層520並非同時存在，因此在溶劑的選用上不需考 慮溶劑同時將圖案化光卩且層遍與g案之銲罩層52〇移除 的情況。 請茶照圖4H，在進行過®1 4A〜圖4G所述之步驟之 Ϊ，本實施例之線路基板製程例如更可以在線路基板54〇 完成後’形成-抗氧化層MO於圖案化之焊罩層遍所暴 露之金屬表層顺上。其中，形成抗氧化層別的方法例 ^衣序錄層532與—金層534於為圖案化之銲罩層 之』^恭路之孟屬表層5〇〇a上。而上述圖4A〜圖4H所述 之製程係所謂的非GPP製程。此外 整^ GPP製程内，以形成上述 U旯J正口於 成圖案化光阻層反，Gpp製程係在形 芦500a上㈣# 電鑛的方式於金屬表 層500a上$成-層抗氣化材料。之後，將 表層_之部份，並進行上述圖4A〜圖4G : ^相而§ ’錢行Gpp製程與非Gp 於，進行GPP製料，需要魏跡線（松 能將抗氧化層330電錢於金屬表層· 才 非卿製程時，便無需電錄跡線⑷才目=進行 將抗氧化層33G電鑛於抗氧化層33〇 能 綜上所述，在本發明之線路基板製程 除習知線路基板製程中附著在 由於不的移 同時也不需要再利用：有罩材料移除不乾淨的問題， 科。此外，由於光阻層_於金屬表層的效果 16 1263296 1 5694twf. doc/g 在移除光a層的過程巾不會有光阻層殘 題。再者，受到圖案化光阻層覆蓋的 j表^問 習知線路基板製程中抗氧化層表面不均勻夠減少 雖然本發明已以較佳實施例揭露如上，心 限ΐ本發明，，任何熟習此技藝者，在不脫離本發明之精神 ^粑圍内’當可作些許之更動與潤飾，因此本發明之:護 範圍當視後附之申請專利範圍所界定者為準。 又 【圖式簡單說明】 圖1Α〜1G繪示為習知線路基板製程之流程示意圖。 圖2緣不為本發明之線路基板製程之流程示意圖。 圖3Α〜圖3Η繪示為本發明第一實施例之線路基板製 程的流程示意圖。 圖4Α〜圖4Η緣示為本發明第二實施例之線路基板製 程的流程示意圖。 【主要元件符號說明】 100、300、500 :基板 100a :金屬層 110、320a、520a ··銲罩層 120、330、530 :抗氧化層 200、400、410、600 :光罩 300a、500a ··金屬表層 310、510 :光阻材料層 310a、510a :圖案化光阻層 17 1263296 1 5694twf.doc/g 320 、 520 銲罩材料層 332 、 532 鎳層 334 、 534 金層 340 :線路基板結構Referring to Figure 4A, a substrate 500 is first provided, wherein the substrate 500 has at least one metal skin 500a. It is to be noted that the substrate 500 is not limited to having only one metal surface layer 500a, and the substrate 500 may, for example, be a multilayer board structure having a plurality of metal layers formed by an additive method, a subtractive method or a semi-additive method. Further, the metal surface layer 5a may be, for example, a patterned metal skin layer which has been subjected to lithography and etching processes. Referring to Fig. 4B, a photoresist layer 510 is formed on the metal surface layer 500a by, for example, spin coating. Thereafter, the photoresist material layer 51Q is exposed by, for example, ultraviolet light through a mask 600 having a patterned pattern. Referring to Figure 4C, the photoresist layer 510 is developed, for example, by dry de-resist or wet de-resistance to remove portions of the photoresist layer 5 of the photoresist. Although the photoresist of this embodiment ==, this embodiment can also achieve the same patterning result with a positive photoresist without using a suitable photomask. The noteworthy 疋' is discussed in Figure 4B. It is formed on the metal surface layer 5 (ramw' is about:: layer photoresist layer 510. This micro-etching treatment is good =: if it can increase - micro-etching The 500a has appropriate fine H and oxygen water' to make the smoothness of the metal surface layer to increase the adhesion of the photoresist layer to the metal surface 14 1263296 】 5694twf.doc / g layer 500a. Please refer to the picture 4D, roughening the common surface layer 500a exposed by the patterned photoresist layer 51, so that the metal surface layer 5〇〇a has a large roughness. The roughening process includes, for example, microetching in sequence. , washing, pickling, anti-oxidation, water washing, drying, etc., please refer to FIG. 4E, and again using the dry photoresist or wet photoresist to remove the patterned photoresist layer 510a to reveal Originally, the smooth metal surface layer 500a covered by the patterned 507 layer 510a, wherein the metal surface layer 5〇〇a in contact with the patterned photoresist layer 510 is smooth, that is, roughened, thus patterned light The resist layer 51〇 can be removed smoothly without photoresist residue A problem on the metal surface layer 5〇〇a. After that, for example, a layer of the solder mask material 52 is integrally formed on the metal surface layer 500a by spin coating, wherein the solder mask material layer 52 can be photosensitive, for example. The composition of the material. Since the metal surface layer 5a covered by the patterned photoresist layer 51A has been roughened in the step of FIG. 4D to have appropriate roughness, in the step of FIG. 4E The solder mask material layer 520 can be well adhered to the roughened metal 500a. 9 Referring to FIG. 4F, for example, using ultraviolet light, and through the mask 61, the solder mask material layer 520 is exposed. The portion of the solder mask material layer 520 that is exposed to ultraviolet light is changed. Referring to FIG. 4G, the solder mask material layer 5^0 is developed to form a patterned solder mask layer 52, for example, In this embodiment, the solvent has a high degree of freedom in selection. The main reason is that the patterned photoresist layer 51 in the process of the present embodiment is not simultaneously with the solder layer 15 1263296 1 5694tvvf.doc/^ cover material layer 520. Exist, therefore in solvent The case where the patterning stop is removed without considering the solvent and the layer is removed from the solder mask layer 52 of the case g. Please refer to Fig. 4H, after performing the steps described in ®1 4A to 4G. The circuit substrate process of the present embodiment can be formed, for example, after the circuit substrate 54 is completed, and the anti-oxidation layer MO is formed on the metal surface layer exposed by the patterned solder mask layer. The method for forming the oxidation resistant layer is formed. For example, the sequence layer 532 and the gold layer 534 are on the surface layer 5〇〇a of the patterned solder layer, and the process described in the above FIG. 4A to FIG. 4H is a so-called non- GPP process. In addition, in the whole GPP process, the U旯J positive opening is formed in the patterned photoresist layer, and the Gpp process is formed on the metal surface 500a on the metal surface layer 500a. material. After that, the part of the surface layer _ is carried out and the above-mentioned FIG. 4A to FIG. 4G are carried out: ^ phase and § 'Monetary line Gpp process and non-Gp are used for GPP material preparation, and the Wei trace line is required (Song can heat the antioxidant layer 330) When the money is on the surface of the metal, it is not necessary to record the trace (4). The purpose is to carry out the oxidation of the anti-oxidation layer 33G on the anti-oxidation layer 33, which can be described in the circuit substrate process of the present invention. It is known that the process of the circuit substrate adheres to the process of not moving and does not need to be reused: the problem of removing the cover material is not clean, and the effect of the photoresist layer on the metal surface is 16 1263296 1 5694twf. doc/g The process towel in which the layer of light a is removed does not have a photoresist layer defect. Further, the surface of the circuit substrate covered by the patterned photoresist layer is not uniform enough to reduce the surface unevenness of the anti-oxidation layer in the process of the circuit substrate. The present invention has been disclosed in the above preferred embodiments, and the present invention can be modified and retouched without departing from the spirit of the present invention. It shall be subject to the definition of the scope of the patent application attached. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A to FIG. 1G are schematic diagrams showing a process of a conventional circuit substrate process. FIG. 2 is not a schematic flow chart of a circuit substrate process of the present invention. FIG. 3A to FIG. FIG. 4A to FIG. 4 are schematic diagrams showing the process of the circuit substrate process according to the second embodiment of the present invention. [Main component symbol description] 100, 300, 500: substrate 100a: metal layer 110, 320a, 520a · solder mask layer 120, 330, 530: oxidation resistant layer 200, 400, 410, 600: photomask 300a, 500a · metal surface layer 310, 510: photoresist material layer 310a, 510a: patterned photoresist Layer 17 1263296 1 5694twf.doc/g 320 , 520 solder mask material layer 332 , 532 nickel layer 334 , 534 gold layer 340 : circuit substrate structure
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