1253699 玖、發明說明 【發明所屬之技術領域] 本發明是有關於一種凸塊結構及其形成方法，且特別是 有關於一種具有平頂之凸塊結構及其形成方法。 【先前技術】 隨著電子產品的輕薄短小化，其相關的封裝技術亦快速 發展以滿足不同產品的需求。以液晶顯示器（liquid crystal display，LCD)為例，相關的晶片封裝技術包括捲帶式晶片 接合（tape automated bonding ; TAB)技術、晶片玻璃接合 (chip on glass; C0G)技術、晶片軟膜接合（cMp 〇n mm; c〇F) 技術等，目前則以晶片玻璃接合技術為封裝技術的主流。 晶片玻璃接合技術乃利用覆晶（fHp chip)封裝原理，將 具有凸塊（bump)的晶片以異方性導電膠（anis〇tr〇pic conductive film ; ACF)為中間介面來接合晶片與玻璃基材。 上述之凸塊是指在晶片之接墊（b〇nding pad)上所製做的金 屬塊。參照第i圖，其為習知凸塊的結構示意圖。由於製作 凸塊180之前，會依序形成一保護層14〇於接墊12〇之周圍 以保護基材100上的其他元件、及一阻障兼黏著層“Ο以避 免凸塊18〇與接塾120間的擴散反應，因此 時’會因保護層14〇的存在而無可避免地形成―丁凸^^ 結構182於凸塊180頂端。 此凸起結構1 8 2在進行晶片姑癌垃入制 /丁日日片玻璃接合製程時，會嚴重影 s曰曰〃玻璃間的接合效果而易產生接合不均等現象，進而 1253699 良率。另一方面’為了匹配細腳距產品的接合製程，目 則目關業者莫不促使異方性導 ^ ^ ^ . 付科之粒控朝向細微化 4展然而，受限於凸起結構182之故，细 趿脸也、J•丄 細祕之異方性導電 >將“、、法有效接合晶片與玻璃基材。 【發明内容】 本發明之目的就是在提供—種具有平頂之凸塊結 r _ :形成方法’用以有效接合晶片與基材’並提高接合製 往良罕。 鑒於上述目的，本發明之一離样 ^ 73 ^ 1、樣係棱出一種平頂凸塊之 :冓’其係由一第一凸塊與一具有一平頂之第二凸塊所構 成，且具有平頂之第二凸塊係形成於第一凸塊之上。由於所 構成之凸塊結構的頂端為平坦的結構，因此利用此凸塊結構 來進行封裝製程時’其平頂結構可有效接合晶片與基材，故 可大幅提高製程良率。 根據本發明之目的’本發明之另—態樣則係提出一種形 成平頂凸塊結構之方法。其先形成-第-凸塊於-基材上， 接著再利用微影製程來形成另一具有平頂之凸塊於第一凸 塊之上。利用此方法來製作凸塊，不需再藉由機械研磨等方 式，所得之凸塊結構頂端即為一平坦的結構，因而不會損壞 基材上的兀件或影響凸塊的機械性質，並能利用此 來有效接合晶片與基材。 。構 【實施方式】 1253699 本lx月之平頂凸塊結構及其形成方法的一較佳實施 例，將參照附件圖式詳述如下。 、 第 2A 至 2P Is! & ·τ ^ Θ為平頂凸塊結構的形成過程之剖面示竜 圖爹…、第2Α圖，—阻障兼黏著層26〇形成於具有 Γμ,ΓΓ1" 240 200 " ’、曰240係形成於接墊220之周圍，用以保護基材 200上的元件。另外，接墊22〇可為—鋁接墊。阻障兼黏著 層260需具有良好的接著力與緻密性之特性，需能避免接塾 220與凸塊間的擴散反應’其可由鉻㈣、鈦⑼、鎢㈤或 其組合物所構成’且可由一般的真空濺鍍製程而得。隨後形 成一種子層270於阻障兼黏著層26〇之上，以做為後續凸塊 耗之基地（base)。種子層謂的組成可依形成之凸塊組成 而疋’例如’若凸塊為_金凸塊，則種子層27q為—金（心） 金屬層。 接著’利用微影製程來形成-第—罩幕層292於種子層 70之上#第2B圖所不，第一罩幕層加用以定義對應 於接墊220上的凸塊形成位置’然後在此定義的位置中進行 電鑛製程而形成-第一凸塊282。參照第2c圖，當完成電 鑛製程後’將第一罩幕層292移除以裸露出第一凸請， 並利用電聚清洗方式來移除殘餘在第_凸4 282内的第一 罩幕層292,其中，電漿可選擇使用—般的氧氣電漿。此第 一凸塊282係為一碟型結構’其中間部分具一平坦區域。 其次如帛2D圖所示，#形成一第二罩幕層州以定義 出對應於第-凸塊282平坦區域上的凸塊形成位置，並進行 1253699 電鐘裝知而形成-第二凸塊286於第一凸塊⑽之上。此第 二凸塊286係為_柱狀結構，且因其形成基地為平坦之區 或故所开/成之第_凸塊286不會因保護層㈣的形狀限制 而造成-凸起結構形成於其頂端，反而使第二凸塊286且有 :平頂。㈣此平頂來進行封裝接合製程，無論使用何種粒 徑之異方性導電膠材料，均可增加晶片與基材之接合效果， 進而提升製程良率。 此外，由於第二凸塊286乃利用第一凸塊282之平坦區 j為形成基地，是以第二凸塊286之基底尺寸本質上小於第 凸塊282。另-方面，上述之第一凸塊282與第二凸塊⑽ 可由金（AU)或其他金屬所構成。在此較佳實施例中，第一凸 鬼2 /、第一凸塊286的材料組成或尺寸大小並不會影響其 結構形狀，故本發明不限於此。 參照第2E圖，先移除第二罩幕層296，並利用電漿清 洗方式’如氧氣電㈣，來移除殘餘在第二凸塊編及第一 凸塊282内的第二罩幕層296。接著依序移除未被第一凸塊 282覆蓋之種子層27〇及阻障兼黏著層26〇，然後再進行退 、处理製紅即元成具平頂之凸塊結構。退火處理製程亦可增 加第一凸塊282與第二凸塊286間的結合強度。由於所得: ^塊結構頂端即為一平坦的結構，因而不需再藉由機械研磨 等方式來平坦化凸塊頂端，如此將不會造成凸塊的機械性質 不佳或破壞基材上的元件。 ' 由上述本發明較佳實施例可知，應用本發明之平頂凸塊 結構可有效接合晶片與基材而提高製程良率。此外，應用本 1253699 發明之平頂凸塊結構的形成方法可直接形成—頂端為平坦 結構之凸m可維#凸塊之機餘質及基材上之元件。 雖然本發明已以-較佳實施例揭露如上，然其並非用以 限定本發明，任何熟習此技藝者，在不脫離本發明之精神和 範圍内’當可作各種之更動與潤飾，因此本發明之保護範圍 當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 *為讓本發明之上述和其他目的、特徵、和優點能更明顯 易懂’配合所附圖式，加以說明如下： 第1圖係繪示習知凸塊結構之截面圖；以及 第2A至2E圖係繪示依照本發明一較佳實施例的一種 平頂凸塊結構的製程剖面圖。 【元件代表符號簡單說明】 100、 200 基材 140、 240 保護層 180 凸塊 270 種子層 286 第二 凸塊 296 第二 罩幕層BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a bump structure and a method of forming the same, and more particularly to a bump structure having a flat top and a method of forming the same. [Prior Art] With the light and thin electronic products, the related packaging technology has also been rapidly developed to meet the needs of different products. Taking liquid crystal display (LCD) as an example, related chip packaging technologies include tape automated bonding (TAB) technology, chip on glass (C0G) technology, and wafer soft film bonding (cMp). 〇n mm; c〇F) technology, etc. Currently, wafer glass bonding technology is the mainstream of packaging technology. The wafer glass bonding technology utilizes the flip chip (fHp chip) packaging principle to bond a wafer with bumps to an anisotropic conductive film (ACF) as an intermediate interface to bond the wafer to the glass substrate. material. The bumps described above refer to the metal blocks fabricated on the pads of the wafer. Referring to Figure i, it is a schematic structural view of a conventional bump. Before the bumps 180 are formed, a protective layer 14 is sequentially formed around the pads 12 to protect other components on the substrate 100 and a barrier and adhesive layer to avoid bumps and bumps. The diffusion reaction between the 塾120, therefore, will inevitably form a 丁-convex structure 182 at the top of the bump 180 due to the presence of the protective layer 14〇. This convex structure 1 8 2 is in the process of wafer deposition When entering the Dingri Japanese glass bonding process, it will seriously affect the bonding effect between the glass and cause uneven bonding, and thus the yield of 1253699. On the other hand, 'the bonding process for matching fine pitch products However, the target is not to promote the heterosexual guidance ^ ^ ^. Fu Kezhi's grain control is toward the subtle 4 exhibition. However, due to the convex structure 182, the fine face is also the same. Square Conductivity> The "," method effectively bonds the wafer to the glass substrate. SUMMARY OF THE INVENTION It is an object of the present invention to provide a bumped junction r _ with a flat top for forming a method for effectively bonding a wafer to a substrate and improving bonding. In view of the above object, one of the present invention is separated from the sample by a flat-top bump: the 冓' is composed of a first bump and a second bump having a flat top, and A second bump having a flat top is formed over the first bump. Since the top end of the bump structure is a flat structure, the bump structure can be used for the package process, and the flat top structure can effectively bond the wafer and the substrate, so that the process yield can be greatly improved. According to another aspect of the present invention, a method of forming a flat-top bump structure is proposed. It first forms a - bump-on-substrate, and then uses a lithography process to form another bump having a flat top over the first bump. The bump is formed by the method, and the top end of the obtained bump structure is a flat structure without mechanical grinding or the like, thereby not damaging the components on the substrate or affecting the mechanical properties of the bump, and This can be used to effectively bond the wafer to the substrate. . [Embodiment] 1253699 A preferred embodiment of the flat top bump structure and its forming method of the present invention will be described in detail below with reference to the attached drawings. 2A to 2P Is! & · τ ^ Θ is a cross-sectional view of the formation process of the flat-top bump structure..., the second figure, the barrier-and-adhesion layer 26 is formed with Γμ, ΓΓ1" 240 200 " ', 曰 240 is formed around the pad 220 to protect the components on the substrate 200. In addition, the pad 22 can be an aluminum pad. The barrier and adhesive layer 260 needs to have good adhesion and compactness characteristics, and it is necessary to avoid diffusion reaction between the interface 220 and the bumps, which may be composed of chromium (tetra), titanium (9), tungsten (five) or a combination thereof. It can be obtained by a general vacuum sputtering process. A sub-layer 270 is then formed over the barrier and adhesion layer 26〇 as a base for subsequent bumps. The composition of the seed layer can be formed according to the formed bumps. For example, if the bump is a gold bump, the seed layer 27q is a gold (heart) metal layer. Then, the lithography process is used to form the first-mask layer 292 on the seed layer 70. In FIG. 2B, the first mask layer is added to define the position corresponding to the bump formation on the pad 220. The first bump 282 is formed by performing an electric ore process in the position defined herein. Referring to FIG. 2c, after completing the electro-mine process, the first mask layer 292 is removed to expose the first protrusion, and the first cover remaining in the first-convex 4 282 is removed by electro-convex cleaning. Curtain layer 292, wherein the plasma can be selected to use a general oxygen plasma. The first bump 282 is a dish-shaped structure 'the middle portion has a flat portion. Next, as shown in FIG. 2D, a second mask layer state is formed to define a bump formation position corresponding to the flat region of the first bump 282, and a 1253699 electric clock is formed to form a second bump. 286 is above the first bump (10). The second bump 286 is a columnar structure, and the first bump 286 which is opened or formed is not caused by the shape limitation of the protective layer (4) because it forms a flat region of the base. At the top end, the second bumps 286 are instead: flat top. (4) The flat top is used for the package bonding process, and the use of the anisotropic conductive adhesive material of the particle diameter can increase the bonding effect between the wafer and the substrate, thereby improving the process yield. In addition, since the second bump 286 is formed by using the flat region j of the first bump 282, the base size of the second bump 286 is substantially smaller than the first bump 282. In another aspect, the first bump 282 and the second bump (10) may be made of gold (AU) or other metal. In the preferred embodiment, the material composition or size of the first male ghost 2 / and the first female bump 286 does not affect the structural shape thereof, and the present invention is not limited thereto. Referring to FIG. 2E, the second mask layer 296 is first removed, and the second mask layer remaining in the second bump block and the first bump 282 is removed by a plasma cleaning method such as oxygen (four). 296. Then, the seed layer 27 and the barrier and adhesive layer 26 which are not covered by the first bump 282 are sequentially removed, and then the red, that is, the flat-shaped bump structure is removed. The annealing process can also increase the bonding strength between the first bump 282 and the second bump 286. Because of the obtained: ^ The top of the block structure is a flat structure, so there is no need to planarize the top of the bump by mechanical grinding or the like, so that the mechanical properties of the bump are not caused or the components on the substrate are damaged. . From the above preferred embodiments of the present invention, the flat-top bump structure to which the present invention is applied can effectively bond the wafer and the substrate to improve the process yield. In addition, the method for forming the flat-top bump structure of the invention of the present invention can be directly formed, the surface of the convex m-dimensional bump of the flat structure and the components on the substrate. Although the present invention has been described above in terms of a preferred embodiment, it is not intended to limit the invention, and it is intended that the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features and advantages of the present invention will become more apparent and <RTIgt; 2A to 2E are cross-sectional views showing a process of a flat-top bump structure in accordance with a preferred embodiment of the present invention. [Simplified description of component symbol] 100, 200 substrate 140, 240 protective layer 180 bump 270 seed layer 286 second bump 296 second mask layer
120、220 接塾 160、260阻障兼黏著層 182凸起結構 2 82第一凸塊 292第一罩幕層 10120, 220 joints 160, 260 barrier and adhesive layer 182 raised structure 2 82 first bump 292 first mask layer 10