1253044 玖、發明說明： 【發明所屬之技術領域】 本發明係關於一種液晶顯示器及其驅動方法。 【先前技術】 通常，一種液晶顯示器（LCD)包括一液晶面板組件，該組 件包括：兩個具有兩種場產生電極（例如多個像素電極與一 個共同電極）之面板；及插入其間的具有介電各向異性之液 晶層。場產生電極間電壓差異之變化，意即，該等電極產 生之電場強度之變化，可改變穿過該液晶顯示器（LCD)之光 線之透射率，因此藉由控制該等電極間的電壓差異獲得所 要影像。 該液晶顯示器（LCD)包括複數個具有像素電極之像素及 紅（R)、綠（G)與藍（B)滤色器。藉由透過顯示訊號線被施加 至其上之訊號來驅動該等像素以執行顯示操作。該等訊號 線包括用於載運掃描訊號之閘極線（或掃描訊號線），及用於 載運資料訊號之資料線。每一像素具有被連接至該等閘極 線中的一個及該等資料線中的一個之薄膜電晶體（TFT)，以 控制施加於該像素電極之資料訊號。 同時，存在若干類型的紅（R)、綠（G)與藍（B)濾色器之排 列。實例有：將同一顏色之濾色器排列在相同像素行中之 條紋（stnpe)類型；將該等紅（R)、綠（G)與藍（B)濾色器依次 排列於列與行方向上之馬赛克（mosaic)類型；及德耳塔 (Delta)類型，其中將該等像素成Z字形排列在行方向上，且 將該等紅（R)、綠（G)與藍（B)濾色器依次排列、。該德耳塔 87846 1253044 (Delta)類型正確地代表一圓或對角線。1253044 发明, DESCRIPTION OF THE INVENTION: TECHNICAL FIELD The present invention relates to a liquid crystal display and a driving method thereof. [Prior Art] Generally, a liquid crystal display (LCD) includes a liquid crystal panel assembly including: two panels having two kinds of field generating electrodes (for example, a plurality of pixel electrodes and a common electrode); and an intervening interposed therebetween An anisotropic liquid crystal layer. The field produces a change in the voltage difference between the electrodes, that is, the change in the electric field strength generated by the electrodes, which changes the transmittance of light passing through the liquid crystal display (LCD), and thus is obtained by controlling the voltage difference between the electrodes. The desired image. The liquid crystal display (LCD) includes a plurality of pixels having pixel electrodes and red (R), green (G) and blue (B) color filters. The pixels are driven to perform a display operation by a signal applied thereto by a display signal line. The signal lines include a gate line (or a scanning signal line) for carrying the scanning signal, and a data line for carrying the data signal. Each pixel has a thin film transistor (TFT) coupled to one of the gate lines and one of the data lines to control a data signal applied to the pixel electrode. At the same time, there are several types of red (R), green (G) and blue (B) color filters. Examples include: a stripe (stnpe) type in which color filters of the same color are arranged in the same pixel row; the red (R), green (G), and blue (B) color filters are sequentially arranged in the column and row directions. a mosaic type; and a delta type in which the pixels are arranged in a zigzag direction in the row direction, and the red (R), green (G) and blue (B) color filters are used Arrange in order. The delta 87846 1253044 (Delta) type correctly represents a circle or diagonal.
ClalrV0yante實驗室已提出一名為「ρβηΤΑ Mat⑽TM」之 像素排列，其有利於顯示高解析度影像，同時設計成本最 低。在薇像素排列中，該藍色單位像素為兩圓點（dot)所共 有，且當相鄰藍色像素自一資料驅動1C接收該等資料訊號 時，其同時被兩不同閘極驅動IC驅動。使用該penTileMatnx 像素結構，可藉由超級視訊圖形陣列（SVGA)等級（1π⑷之 顯示裝置實現超擴展圖形陣列（UXGA)等級之解析度。另 外，低成本閘極驅動IC的數目在增加，但是高成本資料驅 動1C的數目在減少。此最小化該顯示裝置之生產成本。 而要描繪（render)具有該像素排列之液晶顯示器（LCD)以 柘加解析度，且需要合適地選擇用於該描繪之像素群以防 止可見度（visibility)惡化。 【發明内容】 本發明之一動機係提供一具有最佳可見度之液晶顯示 器。 本發明提供一種液晶顯示器，其包括：複數個交替排列 《第-與第二像素列之陣列，每—第—列包括按順序排列 之紅、監、與綠像素或紅、綠、藍像素，且每一第二列包 括按順序排列之紅、藍、綠像素或紅、綠、藍像素，且具 有一自第一列以一像素改變之排列，每一像素包括一像素 電極與薄膜電晶體；複數個在列方向上延伸以將一閘極訊 唬傳送至該等像素之閘極線；及複數個在行方向上延伸以 將資料訊號傳送至該等像素之資料線。 87846 1253044 較佳基於用於該描繪之像素群描繪該液晶顯示器，用於 遠描繪之像素群包括一中心像素及複數個具有視與該中心 像素間的距離而定之加權（weight)的週邊像素。該加權較佳 Pk著與該中心像素間的距離增加而增大。 每一資料線可包括一連接部分，用於自一外部裝置接收 資料訊號。 該液晶顯示器還可包括—插人該等像素電極與該等閉極 線及資料線間的魏化層，該鈍化層由低介電材料製成，且 具有複數個接觸孔以連接該等薄膜電晶體與像素電極。 本發明提供一種驅動液晶顯示器的方法，該液晶顯示器 包括複數個像素，該等像素包括複數個開關元件、複數個 連接至該等開關元件之訊號線，該方法包括：基於一包括 二中心像素與複數個週邊像素之像素群加權用於描緣之像 素’使㈣等像素的加權取決於與該中心像素間的距離； 將貧料電壓提供至該等資料線，該 權而定之數值，·及開啟咳等門i 、 八有視孩加 送至該等像素電極寺開關兀件以將該等資料電壓傳 該加權較佳隨著與該中心像 【實施方式】 像素間的距離增加而增大。 、、^Γ該等隨附圖式，在下文中將更充分描述本發明，在 彻圖式中顯示了本發明之較佳眚施例。 广等圖式中，為了清楚而誇示層與區域之厚产。全文 中，類似數字代表類似元件。應 予度王又 區域或基板)被稱為在另—元；，：：件(例如-層、 上」（on)時，其可直接在 87846 1253044 另一元件上或也可存在介入元件。相反，當一元件被稱為 「直接在另一元件上」（directly on)時，則不存在介入元件。 現在，將參照該等隨附圖式詳細描述根據本發明實施例 之液晶顯示器（LCD)。 圖1係根據本發明實施例之液晶顯示器（LCD)之方塊 圖’且圖2係根據本發明一實施例之液晶顯示器（lcd)之一 像素之等效電路圖。 參照圖1，根據本發明一實施例之液晶顯示器（LCD)包括 一液晶（LC)面板組件300、連接至該面板組件300之一閘極 驅動器400及一資料驅動器500、一連接至該資料驅動器5〇〇 之灰度電壓發生器800、及一控制上述元件之訊號控制器 600。 在圖2之結構圖中，該液晶（LC)面板組件3〇〇包括一下面 板100、一上面板200及一插入其間之液晶層3，同時其包含 複數個頒示訊號線G〗-Gn與Di-Dm，及複數個連接至其上且 大體上被排列成矩陣的像素（如圖1與圖2之電路圖所示）。 在該下面板100上提供該等顯示訊號線〇1-〇11與〇1_0111，且 其包括複數個傳送閘極訊號（被稱為掃描訊號）之閘極線 g广，及複數個傳送資料訊號之資料線Di_Dm 〇該等閘極 線〇1-〇11大體上在一列方向上延伸且大體上互相平行，而該 等資料線Di_Dm大體上在一行方向上延伸且大體上互相平 行。 母像素包括連接至顯不訊號線Gi-Gn與Di_Dmi —開關 元件Q，及連接至該開關元件Q之一LC電容器cLC與一儲存 87846 -10 - 1253044 電容器cST。若不需要，可省略該儲存電容器cST。 在下面板100上提供例如薄膜電晶體（TFT)之開關元件 Q，且其具有3個端子：連接至該等閘極線GrGn中的一個之 控制端子；連接至該等資料線的一個之輸入端子； 及連接至該LC電容器CLC與儲存電容器CST之輸出端子。 LC電容器CLC包括在該下面板100上之像素電極190、在 該上面板200上之共同電極270、及在該等電極190與270間 充當介電材料之液晶（LC)層3。該像素電極190被連接至開 關元件Q，且該共同電極270覆蓋上面板200之整個表面並被 供應一共同電壓Vcom。或者，在下面板100上既提供像素 電極19 0 ’又提供共同電極2 7 0 ’該兩個電極具有帶狀（bar) 或條紋形狀。 儲存電容器CST係LC電容器CLC之一輔助電容器。該儲存 電容器CST包括像素電極190與一單獨訊號線（未圖示），該單 獨訊號線被提供於下面板100上，藉由一絕緣體疊蓋該像素 電極190，並被供應例如該共同電壓Vcom之一預定電壓。 或者，該儲存電容器CST包括像素電極190及一被稱為前 (previous)閘極線之相鄰閘極線，該相鄰閘極線藉由一絕緣 體疊蓋該像素電極190。 對於彩色顯示器，每一像素藉由在像素電極190佔據之區 域中提供複數個濾色器230中的一個來代表其自身的顏 色。在上面板200之相應區域中提供圖2中顯示之濾色器 230。或者，在下面板100上之像素電極190上面或下面提供 該濾色器230。 87846 -11 - 1253044 攄色器230之顏色較佳係三原色（例如紅、綠與藍）中的一 個在下文中，基於該像素代表之顏色，將一像素稱為紅、 綠或監像素，且由參考數字R、G或B表示。 將偏振來自燈泡34i之光線的一對偏振器（未圖示）附著 在面板組件300之該等面板1〇〇與2〇〇之外表面上。 圖3A展示根據本發明一實施例之液晶顯示器（lcd) 之空間排列。 #' 參照圖3A，將複數個具有大體上相等尺寸之像素排列在 一包含複數個像素列及複數個像素行之矩陣内。The ClalrV0yante laboratory has proposed a pixel arrangement of "ρβηΤΑ Mat(10)TM" which is advantageous for displaying high-resolution images with the lowest design cost. In the Wei pixel arrangement, the blue unit pixel is shared by two dots, and when adjacent blue pixels receive the data signals from a data driving 1C, they are simultaneously driven by two different gate driving ICs. . Using the penTileMatnx pixel structure, the resolution of the Super Expanded Graphics Array (UXGA) level can be achieved by the Super Video Graphics Array (SVGA) level (1π(4) display device. In addition, the number of low-cost gate driver ICs is increasing, but high. The number of cost data drives 1C is decreasing. This minimizes the production cost of the display device. Instead, a liquid crystal display (LCD) having the pixel arrangement is rendered to add resolution, and needs to be appropriately selected for the depiction. The pixel group is used to prevent the visibility from being deteriorated. SUMMARY OF THE INVENTION One of the motivations of the present invention is to provide a liquid crystal display having the best visibility. The present invention provides a liquid crystal display comprising: a plurality of alternately arranged "first-and-first" An array of two pixel columns, each - column includes red, black, and green pixels or red, green, and blue pixels arranged in order, and each second column includes red, blue, green pixels or red in order , green, blue pixels, and having an array of pixels changed from the first column, each pixel comprising a pixel electrode and a thin film transistor; a plurality of gate lines extending in the column direction to transmit a gate signal to the pixels; and a plurality of data lines extending in the row direction to transmit data signals to the pixels. 87846 1253044 Preferably based on The liquid crystal display is depicted in the depicted pixel group, and the pixel group for far drawing includes a central pixel and a plurality of peripheral pixels having a weight corresponding to a distance between the central pixels. The weighting is preferably Pk The distance between the pixel and the center pixel is increased. Each data line may include a connecting portion for receiving a data signal from an external device. The liquid crystal display may further include: inserting the pixel electrodes and the closed ends a passivation layer between the line and the data line, the passivation layer being made of a low dielectric material and having a plurality of contact holes for connecting the thin film transistors and the pixel electrodes. The present invention provides a method of driving a liquid crystal display, the liquid crystal The display includes a plurality of pixels, the pixels including a plurality of switching elements, and a plurality of signal lines connected to the switching elements, the method comprising: The pixel group weighting of the two central pixels and the plurality of peripheral pixels is used to describe the pixel of the pixel. The weighting of the pixels such as (four) depends on the distance from the central pixel; the poor material voltage is supplied to the data lines, and the weight is provided. Set the value, and open the coughing door i, eight to see the child plus to the pixel electrode temple switch to pass the data voltage to the weight better with the center image [implementation] between the pixels The present invention will be described more fully hereinafter with reference to the accompanying drawings, and the preferred embodiments of the invention are shown in the drawings. And the thick layer of the layer and the region. In the full text, similar figures represent similar components. The king or region should be called "other"; It may be directly on the other component of 87846 1253044 or there may be intervening elements. In contrast, when an element is referred to as being "directly on", there is no intervening element. A liquid crystal display (LCD) according to an embodiment of the present invention will now be described in detail with reference to the accompanying drawings. 1 is a block diagram of a liquid crystal display (LCD) according to an embodiment of the present invention. FIG. 2 is an equivalent circuit diagram of a pixel of a liquid crystal display (LCD) according to an embodiment of the present invention. Referring to FIG. 1, a liquid crystal display (LCD) according to an embodiment of the invention includes a liquid crystal (LC) panel assembly 300, a gate driver 400 connected to the panel assembly 300, and a data driver 500, and a data driver connected thereto. A gray voltage generator 800, and a signal controller 600 for controlling the above components. In the structural diagram of FIG. 2, the liquid crystal (LC) panel assembly 3 includes a lower panel 100, an upper panel 200, and a liquid crystal layer 3 interposed therebetween, and includes a plurality of instruction signal lines G〗-Gn and Di-Dm, and a plurality of pixels connected thereto and arranged substantially in a matrix (as shown in the circuit diagrams of FIGS. 1 and 2). The display signal lines 〇1-〇11 and 〇1_0111 are provided on the lower panel 100, and the gate lines g of the plurality of transmission gate signals (referred to as scanning signals) are wide, and a plurality of transmission data signals are transmitted. The data lines Di_Dm 〇 the gate lines 〇1-〇11 extend substantially in a column direction and are substantially parallel to each other, and the data lines Di_Dm extend substantially in a row direction and are substantially parallel to each other. The mother pixel includes a connection to the display signal lines Gi-Gn and Di_Dmi - the switching element Q, and an LC capacitor cLC connected to one of the switching elements Q and a storage 87846 - 10 - 1253044 capacitor cST. The storage capacitor cST can be omitted if not required. A switching element Q such as a thin film transistor (TFT) is provided on the lower panel 100, and has three terminals: a control terminal connected to one of the gate lines GrGn; and an input terminal connected to one of the data lines And connected to the output terminals of the LC capacitor CLC and the storage capacitor CST. The LC capacitor CLC includes a pixel electrode 190 on the lower panel 100, a common electrode 270 on the upper panel 200, and a liquid crystal (LC) layer 3 serving as a dielectric material between the electrodes 190 and 270. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 covers the entire surface of the upper panel 200 and is supplied with a common voltage Vcom. Alternatively, both the pixel electrode 19 0 ' and the common electrode 2 7 0 ' are provided on the lower panel 100. The two electrodes have a bar or stripe shape. The storage capacitor CST is an auxiliary capacitor of the LC capacitor CLC. The storage capacitor CST includes a pixel electrode 190 and a separate signal line (not shown). The individual signal line is provided on the lower panel 100. The pixel electrode 190 is overlaid by an insulator and supplied with, for example, the common voltage Vcom. One of the predetermined voltages. Alternatively, the storage capacitor CST includes a pixel electrode 190 and an adjacent gate line referred to as a previous gate line, the adjacent gate line overlying the pixel electrode 190 by an insulator. For a color display, each pixel represents its own color by providing one of a plurality of color filters 230 in the area occupied by the pixel electrode 190. The color filter 230 shown in Fig. 2 is provided in a corresponding area of the upper panel 200. Alternatively, the color filter 230 is provided above or below the pixel electrode 190 on the lower panel 100. 87846 -11 - 1253044 The color of the color filter 230 is preferably one of three primary colors (for example, red, green, and blue). Hereinafter, based on the color represented by the pixel, a pixel is referred to as a red, green, or superimposed pixel, and Reference numeral R, G or B is indicated. A pair of polarizers (not shown) that polarize light from the bulb 34i are attached to the outer surfaces of the panels 1 and 2 of the panel assembly 300. 3A shows a spatial arrangement of a liquid crystal display (LCD) in accordance with an embodiment of the present invention. Referring to Figure 3A, a plurality of pixels having substantially equal sizes are arranged in a matrix comprising a plurality of pixel columns and a plurality of pixel rows.
每一像素列包括代表三種顏色之像素，意即紅色像素 R、’彔色像素G及藍色像素B。圖从中顯示之在一像素列中 的該等像素之順序為紅色像Μ、藍色像素B及綠色像素GEach pixel column includes pixels representing three colors, that is, red pixels R, 'color pixels G, and blue pixels B. The order in which the pixels are displayed in a pixel column is a red image, a blue pixel B, and a green pixel G.
該等像素行包括複數個雙色行與複數個單色行。如圖3A 所示，每一雙色行包括紅色像素R與綠色像素G，且每一單 色行包括藍色像素B。 當僅觀察雙色行時，任何兩個在列方向或行方向上互相 相鄰之像素代表不同顏色，因此該等雙色行形成-棋盤形 圖案。每一單色行被插入該等雙色行之間。 圖3B展不形成—圓點之像素群，其為圖从中顯示之像素 排列影像基本單元。每個群包括六個像素，即單色行 中的兩相鄰中心像素與雙色行中的四個像素，其在列方向 上與Μ等個別中心像素相鄰。 圖4Α與5 Α展示根據本發 明其他實施例之多個液晶顯示 ^7846 -12- 1253044 器（LCD)像素之空間排列。 參照圖4A與5A，將複數個具有大體上相等尺寸之像 列在包括複數個像素列與複數個像素行之矩陣中。 每一像素列包括代表三種顏色之像素，即紅色像素r、 綠色像素G及藍色像素β。圖4A中顯示之在一像素列中㈣ 等像素之順序為紅色像素R、藍色像素B及綠色像素g，= 圖5A中顯示之順序為紅色像素R、綠色像素g及藍色像素 B。將代表相同顏色之相鄭兩像素列中的像素排列在相鄭行 中，且奇數行與偶數行中的個別像素排列相等。每一行包 括兩個紅色像素11、兩個綠色像素0及兩個藍色像素B。 c 圖4B與5B展示形成-圓點之—像素群，該圓點分別為圖 4A與5A中顯示之該等像素排列之一影像基本單元。每個群 包括一 2X3像素矩陣。圖4B中顯示之矩陣包括：一包括按 順序排列之紅色像素R、藍色像素B及綠色像素G之第一 列；與一包括按順序排列之綠色像素G、紅色像素R及藍色 像素B之第二列。相反，圖5]B中顯示之矩陣包括：一包括按 順序排列之紅色像素R、綠色像素G及藍色像素B之第一 列；與一包括按順序排列之藍色像素B、紅色像素R及綠色 像素G之第二列。 圖4A與5A中顯示之該等像素排列比圖3A中顯示之像素 排列具有更好可見度。詳j之，圖3 A中顯示之像素排列導 致該藍色像素行被看成一藍色帶，而圖4A至5B中顯示之像 素排列並不這樣。The pixel rows include a plurality of two-color lines and a plurality of monochrome lines. As shown in Fig. 3A, each of the two color lines includes a red pixel R and a green pixel G, and each of the single color lines includes a blue pixel B. When only two-color lines are observed, any two pixels adjacent to each other in the column direction or the row direction represent different colors, and thus the two-color lines form a checkerboard pattern. Each monochrome line is inserted between the two-color lines. Fig. 3B does not form a pixel group of dots, which is a basic unit for arranging images from pixels displayed in the figure. Each cluster includes six pixels, i.e., two adjacent center pixels in a monochrome line and four pixels in a two-color line, which are adjacent to individual center pixels such as Μ in the column direction. 4A and 5B show spatial arrangement of a plurality of liquid crystal displays ^7846 -12-1253044 (LCD) pixels in accordance with other embodiments of the present invention. Referring to Figures 4A and 5A, a plurality of images having substantially equal sizes are listed in a matrix comprising a plurality of pixel columns and a plurality of pixel rows. Each pixel column includes pixels representing three colors, namely, a red pixel r, a green pixel G, and a blue pixel β. The order of pixels such as (4) in a pixel column shown in FIG. 4A is red pixel R, blue pixel B, and green pixel g, and the order shown in FIG. 5A is red pixel R, green pixel g, and blue pixel B. The pixels in the phase two pixel columns representing the same color are arranged in a phase row, and the odd rows are equal to the individual pixels in the even rows. Each row includes two red pixels 11, two green pixels 0, and two blue pixels B. c Figures 4B and 5B show the formation of a dot-pixel group which is one of the image basic units of the pixel arrangement shown in Figures 4A and 5A, respectively. Each group includes a 2X3 pixel matrix. The matrix shown in FIG. 4B includes: a first column including red pixels R, blue pixels B, and green pixels G arranged in order; and one including green pixels G, red pixels R, and blue pixels B arranged in order The second column. In contrast, the matrix shown in FIG. 5] B includes: a first column including red pixels R, green pixels G, and blue pixels B arranged in order; and a blue pixel B and a red pixel R including sequentially arranged And the second column of the green pixel G. The arrangement of pixels shown in Figures 4A and 5A has better visibility than the arrangement of pixels shown in Figure 3A. In detail, the arrangement of the pixels shown in Fig. 3A causes the blue pixel row to be regarded as a blue band, and the pixel arrangement shown in Figs. 4A to 5B is not.
圖4B與5B中顯示之該等圓點僅為其實例，且圖4A至5B 87846 -13- 1253044 中顯示之該等像素排列之圓點可具有不同組態。 將參照圖6與7描述根據本發明一實施例之液晶顯示器 (LCD)之薄膜電晶體（TFT)陣列面板之示範性詳細結構。 圖6係根據本發明一實施例之液晶顯示器（LCD)之示範 性薄膜電晶體（TFT)陣列面板之設計圖，且圖7係圖6中顯示 之沿線W-W’之薄膜電晶體（TFT)陣列面板之剖面圖。 在絕緣基板110上形成用於傳送閘極訊號之複數個閘極 線121。每一閘極線121大體上在橫向方向上延伸且每一閘 極線121之複數個部分形成複數個閘極電極123。每一閘極 線121包括複數個向下突出之擴充（expansion) 127。 該等閘極線121包括較佳由含Ag金屬（例如Ag及Ag合金） 或含A1金屬（例如A1及A1合金）製成之低電阻導電層。該等閘 極線121可具有一多層結構，其包括一低電阻導電層與另一 較佳由Cr、Ti、Ta、Mo或其合金（例如MoW合金）製成之層， 該等金屬或其合金具有良好物理、化學及與其他材料（例如 ITO(氧化錮錫）及IZO(氧化銦鋅））之電接觸特徵。該等層之 一良好示範性組合係Cr及Al-Nd合金。 使閘極線121之侧邊逐漸變細，且該等侧邊相對於基板 110表面之傾斜角約在30至80度的範圍内。 在該等閘極線121上形成較佳由氮化矽（SiNx)製成之閘 極絕緣層140。 在該閘極絕緣層140上形成較佳由氫化非晶矽 (hydrogenated amorphous silicon)(縮寫為「a-Si」）製成之複 數個半導體島狀物154。 87846 -14- 1253044 在該半導體島狀物154上形成較佳由矽化物或重摻雜11類 雜質之n+氫化a-Si製成之複數個歐姆接觸島狀物163與 165。該等歐姆接觸島狀物163與165成對地位於該半導體島 狀物154上。 使該半導體島狀物154與該等歐姆接觸163與165之側邊 逐漸變細，且其傾斜角較佳在3〇至80度範圍内。 在該等歐姆接觸163與165及該閘極絕緣層140上形成複 數個資料線171、複數個汲極175及複數個儲存電容導體 177。 . 用於傳送資料電壓之該等資料線171大體上在縱向上延 伸且與閘極線121相交。向該等汲極175延伸之每一資料線 171之複數個分枝形成複數個源極17 3。每一對源極17 3與沒 極175彼此分離且相對於閘極電極123彼此相對。閘極電極 123、源極173及汲極175連同半導體島狀物154共同形成一 薄膜電晶體（TFT)，其具有形成於位於該源極173與汲極175 間之半導體島狀物154中的通道。 該等儲存電容導體177疊蓋閘極線121之擴充127。 該等資料線171、汲極175及儲存電容導體177也包括一低 電阻導電層，其較佳由含Ag金屬（例如Ag及Ag合金）或含A1 金屬（例如A1及A1合金）製成。該等資料線17卜汲極i75及儲 存電容導體177可具有一多層結構，其包括一低電阻導電層 與另一較佳由Cr、Ti、Ta、Mo或其合金（例如MoW合金）製 成之層，該等金屬或其合金具有良好物理、化學及與其他 材料（例如ITO(氧化錮錫）及IZO(氧化錮鋅））之電接觸特 87846 -15 - 1253044 徵。該等層之一良好示範性組合係Cr&A1-Nd合金。 使資料線171、汲極175及儲存電容導體177之侧邊逐漸變 、、田，且邊等侧邊關於基板11〇表面之傾斜角在3〇至度間變 化。 該等歐姆接觸163與165僅被插入下面的半導體島狀物 154與上面的資料線171及其上的上面汲極175之間，並減少 其中之接觸電阻。 在該等資料線17：1、汲極175、儲存導體177及半導體島狀 物154之曝露邵分上形成一鈍化層18〇。該鈍化層18〇較佳由 具有一良好平坦特徵之感光有機材料、低介電絕緣材料（例 如藉由電漿增強化學氣相沈積（PECVD)形成之a_Si:c:〇與 a-S1:〇:F)，或無機材料（例如氮化矽）製成。或者，該鈍化層 180可既包括一 SiNX薄膜又包括一有機薄膜。 遠純化層1 8 0具有複數個接觸孔1 § 5、18 7及18 9，其分別 曝露汲極175、儲存導體177及該等資料線171之末端部分 Π9。該鈍化層180及閘極絕緣層14〇具有複數個曝露該等閘 極線121之末端部分丨25的接觸孔182。 在鈍化層1 80上形成複數個像素電極丨9〇及複數個接觸輔 助元件92與97，其較佳由IZO或ITO製成。 藉由接觸孔185將該等像素電極19〇實體上電連接至該等 汲極175’且藉由接觸孔187將該等像素電極19〇實體上電連 接至該等儲存電容導體177，使得該等像素電極19〇自汲極 175接收資料電壓且將所接收的資料電壓傳送至儲存電容 導體177。 87846 -16- 1253044 回到圖2,被提供資料電壓之像素電極190與另一面板200 上之共同電極270合作產生電場，該電場再定向（reorient)位 於其間的液晶層3中的液晶分子。 如上所述，一像素電極190及共同電極270形成一液晶電 容器CLC，其在薄膜電晶體（TFT) Q關閉後儲存所施加的電 壓。提供一被平行連接至該液晶電容器CLC、被稱為”儲存 電容器’’之额外電容器，以增強該電壓儲存電容。藉由用臨 近其之閘極線121(被稱為’’前閘極線疊蓋像素電極190建 構該等儲存電容器。藉由在閘極線121提供擴充127以增加 疊蓋區域，且藉由在像素電極190下提供連接至像素電極 190且疊蓋擴充127之儲存電容導體177以減少該等端子間 之距離，從而增加該等儲存電容器之電容，即儲存電容。 像素電極190疊蓋閘極線121及資料線171以增加孔徑比 率，但這是可選擇的。 藉由接觸孔182及189將接觸輔助元件92與97分別連接至 該等閘極線127之曝露末端部分125及資料線171之曝露末 端部分179。該等接觸輔助元件92與97不是必需物，但較佳 保護該等曝露部分125與179，且補充曝露部分125及179與 外部裝置之黏合性。 根據本發明另一實施例，像素電極190係由透明傳導聚合 物製成。對一反射或半透反射（transflective)液晶顯示器 (LCD)而言，像素電極190包括不透明反射金屬。 參照圖8、9A與9B將詳細描述根據本發明另一實施例之 液晶顯示器（LCD)之薄膜電晶體（TFT)陣列面板。 87846 •17- 1253044 圖8係根據本發明另一實施例之液晶顯示器（Lcd)之示 範性薄膜電晶體（TFT)陣列面板之設計圖，且圖9a及9B分別 係圖8中顯示之沿線ΙΧΑ-ΙΧΑ，及線ΙΧΒ_ΙΧΒ，之薄膜電晶體 (TFT)陣列面板之剖面圖。 如該等圖式中所示，根據該實施例之液晶顯示器（LCD) 之薄膜電晶體（TFT)陣列面板之層化結構幾乎與圖6與7中 顯示的一樣。即，在基板110上形成包括複數個閘極電極123 之閘極線121 ’且在其上形成閘極絕緣層14〇。在該閘極絕 緣層140上形成包括與圖6及7中顯示之對應至半導體島狀 物154的複數個延伸（extensi〇n) 154之複數個半導體條紋 151 ’且在該等半導體條紋151上形成包括與圖6及7中顯示 之對應土歐姆接觸島狀物163的複數個延伸163之複數個歐 姆接觸條紋161及複數個歐姆接觸島狀物165。在該等歐姆 接觸161及165上形成包括複數個源極173、複數個汲極175 及複數個儲存電容導體177之複數個資料線171，且在其上 形成一純化層180。在該鈍化層180及/或閘極絕緣層140上提 供複數個接觸孔182、185、187與189，且在該鈍化層18〇上 形成複數個像素電極190及複數個接觸輔助元件92與97。 與圖6與7中顯示之薄膜電晶體（TFT)陣列面板不同，根據 該實施例之薄膜電晶體（TFT)陣列面板在與閘極線12丨相同 <層上提供與該等閘極線121分離之複數個儲存電極線 131 ’且用儲存電容導體177疊蓋該等儲存電極線13ι，以形 成泫等閘極線121之無擴充儲存電容。給該等儲存電極線 131供應一例如共同電壓之預定電壓。若由閘極線121與像 87846 -18- 1253044 素電極190之疊蓋產生之儲存電容足夠時，則可省略儲存電 極線13 1 ’以及儲存電容導體丨77。 另外，在儲存電容177與閘極絕緣層14〇間不僅提供半導 體條紋151及歐姆接觸161與165，還提供複數個半導體島狀 物157及複數個其上之歐姆接觸Μ?。 该等半導體條蚊與島狀⑯1511 157具有與該等資料線 171、汲極175與儲存電容導體177，以及下歐姆接觸ΐ6ι、 165與167(除了提供薄膜電晶體（TFT)之延伸154)幾乎相同 之平坦形狀。特定言之，半導體島狀物157、歐姆接觸島狀 物167及儲存導體177具有大體上相同的平坦形狀。半導體 條紋15!包括未被資料線171、沒極175及儲存導體177覆蓋 <若干曝露部分，例如位於源極173與汲極175間的部分。 描繪具有上述像素排列之液晶顯示器（LCD)，以增加解 析度，且此將被參照圖1〇A_1〇c詳細描述。 圖10A-10C係根據本發明實施例用於已描繪液晶顯示器 (LCD)之示範性像素群。圖丨〇a中顯示之描緣（r_如吨）係 基於圖3A中顯示之像素排列，且圖與1()c中顯示之描緣 係基於圖4A中顯示之像素排列。 荼妝圖10A，將用於描繪之示範性像素群集中於雙色像 素仃中的任一像素。該像素群包括雙色行中的四個像素（在 下文中稱為”週邊像素”)及單色行中的兩個像素，其鄰近於 孩中心像素。圖10A顯示一像素群，其包括一紅色像素r， 及與孩紅色像素R鄰近之四個綠色像素G1_G4及兩個藍色 像素B1與B2。 87846 -19- 1253044 麥照圖10B與10C，用於描繪之示範性像素群包括一中心 紅色像素R，及與該中心像素R相鄰之四個綠色像素 G1 G4(在下文中稱為”週邊像素”）及兩個藍色像素Μ與 B2，或包括一中心綠色像素G，及與該中心像素〇鄭近之四 個紅色像素R1_R4(在下文中稱為”週邊像素"）及兩個藍色像 素B1與B2。 根據本發明之一實施例，圖10A-10C中顯示之描繪給予 中、像素等於或大於全邵加權之一半的加權，並給予週邊 像素相等的加權。但是，此導致由於該等週邊像素與該中 心像素間的距離不同而產生之相位誤差。 在圖10A與10B所示之實例中，該中心紅色像素R與上面 綠色像素G1及與左下方綠色像素㈦間的距離（在下文中稱 為’’第一距離”）係相等的，而該中心紅色像素尺間的距離（在 因為在該紅色像 豪’其產生一相 下文中稱為”第二距離”）比該第一距離大，因』 素R與右邊綠色像素G3間插入了 一藍色像素， 位誤差。 圖10C所示之實例中，由於綠色像素〇與右邊紅色像素们 間之第一距離與綠色像素G與左邊像素R2間之第二距離不The dots shown in Figures 4B and 5B are only examples thereof, and the dots of the pixel arrangement shown in Figures 4A to 5B 87846 - 13-1253044 may have different configurations. An exemplary detailed structure of a thin film transistor (TFT) array panel of a liquid crystal display (LCD) according to an embodiment of the present invention will be described with reference to Figs. 6 is a design diagram of an exemplary thin film transistor (TFT) array panel of a liquid crystal display (LCD) according to an embodiment of the present invention, and FIG. 7 is a thin film transistor (TFT) along the line W-W' shown in FIG. ) A cross-sectional view of the array panel. A plurality of gate lines 121 for transmitting gate signals are formed on the insulating substrate 110. Each of the gate lines 121 extends substantially in the lateral direction and a plurality of portions of each of the gate lines 121 form a plurality of gate electrodes 123. Each gate line 121 includes a plurality of downwardly protruding expansions 127. The gate lines 121 include a low resistance conductive layer preferably made of an Ag-containing metal (e.g., Ag and Ag alloy) or an A1-containing metal (e.g., A1 and Al alloy). The gate lines 121 may have a multilayer structure including a low resistance conductive layer and another layer preferably made of Cr, Ti, Ta, Mo or an alloy thereof (for example, MoW alloy), or Its alloys have good physical, chemical and electrical contact characteristics with other materials such as ITO (tantalum tin oxide) and IZO (indium zinc oxide). A good exemplary combination of such layers is Cr and Al-Nd alloys. The sides of the gate line 121 are tapered, and the angle of inclination of the sides relative to the surface of the substrate 110 is in the range of about 30 to 80 degrees. A gate insulating layer 140 preferably made of tantalum nitride (SiNx) is formed on the gate lines 121. A plurality of semiconductor islands 154 preferably made of hydrogenated amorphous silicon (abbreviated as "a-Si") are formed on the gate insulating layer 140. 87846 - 14 - 1253044 A plurality of ohmic contact islands 163 and 165, preferably made of telluride or heavily doped 11-type impurity n+ hydrogenated a-Si, are formed on the semiconductor island 154. The ohmic contact islands 163 and 165 are located in pairs on the semiconductor island 154. The side edges of the semiconductor islands 154 and the ohmic contacts 163 and 165 are tapered, and the angle of inclination is preferably in the range of 3 Torr to 80 degrees. A plurality of data lines 171, a plurality of drain electrodes 175, and a plurality of storage capacitor conductors 177 are formed on the ohmic contacts 163 and 165 and the gate insulating layer 140. The data lines 171 for transmitting data voltages extend substantially in the longitudinal direction and intersect the gate lines 121. A plurality of branches 17b of each of the data lines 171 extending to the drains 175 form a plurality of sources 17 3 . Each pair of source electrodes 17 3 and 175 are separated from each other and opposed to each other with respect to the gate electrode 123. The gate electrode 123, the source 173 and the drain 175 together with the semiconductor island 154 form a thin film transistor (TFT) having a semiconductor island 154 formed between the source 173 and the drain 175. aisle. The storage capacitor conductors 177 overlap the extension 127 of the gate line 121. The data lines 171, the drain 175 and the storage capacitor conductor 177 also include a low resistance conductive layer which is preferably made of an Ag-containing metal (e.g., Ag and Ag alloy) or an A1-containing metal (e.g., A1 and Al alloy). The data line 17 and the storage capacitor conductor 177 may have a multi-layer structure including a low-resistance conductive layer and another preferably made of Cr, Ti, Ta, Mo or an alloy thereof (for example, MoW alloy). In the layer formed, the metals or alloys thereof have good physical, chemical and electrical contact with other materials such as ITO (tantalum tin oxide) and IZO (zinc oxide). 87846 -15 - 1253044. One of the well-exemplified combinations of these layers is the Cr&A1-Nd alloy. The side edges of the data line 171, the drain 175, and the storage capacitor conductor 177 are gradually changed, and the inclination angle of the side with respect to the surface of the substrate 11 is changed from 3 〇 to degree. The ohmic contacts 163 and 165 are only inserted between the underlying semiconductor island 154 and the upper data line 171 and the upper drain 175 thereon, and reduce the contact resistance therein. A passivation layer 18 is formed on the exposed portions of the data lines 17:1, the drain 175, the storage conductor 177, and the semiconductor island 154. The passivation layer 18 is preferably made of a photosensitive organic material having a good flat characteristic, a low dielectric insulating material (for example, a_Si:c:〇 and a-S1:〇 formed by plasma enhanced chemical vapor deposition (PECVD)). :F), or made of an inorganic material such as tantalum nitride. Alternatively, the passivation layer 180 may include both a SiNX film and an organic film. The far purification layer 180 has a plurality of contact holes 1 § 5, 18 7 and 18 9, which expose the drain 175, the storage conductor 177 and the end portion Π9 of the data lines 171, respectively. The passivation layer 180 and the gate insulating layer 14A have a plurality of contact holes 182 exposing the end portions 25 of the gate lines 121. A plurality of pixel electrodes 丨9 〇 and a plurality of contact auxiliary members 92 and 97 are formed on the passivation layer 180, which are preferably made of IZO or ITO. The pixel electrodes 19 are physically electrically connected to the drain electrodes 175 ′ through the contact holes 185 and the pixel electrodes 19 are physically electrically connected to the storage capacitor conductors 177 via the contact holes 187 such that the pixel electrodes 19 are electrically connected to the storage capacitors 177. The pixel electrode 19 receives the data voltage from the drain 175 and transmits the received data voltage to the storage capacitor conductor 177. 87846 - 16 - 1253044 Returning to Fig. 2, the pixel electrode 190 supplied with the data voltage cooperates with the common electrode 270 on the other panel 200 to generate an electric field which reorients the liquid crystal molecules in the liquid crystal layer 3 therebetween. As described above, the one pixel electrode 190 and the common electrode 270 form a liquid crystal capacitor CLC which stores the applied voltage after the thin film transistor (TFT) Q is turned off. An additional capacitor, referred to as a "storage capacitor", is provided in parallel to the liquid crystal capacitor CLC to enhance the voltage storage capacitor by using a gate line 121 adjacent thereto (referred to as ''front gate line The stacked pixel electrodes 190 construct the storage capacitors by providing an extension 127 on the gate lines 121 to increase the overlap region, and by providing a storage capacitor conductor connected to the pixel electrodes 190 and overlying the extension 127 under the pixel electrodes 190. 177 to reduce the distance between the terminals, thereby increasing the capacitance of the storage capacitors, that is, the storage capacitor. The pixel electrode 190 overlaps the gate line 121 and the data line 171 to increase the aperture ratio, but this is optional. Contact holes 182 and 189 connect contact auxiliary elements 92 and 97 to exposed end portions 125 of said gate lines 127 and exposed end portions 179 of data lines 171. These contact auxiliary elements 92 and 97 are not essential but are Preferably, the exposed portions 125 and 179 are protected, and the adhesion of the exposed portions 125 and 179 to the external device is supplemented. According to another embodiment of the present invention, the pixel electrode 190 is transparently conductively polymerized. The pixel electrode 190 includes an opaque reflective metal for a reflective or transflective liquid crystal display (LCD). A liquid crystal display according to another embodiment of the present invention will be described in detail with reference to FIGS. 8, 9A and 9B. Thin film transistor (TFT) array panel of LCD) 87846 • 17-1253044 FIG. 8 is a design diagram of an exemplary thin film transistor (TFT) array panel of a liquid crystal display (Lcd) according to another embodiment of the present invention, and 9a and 9B are respectively a cross-sectional view of a thin film transistor (TFT) array panel along the line ΙΧΑ-ΙΧΑ and ΙΧΒ_ΙΧΒ shown in Fig. 8. As shown in the drawings, the liquid crystal display (LCD) according to the embodiment The layered structure of the thin film transistor (TFT) array panel is almost the same as that shown in Figures 6 and 7. That is, a gate line 121' including a plurality of gate electrodes 123 is formed on the substrate 110 and formed thereon. a gate insulating layer 14? A plurality of semiconductor stripes 151' including a plurality of extensions 154 corresponding to the semiconductor islands 154 shown in FIGS. 6 and 7 are formed on the gate insulating layer 140 and In the A plurality of ohmic contact stripes 161 including a plurality of extensions 163 of the corresponding earth ohmic contact islands 163 shown in FIGS. 6 and 7 and a plurality of ohmic contact islands 165 are formed on the semiconductor stripes 151. The ohmic contacts 161 are formed thereon. And forming a plurality of data lines 171 including a plurality of source electrodes 173, a plurality of drain electrodes 175 and a plurality of storage capacitor conductors 177, and forming a purification layer 180 thereon. The passivation layer 180 and/or the gate electrode A plurality of contact holes 182, 185, 187 and 189 are provided on the insulating layer 140, and a plurality of pixel electrodes 190 and a plurality of contact auxiliary elements 92 and 97 are formed on the passivation layer 18A. Unlike the thin film transistor (TFT) array panel shown in FIGS. 6 and 7, the thin film transistor (TFT) array panel according to this embodiment is provided with the same gate line as the gate line 12A. 121 separates the plurality of storage electrode lines 131' and overlaps the storage electrode lines 131 with the storage capacitor conductors 177 to form a non-expanded storage capacitor of the gate lines 121. The storage electrode lines 131 are supplied with a predetermined voltage such as a common voltage. If the storage capacitance generated by the overlap of the gate line 121 and the pixel electrode 190 like the 87846 -18-1253044 is sufficient, the storage electrode line 13 1 ' and the storage capacitor conductor 丨 77 can be omitted. In addition, not only the semiconductor stripe 151 and the ohmic contacts 161 and 165 are provided between the storage capacitor 177 and the gate insulating layer 14, but also a plurality of semiconductor islands 157 and a plurality of ohmic contacts thereon. The semiconductor mosquitoes and islands 161511 157 have and the data lines 171, the drain 175 and the storage capacitor conductor 177, and the lower ohmic contacts ΐ6, 165 and 167 (in addition to providing an extension 154 of the thin film transistor (TFT)). The same flat shape. In particular, the semiconductor islands 157, the ohmic contact islands 167, and the storage conductors 177 have substantially the same flat shape. The semiconductor stripe 15! includes portions that are not covered by the data line 171, the gate 175, and the storage conductor 177. <Some exposed portions, such as portions between the source 173 and the drain 175. A liquid crystal display (LCD) having the above pixel arrangement is depicted to increase the degree of resolution, and this will be described in detail with reference to Figs. 10A-10C are exemplary pixel groups for a liquid crystal display (LCD) that have been depicted in accordance with an embodiment of the present invention. The traces (r_ as ton) shown in Figure a are based on the pixel arrangement shown in Figure 3A, and the plots shown in Figure 1 and Figure 1 are based on the pixel arrangement shown in Figure 4A. Figure 10A, which will be used to depict any pixel in a two-color pixel in an exemplary pixel cluster. The pixel group includes four pixels in a two-color line (hereinafter referred to as "peripheral pixels") and two pixels in a monochrome line adjacent to a child center pixel. Fig. 10A shows a pixel group including a red pixel r, and four green pixels G1_G4 and two blue pixels B1 and B2 adjacent to the child red pixel R. 87846 -19- 1253044 Illustrated Figures 10B and 10C, an exemplary pixel group for depicting includes a center red pixel R, and four green pixels G1 G4 adjacent to the center pixel R (hereinafter referred to as "peripheral pixels" And two blue pixels Μ and B2, or a central green pixel G, and four red pixels R1_R4 (hereinafter referred to as "peripheral pixels") and two blues that are close to the central pixel Pixels B1 and B2. In accordance with an embodiment of the present invention, the depiction shown in Figures 10A-10C is given a weighting in which the pixel is equal to or greater than one-half of the full-sum weight and gives equal weight to the surrounding pixels. However, this results in The phase error caused by the difference between the peripheral pixels and the central pixel. In the example shown in FIGS. 10A and 10B, the distance between the central red pixel R and the upper green pixel G1 and the lower left green pixel (7) (under The term ''first distance' in the text) is equal, and the distance between the red pixel scales of the center (because it is called "second distance" in the generation of the red image" is higher than the first distance A large blue pixel is inserted between the prime R and the right green pixel G3, and the bit error is inserted. In the example shown in FIG. 10C, the first distance between the green pixel 〇 and the right red pixel and the second distance between the green pixel G and the left pixel R2 are not
係相等的，但是由於該第三距離與該等第一及第二距離不 週邊像素之加權將视週邊像素與 同而產生一额外縱向相位誤差。 為了消除該相位誤差，週邊4 中心像素間的距離而不同，其將被參照圖u、i2A與12^詳 87846 -20 · 1253044 細描述。 圖11展示根據本發明—實施例之液晶顯示器（LCD)之插 續中的示範性加權，圖12A與12B分別為圖刚與igc中^ 之液晶顯示器（LCD)之描繪中的示範性加權。 。 圖11中顯示之實例係基於圖1GA中顯示之描繪。綠色像 素G與紅色像素Re在圓點卩上沿列方向之距離由，，μ”表示， 在列方向上鄭近之兩像素間之距離由”训”表且在行方 向上鄰近之兩像素間之距離由，，Dc，，表示。 以此方式，對圖10B中顯示之示範性描緣而言，如圖以 中al所代表，紅色像素R之距離等於T，紅色像奸與左邊 綠色像素G2間的距離等抑b，紅色像素㈣右邊綠色像素 G3間的距離等於Da，且紅色像素R與上面綠色像素⑴及與 下面綠色像素G4間的距離等於〇(：。 "此處，假設紅色像素R與綠色像素G之間距（p加h)係 ”19〇(行方向）X137(列方向）.，，藍色像素B間距係，，⑽(行方 向）X 1〇6(列方向），其在列方向上比紅色像素r與綠色像素 G之間距小，且圓點P之尺寸為”(縱向長度）>〇8()(橫向長 度Γ。 、 接著’圖12A中的Μ代表圖12A中顯示之實例心可以看 到紅色像素R與左it、綠色像素G2間的距離比紅&像素㈣ 右邊綠色像素G3間之距離長。 >鑒於該距離敎該等像素之加權。例如，當利用中心紅 色像素R描繪32灰度（gray)時，如圖^中“所代表，紅色像 素R之加權被指派為約0.5,且根據與該紅色像素反間的距離 87846 -21 - 1253044 將約〇.5的剩餘全部加權指派給週邊綠色像素Gi-G4。當與 中心像素R間的距離增加時，該加權變小，進而補償減少的 顯示比率。 如圖12 A中的c 1顯示，離紅色像素R最近的左邊綠色像素 G2被加權為〇 165 ’次接近該紅色像素r之上面與下面綠色 像素G1與G4被加權為012，且右邊綠色像素⑺被加權為 0.095 〇 參照圖12B，當如圖10C所示進行描繪時，基於與中心像 素間的距離確定週邊像素之加權。 回到圖1，灰度電壓發生器8〇〇產生兩組複數個關於該等 像素4透射率之灰度電壓。一組中的該等灰度電壓具有關 於共同電壓Vcom之正極性，而另一組中的灰度電壓具有關 於共同電壓Vc〇m之負極性。 將閘極驅動器400連接至面板組件3〇〇之閘極線〇1411，且 合成該閘極開（gate_on)電壓Von與閘極關（gate_off)電壓Voff 以產生施加於閘極線Gi_Gn之閘極訊號。 將閘極驅動器500連接至面板組件300之資料線〇1-0111，且 將選自由灰度電壓發生器800提供之灰度電壓的資料電壓 施加至該等資料線Di-Dm。 現在，將詳細描述液晶顯示器（LCD)之運行過程。 向訊號控制器600提供RGB影像訊號R、G與B且自一外部 圖形控制器（未圖示）向其提供控制其顯示器之輸入控制訊 说’例如一垂直同步訊號Vsync、一水平同步訊號Hsync、 一主時鐘MCLK，及一資料啟動訊號DE。在產生閘極控制 87846 -22- 1253044 訊號CONTI與資料控制訊號CONT2，且基於輸入控制訊號 及輸入影像訊號R、G與B處理適合面板組件300運行之影像 訊號R、G與B後，訊號控制器600為閘極驅動器400提供閘 極控制訊號CONT1，且為資料驅動器500提供處理過的影像 訊號R’、G'與B，及資料控制訊號CONT2。 影像訊號R、G與B之處理包括一用於描繪之資料處理， 其根據與該中心像素間的距離為像素指派加權值。 該閘極控制訊號CONT1包括一用來通知訊框開始之垂 直同步開始訊號STV、一用來控制該閘極開電壓Von輸出時 間之閘極時鐘訊號CPV，及一用來界定該閘極開電壓Von寬 度之輸出啟動訊號OE。該資料控制訊號CONT2包括一用來 告知一水平週期（horizontal period)開始之水平同步開始訊 號STH、一用來指示將適當資料電壓施加至資料線D^Dm之 負載訊號LOAD或TP，一用來反轉資料電壓之極性（關於該 共同電壓Vcom)的反轉控制訊號RVS及一資料時鐘訊號 HCLK。 資料驅動器500為一像素列自訊號控制器600接收一影像 資料R’、G’與B’之封包，且將影像資料R’、G’與B’轉換成選 自由灰度電壓發生器800提供之灰度電壓的類比資料電 壓，以響應源自訊號控制器600之資料控制訊號C0NT2。 為響應源自訊號控制器600之閘極控制訊號CONT1，閘極 驅動器400將該閘極開電壓Von施加至閘極線GKGn，進而開 啟連接至其之開關元件Q。 資料驅動器500在一開關元件Q之開啟時間（其被稱為’’一 87846 -23 - 1253044 水平週期”或”1H”且等於水平同步訊號Hsync '該資料啟動 訊號DE、及該閘極時鐘訊號cpv的一個週期），將資料電壓 她加土相應的資料線Di_Dm。接著，藉由開啟開關元件。將 資料電壓又施加至相應像素。 將貝料電壓與施加至像素之共同電壓Vc〇m之差異表示 為LC電容器Clc之充電電壓，即像素電壓。液晶分子具有取 決於像素電壓大小（magnitude)的定向，且該等定向確定穿 k ^ c包卷斋cLC之光線之偏振。該等偏振器將光線偏振轉 換成光線透射率。 精由重複此程序，在一訊框期間循序給所有閘極線 提供閘極開電壓VGn，進而將資料電壓施加至所有像素。當 成訊忙後且下一訊框開始時，施加至資料驅動500之反 轉控制訊號RVS被控制，使得該等資料電壓之極性被反轉 (其被稱為’’訊框反轉"）。該反轉控制訊號RVS也被控制，使 得在一，框中之資料線中流動之資料電壓之極性被反轉 (其被％為”線反轉或在—封包中的資料電壓之極性被反 轉（其被稱為”點反轉，，）。 姑t $上又中已祥細描述本發明之較佳實施例，但是應清 楚理解’ #附加申請專利範圍中界定的，熟習此項技術者 可遇到的此處已教示之基礎發明概念之許多變化及/或修 改仍將屬於本發明之精神與範圍。 【圖式簡單說明】 、藉由參照該等隨附圖式詳細描述其較佳實施例，本發明 义以上及其他優勢將變得更明顯，其中： 87846 -24- 1253044 圖1係根據本發明一實施例之液晶顯示器（LCD)之方塊 圖； 圖2係根據本發明一實施例之液晶顯示器（LCD)之一像素 之等效電路圖； 圖3 A、4A及5A展示根據本發明實施例之多個液晶顯示器 (LCD)像素之空間排列； 圖3B、4B及5B展示形成一圓點之一像素群，其分別為圖 4 A與5 A所顯示之像素排列中一影像之基本單元； 圖6係根據本發明一實施例之液晶顯示器（LCD)之示範 性薄膜電晶體（TFT)陣列面板之設計圖； 圖7係圖6中顯示之沿線VII-Vir之薄膜電晶體（TFT)陣列 面板之剖面圖； 圖8係根據本發明另一實施例之液晶顯示器（LCD)之示 範性薄膜電晶體（TFT)陣列面板之設計圖； 圖9A及9B分別係圖8中顯示之沿線IXA-IXA’及IXB-IXB’ 之薄膜電晶體（TFT)陣列面板之剖面； 圖10A-10C係根據本發明實施例之已描繪的液晶顯示器 (LCD)之示範性像素群； 圖11展示根據本發明一實施例之描繪一液晶顯示器 (LCD)中之示範性加權；且 圖12A與12B分別展示在描繪圖10B及10C所顯示之液晶 顯示器（LCD)時的示範性加權。 【圖式代表符號說明】 3 液晶層 87846 -25 - 1253044 92, 97 接觸輔助元件 100, 200 面板 110, 210 絕緣基板 121, 125, 127 閘極線 123 閑極電極 131 儲存電極線 140 閘極絕緣層 151， 154, 157 半導體 161， 163, 165, 167 歐姆接觸 171， 179 資料線 173 源極 175 汲極 177 儲存電容導體 180 鈍化層 182, 185, 187, 189 接觸孔 190 像素電極 191， 271 斷流器（cutout) 220 黑色矩陣 230 滤色器 250 夕卜塗層（overcoat) 270 共同電極 300 液晶面板組件 400 閘極驅動器 500 資料驅動器 87846 -26- 1253044 600 訊號控制器 800 灰度電壓發生器 87846 -27-They are equal, but because the third distance and the first and second distances are not weighted by the surrounding pixels, an additional longitudinal phase error is produced depending on the surrounding pixels. In order to eliminate this phase error, the distance between the central pixels of the periphery 4 is different, which will be described in detail with reference to Figures u, i2A and 12^87846-20-1253044. Figure 11 shows exemplary weighting in the interpolation of a liquid crystal display (LCD) in accordance with the present invention, and Figures 12A and 12B are exemplary weightings in the depiction of a liquid crystal display (LCD) of the image just prior to igc. . The example shown in Figure 11 is based on the depiction shown in Figure 1GA. The distance between the green pixel G and the red pixel Re in the column direction on the dot 由 is represented by μ′, and the distance between the two pixels in the column direction is from the “train” table and between the two pixels adjacent in the row direction. The distance is represented by , Dc,. In this way, for the exemplary description shown in FIG. 10B, as represented by al in the figure, the distance of the red pixel R is equal to T, and the red image is the same as the green pixel on the left. The distance between G2 and the like b, the distance between the green pixel G3 on the right side of the red pixel (four) is equal to Da, and the distance between the red pixel R and the green pixel (1) above and the green pixel G4 below is equal to 〇 (:. " The distance between the red pixel R and the green pixel G (p plus h) is "19" (row direction) X137 (column direction)., the blue pixel B is spaced, and (10) (row direction) X 1 〇 6 (column direction) ), which is smaller in the column direction than the distance between the red pixel r and the green pixel G, and the size of the dot P is "(longitudinal length) > 〇 8 () (lateral length Γ., then '' in Fig. 12A) Representing the example heart shown in FIG. 12A, it can be seen between the red pixel R and the left it and the green pixel G2. The distance between the red color and the pixel (4) and the green pixel G3 on the right side is longer. > Given the distance 敎 the weight of the pixels. For example, when the center gray pixel R is used to draw 32 grays, as shown in Fig. Represented, the weight of the red pixel R is assigned to be about 0.5, and the remaining total weight of about 5.5 is assigned to the surrounding green pixel Gi-G4 according to the distance from the red pixel to the distance of 87846-21 to 1253044. As the distance between the pixels R increases, the weighting becomes smaller, thereby compensating for the reduced display ratio. As shown by c1 in Fig. 12A, the left green pixel G2 closest to the red pixel R is weighted to 〇165' times close to the red The upper and lower green pixels G1 and G4 of the pixel r are weighted to 012, and the right green pixel (7) is weighted to 0.095. Referring to FIG. 12B, when depicted as shown in FIG. 10C, peripheral pixels are determined based on the distance from the center pixel. Back to Figure 1, the gray voltage generator 8 produces two sets of gray voltages for the transmittance of the pixels 4. The gray voltages in a group have positive polarity with respect to the common voltage Vcom. ,and The gray voltage in the other group has a negative polarity with respect to the common voltage Vc 〇 m. The gate driver 400 is connected to the gate line 〇 1411 of the panel assembly 3, and the gate open (gate_on) voltage Von is synthesized and A gate-off voltage Voff is generated to generate a gate signal applied to the gate line Gi_Gn. The gate driver 500 is coupled to the data line 〇1-0111 of the panel assembly 300 and is selected from the gray voltage generator 800. The data voltage of the gray voltage is applied to the data lines Di-Dm. Now, the operation of the liquid crystal display (LCD) will be described in detail. The RGB video signals R, G, and B are supplied to the signal controller 600 and are provided with an input control command for controlling the display from an external graphics controller (not shown), such as a vertical sync signal Vsync, a horizontal sync signal Hsync. , a master clock MCLK, and a data start signal DE. After the gate control 87846 -22- 1253044 signal CONTI and the data control signal CONT2 are generated, and the image signals R, G and B suitable for the operation of the panel assembly 300 are processed based on the input control signal and the input image signals R, G and B, the signal control The device 600 provides the gate control signal CONT1 for the gate driver 400, and provides the processed image signals R', G' and B, and the data control signal CONT2 for the data driver 500. The processing of image signals R, G, and B includes a data processing for rendering that assigns weight values to pixels based on the distance from the center pixel. The gate control signal CONT1 includes a vertical sync start signal STV for informing the start of the frame, a gate clock signal CPV for controlling the gate open voltage Von output time, and a threshold voltage for defining the gate turn-on voltage. The output of the Von width starts the signal OE. The data control signal CONT2 includes a horizontal synchronization start signal STH for informing a start of a horizontal period, and a load signal LOAD or TP for instructing an appropriate data voltage to be applied to the data line D^Dm. Inverting the control signal RVS and a data clock signal HCLK of the polarity of the data voltage (about the common voltage Vcom). The data driver 500 receives a packet of image data R', G', and B' from the signal controller 600 for a pixel column, and converts the image data R', G', and B' to be selected from the gray voltage generator 800. The analog voltage of the gray voltage is in response to the data control signal C0NT2 originating from the signal controller 600. In response to the gate control signal CONT1 originating from the signal controller 600, the gate driver 400 applies the gate-on voltage Von to the gate line GKGn, thereby turning on the switching element Q connected thereto. The data driver 500 is turned on at a switching element Q (which is referred to as ''-87846 -23 - 1253044 horizontal period' or '1H' and is equal to the horizontal synchronization signal Hsync'. The data activation signal DE, and the gate clock signal A cycle of cpv), the data voltage is added to the corresponding data line Di_Dm. Then, by turning on the switching element, the data voltage is applied to the corresponding pixel again. The bedding voltage and the common voltage applied to the pixel Vc〇m The difference is expressed as the charging voltage of the LC capacitor Clc, that is, the pixel voltage. The liquid crystal molecules have an orientation depending on the magnitude of the pixel voltage, and the orientations determine the polarization of the light passing through the cLC. The polarization of the light is converted into the light transmittance. This procedure is repeated to provide the gate open voltage VGn to all the gate lines in sequence during a frame, and then the data voltage is applied to all the pixels. At the beginning of the frame, the inversion control signal RVS applied to the data drive 500 is controlled such that the polarity of the data voltages is reversed (this is referred to as ''frame inversion&quo' t;) The inversion control signal RVS is also controlled such that the polarity of the data voltage flowing in the data line in a frame is reversed (it is % inverted) or the data voltage in the packet The polarity is reversed (which is referred to as "dot inversion,"). The preferred embodiment of the present invention has been described in detail, but should be clearly understood as defined in the 'Additional Patent Application' section. Many variations and/or modifications of the basic inventive concept that may be employed by those skilled in the art will still fall within the spirit and scope of the present invention. [Simplified Description] By reference to the accompanying drawings DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT(S) The above and other advantages will become more apparent, in which: 87846 - 24 - 1253044 FIG. 1 is a block diagram of a liquid crystal display (LCD) according to an embodiment of the present invention; An equivalent circuit diagram of a pixel of a liquid crystal display (LCD) according to an embodiment of the present invention; FIGS. 3A, 4A and 5A show spatial arrangement of a plurality of liquid crystal display (LCD) pixels according to an embodiment of the present invention; FIGS. 3B, 4B And 5B show one of the dots a group of elements, which are the basic units of an image in the pixel arrangement shown in FIGS. 4A and 5A, respectively; FIG. 6 is an exemplary thin film transistor (TFT) array panel of a liquid crystal display (LCD) according to an embodiment of the invention. Figure 7 is a cross-sectional view of a thin film transistor (TFT) array panel along line VII-Vir shown in Figure 6; Figure 8 is an exemplary thin film power supply of a liquid crystal display (LCD) according to another embodiment of the present invention. FIG. 9A and FIG. 9B are respectively a cross-section of a thin film transistor (TFT) array panel along lines IXA-IXA' and IXB-IXB' shown in FIG. 8; FIGS. 10A-10C are according to the present invention; Exemplary pixel groups of liquid crystal displays (LCDs) have been depicted in the embodiments of the invention; FIG. 11 illustrates exemplary weighting in a liquid crystal display (LCD) in accordance with an embodiment of the present invention; and FIGS. 12A and 12B are respectively depicted in depiction Exemplary weightings for liquid crystal displays (LCDs) shown in Figures 10B and 10C. [Description of Symbols] 3 Liquid crystal layer 87846 -25 - 1253044 92, 97 Contact auxiliary component 100, 200 Panel 110, 210 Insulating substrate 121, 125, 127 Gate line 123 Idle electrode 131 Storage electrode line 140 Gate insulation Layer 151, 154, 157 Semiconductor 161, 163, 165, 167 ohmic contact 171, 179 data line 173 source 175 drain 177 storage capacitor conductor 180 passivation layer 182, 185, 187, 189 contact hole 190 pixel electrode 191, 271 Cutout 220 Black matrix 230 Color filter 250 Overcoat 270 Common electrode 300 LCD panel assembly 400 Gate driver 500 Data driver 87846 -26- 1253044 600 Signal controller 800 Gray voltage generator 87846 -27-