1252983 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種硬碟介面控制系統，特別是一種應用於儲 存區域網路(Storage Area Network，SAN)系統之多通道串列 ATA(SerialATA，SATA)控制系統。 【先前技術】 隨著資訊時代的來臨，許多企業透過儲存區域網路(SAN)系 統來解決重要資料管理與儲存的問題，而儲存區域網路系統係由 儲存設備組成的網路架構，透過伺服器連接區域網路對儲存區域 網路系統進行管理，當資料遭受破壞時，儲存區域網路系統能提 供相關的補救措施，以恢復資料至破壞前驗態，藉以提高電腦 系統的可靠性(Reliability)與穩定(stabmty)。 般來説，員儲存裝置(例如，硬碟)的傳輸介面大多採用 垔電恥系、、、先；|面的硬碟具有傳輸速度快的優點，但就整個建構 成本的考I下，對中小型企業而言，將無法負擔如此高成本的儲 存區域網路系統。 1於疋㈣ΑΤΑ傳輸介面触觀被狀設計考量巾，雖然目 j的串歹]ΑΤΑ傳輸介面在資料傳輸速度上略低於小型電腦系統介 面(SCSI)，但其建構成本卻能符合中小企業的要求，惟串列概 _介面僅具有單觀齡錢格，所㈣贿區_路系統而 吕，其傳輸通道就明顯不足。 1252983 因此 【發明内容】 有練絲技贿在讀點触法解__，本發明提出 所以為達上述目的，本發明所揭露之多通道串列趟之控制 係用以對一硬碟進㈣料存取控制，包含有：第-串列ATA 控制模組、第—存取權仲鮮元、第二㈣ΑΤΑ控制模組、第二 存取權仲裁單元及路徑選擇模組。 程序夕==列ATA之控制系統及其控制卡’透過—存取權協調 ^使獲得存取_串列ATA控制模組對硬碟進行 動作’猎以達到多通道串列顧介面資料存取的目的。 〃第-串列ΑΤΑ控制模組，用以對硬碟進行資料存取控制，而 第一串列ΑΤΑ控制器更包含有·· 網路傳輸單兀，用以提供第一串列ΑΤΑ控制模組連接一區域 網路，以傳送或接收相料及控制命令，其中網路傳輸單元 包含有一乙太網路(Ethernet)埠。 第一存取權仲裁(Arbitration)單元，設置於第一串列ATA控制 权組中’其中第-存取權仲裁單元可為場式可程式化閘極陣列 (Field Programmable Gate Array ^ 件(Complex Programmable Logic Device，CPLD)等等其他可程式規 1252983 劃邏輯元件。 控制晶片單元，與網路傳輸單元及硬碟控制單元連接，用以 控制網路傳輸單元與硬碟控鮮元的電路動作。 微處理器單元’與控制晶片單元連接，肋處理控制晶片單 元的訊號。 工制單元’接收來自區域網路之資料，於獲得存取權後， 用以對硬顿行㈣存取健，ΑΤΑ介面連接至路徑選 擇單元。 ^第-串歹’J ΑΤΑ控制模組，用以對硬碟進行資料存取控制，而 第二串列ΑΤΑ控制模組更包含有·· 網路傳輸單元，用以提供第二串列ΑΤΑ控制模組連接-區域 網路，以傳送或接收_的資料及控制命令，其中網路傳輸單元 包含有一乙太網路(Ethernet)埠。 第一存取權仲裁(Arbitration)單元，設置於第二串列ATA控制 权組中’與第—存取權仲裁單元連接，透過—仲裁演算程序，以 决疋對㈣㈣傳輸的存取權，並依據運算絲產生選擇訊號， /、中第—存取權仲裁單元可為場式可程式化閘極陣列(FpGA)或高 複雜度可程式邏輯元件(CPLD)料其他可程式規麵輯元件。 控制晶片單元’與網路傳輸單元及硬碟控制單元連接，用以 控制網路傳鮮元與硬碟控鮮元的電路動作。 破處理器單元，與控制晶片單元連接，用以處理控制晶片單 1252983 元的訊號。 硬碟控制單元，接收來自區域網路之資料，於獲得存取權後， 用以對硬碟進行㈣存取健，透過㈣ATA介面連接至路徑選 擇單元。 二"" 路徑選擇模組，與第-及第二串列ATA控制模組連接，具有 多路徑㈣傳輸通道，鋪麵訊號，選擇性切換資料傳輸路徑， 以使獲得存取權的串列ATA控制器對硬碟進行資料存取作業，其 中路徑選擇模組可為一多工器(Multiplexer)所組成。 另外，為達上述目的本發明揭露一種串列ATA之控制卡，係 用以對一硬碟進行資料存取控制，包含有： 網路傳輸單元，用以提供串列ATA介面之控制卡連接一區域 網路’以傳达或接收相關的資料及控制命令，其巾網路傳輸單元 包含有一乙太網路埠。 存取權仲裁單元，設置於串列ATA介面之控制卡中，其中存 取權仲裁單可為場式可程式化雜㈣(卩娜㈣疆邮此 ⑽八卿’ FPGA)或高複雜度可程式邏輯元件(Complex1252983 IX. Description of the Invention: [Technical Field] The present invention relates to a hard disk interface control system, and more particularly to a multi-channel serial ATA (SerialATA) applied to a storage area network (SAN) system. SATA) control system. [Prior Art] With the advent of the information age, many enterprises solve the problem of important data management and storage through a storage area network (SAN) system, which is a network architecture consisting of storage devices. The connection area network manages the storage area network system. When the data is damaged, the storage area network system can provide relevant remedial measures to restore the data to the pre-destruction state, thereby improving the reliability of the computer system (Reliability) ) and stability (stabmty). Generally speaking, the transmission interface of the member storage device (for example, a hard disk) mostly adopts the electric shame, and the first; the hard disk of the surface has the advantage of high transmission speed, but the whole construction constitutes the test I, For small and medium-sized businesses, they will not be able to afford such a high-cost storage area network system. 1 The Yu (4) ΑΤΑ transmission interface is designed to be considered as a design towel, although the ΑΤΑ 歹 ΑΤΑ ΑΤΑ ΑΤΑ ΑΤΑ ΑΤΑ ΑΤΑ ΑΤΑ ΑΤΑ 资料 资料 资料 资料 资料 资料 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略 略Requirement, but the serial interface _ interface only has a single-aged money grid, and (4) the bribe zone _ road system and Lu, its transmission channel is obviously insufficient. 1252983 Therefore, the content of the invention is that the control system of the multi-channel serial port disclosed in the present invention is used for the storage of a hard disk (four) material. The control includes: a first-serial ATA control module, a first access right secant element, a second (four) ΑΤΑ control module, a second access right arbitration unit, and a path selection module. Program eve == column ATA control system and its control card 'through-access rights coordination ^ to get access _ serial ATA control module to operate on the hard disk 'hunting to achieve multi-channel serial interface data access the goal of. The first-serial control module is configured to perform data access control on the hard disk, and the first serial port controller further includes a network transmission unit for providing the first serial port control mode The group is connected to a local area network to transmit or receive information and control commands, wherein the network transmission unit includes an Ethernet network (Ethernet). The first access right arbitration (Arbitration) unit is disposed in the first serial ATA control group. The first access right arbitration unit may be a field programmable gate array (Field Programmable Gate Array ^ (Complex) Programmable Logic Device (CPLD) and other programmable logic components 1252983. The control chip unit is connected to the network transmission unit and the hard disk control unit to control the circuit operation of the network transmission unit and the hard disk control unit. The microprocessor unit is connected to the control chip unit, and the rib processing controls the signal of the wafer unit. The processing unit receives the data from the regional network, and after obtaining the access right, is used to access the hard (four) access, ΑΤΑ The interface is connected to the path selection unit. ^The first-string J'J ΑΤΑ control module is used for data access control of the hard disk, and the second serial ΑΤΑ control module further includes a network transmission unit. To provide a second serial port control module connection-area network for transmitting or receiving data and control commands, wherein the network transmission unit includes an Ethernet network. An access right arbitration (Arbitration) unit is disposed in the second serial ATA control group to be connected with the first access right arbitration unit, and through the arbitration-arbitration calculation program to determine the access rights to the (4) (four) transmission, and The selection signal is generated according to the operation wire, and the /-the first access right arbitration unit can be a field programmable gate array (FpGA) or a high complexity programmable logic element (CPLD). The control chip unit is connected to the network transmission unit and the hard disk control unit for controlling the circuit actions of the network transmission unit and the hard disk control unit. The processor unit is disconnected from the control chip unit for processing the control chip. A signal of $1,252,983. The hard disk control unit receives data from the local area network and, after obtaining access rights, performs (four) access to the hard disk and connects to the path selection unit through the (four) ATA interface. Second "" The path selection module is connected to the first and second serial ATA control modules, and has a multi-path (four) transmission channel, a paving signal, and a selective switching data transmission path to enable access to the serial ATA The device performs a data access operation on the hard disk, wherein the path selection module can be composed of a multiplexer. In addition, the present invention discloses a serial ATA control card for the above purpose. The data access control of the hard disk includes: a network transmission unit for providing a serial ATA interface control card connection to a regional network 'to convey or receive related data and control commands, and a towel network transmission unit It includes an Ethernet network. The access right arbitration unit is set in the control card of the serial ATA interface, wherein the access rights arbitration order can be field-programmable (4) (卩娜(四)疆邮(10)八卿'FPGA' or high complexity programmable logic elements (Complex)
Programmable Logic Device ^ CPLD)^ 件。 控制晶片單元，與網路傳輸單元及硬碟控制單元連接，用以 控制網路傳鮮元触碟控解元的電路動作。 微處理器單元，與控制晶片單元連接，用以處理控制晶片單 1252983 元的訊號。 硬碟控制單元，接收來自區域網路 用以對硬碟進行資料存取作業。路之貝科’於獲得存取權後’ 另二為達上述目的本發明更揭露—種多通道串列ΜΑ控制 方法，包含有下列步驟： 首先，發出存取要求訊息至另—存取權輕單元；判斷回應 的内谷，若收到忙碌狀態回應訊息，則於等待-段預定時 間後:回到發出存取要求訊息至另—存取權仲裁單元之步驟。 若收到間置狀_應訊息，職顿得存取權，並產生一選 擇訊號；接下來，频聰單驗據接㈣獅輯切換傳輸路 徑給獲得存轉的㈣顧㈣顯，叫行資赫取控制。 猎由這種多通道串列ΑΤΑ之控制系統及其控制卡，透過存取 «調程序，提供獲得存取權的串列聽進行資料讀取/寫入動 作，以使單通道的SATA控制卡具有多通道的資料傳輸路徑的功 能’藉以達着傾树剩路(SA聯統成本的目的。 有關本發明的特徵與實作’賊合圖示作最佳實施例詳細說 明如下。 【實施方式】 明參「第1圖」’係為本發明之系統方塊圖，包含有··第一 串列ATAS制模組100、第一存取權仲裁單元u、第二串列概 控制模組、第二存取權仲裁單元21及雜選擇模組3〇。 9 1252983 第一串列ΑΤΑ控制模組1〇〇,用以對硬碟4〇進行資料存取(例 如，讀取或寫入)控制，而第一串列ΑΤΑ控制模組1〇〇更包含有·· 網路傳輸單元10,用以提供第一串列ΑΤΑ控制模組丨⑻連 結至區域網路150，以傳送或接收相關的資料及控制命令，而網路 傳輸單元10包含有一乙太網路(Ethernet)埠以連結至區域網路 150，其中儲存區域網路(SAN)系統(圖中未示)透過區域網路15〇 對硬碟40進行資料管理。 第存取權仲裁單元11，設置於第一串列控制模組 中，分別與網路傳輸單元10及第二存取權仲裁單元21連接，依 據接收的資料與控制命令，並透過—仲裁演算程序，以決定是否 獲得存取權，且依據運算結果產生選擇訊號，藉由獲得存取權使 第一串列ΑΤΑ控制模組1〇〇對硬碟40進行資料存取控制。 其中第一存取權仲裁單元11可為場式可程式化閘極陣列 (Md Programmable Gate Array，FpGA)或高複雜度可程式邏輯元 件(Complex Programmable Logic Device ’ CPLD)等等其他可程式規 劃邏輯元件。 ' 控制晶片單幻2，與網路傳輸單元1G連接，用以控制網路 傳輸卓元10與硬碟控制単元14的電路動作。微處理器單元d， 與控制晶片單元12連接，用以處理控制晶片單it 12的訊號。 _控制單it 14，與控制晶片單^ 12連接，接收來自區域 、、罔路15〇的資料’於獲得存取權後，用以對硬碟進行資料存取 1252983 作業’透過串列ΑΤΑ介面連接至路徑選擇單元3〇。 第二串列ΑΤΑ控制模組200，用以對硬碟40進行資料存取(例 如’讀取或寫入)控制，而第二串列ΑΤΑ控制模組2〇〇更包含有： 網路傳輸單元20，用以提供第二串列ΑΤΑ控制模組2⑻連 接區域網路150,以傳送或接收相關的資料及控制命令，而網路傳 輸單元20包含有一乙太網路(Ethemet)埠以連結至區域網路15〇， 其中儲存區域網路(SAN)系統(圖中未示)透過區域網路15〇對硬碟 40進行資料管理。 第二存取權仲裁單元2卜分別與網路傳輸單元2〇及第一存 取權仲裁單元η連接，透過—仲裁演算程序，以決定存取權，並 依據運算結果產生選擇訊號，而第—存取齡裁單元u與第二存 取權仲裁早2丨更連接至路徑選擇模組，以將選擇訊號傳送至 路徑選擇模組30。 存取權仲裁單疋21可為場式可程式化閘極陣列 ㈣饥物胸程綱 控制日日片早元22，鱼網路值於留― 僂浐罝一⑽ 〜傳輸早（2〇連接，用以控制網路 傳輸早το 20與硬碟控制單元％的電路動作。 微處理器單元23,盥柝 晶片單元22的訊號，、早几22連接’用以處理控制 硬碟控輪24,與控㈣單元22連接，接收來自區域 1252983 網路150的資料，於獲得存取權後，用以對硬碟4〇進行資料存取 作業，透過串列ΑΤΑ介面連接至路徑選擇單元3〇。 路徑選擇模組30，具有複數個輸入端與一個輪出端，而輸入 端分別連接第-串列ΑΤΑ控制模組100的硬碟控制單元14與第 、 二串列ΑΤΑ控制模組200 #硬碟控制單元24，輪出端則連接级 ' - 碟4〇 ’且路徑選擇模組3〇具有多路徑資料傳輸通道，依據輸入的 選擇訊號，選擇性切換連接路徑，以提供不同的資料傳輸:徑， 藉以使獲得存取_㈣ΑΤΑ控麵組(第—㈣ατα 100或第二串列ΑΤΑ控制模組施)連接至硬碟4〇，並進行資料讀 取/寫入動作，其中路徑選擇模組3G可由多工離,·)^ 硬碟4〇，與路徑選擇單元30連接，用以提供—儲存區域， 以存放儲麵域網路系_#料，具有第—代串列规似⑷） 或第二代串列ATAn(SATAlI)的介面。Programmable Logic Device ^ CPLD)^. The control chip unit is connected to the network transmission unit and the hard disk control unit to control the circuit action of the network transmission device. The microprocessor unit is connected to the control chip unit for processing the signal of the control chip unit 1252983 yuan. A hard disk control unit that receives data from a local area network for data access to a hard disk. The following is a multi-channel serial port control method, which includes the following steps: First, issue an access request message to another access right. The light unit; the inner valley of the judgment response, if receiving the busy status response message, after waiting for the predetermined period of time: returning to the step of issuing the access request message to the other access right arbitration unit. If the message is received, the job will be accessed and a selection signal will be generated. Next, the frequency will be checked (4). The lion will switch the transmission path to obtain the transfer (4) Gu (four) display, call the line Capital control. Hunting by this multi-channel serial control system and its control card, through access to the «program, provide access to the serial listening to read/write data, so that the single-channel SATA control card The function of the multi-channel data transmission path 'to achieve the goal of deforestation (the purpose of the SA connection cost. The features and implementations of the present invention are shown in the following as a preferred embodiment). 】 ""1" is a system block diagram of the present invention, including a first serial ATAS module 100, a first access right arbitration unit u, a second serial array control module, The second access right arbitration unit 21 and the miscellaneous selection module 3〇 9 1252983 The first serial port control module 1〇〇 is used for data access (for example, reading or writing) to the hard disk 4〇. Control, and the first serial port control module 1 further includes a network transmission unit 10 for providing a first serial port control module (8) coupled to the area network 150 for transmitting or receiving correlation Data and control commands, while network transmission unit 10 includes an Ethernet network (Ethe Rnet) is connected to the local area network 150, wherein a storage area network (SAN) system (not shown) performs data management on the hard disk 40 through the area network 15. The access right arbitration unit 11 is disposed on The first serial control module is respectively connected to the network transmission unit 10 and the second access right arbitration unit 21, and according to the received data and control commands, and through the arbitration arbitration program, to determine whether to obtain access rights, And the selection signal is generated according to the operation result, and the first serial port control module 1 performs data access control on the hard disk 40 by obtaining the access right. The first access right arbitration unit 11 can be a field type. Other Programmable Logic Components such as Md Programmable Gate Array (FpGA) or Complex Programmable Logic Device 'CPLD.' Control chip single phantom 2, and network transmission unit The 1G connection is used to control the circuit operation of the network transmission unit 10 and the hard disk control unit 14. The microprocessor unit d is connected to the control chip unit 12 for processing the signal for controlling the wafer unit it 12 . The system is 14 and connected to the control chip unit 12, and receives the data from the area and the road 15 'after accessing the right, accessing the hard disk for data access 1252983 operation' through the serial interface The second serial port control module 200 is configured to perform data access (eg, 'read or write') control on the hard disk 40, and the second serial port control module 2 The network transmission unit 20 is configured to provide a second serial port control module 2 (8) to connect to the area network 150 to transmit or receive related data and control commands, and the network transmission unit 20 includes an Ethernet network. Ethemet is connected to the local area network 15 , wherein a storage area network (SAN) system (not shown) manages the hard disk 40 through the area network 15 . The second access right arbitration unit 2 is respectively connected with the network transmission unit 2 and the first access right arbitration unit η, and transmits the arbitration right to determine the access right, and generates a selection signal according to the operation result. The access age unit u and the second access right arbitration are further connected to the path selection module to transmit the selection signal to the path selection module 30. Access rights arbitration order 疋 21 can be a field-programmable gate array (4) hunger chest model control day film early 22, fish network value in stay - 偻浐罝 1 (10) ~ transmission early (2 〇 connection For controlling the network transmission of the early το 20 and the hard disk control unit % of the circuit action. The microprocessor unit 23, the 盥柝 wafer unit 22 signal, the early 22 connection 'for processing the control hard disk control wheel 24, It is connected to the control unit (4) 22, and receives the data from the area 1252983 network 150. After obtaining the access right, the data access operation is performed on the hard disk 4, and is connected to the path selection unit 3 through the serial port interface. The path selection module 30 has a plurality of input ends and a round output end, and the input ends are respectively connected to the hard disk control unit 14 of the first serial port control module 100 and the second and second serial port control modules 200 #hard The disc control unit 24 connects the stage '-disc 4' and the path selection module 3 has a multi-path data transmission channel, and selectively switches the connection path according to the input selection signal to provide different data transmission: Path, so that access is obtained _(four)ΑΤ The control surface group (the - (four) ατα 100 or the second serial port control module) is connected to the hard disk 4, and performs a data reading/writing operation, wherein the path selection module 3G can be separated by multiple operations, ^ Hard disk 4〇, connected to the path selection unit 30, for providing a storage area for storing the storage area network system, having the first generation serial arrangement (4) or the second generation serial array ATAn ( SATAlI) interface.
接下來，請參照「第2圖」，係為本發明之步驟流程圖，首先 =串列紙控制模組觸與第二串列魏控制模組綱細 ⑼與♦相_嶋取命令，以綱 磲進仃資料讀取/寫入的動作。 透過—錢控制模組 子作_ i 決定存取權，特_算程序由以_ 田第一串列ΑΤΑ控制模板1〇〇接收到資料與控制^ 12 1252983 時’㈣第—存取權仲裁單元11發出存取要求訊息至第二存取權 仲裁單70 21(步驟300)，而第二存取權仲裁單元21於接收到存取 要求訊息後，依據目前狀態回應-狀態訊息。 接下來，判斷回應訊息的内容(步驟3〇1)，若為忙綠狀態訊 〜則第存取權仲裁單元u於等待一預定時間(步驟搬)後， 回到步驟300。 若第二存取齡裁單元21回應閒置狀態訊息，即表示目前第Next, please refer to "Fig. 2", which is a flow chart of the steps of the present invention. First, the serial paper control module touches the second serial control module (9) and the ♦ phase _ retrieval command to The operation of reading/writing data. Through the - money control module _ i to determine the access rights, the special _ calculation program is received by the _ field first serial ΑΤΑ control template 1 资料 data and control ^ 12 1252983 '(4) - access rights arbitration The unit 11 issues an access request message to the second access right arbitration form 70 21 (step 300), and after receiving the access request message, the second access right arbitration unit 21 responds to the status message according to the current status. Next, the content of the response message is judged (step 3〇1). If it is the busy green status message, the access right arbitration unit u waits for a predetermined time (step shift), and returns to step 300. If the second access age unit 21 responds to the idle status message, it indicates that the current status is
^存取齡鮮元21並無對稍4G進射觸取續人動作，而 第存取權仲裁單U接收到閒置狀態回應訊息後，即獲得存取 f、，接著’產生一選擇訊號至路徑選擇模組3〇(步驟3〇3)，以切換 ;斗傳輸路仅並於下一匯流排週期(Cycle)對硬碟仙進行資料讀 取/寫入動作’其中若第一串列ATA控制模組觸與第二串列施 控制模組200同時發出存取要求訊息至彼此時，則以亂數演算方 式決定其中—方獲得存取權，而另-方職人等待狀態，^The accessing age element 21 does not touch the continuation action for the slightly 4G incoming, and the access right arbitration order U receives the idle state response message, then obtains the access f, and then 'generates a selection signal to The path selection module 3〇 (step 3〇3) is switched; the bucket transmission path performs data reading/writing operation on the hard disk only in the next bus cycle (Cycle), wherein if the first serial ATA When the control module touches the second serial control module 200 and simultaneously sends the access request message to each other, the random number calculation method determines that the party obtains the access right, and the other party waits for the state.
仲裁演算程序。 y而路徑選擇模组30依據接收的選擇訊號切換對應的傳輸銘 徑給獲得存取權的㈣ATA㈣歡(步驟謝)，以進行資料傳輪 作業’其中路徑選擇模組％可透過多工器_脚^棘達成操 作需求。 ” 另外，上述係以第-串列ATA控麵組1〇〇接收相關的資料 ”存取〒令的情況作說明，若為第二串列獻控制馳加〇接收 13 1252983 巧相關的資料與存取命令時，則由第二存取權仲裁單元η發送存 要长u第-存取權仲裁單元2〇，而存取權獲得的決定方式 如上，再此不再贅述。 、、藉由這種夕通道串列ATA之控制系統及其控制卡，除了讓單 通道的串列ATA控制卡可達到多路徑存取的功能外，更透過存取 榷仲^單元’使資料的存取作業更有效率，藉以達到多通道串列 ATA資料傳輸的目的贿低儲存陣列網路(SAN)系統成本的目的。 ^ ’、、、;本lx月以則述之較佳實施例揭露如上，然其並非用以限 疋本=明’任何熟習相像技藝者，在不脫離本發明之精神和範圍 β作—許之更動與潤飾’因此本發明之專利保護範圍須視 本說明書所附之申請專利範_界定者為準。 【圖式簡單說明】 第1圖係為本發明之系統方塊圖，·及 第2圖係為本發明之步驟流程圖。 【主要元件符號說明】 10 網路傳輸單元 100 第一串列ΑΤΑ控制模 11 第一存取權仲裁單元 12 控制晶片單元 13 微處理器單元 14 硬碟控制單元 14 1252983 150 區域網路 20 網路傳輸單元 200 第二串列ΑΤΑ控制模組 21 第二存取權仲裁單元 22 控制晶片單元 23 微處理器單元 24 硬碟控制單元Arbitration calculation procedures. y, the path selection module 30 switches the corresponding transmission path according to the received selection signal to (4) ATA (four) Huan (step thank) for data transfer operation, wherein the path selection module % can pass through the multiplexer _ The foot and the spine meet the operational requirements. In addition, the above description is based on the case where the first-to-serial ATA control group 1 receives the relevant data access command, and if the second series is controlled, the data is received and received 13 1252983 When the command is accessed, the second access right arbitration unit η sends the access length u-access right arbitration unit 2, and the access right is determined as above, and will not be described again. With the control system of the ATA channel serial ATA and its control card, in addition to allowing the single-channel serial ATA control card to achieve the function of multi-path access, the data is accessed through the access control unit. The access operation is more efficient, in order to achieve the purpose of multi-channel serial ATA data transmission for the purpose of bribing low storage array network (SAN) system costs. ^ ', , ,; l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l Modifications and refinements 'The scope of patent protection of the present invention is therefore subject to the definition of the patent application attached to this specification. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram of the system of the present invention, and Fig. 2 is a flow chart of the steps of the present invention. [Main component symbol description] 10 network transmission unit 100 first serial port control mode 11 first access right arbitration unit 12 control chip unit 13 microprocessor unit 14 hard disk control unit 14 1252983 150 area network 20 network Transmission unit 200 second serial port control module 21 second access right arbitration unit 22 control chip unit 23 microprocessor unit 24 hard disk control unit
30 路徑選擇模組 40 硬碟 步驟300發送存取要求訊息至另一串列ΑΤΑ控制模組 步驟301 判斷回應訊息的内容 步驟302 等待一段預定時間 步驟303依據回應訊息產生選擇訊號至路徑選擇模組 步驟304路徑選擇模組依據選擇訊號切換對應的連接路徑30 path selection module 40 hard disk step 300 sends an access request message to another serial port control module. Step 301 determines the content of the response message. Step 302 waits for a predetermined time. Step 303 generates a selection signal according to the response message to the path selection module. Step 304: The path selection module switches the corresponding connection path according to the selection signal.
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