TWI249805B - Method for increasing area of trench capacitor - Google Patents

Method for increasing area of trench capacitor Download PDF

Info

Publication number
TWI249805B
TWI249805B TW090131940A TW90131940A TWI249805B TW I249805 B TWI249805 B TW I249805B TW 090131940 A TW090131940 A TW 090131940A TW 90131940 A TW90131940 A TW 90131940A TW I249805 B TWI249805 B TW I249805B
Authority
TW
Taiwan
Prior art keywords
layer
opening
nitride layer
substrate
nitride
Prior art date
Application number
TW090131940A
Other languages
English (en)
Inventor
Hsin-Jung Ho
Chang-Rong Wu
Yi-Nan Chen
Tung-Wang Huang
Original Assignee
Nanya Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanya Technology Corp filed Critical Nanya Technology Corp
Priority to TW090131940A priority Critical patent/TWI249805B/zh
Priority to US10/322,111 priority patent/US6693006B2/en
Application granted granted Critical
Publication of TWI249805B publication Critical patent/TWI249805B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3086Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66181Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors with potential-jump barrier or surface barrier
    • H01L29/94Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945Trench capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/038Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0387Making the trench

Description

五、發明說明(1) 【發明領域】 本發明是有關於一種增加渠溝電容器(trench capacitor )面積之方法,且特別是有關於一種利用氮化 物再填滿(nitride refill)步驟來增加渠溝電容器面積 之方法。 【發明 動 Memory 内電容 說,電 位,若 出放大 所導致 且能更 愈大, 何增加 — 一 〇 背景】 悲隨機存取記憶體(Dynamic Rand〇in Access 以下間稱為D R A Μ )係以記憶胞(m e m 〇 r y c e 1 1 ) 的帶電荷(charging )狀態來儲存資料,也就是 容,paPacitor)是⑽龍賴以儲存訊號的心臟部 電谷器所能儲存的電荷愈多(電容值愈大),則讀 器在讀取資料時受到雜訊影響的情形(例如α粒子 的軟錯記(Soft Errors )等)將可大幅地降低, :户:減少『再補充』的頻率。換言之,即電容值 憶體内所儲存資料的穩定度就會愈高。因此,如 電谷器之電容值乃業界長期以來最重要的研究課題 本發明的主要目的就是提 capacitor )面積之方法 供一種增加渠溝 ’適用於一基板 【發明概要】 有鑑於此, 電容器(trench ,包括下列步驟
1249805 五、發明說明(2) 基板之方式形成一開口, 上部周圍部,且上诚„上述開口具有一底部周圍部及一 層露出,· 1 口係令上述基板及上述第-氧化物 去除部份露出於上述開 ^ 上述第—氮彳卜舲展;^ 之上述第一乳化物層,以於 形成述基板之間形成一第-凹部; 八 弟一虱化物層於上述第一凹部; 上述二成—第二氧化物層於上述第-氮化物層及 並形= 上部周圍部的第二氧化物層, 去除开層於上述開口之上部周圍部; 並藉由丄述= 部周圍部的第二氧化物層, 露出於上述開口的上述;m行-#刻步驟,而於 疋暴扳幵乂成一第二凹部;以及 二上述第二氮化物層及第三氮化物層。 "ϊ據上㉛之方&,就可大幅度地增加電容器之面穑, 從而有效地提高電容骂之雷交祐.、 之說化物再填滿由上述方法中 二氮化物層於第—凹部之牛二 即上述形成第 (Λ ^ 、凹邻之步驟),可保護墊氧化物層 pa 〇X1de)(即上述第一氧化層)免於發生底切 2 :二現象’並從而能對用以增加電容器面積所 使用的化學樂品有更多的選擇權。 【圖式之簡單說明] 第la圖〜第ln圖係表示用以說明本發明之增加渠溝電 容1§面積之方法的步驟流程剖面圖。 0548-7070TWF;90073;pe t e r1i ou.p t d 第6頁 1249805 五、發明說明(3) 符號說明_ 10〜基板; 22〜第一凹部; 4 〇〜開口; 44〜底部周圍部 2 0〜第一氧化物層 30〜第一氮化物層 4 2〜上部周圍部; 5 0〜第二氮化物層 6〇〜,二氧化物層;70〜光阻; 第二氮化物層;〜第二凹部。 【發明之詳細說明】 _总2讓本發明之上述和其他目的、特徵、和優點能更明 " ,下文特舉出較佳實施例,並配合所附圖式,作詳 細欢> 明如下: 【實施例] 參照第la圖所示,首先,提供一基板1〇。其次,如第 =圖所示,沉積第一氧化物層20於上述基板1〇之表面。接 者,如第lc圖所示,沉積第一氮化物層3〇於
=〇之表面。上述基板10、第一氧化物層2〇及第一= 物:30之構成材料並未特別限制,基板1〇可由例如:矽等 ;第一氧化物層2°可由例如:二氧化矽(Si〇2)等 而第-氮化物層30可由例如:氮化石夕(Μ)等 參照第1 d圖所示,以貫通上诫钕 γ , 只、上迷第一氮化物層、 氧化物層20及基板10之方式形成開^ μ 初增別第 /力乂间口 4 〇,此開口 4 〇且右 部周圍部44及上部周圍部42,並可八L、+、# ^ ^ i』令上述基板1〇及第一 化物層20露出。 a弟
1249805 五、發明說明(4) 參”贫第1 e圖所示,蝕刻去除掉一部份露出於開口 4 〇之 第一氧化物層20,而於第一氮化物層3〇及基板1〇之間形成 ,一凹部22。接著,全面性地沉積第二氮化物層5〇於第一 氮化物層30及開口40之表面,並填滿第一凹部22,結果如 第if圖所,。再來,颠刻去除掉除了上述第一凹部22内以 外之第二氮化物層50,只留下填滿於上述第一凹部22内之 第二氮化物層50,結果如第1§圖所示。纟此處,第一氧化 物層20即為一般用來當作墊氧化物層(pad 〇xide)者, 而上述將第二氮化物層5〇沉積填滿於第一凹部Μ之步驟則 ΐ為:滿(η“Γ- refUl)步驟』,藉由此 5〇ϊ早ΪΓί:?驟』’就可利用再填滿之第二氮化物層 Id (J來保U蔓作為塾I iL化拍7展夕楚 JtL· *LZ^ 13 η Λ ,丄Λ 孔化物層之弟一乳化物層20免於在後述之 V驟中社到侵蝕而發生底切(undercu 能對後述步驟所使用的化學单σp2 ^ 1攸而 q π化子樂口口有更多樣化的使用選擇 櫂0 參照第1 h圖所示,全面姓从、、”接 唆 ^ 第-氮化物層3〇及開口二氧化物層6°於 网口 4 U之表面,再於此開口 4 〇所且 t ί ΐ郤周!部44沉積一光阻層70,結果如第1 i圖所示。 TEO 0 ^ TEOS-〇3 CVD法等。接著,氺 A ^ m m ^44 ri 先P層70為罩幕而蝕刻去除 掉底ΊΜ“外的第二氧化物層6〇,之後 阻層70 ’就會留下沉積在底部周声 6 0,結果如第U圖所示。再來,如第lk圖二示乳=層 三氮化物層80於上述開口4〇之上部周圍部42。 、第
1249805 五、發明說明(5) 參照第1 1圖所示,去除掉沉積於底部周圍部4 4之第二 氧化物層60,再藉由第三氮化物層8〇為幕罩而施行一蝕刻 步驟,而在露出於開口 40的基板10形成一第二凹部9〇,結 果如第1 m圖所示。在此處,上述餘刻步驟可使用例如··氫 氧化銨(Ν Η4 Ο Η )溶液來施行之。另外,在施行完上述餘 刻步驟之後,亦可再施行一粗糙度(roughness )改善步 驟,以更進一步改善第二凹部90表面之粗糙度,而上述粗 糙度改善步驟可藉由例如:循環使用過氧化氫(H2〇2 )溶 液及稀氫氟酸(dilute HF )溶液來施行之。 最後’如第1 η圖所示般,蝕刻去除掉第二氮化物層5 〇 及第三氮化物層80。在此處,可使用例如氫氟酸(HF )溶 液4來去除上述第二氮化物層5〇及第三氮化物層go。 另外,上述之第二氧化物層60係可由例如:二氧化矽 (Si〇2)等所構成;而第二氮化物層5〇及第三氮化物層8〇 則可由例如:氮化矽(S i N )等所構成。 依據上述本發明之方法,就可大幅度地增加電容器之 面積,從而有效地提高電容器之電容值;此外,藉由上述 方法中之氮化物再填滿(nitride refUl )步驟(即於上 述第一凹部22沉積填滿第二氮化物層5〇之步驟),可保護 作為墊氧化物層(pad oxide)之上述第一氧化物層2〇免 生底切(undercut )之現象,並從而能對用以增加電 容器面積所使用的化學藥品有更多的選擇權。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明,㈣熟習此技藝者,在不脫離本發明之精神
1249805 五、發明說明(6) 和範圍内,當可作各種之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。
HiBI 0548-7070TWF;90073;pe t e r1i ou.p t d 第10頁

Claims (1)

1249805 /、、申請專利範圍 1 ·—種 包括下列步 形成一 形成一 以貫通 基板之方式 上部周圍部 層露出; 增加渠溝電容器面積> + 驟: 冑之方法’適用於-基板 第一氧化物層於上述基板之 第一氮化物層於上迷第 ’ <弟—氣化物· 上述第一氮化物層、卜 "㈢之表面, ^ ^ Μ Ο,μ、+、 迷第一氧化物層及上述 形成一開口,上述開π I ^ Η Ρ、七問Γ7及人 具有一底部周圍部及一 ,且上述開口係令上沭耸k η, 上迷基板及上述第一 ^化物 上述第 去除部份露出於 氮化物層及 一第二氮化 形成 全面性地形成一 上述開口之 去除形 並形成一第 去除形 並藉由上述 露出於上述 去除上 2. 如申 之方法,其 之。 3. 如申 積之方法, 表面; 成於上述 三氮化物 成於上述 第三氮化 開口的上 述第二氮 請專利範 中上述蝕 上述開口之上iL/ 上述第一虱化物層,以於 上述基板之間形成一第一凹部; 物層於上述第一凹部; 第二氧化物層於上述第一氮化物層及 開口之上部周圍部的第二氧化物層, 層於上述開口之上部周圍部; 開口之底部周圍部的第二氧化物層, 物層為幕罩而施行一姓刻步驟,而於 述基板形成一第二凹部;以及 化物層及第三氮化物層。 圍第1項所述之增加渠溝電容器面積 刻步驟係使用氫氧化銨溶液來施行 請專利範圍第1項或所述之增加渠溝電容器面 其中上述餘刻步驟更包括有:一粗糙度改善步
1249805 六、申請專利範圍 1 驟,上述粗糙度改善步驟係藉由循環使用過氧 稀氫氟酸溶液來施行之。 ° 化氧溶液及 4·如申請專利範圍第1項所述之增加渠溝電容 之方法,其中上述基板係由矽所構成。 σ面積 5·如申請專利範圍第1項所述之增加渠溝電容器面積 之方法,其中上述第一氧化物層、第二氧化物層係由二氧 化矽(Si02 )所構成。 6 ·如申請專利範圍第1項所述之增加渠溝電容器面積 之方法,其中上述第一氮化物層、第二氮化物層及第三 化物層係由氣化石夕(SiN )所構成。
0548-7070TWF;90073;peterliou.ptd 第12頁
TW090131940A 2001-12-21 2001-12-21 Method for increasing area of trench capacitor TWI249805B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW090131940A TWI249805B (en) 2001-12-21 2001-12-21 Method for increasing area of trench capacitor
US10/322,111 US6693006B2 (en) 2001-12-21 2002-12-17 Method for increasing area of a trench capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW090131940A TWI249805B (en) 2001-12-21 2001-12-21 Method for increasing area of trench capacitor

Publications (1)

Publication Number Publication Date
TWI249805B true TWI249805B (en) 2006-02-21

Family

ID=27657128

Family Applications (1)

Application Number Title Priority Date Filing Date
TW090131940A TWI249805B (en) 2001-12-21 2001-12-21 Method for increasing area of trench capacitor

Country Status (2)

Country Link
US (1) US6693006B2 (zh)
TW (1) TWI249805B (zh)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6696344B1 (en) * 2003-03-10 2004-02-24 Nanya Technology Corporation Method for forming a bottle-shaped trench
TW583724B (en) * 2003-03-13 2004-04-11 Promos Technologies Inc Method to form nitride layer with different thicknesses
TW586129B (en) * 2003-04-23 2004-05-01 Nanya Technology Corp Method of forming bottle-shaped trench capacitors
TW584939B (en) * 2003-04-23 2004-04-21 Nanya Technology Corp Method of forming bottle-shaped trench and the method for fabricating bottle-shaped trench capacitors
TW594919B (en) * 2003-08-12 2004-06-21 Nanya Technology Corp Method of fabricating a buried plate of a deep trench capacitor
TWI240318B (en) * 2004-09-16 2005-09-21 Promos Technologies Inc Method for preparing a deep trench and an etching mixture for the same
US7101806B2 (en) * 2004-10-15 2006-09-05 International Business Machines Corporation Deep trench formation in semiconductor device fabrication
US7858476B2 (en) * 2006-10-30 2010-12-28 Hynix Semiconductor Inc. Method for fabricating semiconductor device with recess gate
US9402707B2 (en) 2008-07-22 2016-08-02 Neuravi Limited Clot capture systems and associated methods
ES2683943T3 (es) 2010-10-22 2018-09-28 Neuravi Limited Sistema de captura y extirpación de coágulos
US11259824B2 (en) 2011-03-09 2022-03-01 Neuravi Limited Clot retrieval device for removing occlusive clot from a blood vessel
ES2960917T3 (es) 2013-03-14 2024-03-07 Neuravi Ltd Dispositivo de recuperación de coágulos para eliminar coágulos oclusivos de un vaso sanguíneo
US10201360B2 (en) 2013-03-14 2019-02-12 Neuravi Limited Devices and methods for removal of acute blockages from blood vessels
EP3682821B1 (en) 2014-11-26 2022-05-11 Neuravi Limited A clot retrieval device for removing an occlusive clot from a blood vessel
US10617435B2 (en) 2014-11-26 2020-04-14 Neuravi Limited Clot retrieval device for removing clot from a blood vessel
US11253278B2 (en) 2014-11-26 2022-02-22 Neuravi Limited Clot retrieval system for removing occlusive clot from a blood vessel
ES2867599T3 (es) 2016-09-06 2021-10-20 Neuravi Ltd Un dispositivo de recuperación de coágulos para eliminar el coágulo oclusivo de un vaso sanguíneo
US11121207B2 (en) * 2016-11-10 2021-09-14 Texas Instruments Incorporated Integrated trench capacitor with top plate having reduced voids
US11406416B2 (en) 2018-10-02 2022-08-09 Neuravi Limited Joint assembly for vasculature obstruction capture device
US11717308B2 (en) 2020-04-17 2023-08-08 Neuravi Limited Clot retrieval device for removing heterogeneous clots from a blood vessel
US11730501B2 (en) 2020-04-17 2023-08-22 Neuravi Limited Floating clot retrieval device for removing clots from a blood vessel
US11871946B2 (en) 2020-04-17 2024-01-16 Neuravi Limited Clot retrieval device for removing clot from a blood vessel
US11737771B2 (en) 2020-06-18 2023-08-29 Neuravi Limited Dual channel thrombectomy device
US11937836B2 (en) 2020-06-22 2024-03-26 Neuravi Limited Clot retrieval system with expandable clot engaging framework
US11395669B2 (en) 2020-06-23 2022-07-26 Neuravi Limited Clot retrieval device with flexible collapsible frame
US11439418B2 (en) 2020-06-23 2022-09-13 Neuravi Limited Clot retrieval device for removing clot from a blood vessel
US11864781B2 (en) 2020-09-23 2024-01-09 Neuravi Limited Rotating frame thrombectomy device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6140175A (en) * 1999-03-03 2000-10-31 International Business Machines Corporation Self-aligned deep trench DRAM array device
US6426254B2 (en) * 1999-06-09 2002-07-30 Infineon Technologies Ag Method for expanding trenches by an anisotropic wet etch
US6458647B1 (en) * 2001-08-27 2002-10-01 Infineon Technologies Ag Process flow for sacrificial collar with poly mask

Also Published As

Publication number Publication date
US6693006B2 (en) 2004-02-17
US20030153158A1 (en) 2003-08-14

Similar Documents

Publication Publication Date Title
TWI249805B (en) Method for increasing area of trench capacitor
TW538497B (en) Method to form a bottle-shaped trench
TWI416664B (zh) 具有降低電容用自行對準間隙之裝置
TWI225685B (en) Method forming metal filled semiconductor features to improve structural stability
JP2994374B2 (ja) トレンチ内のカラ―酸化物の形成方法
TW574754B (en) Semiconductor integrated circuit device and method of manufacturing the same
JP2009140970A (ja) 半導体装置及び半導体装置の製造方法
JP2005032800A (ja) 半導体装置の製造方法
KR100869236B1 (ko) 커패시터 제조 방법 및 이를 사용한 디램 장치의 제조 방법
TW200952126A (en) Method for fabricating a semiconductor memory device
TWI283458B (en) Method for preparing a capacitor structure of a semiconductor memory
TW417293B (en) Formation of DRAM capacitor
TWI224821B (en) Bottom oxide formation process for preventing formation of voids in the trench
KR100949880B1 (ko) 반도체 소자 및 그 제조 방법
JP5063061B2 (ja) 半導体素子のキャパシタの製造方法
JP2007013081A (ja) 深いコンタクトホールを有する半導体素子の製造方法
TWI291735B (en) Method for forming bottle-shaped trench in semiconductor substrate
TWI306306B (en) Capacitor structure and method for preparing the same
TW200423291A (en) Method of fabricating dielectric layer
TWI310214B (en) A capacitor structure of a semiconducotr memory and a method for preparing the same
TW201010012A (en) Method of fabricating storage node of stack capacitor
US6953723B2 (en) Method for forming bottle shaped trench
US8524093B2 (en) Method for forming a deep trench
TW395007B (en) A method of forming capacitor of semiconductor device and semiconductor capacitor formed thereby
TW583746B (en) Method of forming a bottle trench

Legal Events

Date Code Title Description
MK4A Expiration of patent term of an invention patent