1244139 08968twf.d〇c 九、發明說明： 【發明所屬之技術領域】 本發明是關於一種無邊金屬線的製造方法，且特別是 關於一種適用於次微米設計之改良式無邊金屬線的製造方 法。 【先前技術】 隨著半導體設計之小型化，次微米設計之半導體裝置 ，得越來越重要。而且含有次微米之半導體裝置也隨著潮 ^而逐漸降低成本。 米製程中’由於電路設計或元件設計等皆朝向 目=在進行微難刻之際，對於圖案對準之 屬二==之 述之元件之間電性連接，並形成 間的接觸窗，以使上 然而，在次微米製程中，由^之傳導通路。 觸窗之寬度相等，因此，一旦菸；導線本身之寬度係與接 導線與接觸窗之間的傳導面積^生偏移現象時，極易降低 加，並增加電容-電阻延遲時^。’進而導致整體電阻之增 另外田餐生對不準之情形昉 易在蝕刻導線之際，一同移除，T、’暴露之接觸窗也很容 象，進而導致整體電阻之增加q而導致接觸窗發生缺角現 【發明内容】 置加電容-電阻延遲時間。 因此’本發明之目的係提 種…、邊金屬線的製造方 1244139 08968twf.doc 汰，从麟、對不準之問題，並增加製程之裕声 本，明提出-種無邊金屬線的製造^ 括先，提供一基底，且此基底之表面 士方= 層。再於第-金屬層上形成内金屬 $弟一金屬 ==二r内金屬介心 早滑弟-至屬層及介電層。之後，於介 化之，層:再以此光阻層為罩幕，移除介電=圖j -金屬層’亚暴露第二金屬層，且第 二 凸字狀。接著’移除此光阻層，再於第-全d成 分的側壁上形成隔離間隙壁。之後，、:= j為罩幕’移除第二金屬層及阻障層，而暴露= 線和m本ί明之無邊金屬_製造方法，係藉由在導 =、接^相連接之部分，利用凸字狀之局部導線結構製 矛壬之格度，並消除對不準之問題。 為讓本發明之上述和其他目的、特徵和優點能更明顯 下文特舉較佳實施例，並配合所附圖式，作詳細說 明如下。 【實施方式】 第1Α圖至第if圖所示為本發明之一較佳實施例之無 邊金屬線的製造方法的示意圖。 首先，請參照第1Α圖所示，提供—基底1〇〇，此基 底10γ之表面已形成有第一導體層1〇2。此第一導體層1〇2 疋至屬内連線結構。其中第一導體層IQ〕之材質例如 1244139 08968twf.doc 是多晶矽、摻雜多晶矽、鋁、銅鋁合金、銅、鎢等所組成 之族群。 接著’於第一導體層102上形成一内金屬介電層（inter metal dielectric，IMD)104，其中内金屬介電層104之形成 方法例如是電漿化學氣相沈積法。再者，内金屬介電層1〇4 之材質例如是氧化矽。另外，内金屬介電層104之厚度係 介於 15000〜25000 Angstroms 之間。 另外，也可以對内金屬介電層104之表面進行化學機 械研磨(chemical mechanical polishing，CMP)，以使内金屬 介電層104之表面平坦化。 接著’利用微影技術及例如是反應性離子餘刻等的非 等向性蝕刻，對内金屬介電層1〇4進行圖案化，而於内金 屬介電層104中，定義出暴露第一導體層之接觸窗開口 106。在反應性蝕刻之過程中，例如是使用CHF3作為蝕刻 劑0 之後，利用物理氣相沈積或是化學氣相沈積之方法， 填平接觸窗開口 1〇6,而形成與第一導體層搬相接觸的 接觸窗108，其中接觸窗應之材質例如是銘、銅銘合金、 銅、嫣等所組成之鱗。再者，_窗1G8之直徑係介於 0.6〜2.0 um之間，接觸窗1〇8之厚度係介於5_〜綱⑻1244139 08968twf.d〇c IX. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a method for manufacturing a borderless metal wire, and more particularly to a method for manufacturing an improved borderless metal wire suitable for sub-micron design. [Previous Technology] With the miniaturization of semiconductor design, submicron-designed semiconductor devices have become more and more important. Moreover, semiconductor devices containing sub-microns also gradually reduce costs as the tide increases. In the rice manufacturing process, because the circuit design or component design are all oriented to the purpose = when the micro-engraving is difficult, the pattern alignment of the two = = the electrical connection between the components described above, and form a contact window between them, However, in the sub-micron process, the conductive path is used. The width of the contact windows is equal, so once the smoke; the width of the wire itself is related to the conduction area between the connecting wire and the contact window, it is easy to reduce the increase, and increase the capacitance-resistance delay. 'This leads to an increase in the overall resistance. In addition, Tian Fansheng's inaccuracy is easy to remove together when the wire is etched. T,' The exposed contact window is also very similar, which leads to an increase in overall resistance, q, and contact. A missing corner of the window is present. [Inventive Content] Set a capacitor-resistance delay time. Therefore, 'the purpose of the present invention is to raise seeds ..., the manufacturer of edge metal wires, 1244139 08968twf.doc, to eliminate the problem of inaccuracy and increase the margin of the manufacturing process, it is explicitly proposed-the manufacture of a type of edgeless metal wires ^ First, a substrate is provided, and the surface square of the substrate = layer. Then, an inner metal is formed on the first metal layer. $ Younger metal == two r inner metal interface. Early slippery-to metal layer and dielectric layer. After that, in the dielectric layer, the photoresist layer is used as a mask to remove the dielectric = Figure j-metal layer 'sub-exposed second metal layer, and the second convex shape. Then, the photoresist layer is removed, and an isolation spacer is formed on the sidewall of the -th d component. After that,: = j is the mask 'to remove the second metal layer and the barrier layer, and the exposed = wire and the metal edge of the edgeless metal_ manufacturing method are made by connecting the conductive parts and conductive parts. Use the embossed local wire structure to make the spear lattice and eliminate the problem of inaccuracy. In order to make the above and other objects, features, and advantages of the present invention more apparent, preferred embodiments are described below in detail with reference to the accompanying drawings, as follows. [Embodiment] FIGS. 1A to 1F are schematic diagrams showing a method for manufacturing a borderless metal wire according to a preferred embodiment of the present invention. First, please refer to FIG. 1A to provide a substrate 100, and a first conductor layer 102 has been formed on the surface of the substrate 10γ. The first conductor layer 102 is connected to an interconnect structure. The material of the first conductive layer IQ] is, for example, 1244139 08968twf.doc is a group consisting of polycrystalline silicon, doped polycrystalline silicon, aluminum, copper aluminum alloy, copper, tungsten, and the like. Next, an inter metal dielectric (IMD) 104 is formed on the first conductor layer 102. The method for forming the inner metal dielectric layer 104 is, for example, plasma chemical vapor deposition. In addition, the material of the inner metal dielectric layer 104 is, for example, silicon oxide. In addition, the thickness of the inner metal dielectric layer 104 is between 15,000 and 25,000 Angstroms. In addition, chemical mechanical polishing (CMP) may be performed on the surface of the inner metal dielectric layer 104 to planarize the surface of the inner metal dielectric layer 104. Next, using the lithography technology and anisotropic etching such as reactive ion etching, the inner metal dielectric layer 104 is patterned, and in the inner metal dielectric layer 104, the exposure first is defined The contact window opening 106 of the conductive layer. In the reactive etching process, for example, after using CHF3 as the etchant 0, the contact window opening 106 is filled by physical vapor deposition or chemical vapor deposition to form a phase shift with the first conductor layer. The contact window 108 is in contact, and the material of the contact window is, for example, a scale composed of an inscription, a copper alloy, copper, or Yan. In addition, the diameter of _window 1G8 is between 0.6 ~ 2.0 um, and the thickness of contact window 108 is between 5_ ~ ⑻.
Angstroms之間。。接觸f 1〇8之形成方法例如是利用物 ”法，在内金屬介電層104之表面形成-層導體 層〜、中此導體層係填滿接觸窗開π 1〇6,之後，利用例 如是化學機械研叙平域方法，歸接_開口10^ 1244139 08968twf.doc 外的導體層。 阳A在内金屬介電層1Q4及接觸窗⑽之上，形成 :d ，其中阻障層no之材質包括鈦/氮化鈦 ，且阻 之厚度係介於300〜2000 Angstroms之間。阻障 成方法例如是利用諸如物理化學氣相沈積法在 層104及接觸窗108之上覆蓋一層鈦/氮化鈦 &成。諸如化學機械研磨法，移除過多之鈦復化鈦而 成第體二„ m圖所示，於阻障層110上依序形 之材所例：：及介電層114。其中，第二導體層112 第：=疋紹、銅銘合金、銅、鑛等所組成之族群，且 CC212之厚度係介於测〜⑽0如_咖之 /層112之形成綠例如是彻物理氣相沈積 將^^上之金屬離子擊出，並沈積於阻障層11〇上: 之厚产ίΐ!1層114之材㈣如是氧切1介電層114 114 M500〜25〇〇AngStlOmS之間。另外，介電層 的化與C例如是’利用諸如電聚化學氣相沈積法i 上而:將二氧切沈積於第二導體層112之 案化ΐ::ΐίΓ二圖所示，於介電層114上形成圖 私“Ϊ 其中’形成圖案化之光阻層116的方 法例如是，在介電層114之上塗佈—層光日16的方 影之方法將光罩上之圖案轉移至二微 于另外在本較佳實施例中，係以光阻圖案未 1244139 08968twf.doc 對準接觸窗108之情形為例進行後續動作之說明。 之後，請參照第1D圖所示，以光阻層116為蝕刻罩 幕’利用例如是反應性離子蝕刻等的非等向性蝕刻，移除 介電層114。接著，利用例如是反應性離子姓刻等的非等 向性蝕刻，移除部分第二導體層Π2，而暴露第二金屬層 112,且第二金屬層n2之形狀係成凸字狀。例如當第二金 屬層112之厚度介於5500〜6500 Angstroms之間時，則在 前述反應性離子蝕刻之過程中，係從第二金屬層112之頂 面起’移除了厚約1〇〇〇〜丨5〇〇 Angstroms之間的第二金屬 層，而形成具有凸字狀的第二金屬層。 接著，請參照第1E圖所示，移除光阻層116，再利用 例如是電將化學氣相沈積法，於第二金屬層112及介電層Angstroms. . The method for forming the contact f 1 08 is, for example, using a physical method to form a layer of a conductive layer on the surface of the inner metal dielectric layer 104. The conductive layer is used to fill the contact window opening π 106, and then, for example, This is a flat-mechanical method for chemical mechanical research. It is the conductive layer outside _opening 10 ^ 1244139 08968twf.doc. The anode A is formed on the inner metal dielectric layer 1Q4 and the contact window, forming: d, where the barrier layer no The material includes titanium / titanium nitride, and the thickness of the barrier is between 300 and 2000 Angstroms. The barrier formation method is, for example, using a physical chemical vapor deposition method to cover the layer 104 and the contact window 108 with a layer of titanium / nitrogen. Titanium & formation. Such as chemical mechanical polishing method, removing too much titanium compounded titanium to form the second body „m, as shown in the figure on the barrier layer 110 in sequence: and dielectric layer 114. Among them, the second conductor layer 112 is the group consisting of: 疋 绍, Tongming alloy, copper, ore, etc., and the thickness of CC212 is between the measurement ~ ⑽0 如 _ 葛 之 / The formation of layer 112 is green, for example, completely physical Vapor deposition will knock out the metal ions on ^^ and deposit it on the barrier layer 11: The thickness of the material is 1 layer 114. If the material is oxygen cut 1 dielectric layer 114 114 M500 ~ 2500 AngStlOmS between. In addition, the dielectric layer C and C are, for example, 'using a method such as electropolymerization chemical vapor deposition method i: Dioxane is deposited on the second conductor layer 112 ΐ :: ΐίΓ As shown in the second figure, Yu Di The method of forming a pattern on the electrical layer 114 is to form a patterned photoresist layer 116. For example, a method of coating the dielectric layer 114 with a square shadow on the light layer 16 to transfer the pattern on the photomask. In the second embodiment, in the preferred embodiment, the following description is made by taking the case where the photoresist pattern is not aligned with the contact window 108 as an example. After that, please refer to FIG. The resist layer 116 is an etching mask. The dielectric layer 114 is removed by anisotropic etching such as reactive ion etching. Then, the anisotropic etching such as reactive ion etching is used to remove the dielectric layer 114. Part of the second conductor layer Π2, and the second metal layer 112 is exposed, and the shape of the second metal layer n2 is convex. For example, when the thickness of the second metal layer 112 is between 5500 ~ 6500 Angstroms, In the aforementioned reactive ion etching process, it starts from the top surface of the second metal layer 112 The second metal layer having a thickness between about 1000 and 500 Angstroms is removed to form a second metal layer having a convex shape. Next, please refer to FIG. 1E to remove the photoresist layer. 116. The second metal layer 112 and the dielectric layer are reused, for example, by chemical vapor deposition.
114之上覆蓋一層隔離層（未繪示）。之後，利用例如是I 應性離子綱等的料向性侧，歸部分_層，而於 第二金制112之突出部分的側壁上形成隔離間隙壁 =8其中離間隙壁118之材質包括氧化石夕，且隔離間隙114 is covered with an isolation layer (not shown). After that, using the material-oriented side such as I-adaptive ionosphere and so on, it is divided into layers, and an isolation gap wall is formed on the side wall of the protruding part of the second gold 112 = 8, and the material from the gap wall 118 includes oxidation. Shi Xi, and isolation gap
St高度係介於簡〜2獅~職之間，隔離間 隙壁118之厚度係介於350〜45〇Angstrc)ms之間。 之後，請參照第1F圖所示，以隔離間隙壁118及介 電層m為罩幕，利用例如是反應 : 移除第二金屬…阻障層uo，=: 屬介電層104。 叫恭路門至 1244139 08968twf.doc 程之裕度 …一並消除對不準之問題。 雖然本發明已以較佳實施例揭露如上，" 限定本發明’任何熟習此技藝者，在不脫離; 和範圍内，當可作些許之更動與潤飾，因此本如 範圍當視後附之申請專利範圍所界定者為準。 保達 【圖式簡單說明】 •、… 第1八圖至第1F_㈣本發明之―較佳實施例之無邊 屬線的製造方法的示意圖。 ” 【主要元件符號說明】 100 :基底 102第一導體層 1〇4 :内金屬介電層 106 :接觸窗開口 108 :接觸窗 110 :阻障層 112 :第二導體層 114 :介電層 116 ·•光阻 118 :隔離間隙壁The height of St is between Jan ~ 2 l ~ ~, and the thickness of the isolation gap wall 118 is between 350 ~ 45 ° Angstrc) ms. After that, referring to FIG. 1F, the isolation spacer 118 and the dielectric layer m are used as a mask. The reaction is, for example, removing the second metal ... the barrier layer uo, which belongs to the dielectric layer 104. Call Gonglumen to 1244139 08968twf.doc margin of process ... to eliminate the problem of inaccuracy together. Although the present invention has been disclosed as above with a preferred embodiment, " restricts the present invention to 'anyone skilled in the art, without departing from; and within the scope, there can be a few changes and retouching, so this scope should be attached as follows The ones defined in the scope of patent application shall prevail. Baoda [Brief Description of the Drawings] •, ... Figures 18 to 1F_㈣ Schematic diagrams of the method of manufacturing the borderline of the preferred embodiment of the present invention. [Description of main component symbols] 100: substrate 102 first conductor layer 104: inner metal dielectric layer 106: contact window opening 108: contact window 110: barrier layer 112: second conductor layer 114: dielectric layer 116 · Photoresistance 118: Isolation gap