TWI241765B - Variable gain amplifying circuit - Google Patents

Variable gain amplifying circuit Download PDF

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Publication number
TWI241765B
TWI241765B TW93117032A TW93117032A TWI241765B TW I241765 B TWI241765 B TW I241765B TW 93117032 A TW93117032 A TW 93117032A TW 93117032 A TW93117032 A TW 93117032A TW I241765 B TWI241765 B TW I241765B
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Taiwan
Prior art keywords
input terminal
resistor
ladder
patent application
scope
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TW93117032A
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Chinese (zh)
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TW200541208A (en
Inventor
Chao-Cheng Lee
Ying-Yao Lin
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Realtek Semiconductor Corp
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Priority to TW93117032A priority Critical patent/TWI241765B/en
Priority to US11/148,132 priority patent/US7102441B2/en
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Publication of TWI241765B publication Critical patent/TWI241765B/en
Publication of TW200541208A publication Critical patent/TW200541208A/en
Priority to US11/381,548 priority patent/US7737772B2/en

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Abstract

The present invention discloses a variable gain amplifying circuit which applies a resistor ladder to obtain a more accurate gain. The amplifying circuit includes an input, an operational amplifier (op-amp), a resistor unit and a feedback resistor. The feedback resistor is coupled between an output and an inverting input of the op-amp, and the resistor unit is coupled between the input of the amplifying circuit and the inverting input of the op-amp. The resistor unit includes at least a resistor ladder. The resistor unit further includes a switch unit for switching on/off the resistor ladder. The present invention can also be applied to a differential amplifying circuit for more accurate gain adjustment.

Description

1241765 五、發明說明(1) 一 【發明所屬之技術領域】 本發明係有關於可變增益之放大電路,尤指一種具有 梯形電阻架構之可變增益放大電路。 〃 【先前技術] 在現今的電路設計中,常會需要提供高精確度的訊號 放大功能。例如,在常用的無線通訊調變機制裡,不論是 相位調變或頻率調變都會使用到I/Q訊號。然而,只要I/Q 訊號的振幅有些許不匹配,即會破壞訊號的星座圖 (C〇nStellation diagram),並增加通訊系統的位元錯誤 率( bi t err〇r rate, bER)。因此,就需要利用具有高精 確增益的放大器,以準確控制〖/Q訊號的振幅。 一般開迴路式的放大器,增益漂移相當大,所以並不 符合面精確增益的要求;而常用的閉迴路式放大器,亦不 易精確控制增益。目-係習用之閉迴路式放大器的電路 ^八包$運算放大器1〇、一耦接於輸入端與運算放大 器1 〇,反相輸入端間的電阻Ri以及一耦接於輸出端與運算 放大器1 〇之反相輸入端間的回授電阻R v 則分別為 輸入電壓與輸出電壓。由於負回授及虛短;(、;;二: short)的特性,可推得圖一之放大電路的增益值(y t/Vin) 為一h/h,藉由調整Rl與匕的電阻值,可得到所需的⑽增益。 然而,若想利用圖一之電路取得高精確度的增益,如 1· 001倍,則由於&與心之電阻值差異相當大(如&μ k ohm、I^lk+l ohm),很容易因比與化本身電阻值1的些微誤 1241765 五、發明說明(2) 差,而影響增益的精確度。特別是在積體電路(I C)上實作 時,由於溫度、製程、供應電壓漂移等因素不易完全掌 握,會更不易達到此種高精確度。 發明内容】 有鑑於此,本發明之一 益之放大電路,能利用梯形 供較佳的增益值。 本發明之另一目的,則 路,以補償由於溫度、製程 的增益不匹配。 為達到前述目的,本發 路,其包括一輸入端、一運 回授電阻。運算放大器具有 輸入端、以及一輸出端。回 出端與反相輸入端之間,而 輸入端與運算放大器之反相 一梯形電阻及一控制各梯形 另一方面,本發明亦提 路,其包括一正輸入端與一 器、一第一與一第二電阻襞 阻。差動運算放大器具有一 一反相輸出端及一正相輸出 運算放大器之正相輸出端與 目的,即在於提出一種可變增 電阻架構進行增益微調,以提 是提出一種可變增益之放大電 、供應電壓漂移等因素所造成 明提供一種可變增益之放大電 舁放大器、一電阻裝置以及一 一反相輸入端、一接地之正相 授電阻耦接於運算放大器之輸 電阻裝置則耦接於放大電路之 輸入端間。電阻裝置包含至少 電阻是否導通之開關單元。 供一種可變增益之差動放大電 負輸入端、一差動運算放大 置以及一第一與一第二回授電 ^相輪入端、一正相輸入端、 端。第一回授電阻耦接於差動 反相輪入端之間,而第二回授1241765 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a variable gain amplifier circuit, especially a variable gain amplifier circuit with a ladder resistor structure. 〃 [Previous technology] In today's circuit design, it is often necessary to provide a high-precision signal amplification function. For example, in common wireless communication modulation mechanisms, both phase modulation and frequency modulation use I / Q signals. However, as long as the amplitude of the I / Q signal is slightly mismatched, it will destroy the signal constellation diagram and increase the bit error rate (bER) of the communication system. Therefore, it is necessary to use an amplifier with high precision gain to accurately control the amplitude of the / Q signal. Generally, the gain drift of the open-loop amplifier is quite large, so it does not meet the requirements of the precise gain of the surface; and the commonly used closed-loop amplifier is not easy to accurately control the gain.目-The circuit of a conventional closed-loop amplifier ^ Eight packs of operational amplifier 10, one coupled between the input terminal and the operational amplifier 10, a resistor Ri between the inverting input terminal, and one coupled between the output terminal and the operational amplifier The feedback resistance R v between the inverting input terminals of 10 is the input voltage and the output voltage, respectively. Due to the characteristics of negative feedback and virtual short; (, ;; two: short), the gain value (yt / Vin) of the amplifier circuit in Figure 1 can be deduced to be h / h, by adjusting the resistance values of Rl and dagger To get the required chirp gain. However, if you want to use the circuit in Figure 1 to obtain a high-precision gain, such as 1.001 times, the difference between the resistance value of & and the heart is quite large (such as & μ k ohm, I ^ lk + l ohm), It is easy to affect the accuracy of the gain because of a slight error compared to the resistance value of 1 1241765 V. Description of the invention (2). Especially when implemented on integrated circuit (IC), it is not easy to fully grasp such factors as temperature, process, supply voltage drift, etc., and it is even more difficult to achieve such high accuracy. SUMMARY OF THE INVENTION In view of this, an amplifying circuit of the present invention can use a trapezoid to provide a better gain value. Another object of the present invention is to correct the gain mismatch due to temperature and process. In order to achieve the aforementioned purpose, the circuit includes an input terminal and a feedback resistor. The operational amplifier has an input terminal and an output terminal. Between the output terminal and the inverting input terminal, and the input terminal and the inverting of the operational amplifier are a ladder resistor and a control ladder. One and one second resistors block. The differential operational amplifier has a non-inverting output terminal and a non-inverting output terminal of the non-inverting output. The purpose is to propose a variable resistance-increasing architecture for fine-tuning the gain. Due to factors such as supply voltage drift, a variable gain amplifier amplifier, a resistor device, an inverting input terminal, and a grounded positive-phase feedback resistor coupled to the op amp's output resistor device are coupled. Between the input terminals of the amplifier circuit. The resistive device includes at least a switching unit that turns on or off the resistance. Provides a differential gain negative input terminal with a variable gain, a differential operational amplifier, and a first and a second feedback power input, a non-inverting input terminal, and a terminal. The first feedback resistor is coupled between the differential inverting wheels and the second feedback resistor

第7頁 1241765 五、發明說明(3) — 電阻則耦接於差動運算放大器之反相 之間。第一雪阳驻罢如社μ 出、與正相輸入端 而第-電阻:晋輸入端與正輪入端之間, :Γ ί ΞΓ;於正相輸入端與負輪入端之間。 各第置包含至少一第1形電阻及控制 梯$電阻疋否導通之一第一開關 够一而 裝置則包含至少一第二梯形電阻及控制::阻 否導通之一第二開關單元。 各第一梯形電阻是 【實施方式】 詳細將γϊ本ί明之較佳實施例,配合所附圖式作-解與認同。 个贯月有更進一步的了 阻值本發日f係利用㈣電阻來調整閉迴路式放大電路的電 ,以達到較精確控制增益的目的。 阻之電路結構及原理。 T先說月梯形電 (即方圖二係、顯示五級梯形電阻之電路結構圖,《中每一級 阻R 、 V ν |日J IU功 ^:兩二為^上:^及心之阻值為電㈣22、1"24、1^ 阻網路,而其:、ρ,圖二之梯形電阻為5位元_,電 阻值其4效電路可推導如下:電阻‘與、並聯後之 …、’與電阻匕2串聯後,等效阻抗為2R。接著此等效 221、、22、24、26及28)各具有一節點(標示為201、 接地、261及281)及兩條電流路徑,其中一條耦合至 值原^ i另一!!則耦接至下一級之節點。圖_各電阻之阻 阻R、° D非特定阻值之組合,但為了簡化說明,在此以電 第8頁 1241765 五、發明說明(4) 阻抗再與‘並聯,依此類推。因此,當電流!自輸入點V =後’=節點281、261、241、221及2〇1上,兩條電流路用 瓜之阻杬皆為2R,所以流經各節點後,電流量皆會 =且中…量則如圖,所示。由於圖二之梯形電阻具 嫌π 士因此取後輸出^。輸出之電流量為1 /25,代表此 :形電阻之等效電阻值為25XR。 = 一 的R-2R電阻網路之等效電阻值為2ηχ r。 /推付,η位π 接著說明如何將此種梯形電 益放大電路。"俜本發明之二:運用於本發明之可變增 實施例的電路ΐ Γ益放大電路之一較佳 大器一電阻二=授= 電路3:括-運算放 回授之組態,亦即,運算放大哭qn &。放大電路3為負 接地點,而回授雷R 0,| ^ 之正相輸入端係麵接於 反相輸入端之:電=則=;運算放大器30之輸出端與 至運算放大器30之;相輸電經由電阻讀送 圖二中,電阻裝置32包含並胸夕, 32卜0及一開關單元322。苴中Un個梯形電阻321-1至 ㈣電阻網路,梯形電阻如電阻32卜1為1位元之 其二依此類推。開關單元322則;控制電阻網路… :32卜。是否導通,用以調整整個‘形電阻32H 值。 裝置32的等效電阻 可推得圖三 依,剐述圖二關於卜2R 之電阻裝置32的等效電阻為、·周路的說明 1241765Page 7 1241765 V. Description of the Invention (3) — The resistor is coupled between the inverting of the differential operational amplifier. The first Xueyang station, such as the company μ, is connected to the positive phase input terminal and the-resistor: between the Jin input terminal and the positive wheel input terminal,: Γ ί ΞΓ; between the positive phase input terminal and the negative wheel input terminal. Each first set includes at least one first-shaped resistor and a first switch that controls whether the resistor is conductive or not. The device includes at least a second ladder resistor and a control that controls whether a second switch unit is conductive or not. Each of the first ladder resistors is [Embodiment] The preferred embodiment of the present invention will be explained in detail in accordance with the drawings. The resistance value has been further improved throughout the month. On the day of this issue, the f series uses a chirp resistor to adjust the power of the closed-loop amplifier circuit in order to achieve a more precise control of the gain. Resistance circuit structure and principle. First, let ’s talk about the moon trapezoidal electricity (that is, the second series of square diagrams, showing the circuit structure diagram of the five-step ladder resistance, "in each stage of the resistance R, V ν The value is electrical resistance 22, 1 " 24, 1 ^ resistance network, and its :, ρ, the ladder resistance of Figure 2 is 5-bit _, the 4-effect circuit of the resistance value can be derived as follows: the resistance 'and, parallel ... , 'Is in series with the resistance dagger 2, the equivalent impedance is 2R. Then the equivalent 221, 22, 24, 26, and 28) each have a node (labeled 201, ground, 261, and 281) and two current paths One of them is coupled to the original value ^ i and the other !! is coupled to the next level node. Figure_Resistance combination of resistance R, ° D for each resistor, but for simplicity, here we will use the electricity page 8 1241765 V. Description of the invention (4) The impedance is then connected in parallel with ‘and so on. So when current! Since the input point V = after '= nodes 281, 261, 241, 221, and 201, the resistance of the two current paths is 2R, so after passing through each node, the current will be equal to ... The amount is shown in the figure. Because the ladder resistor in Figure 2 is too small, it is output after taking it ^. The output current is 1/25, which represents this: the equivalent resistance value of the shape resistor is 25XR. The equivalent resistance of the R-2R resistor network = 1 is 2ηχ r. / Push, η bit π Next, how to implement such a trapezoidal gain amplifier circuit will be described. " 俜 The second of the present invention: a circuit applied to the variable augmentation embodiment of the present inventionΐ One of the better amplifiers of the gain amplifier is a resistor = two = = circuit 3: including the configuration of arithmetic operation and feedback, That is, the operation zooms in qn &. The amplifier circuit 3 is a negative ground point, and the non-inverting input terminal of the feedback lightning R 0, | ^ is connected to the inverting input terminal: electricity = then =; the output terminal of the operational amplifier 30 and the operational amplifier 30; Phase power transmission is transmitted via a resistor. In FIG. 2, the resistance device 32 includes a power amplifier, a power switch 32, and a switch unit 322. Un resistors 321-1 to ㈣ in the resistor network, resistors such as resistor 32b and 1 are 1 bit, and so on. Switch unit 322; control resistor network ...: 32 Bu. Whether it is on or not, it is used to adjust the entire value of 32H. The equivalent resistance of the device 32 can be deduced as shown in Figure III. The description of Figure 2 on the equivalent resistance of the resistor device 32 of 2R is ···

Η 益為 若回授電阻匕Η Yi Wei If the feedback resistance dagger

的阻值為m χ R 則可推得放大電路3之增 ^ 1 1 • Η--Η-- 23 2r 藉由M a月- > 式(1 一 1 ) 或刪除,:&早凡322 ’可決定式(Η)中之各項是否保餐The resistance value of m χ R can be deduced to increase the amplification circuit 3 ^ 1 1 • Η--Η-- 23 2r By M a month-> Formula (1-1) or delete, & Zaofan 322 'Can decide whether each item in formula (Η)

電阻裝置Λ I精確調整出所需之增益值。η值越大,亦即 3所能達到的掏(R — 2R電阻網路的位元數越多,則放大電紹 若確定要刪V益精確度就越大。當然,式(卜U十之各項 路。例如:,則可直接省略該項相對應之R-2R電阻網 可將回Θ 士右所要調整的增益值範圍介於1到丨.25間,則 t丄又電阻b的阻值設為2R,並依據式ο])判斷出 22與23兩項需刪除,因此2位元與3位元之卜⑼電阻網路 與321-3可省略。 ^ 式(1—1)中之各項若確定要保留,則在不影塑 增益精確度的情形下,可直接以另一等效的電阻單元代曰替 該些保留項所對應之R_2R電阻網路,以節省該可變增益放 大電路的面積。The resistor device Λ I precisely adjusts the required gain value. The larger the value of η, which is the achievable 3 (the greater the number of bits in the R-2R resistor network, the greater the accuracy of the amplification signal if V is determined to be deleted). Of course, the formula (Bu 10 For example :, you can directly omit the corresponding R-2R resistor network. The gain value range to be adjusted from Θ to the right is between 1 and 25. Then t 丄 and resistance b The resistance value is set to 2R, and it is judged that the two items 22 and 23 need to be deleted according to the formula ο]). Therefore, the 2-bit and 3-bit resistance network and 321-3 can be omitted. ^ Formula (1-1) If the items in the formula are determined to be retained, without affecting the accuracy of the plastic gain, the R_2R resistor network corresponding to the reserved items can be directly replaced by another equivalent resistance unit to save the potential. The area of the variable gain amplifier circuit.

值得注意的是,圖三實施例中所使用的梯形電阻32卜 1至32卜η並不限於R-2R電阻網路。任何熟習此項技藝者, 都可對此梯形電阻之架構進行些許的更動與潤飾,例如, 將梯形電阻内各級之兩個電流路徑上的電阻比例,設定為 非1 · 2之其他比例。只要最後所得之放大電路增益可如式It is worth noting that the ladder resistors 32b1 to 32bn used in the embodiment of FIG. 3 are not limited to the R-2R resistor network. Anyone who is familiar with this technique can make some modifications and retouches to the structure of this ladder resistor. For example, set the ratio of the resistance on the two current paths of each level in the ladder resistor to other ratios other than 1.2. As long as the final gain of the amplifier circuit can be expressed as

第10頁 五、發明說明(6) U、1)進行調整,以達到控制效果者,都不脫離本發明之 精神和範圍。 曰 t發明亦可應用於差動放大電路的組態。圖四係本發 S之可變增益差動放大電路之一較佳實施例的電路圖。如 二四所不’差動放大電路4包括一差動運算放大器40,在 ^ 相輪出编與反相輸入端之間、以及反相輸出端與正相 二入端之間,各耦接一回授電阻h。另外,輸入電壓^經 一電阻裝置32送至差動運算放大器40之反相輸入端,而 =入電壓vA_則經由另一電阻裝置32送至差動運算放大器4〇 f相輸入端。需注意的是,在圖四之實施例中,兩個電 也的等效電阻值相同,而兩個回授電阻、的電阻值Page 10 V. Description of the invention (6) U, 1) Those who make adjustments to achieve control effects do not depart from the spirit and scope of the present invention. The invention can also be applied to the configuration of a differential amplifier circuit. FIG. 4 is a circuit diagram of a preferred embodiment of the variable gain differential amplifier circuit of the present invention. For example, the differential amplifier circuit 4 includes a differential operational amplifier 40. Each of the differential amplifier circuits 4 is coupled between the ^ phase wheel output and the inverting input terminal, and between the inverting output terminal and the positive phase two input terminal. Feedback resistance h. In addition, the input voltage ^ is sent to the inverting input terminal of the differential operational amplifier 40 through a resistance device 32, and the input voltage vA_ is sent to the 40 f-phase input terminal of the differential operational amplifier 40 through another resistance device 32. It should be noted that in the embodiment of Fig. 4, the equivalent resistance values of the two resistors are the same, and the resistance values of the two feedback resistors and

所用圖四所使用之電阻裝置32及回授電阻R31,與圖三 ^用的相同,則依據差動運算放大器4〇的虛短 推得差動放大電路4之增益為 J 式(卜2) ,式(1-1)類似,藉由電阻裝置32内之開關單元322 , 屮式(/)中之各項是否保留或刪除,進而精確調整 而之增盈值。同樣地,η值越大,亦即電阻裝置3 2 電阻網路的位元數越多,則放大電路4所能達 S盈精確度也越大。 · 以上所述係利用較佳實施例詳細說明本發明,而非限 1241765 五、發明說明(7) 制本發明之範圍。大凡熟知此類技藝人士皆能明瞭,適當 而作些微的改變及調整,仍將不失本發明之要義所在,亦 不脫離本發明之精神和範圍。綜上所述,本發明實施之具 體性,誠已符合專利法中所規定之發明專利要件,謹請 貴審查委員惠予審視,並賜准專利為禱。The resistor device 32 and the feedback resistor R31 used in FIG. 4 are the same as those used in FIG. Equation (1-1) is similar to whether the switching unit 322 in the resistive device 32, or the items in the equation (/) are retained or deleted, and then the adjusted gain value is accurately adjusted. Similarly, the larger the value of η, that is, the larger the number of bits of the resistance network of the resistor device 3 2, the greater the accuracy of the S circuit that can be achieved by the amplifier circuit 4. · The above is a detailed description of the present invention using the preferred embodiments, and is not limited to 1241765 V. Description of the invention (7) The scope of the present invention is made. Anyone who is familiar with such arts can understand that making appropriate changes and adjustments will still not lose the essence of the invention, nor depart from the spirit and scope of the invention. To sum up, the specificity of the implementation of the present invention has already met the requirements of the invention patent stipulated in the Patent Law. I invite your reviewing committee to review it and grant the patent as a prayer.

第12頁 1241765 圖式簡單說明 圖一係習用之閉迴路式放大器的電路圖。 圖二係顯示五級梯形電阻之電路結構圖。 圖三係本發明之可變增益放大電路之一較佳實施例的電路 圖。 圖四係本發明之可變增益差動放大電路之一較佳實施例的 電路圖。 圖式之圖號說明: 10、30 :運算放大器 2 0、2 2、2 4、2 6、2 8 :梯形電阻之一級 201 、 221 、 241 、 261 、 281 :節點 3 2 :電阻裝置 321 -1〜321-n ··梯形電阻 3 2 2 :開關單元 40:差動運算放大器Page 12 1241765 Brief description of the diagram Figure 1 is a circuit diagram of a conventional closed-loop amplifier. Figure 2 shows the circuit structure of a five-step ladder resistor. FIG. 3 is a circuit diagram of a preferred embodiment of the variable gain amplifier circuit of the present invention. Fig. 4 is a circuit diagram of a preferred embodiment of the variable gain differential amplifier circuit of the present invention. Description of the drawing number of the drawing: 10, 30: Operational amplifier 2 0, 2 2, 2 4, 2 6, 2 8: One-stage ladder resistor 201, 221, 241, 261, 281: Node 3 2: Resistor device 321- 1 ~ 321-n ·· Ladder resistor 3 2 2: Switch unit 40: Differential operational amplifier

第13頁Page 13

Claims (1)

1241765 六、申請專利範圍 1. 一種可變增益之放大電路,包括: 一輸入端; 一運算放大器,具有一反相輸入端、搞接於一接地點之 一正相輸入端、以及一輸出端; 至少一梯形電阻,板接於該反相輸入端與該輸入端之 間; 一開關單元,用以控制該至少一梯形電阻是否導通;以 及 一回授電阻,搞接於該運算放大器之該輸出端與該反相 輸入端之間。 2. 如申請專利範圍第1項所述之放大電路,其中該至少一 梯形電阻為一 R - 2 R電阻網路。 3. 如申請專利範圍第1項所述之放大電路,其中藉由控制 該開關單元,改變該放大電路之增益。 4. 一種可變增益之差動放大電路,包括: 一正輸入端與一負輸入端; 一差動運算放大器,具有一反相輸入端、一正相輸入 端、一反相輸出端以及一正相輸出端; 至少一第一梯形電阻,耦接於該反相輸入端與該正輸入 端之間; 一第一開關單元,用以控制該至少一第一梯形電阻是否 導通, 至少一第二梯形電阻,耦接於該正相輸入端與該負輸入 端之間;1241765 6. Scope of patent application 1. A variable gain amplifier circuit including: an input terminal; an operational amplifier having an inverting input terminal, a non-inverting input terminal connected to a ground point, and an output terminal ; At least one ladder resistor is connected between the inverting input terminal and the input terminal; a switch unit is used to control whether the at least one ladder resistor is conductive; and a feedback resistor is connected to the operational amplifier. Between the output terminal and the inverting input terminal. 2. The amplifying circuit described in item 1 of the scope of patent application, wherein the at least one ladder resistor is an R-2 R resistor network. 3. The amplifying circuit according to item 1 of the scope of patent application, wherein the gain of the amplifying circuit is changed by controlling the switching unit. 4. A variable gain differential amplifier circuit comprising: a positive input terminal and a negative input terminal; a differential operational amplifier having an inverting input terminal, a non-inverting input terminal, an inverting output terminal, and a Non-inverting output terminal; at least one first ladder resistor coupled between the inverting input terminal and the positive input terminal; a first switch unit for controlling whether the at least one first ladder resistor is conducting, at least one first Two ladder resistors, coupled between the positive input terminal and the negative input terminal; 第14頁 1241765Page 14 1241765 —第二開關單元 導通; 用以控制該至少一 第二梯形電阻是否— The second switch unit is turned on; used to control whether the at least one second ladder resistor is 一=时:電阻1接於該差動運算放大器之該正相輸 出、與该反相輸入端之間;以及 二回授電阻,耦接於該差動運算放大器之該反相輸 出端與該正相輸入端之間。 5·如申請專利範圍第4項所述之差動放大電路,其中該至 少一第一梯形電阻為一r_2R電阻網路。 6·如申請專利範圍第5項所述之差動放大電路,其中該至 少一第二梯形電阻為-2R電阻網路。 7·如申請專利範圍第4項所述之差動放大電路,其中該至 少一第一與該至少一第二梯形電阻具有相同的等效電阻 值。 8·如申請專利範圍第7項戶斤述之差動放大電路,其中該第 一與第二回授電.阻具有相同的電阻值。 9.如申請專利範圍第4項所述之差動放大電路’其中藉由 控制該第一或該第二開關草元或兩者’以調整該差動放 大電路之增益。 H 一種可變增益之放大電絡,包括·· 一輸入端; 一運算放大号,且有/反相輸入端、耦接於一接地點 之-正相輸人端、輸出端; 一轉接於該反相輸入端與該輸入端間之電阻裝置’包 含:1 = hour: resistor 1 is connected between the non-inverting output of the differential operational amplifier and the inverting input terminal; and two feedback resistors are coupled between the inverting output terminal of the differential operational amplifier and the Between non-inverting inputs. 5. The differential amplifier circuit according to item 4 of the scope of patent application, wherein the at least one first ladder resistor is an r_2R resistor network. 6. The differential amplifier circuit according to item 5 of the scope of the patent application, wherein the at least one second ladder resistor is a -2R resistor network. 7. The differential amplifier circuit according to item 4 of the scope of the patent application, wherein the at least one first and the at least one second ladder resistance have the same equivalent resistance value. 8. The differential amplifier circuit described in item 7 of the scope of patent application, wherein the first and second feedback resistors have the same resistance value. 9. The differential amplifier circuit according to item 4 of the scope of patent application, wherein the gain of the differential amplifier circuit is adjusted by controlling the first or the second switching element or both. H A variable gain amplifier network, including: an input terminal; an operational amplifier number, and a / inverting input terminal, coupled to a ground point-normal phase input terminal and output terminal; a switch The resistor device between the inverting input terminal and the input terminal includes: 頁 1241765 六、申請專利範圍 一第一梯形電阻; 一第二梯形電阻;以及 一開關單元,係分別與該第一與該第二梯形電阻相 耦接,並分別控制該些梯形電阻是否導通;以及 一回授電阻,耦接於該運算放大器之該輸出端與該 反相輸入端之間。 11.如申請專利範圍第10項所述之放大電路,其中該些梯 形電阻為一 R - 2 R電阻網路。 1 2.如申請專利範圍第1 0項所述之放大電路,其中該第一 梯形電阻與該第二梯形電阻之級數不相同。 13.如申請專利範圍第10項所述之放大電路,其甲藉由控 制該開關單元,改變該放大電路之增益。Page 1241765 VI. Patent application scope: a first ladder resistor; a second ladder resistor; and a switch unit, which are respectively coupled to the first and second ladder resistors, and control whether the ladder resistors are conductive; A feedback resistor is coupled between the output terminal of the operational amplifier and the inverting input terminal. 11. The amplifying circuit according to item 10 of the scope of patent application, wherein the ladder resistors are an R-2 R resistor network. 1 2. The amplifier circuit according to item 10 of the scope of patent application, wherein the number of stages of the first ladder resistor and the second ladder resistor are different. 13. The amplifier circuit according to item 10 of the scope of patent application, wherein the gain of the amplifier circuit is changed by controlling the switch unit. 第16頁Page 16
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US11/148,132 US7102441B2 (en) 2003-12-31 2005-06-08 Variable gain amplifying circuit
US11/381,548 US7737772B2 (en) 2003-12-31 2006-05-04 Bandwidth-adjustable filter

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