CN203813749U - A Circuit Realizing DDS Amplitude Modulation Output - Google Patents
A Circuit Realizing DDS Amplitude Modulation Output Download PDFInfo
- Publication number
- CN203813749U CN203813749U CN201420213141.7U CN201420213141U CN203813749U CN 203813749 U CN203813749 U CN 203813749U CN 201420213141 U CN201420213141 U CN 201420213141U CN 203813749 U CN203813749 U CN 203813749U
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- China
- Prior art keywords
- dds
- dac
- latch
- output
- mcu
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- 238000000034 method Methods 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
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- 238000001228 spectrum Methods 0.000 description 1
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- Analogue/Digital Conversion (AREA)
Abstract
The utility model provides a circuit realizing DDS amplitude modulation output. The circuit comprises a MCU, a DDS, a DAC, and a resistor Rs. The circuit is characterized by comprising a latch, an input end of the latch is connected with the MCU through a parallel interface, and an output end of the latch is connected with an input end of the DAC through a parallel interface. The MCU buffers and controls variation of output voltage of the DAC through the latch, causing DAC full range current variation in the DDS sheet, and realizing amplitude modulation of the DDS. The circuit uses the DAC to realize amplitude modulation of DDS output signals, and modulation precision is high, and speed is fast.
Description
Technical field
The utility model relates to the signal amplitude modulation technique of electronic information field, particularly a kind of circuit of realizing the output of DDS am signals.
Background technology
DDS is Direct Digital synthesizer, has the advantages such as output frequency is easy to adjust, frequency resolution is high, change-over time is short, is widely used in using as signal generator in communication and instrument field.Conventionally the amplitude of signal generator output is to need continually varying, and sometimes needs to produce am signals.But owing to being subject to the restriction of performance index and complexity in circuits, commercial DDS chip itself does not have direct amplitude modulation(PAM) function.
For realizing the amplitude modulation(PAM) output of DDS, conventional method is at the additional variable-gain amplification circuit of DDS output at present, changes amplitude output signal by the change in gain of controlling amplifying circuit.This method is convenient to large-signal output, and for small-signal output, also needs to introduce attenuator, certainly will will increase corresponding control circuit, make circuit complexity raising, reliability decrease, and cost of manufacture further improves; More seriously,, after introducing amplifier, the noiseproof feature of signal also can obviously decline.
Summary of the invention
In order to overcome the shortcoming of above-mentioned technical problem, the utility model provides a kind of and has controlled flexibly, the DDS amplitude output signal modulation circuit of excellent performance.
The circuit of realizing DDS amplitude modulation(PAM) output of the present utility model, comprises microcontroller, for generation of the DDS of setpoint frequency signal, for controlling high-speed DAC and the resistance R of current mode DAC full scale electric current in DDS sheet
s, its special feature is: also comprise latch; The input of described latch is connected with MCU by parallel interface, and latch data output is connected to the data input pin of high-speed DAC by parallel interface; The analog voltage output contact resistance R of described high-speed DAC
sone end, R
sthe sheet of another termination DDS in current mode DAC full scale electric current pin " DAC R is set
set"; The output frequency of described MCU to DDS and the data of latch are controlled.Described high-speed DAC is operated in straight-through, the direct translative mode of data, and DDS amplitude output signal is changed fast with the input data of high-speed DAC, realizes amplitude modulation(PAM); Described resistance R
sfor limiting the numerical value that arranges of the interior DAC full scale electric current I of DDS sheet, avoid the excessive DDS of burning out because of I.
Beneficial effect of the present utility model is: between MCU and latch, adopt parallel interface connected mode between latch and high-speed DAC, high-speed DAC is operated in straight-through, the direct translative mode of data, make total-Mo short change-over time, can realize fast high accuracy amplitude modulation(PAM), avoid the situation that occurs that changes in amplitude lags behind; Latch is connected between MCU and high-speed DAC, by MCU and high-speed DAC isolation, avoid the clock of MCU and the impact of the data of variation at a high speed on DDS output signal spectrum performance, can reduce component and the amplitude of spurious signal, obtained comparatively pure output signal.
Brief description of the drawings
Accompanying drawing is electric theory diagram of the present utility model.
In figure: 1MCU, 2 Direct Digital Synthesizer DDS, 3 latchs, 4 high-speed DACs.
Embodiment
By reference to the accompanying drawings, the circuit of realizing the output of DDS amplitude modulation(PAM) of the present utility model, it comprises MCU (1), DDS (2), latch (3), high-speed DAC (4), resistance R
s, two load resistance RL of DAC in DDS sheet.Shown MCU is connected with DDS by serial line interface or parallel interface, is connected with latch input by parallel interface; The data output end of latch is connected with the parallel data input of high-speed DAC; Analog voltage output and the R of high-speed DAC
sbe connected, R
sthe other end be connected to " the DAC R of DDS
set" end.
MCU controls the signal frequency that DDS output needs, and the amplitude data of DDS output signal is written in latch; High-speed DAC is operated in straight-through, the direct translative mode of data, and the data transaction of in time latch being sent here becomes analog voltage, through resistance R
sin rear control DDS sheet, the full scale electric current I of village flow pattern DAC changes by setting rule, and then controls the output signal voltage amplitude of DDS, and am signals is IOUT, the output of IOUTB pin from DDS with balance mode.
Full scale electric current I and its reference voltage V of current mode DAC in DDS sheet
rEF, the outer high-speed DAC output voltage V of sheet
dACand resistance R
srelevant.The full scale Current calculation Coefficient m providing according to DDS databook, the expression formula that can obtain I is:
I＝m×(V
REF-V
DAC)/R
s…………(1)
By the analysis that circuit is carried out, DDS amplitude output signal V
outdetermined by following formula:
V
out＝I×R
L＝m×(V
REF-V
DAC)×R
L/R
s
Utilize the amplitude data that high-speed DAC is sent MCU here to convert high-precision analog voltage to, control the full scale curent change of DAC in DDS sheet with this, thereby accurately control the output signal voltage amplitude of DDS, realize amplitude modulation output; Be connected to the latch between MCU and high-speed DAC, by MCU and DAC isolation, reduced the impact of MCU on DDS quality of output signals, obtain comparatively pure output signal.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420213141.7U CN203813749U (en) | 2014-04-24 | 2014-04-24 | A Circuit Realizing DDS Amplitude Modulation Output |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420213141.7U CN203813749U (en) | 2014-04-24 | 2014-04-24 | A Circuit Realizing DDS Amplitude Modulation Output |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203813749U true CN203813749U (en) | 2014-09-03 |
Family
ID=51452446
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420213141.7U Expired - Fee Related CN203813749U (en) | 2014-04-24 | 2014-04-24 | A Circuit Realizing DDS Amplitude Modulation Output |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203813749U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104391142A (en) * | 2014-12-22 | 2015-03-04 | 永新电子常熟有限公司 | Novel convenient signal generator |
-
2014
- 2014-04-24 CN CN201420213141.7U patent/CN203813749U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104391142A (en) * | 2014-12-22 | 2015-03-04 | 永新电子常熟有限公司 | Novel convenient signal generator |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140903 Termination date: 20160424 |