TWI231595B - Substrate structure integrated with passive component - Google Patents
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1231595 五、發明說明(1) 【發明所屬之技術領域】 本發明係有關於一種可承置被動元件之半導體承載板 結構,尤指一種整合收納有多數被動元件於半導體構裝用 之承載板中之模組化結構。 【先前技術】 隨著電子產業的蓬勃發展,電子產品亦逐漸邁入多功 能、咼性能的研發方向。為滿足半導體裝置高積集度(1231595 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a semiconductor carrier board structure capable of supporting passive components, and more particularly to a carrier board that integrates and houses most passive components in a semiconductor structure. Modular structure. [Previous Technology] With the vigorous development of the electronics industry, electronic products have gradually entered the direction of multi-function and high-performance R & D. In order to meet the high accumulation degree of semiconductor devices (
Integration)以及微型化(Miniaturization)的封裝需 、電容 等被動 球柵陣 求’半導體裝置上之電子元件及電子電路之密度必須高集 積化’因此’為提昇或穩定電子產品的電性功能,即需在 半導體裝置上整合有例如電阻元件(Resist〇rs 元件(Capacitors)以及電感元件(inductors 元件(Passive component) 〇 以目别而吕’無論是覆晶式(Flip chip) 列式(BGA)、或者是以打線式(Wire bonding)為主之半 導體裝置,通常係先於基板表面形成有圖案化導電線路, 然後於封裝前將用於消除雜訊或作電性補償之被動元件加 入該基板,並將該等被動元件電性連接至半導體晶片,藉 此使得所封裝之半導體晶片符合電性特性之要求。 而一般習知技術係將該些被動元件安置於基板上未被 半導體晶片所佔據之多餘佈局面積上,如美國專利第 5, 6 9 6, 0 3卜5, 9 0 5, 6 3 9及6, 3 2 0, 75 7號等即為此種實施方 式。該等美國專利中係使用一高密度多晶片互連(High density multichip interconnect, HDMI)板作為夾置件Integration) and miniaturization (Miniaturization) packaging requirements, capacitors and other passive ball grid arrays to seek 'the density of electronic components and electronic circuits on semiconductor devices must be highly integrated'. It is necessary to integrate, for example, resistive elements (Capacitors) and inductors (Passive components) on the semiconductor device. ‘Either the flip chip type (BGA), Or semiconductor devices based on wire bonding are usually formed with patterned conductive lines on the surface of the substrate, and then passive components for eliminating noise or electrical compensation are added to the substrate before packaging. The passive components are electrically connected to the semiconductor wafer, so that the packaged semiconductor wafer meets the requirements of electrical characteristics. The conventional conventional technology is to place the passive components on a substrate and not occupied by the semiconductor wafer. In the area of extra layout, such as US Patent Nos. 5, 6 9 6, 0 3, 5, 9 0 5, 6 3 9 and 6, 3 2 0, 75 7 etc. Shi mode. U.S. Patent No. system using such a high-density multi-wafer interconnects (High density multichip interconnect, HDMI) as the plate member sandwiched
]7405 全懋.ptd] 7405 Full 懋 .ptd
ι·ι 第6頁 1231595 五、發明說明(2) (Interposer),以由該HDMI板夾設於被動元件(或主動 元件)與積體電路之間。 係利用基板區域以載接被動 印刷電路板之基板的佈局面 板來實施,如此將會使得整 導體封裝件高性能之要求, 遽增’而令該基板表面必須 大量被動元件,迫使封裝件 地複雜。 別接置至基板上,不僅造成 與製程之複雜性,更使得 雜度’而不合乎成本效益。 一者有損壞時,則整個裝置 製造成本之提高以及產品信 動元件阻礙該基板與多數銲 統上多將該等被動元件安置 片接置區域外之基板額外佈 之設置位置將縮小基板表面 接墊位置則將導致該等被動 佈局性限制問題並進一步滿 有人提出於多層電路板層間 美國專利第5, 683, 92 8及 i而,由於此種佈設方 元件,必須增加可選擇為一般 積,因而需要以較大尺寸之基 體之封裝尺寸較大。而隨著半 被動元件之佈設數量將相對地 同時容納多數半導體晶片以及 體積增大,也同時令製程更加 而且,該些被動元件係分 A加線路佈設(R 〇 u t a b i 1 i t y ) 整體之封裝製程具有較大之複 再者,若被動元件及基板其中 將報廢而無法使用,因而導致 賴性問題。 同時,為避免諸如該等被 接塾間之電性連結等問題,傳 於基板之角端位置或半導體晶 局面積上。惟,限定被動元件 線路佈局之靈活性,而考量輝 元件佈設數量受到侷限。 為避免習知電路板表面之 ^縮^電路板空間之需求,亦 女置膜狀被動元件之建議,如ι · ι Page 6 1231595 V. Description of the invention (2) (Interposer), the HDMI board is sandwiched between the passive component (or active component) and the integrated circuit. It is implemented by using the substrate area with a layout panel carrying a substrate of a passive printed circuit board. This will increase the high performance requirements of the entire conductor package, increasing the number of passive components on the substrate surface, forcing the complexity of the package. . Do not attach it to the substrate, which not only causes complexity with the process, but also makes the heterogeneity 'uneconomical. When one is damaged, the increase in the manufacturing cost of the entire device and the product's moving element hinder the substrate and most of the welding systems. The placement of additional substrates outside the area where the passive component placement sheets are placed will reduce the substrate surface The position of the pad will cause these passive layout restrictions and it will be further filled with U.S. Patent Nos. 5,683, 928 and i between multi-layer circuit board layers. Because of this layout element, it must be added as a general product. Therefore, the package size of the substrate with a larger size needs to be larger. As the number of semi-passive components will relatively accommodate most semiconductor wafers at the same time and increase in volume, it will also make the process more. At the same time, these passive components are divided into A and circuit layout (Routabi 1 ity) overall packaging process If it has a larger number of times, if the passive components and substrates are scrapped and cannot be used, it will lead to reliability problems. At the same time, in order to avoid problems such as the electrical connection between the connected terminals, it is transmitted to the corner position of the substrate or the semiconductor crystal area. However, the flexibility of the layout of the passive components is limited, and the number of Hui components is limited in consideration of the layout. In order to avoid the need for ^ shrinking ^ circuit board space on the surface of the circuit board, it is also recommended to place membrane passive components, such as
1231595 五、發明說明(3) 1 〇55, 15 1號等揭示在多層電路板製程中於 月·J ,先在一有機絕緣層表面以網印 、广成—新疊層 阻蝕刻(Photoresist-etching)等方 4 及 /或光 件。 寺方式形成電阻被動元 知電:板:::::板層間安置膜狀被動元件雖可避免羽 :路板表面之佈局性限制問題,但其製 避, :寸,因該被動元件係安置於於電路 ,、、禝雜, 同需求之如電阻值盥電$ i $ 运日,因此針對不 =疊該多層電路板=以::::心須重新設 之整合方式,將使得基板之整=张此種被動元件 |大之複雜度而不符合成本效益冓U需製程具有較 ,”:ΐ : ί現今電子產品要求多功能及高電性之趨I 一田持績追求半導體裝置上之 性之趨勢下 尚集積化時,現行之半導 電子電路之密度 ^之奢況。如何在=臨無法滿足此- 衣早兀及電子裝置中,以提昇電子彦1 :件於半導體封 不致影響該半導體封,單 : 之電性功能,而又 程與庫存成本之線路佈局性及製 【發明内容】 κ馮目則亟待解決之課題。 鑒於以上所述習知技術之 於提供一種可承置被動元丰導=明之主要目的在 簡單製程以整合收納有多承載板結構,利用— 載板中’俾供纟士人某柘 兀方;半導體構裝用之承 D基板及封裳製程而直接形成可作電 1231595 五、發明說明(4) -- 接之被動元件’以提供承載半導體之電性設計需求。 本發明之另一目的在於提供一種可節省製造成本之可 承置被動元件之半導體承載板結構。 本發明之再一目的在於提供一種可增加半導體封裝基 板線路佈局靈活性之可承置被動元件之半導體承載板^才^ 為達成上揭及其他目的,本發明之可承置被動元件之 半導體承載板結構係包括:一支承板,具有一上表面及一 相對之下表面;以及複數個被動元件,係設置於該支承板 之任一表面,並且形成有電極以供導通。另可於該支承板 之下表面接設有一散熱片,以提供較佳之散熱效率,俾將 半導體承載板結構模組化,以提供承載半導體之電性設古十 要求。 &。 5亥被動元件可遥擇以已製備完成之被動元件直接黏著 於該支承板之任一表面或該表面之凹部(Cavity)中,亦 或選擇以燒結被動元件材料及直接製成被動元件之任一方 式,於該支承板之任一表面或該表面之凹部中形成被動元 件。而形成於該被動元件上之電極則可選擇位於該被動元 件表面之同一側或不同側,端視該被動元件之類型及該類 型之被動元件設置於該支承板上之方式而定。 以陶瓷型被動元件而言,該陶瓷型被動元件係可藉由 表面黏著之方式上一層黏著層而黏著至該支承板上,或是 以燒結之方式黏著至該支承板上。當該支承板為金屬材T 時,該陶瓷型被動元件可設於該支承板之任〜表面或兮^1231595 V. Description of the invention (3) 1 055, 15 No. 1 and so on revealed that in the multi-layer circuit board manufacturing process, Yu J, first screen-printed on the surface of an organic insulating layer, Guangcheng-new stack resist etching (Photoresist- etching), etc. 4 and / or light. The method of forming a passive passive element is formed by the temple method. Although the placement of the membrane-shaped passive components between the layers can avoid the problem of layout restrictions on the surface of the board: the board is not installed because the passive components are installed. For the circuit, the hybrid, the same demand as the resistance value of the electric power $ i $ shipping day, so for not = stacking the multilayer circuit board = to :::: The integration method that must be reset will make the substrate Integral = a passive component of this kind | large complexity and not cost-effective 冓 U requires a relatively process, ": ΐ: ίThe current trend of electronic products requiring multi-function and high electrical properties Under the trend of accumulation, the current density of semiconducting sub-circuits is extravagant. How can this not be met in the near future-clothing and electronics and electronic devices to enhance electronics? Semiconductor package, single: electrical functions, circuit layout and manufacturing cost and inventory cost [Abstract] κ Feng Mu is an issue that needs to be solved. In view of the above-mentioned conventional technology, it can provide a passive passive device. Yuan Feng Dao = Ming Zhi The main purpose is to integrate the structure with multiple load-bearing plates in a simple process, and use it to directly form a carrier substrate for semiconductor fabrication and the fabrication process of semiconductor substrates. 4. Description of the invention (4)-The passive component is connected to provide electrical design requirements for carrying semiconductors. Another object of the present invention is to provide a semiconductor carrier board structure capable of supporting passive components that can save manufacturing costs. The present invention Another object is to provide a semiconductor carrier board capable of supporting passive components which can increase the flexibility of the circuit layout of the semiconductor package substrate. In order to achieve the disclosure and other purposes, the semiconductor carrier board structure capable of supporting passive components of the present invention The system includes: a support plate having an upper surface and a relatively lower surface; and a plurality of passive elements, which are arranged on any surface of the support plate and formed with electrodes for conduction. A heat sink is connected to the lower surface to provide better heat dissipation efficiency. The semiconductor carrier board structure is modularized to provide electricity for semiconductors. The requirements are set according to the ancient requirements. 5 Passive components can be remotely adhered to any surface of the support plate or Cavity on the surface of the passive component, or sintered passive components. Materials and any method of directly forming a passive component, forming a passive component on any surface of the support plate or a recess on the surface. The electrodes formed on the passive component can be optionally located on the same side of the surface of the passive component. Or different sides, depending on the type of the passive element and the way in which the type of passive element is arranged on the support plate. In the case of ceramic passive components, the ceramic passive components can be attached on the surface. An adhesive layer adheres to the support plate, or adheres to the support plate in a sintered manner. When the support plate is a metal material T, the ceramic-type passive element may be provided on any surface of the support plate or Xi ^
]7405 全懋.ptd 第9頁 1231595 五、發明說明(5) -- 面之凹部中,形成於該被動元件上之電極則可選擇位於該 被動元件表面之同一側或不同側;當該支承板為陶瓷支^ 板時,該陶瓷型被動元件可設於該支承板之任一表面或兮 表面之凹部中,但由於陶瓷支承板不能導電,故該陶究^ 被動元件之電極僅可選擇位於該被動元件表面之同_側。 以晶片型被動元件而言,該晶片型被動元件係可夢由 表面黏著之方式上一層黏著層而黏著至該支承板上。當今 支承板為金屬或陶瓷之任一材質時,該晶片型被動元件可 設於該支承板之任一表面或該表面之凹部中。 以直接形成被動元件材料至前述支承板上之被動元件 而言,該種被動元件係可設於該支承板之任一表面或該表 面之凹部中。當欲將被動元件材料直接形成至該支承板表 面上時’可塗佈一層被動元件材料’亦或藉由錢鍵( Sputtering)、電鍍(Electroplating)或化學氣相沉積 (Chemical vapor deposition)等方式沈積被動元件材、 料於該支承板上,並藉由圖案化製程以於該支承板上形成 所需之被動元件;當然亦可將被動元件材料直接形成於該 支承板之凹部中。其中,當該支承板為金屬材質時,此種 被動元件上之電極則可選擇形成於該被動元件表面之同一 側或不同側;當該支承板為陶瓷材質時,則僅可選擇位於 該被動元件表面之同一側。 ' 另可於該接置有被動元件之支承板上形成一絕緣層, 並於該絕緣層中形成有圖案化線路,俾使該圖案化線^得 以電性導接至接置於該支承板上之被動元件之電極,以提] 7405 全懋 .ptd Page 9 1231595 V. Description of the invention (5)-In the recess of the surface, the electrodes formed on the passive element can be selected on the same side or different sides of the surface of the passive element; when the support When the plate is a ceramic support plate, the ceramic passive component can be set in any surface or recess on the surface of the support plate, but since the ceramic support plate cannot conduct electricity, the electrodes of the ceramic passive component can only be selected Located on the same side of the surface of the passive element. In the case of a wafer-type passive component, the wafer-type passive component can be adhered to the support plate by an adhesive layer formed on the surface. When the support plate is made of any metal or ceramic material today, the wafer-type passive element can be provided on any surface of the support plate or a recess on the surface. In the case of a passive component that directly forms the passive component material to the aforementioned support plate, the passive component may be provided on any surface of the support plate or a recess on the surface. When the passive element material is to be formed directly on the surface of the support plate, 'a layer of passive element material can be coated' or by means of Sputtering, Electroplating, or Chemical Vapor Deposition, etc. The passive component material is deposited on the support plate, and a required passive component is formed on the support plate by a patterning process; of course, the passive component material can also be directly formed in the recess of the support plate. Wherein, when the supporting plate is made of metal, the electrodes on the passive element can be formed on the same side or different sides of the surface of the passive element. When the supporting plate is made of ceramic, only the passive plate can be selected. The same side of the component surface. '' Alternatively, an insulating layer may be formed on the supporting board on which the passive components are connected, and a patterned circuit is formed in the insulating layer, so that the patterned wire ^ can be electrically connected to the supporting board. Electrode of the passive component
1231595 五、發明說明(6) 供承載半導體之電性設計要求。此外,亦可於該絕緣層中 形成有至少一開口 ,以供接置有例如半導體晶片專電子元 件。 該支承板復可選擇於其中形成有一承載電子元件之開 口,並可於未設有被動元件之表面連設一散熱元件,使該 半導體承載板得以藉由該支承板上的被動元件調整其所供 承載半導體之電性設計,並藉由該散熱片提供半導體裝置 更佳之散熱效率,俾有效提升半導體裝置之電性與散熱性 功能。 由於本案之可承置被動元件之半導體承載板結構僅需 進行一簡單製程,即可將被動元件設置於可承置被動元件 之半導體承載板中。如此一來,可將被動元件直接形成於 半導體承載板,以提供承載半導體之電性設計需求,而且 可結合習知相關之支承板及封裝製程,將有形成被動元件 之支承板與電子元件、散熱元件等結合,不僅可應用現有 增層(Buiid_up)或疊層(Laminati〇n)等技術以堆疊一 層或多層電路結構’更可應用於球栅陣列式、覆晶式及打 線式之半導體封裝結構中。1231595 V. Description of the invention (6) Electrical design requirements for supporting semiconductors. In addition, at least one opening may be formed in the insulating layer for receiving electronic components such as semiconductor wafers. The support board can optionally have an opening for carrying electronic components formed therein, and a heat dissipation element can be connected to the surface without the passive element, so that the semiconductor carrier board can adjust its position by the passive element on the support board. Provides electrical design for carrying semiconductors, and provides better heat dissipation efficiency of semiconductor devices through this heat sink, effectively improving the electrical and heat dissipation functions of semiconductor devices. Since the semiconductor carrier board structure capable of supporting passive elements in this case only needs a simple process, the passive element can be set in the semiconductor carrier board capable of supporting passive elements. In this way, passive components can be directly formed on the semiconductor carrier board to provide the electrical design requirements for carrying the semiconductor, and combined with the related supporting board and packaging processes, there will be supporting boards and electronic components that form passive elements, With the combination of heat dissipation components, not only can existing technologies such as Buiid_up or Lamination be used to stack one or more layers of circuit structures. Structure.
因此,本案之可承置被動元件之半導體承載板結構, 製程簡易且可同時省去製造基板及封裝製程為配合形成被 動το件所需之製程’以解決習知技術之缺失,更因製程簡 化而可節省製造成本,俾使半導體封裝基板之線路佈局靈 活性提昇。 以下係藉由特定的具體實施例說明本發明之實施方式Therefore, the semiconductor carrier board structure that can accommodate passive components in this case has a simple manufacturing process and can simultaneously eliminate the need for manufacturing substrates and packaging processes to cooperate with the formation of passive το 'to solve the lack of known technology and simplify the process. It can save the manufacturing cost and increase the flexibility of the circuit layout of the semiconductor package substrate. The following is a description of specific embodiments of the present invention through specific embodiments.
17405 全懋.ptd 第1〗頁 1231595 五、發明說明(7) ,熟習此技藝之人 解本發明之其他優 具體實施例加以施 基於不同觀點與應 修飾與變更。 【實施方式】 以下之實施例 非以任何觀點限制 單說明,並非依實 實際尺寸,先予敘 請參閱第1 A至 之半導體承載板結 圖所示,係先提供 相對之下表面1 1 b £ 括有該支承板1 1以 1 1 a之被動元件1 3 5 於支承板1 1之上表 元件1 3接置於該支 士可由本說明書所揭示之内容輕易地瞭 點與功效。本發明亦可藉由其他不同的 行或應用,本說明書中的各項細節亦可 用’在不悖離本發明之精神下進行各種 係進一步詳細說明本發明之觀點,但並 本發明之範疇。又本發明之圖式僅為簡 際尺寸描緣,亦即未反應出相關構成之 明。 第1 G圖,係為本發明之可承置被動元件 構1第一實施例之剖面示意圖。如第1 A 一支承板11,其具有一上表面11 3及一 如第1 B圖所示,該承載板結構1主要包 及複數個設置於該支承板1 1之上表面 當然本發明之被動元件1 3並不以設置 面11 a為限,其亦可依實際需求將被動 承板11之下表面lib。 如第1 B圖所示,係選擇以已製備完成之被動元件1 3直 接黏著於該支承板1 1上。該被動元件1 3可選擇為表面黏著 式(Surface mounted technology,SMT)被動元件或晶 片型被動元件。其中該支承板之材質可為金屬或陶瓷。 於本實施例中,該被動元件1 3可選擇為諸如電容、電 阻或電感之被動元件1 3,並以例如表面黏著技術之方式固17405 Quan 懋 .ptd Page 1 1231595 V. Description of the invention (7), those skilled in the art understand other advantages of the present invention Specific embodiments are implemented based on different viewpoints and should be modified and changed. [Embodiment] The following examples are not limited to any single point of view and are not based on the actual size. Please refer to the semiconductor carrier board diagrams in Figures 1A to 1 for the relative lower surface first. The passive component 1 3 5 including the support plate 11 1 1 a is placed on the support plate 11 and the table component 13 is placed on the support plate. The content and the effect can be easily revealed by the contents disclosed in this manual. The present invention may also have other different behaviors or applications, and various details in this specification may also be used to carry out various systems without departing from the spirit of the present invention to further explain the viewpoint of the present invention in detail, but also the scope of the present invention. In addition, the drawings of the present invention are merely dimensional descriptions, that is, they do not reflect the relevant structure. Figure 1G is a schematic cross-sectional view of the first embodiment of the passive component structure 1 of the present invention. As shown in FIG. 1A, a supporting plate 11 has an upper surface 11 3 and, as shown in FIG. 1B, the supporting plate structure 1 mainly includes a plurality of supporting plates 11 and a plurality of surfaces provided on the supporting plate 11 of course. The passive component 13 is not limited to the setting surface 11a, and it can also lib the lower surface of the passive support plate 11 according to actual needs. As shown in FIG. 1B, the passive component 1 3 that has been prepared is selected to be directly adhered to the support plate 11. The passive component 1 3 can be a surface-mounted technology (SMT) passive component or a wafer-type passive component. The material of the support plate may be metal or ceramic. In this embodiment, the passive element 13 can be selected as a passive element 13 such as a capacitor, a resistor, or an inductor, and is fixed by, for example, a surface bonding technology.
17405 全懋.ptd 第12頁 1231595 五、發明說明(8) 設至該支承板11之上表面11 a上。如圖所示,該被動元件 1 3與該支承板11之間係以一層黏著層1 5彼此黏接,於該被 動元件1 3未與該支承板1 1黏接之表面上則形成有電極1 3 a 〇 其中,雖本實施例中係以形成於該被動元件1 3上表面 (即未與該支承板1 1黏接之表面)之電極1 3 a為例作說明 者,該電極1 3 a則係形成於該被動元件1 3之同側表面上, 但應注意的是,當該支承板11為金屬支承板時,此種被動 元件1 3上之電極1 3 a可選擇形成於該被動元件1 3表面之同 一側或不同側;當該支承板1 1之材質為陶瓷時,則僅可選 擇位於該被動元件1 3表面之同一側。因此,該電極1 3 a亦 可選擇形成於該被動元件1 3之不同側表面上,而非侷限於 本實施例中所述者。 此外,如第1 C圖所示,係於該支承板1 1上選擇接置有 陶瓷型被動元件1 3,其中該支承板之材質可為金屬或陶瓷 ,該被動元件1 3可選擇以諸如低溫共燒陶瓷(Low temperature cofired ceramic,LTCC)技術、高溫燒結 方式或其他適當技術而燒結(F us e)形成於該支承板1 1之 上表面 1 1 a上。 再者,於本實施例中,亦可以直接形成被動元件材料 至邊支承板1 1上’其中該支承板之材質可為金屬或陶曼, 該被動元件1 3係選擇設於該支承板1 1之上表面1 1 a上。當 欲將被動元件材料直接形成至該支承板1 1之上表面1 1 a上 時,可由塗佈一層被動元件材料於該支承板1 1之上表面1 1 a17405 懋 .ptd Page 12 1231595 V. Description of the invention (8) It is set on the upper surface 11 a of the support plate 11. As shown in the figure, the passive element 13 and the support plate 11 are adhered to each other with an adhesive layer 15. An electrode is formed on a surface of the passive element 13 that is not adhered to the support plate 11. 1 3 a 〇 Although the electrode 1 3 a formed on the upper surface of the passive element 13 (that is, the surface not bonded to the support plate 11) is taken as an example in this embodiment, the electrode 1 3 a is formed on the same side surface of the passive element 13, but it should be noted that when the support plate 11 is a metal support plate, the electrodes 1 3 a on the passive element 13 may be optionally formed on The same side or different sides of the surface of the passive element 13; when the material of the support plate 11 is ceramic, only the same side of the surface of the passive element 13 can be selected. Therefore, the electrodes 1 a may also be formed on different side surfaces of the passive element 13 instead of being limited to those described in this embodiment. In addition, as shown in FIG. 1C, a ceramic-type passive component 13 is selectively connected to the support plate 11. The material of the support plate may be metal or ceramic, and the passive component 13 may be selected such as A low temperature cofired ceramic (LTCC) technology, a high temperature sintering method, or other appropriate technology and sintering (Fus e) are formed on the upper surface 1 1 a of the support plate 1 1. Furthermore, in this embodiment, the passive component material can also be directly formed on the side support plate 1 1 ', wherein the material of the support plate may be metal or Taurman, and the passive component 1 3 is selected to be provided on the support plate 1 1 on the surface 1 1 a. When the passive element material is to be directly formed on the upper surface 1 1 a of the support plate 1 1, a layer of passive element material may be coated on the upper surface 1 1 a of the support plate 1 1
17405全懋.ptd 第13頁 1231595 五、發明說明(9) 後’藉由诸如曝光、蝕刻或雷射修整(Laser trimming) 等圖案化製程而形成所需之被動元件1 3於該支承板1丨之上 表面11 a °而且,當該支承板丨丨為金屬支承板時,此種被 動元件1 3上之電極1 3 a則可選擇形成於該被動元件1 3表面 之同一側或不同側;當該支承板11為陶瓷時,則僅可選擇 位於該被動元件1 3表面之同一側。 、 該被動元件1 3係可選擇以電阻材料、電容材料或電感 材料之被動元件材料所形成者。若該被動元件丨3為電2 ^ 件’則使用遥自係如銀粉(S i 1 v e r ρ 〇 w d e r )或'碳顆粒 (Carbon part i cl e)散布於樹脂中,氧化釕(Ru^)'與 玻璃粉末散布在一黏結劑(Binder)塗佈再固化而^成/, 或如鎳鉻(Ni-Cr)、鎳磷(Ni-P)、鎳錫(Ni—Sn)"、鉻 鋁(Cr-A1)、及氮化鈦(TaN)合金等電阻材料,而將^ 電阻材料沈積形成於該支承板丨丨之上表面丨丨a上。 、以 若該被動元件1 3為電容元件,則可使用選自介電常數 大之而介電電容材料。此種高介電電容材料係由諸如言八 子材料、、陶瓷材料、陶瓷粉末填充之高分子及類似材二了 可例如為鈦酸鋇(β a r i u m — t i t a n a t e )、鈦酸鍅金L ' (Lead-Zirc0nate —titanate)、無定形氫化碳(⑽$ hydrogenated carbon)、或其粉末散佈於黏結劑(Binder )或欽酸銘鋇(Barium strontium titanate )以塗佈形 成厚膜電容材料或以化學氣相沉積(CVD)形成薄膜電六/ 材料,於該支承板1 1之上表面1 1 3上。 I谷 若該被動元件1 3為電感元件,首先形成一敕磁性膜於 1231595 五、發明說明(10) 一導電fg層之表面上一螺旋型線圈,該軟磁性膜可以濺鍍 、旋塗(spin coating)或印刷等方式形成。係如錳—鋅鐵 氧磁體(Mn-Zn ferrite)、鎳-猛〜鋅鐵氧磁體(Ni_Mn — Zn ferrite)或四氧化二鐵(magnetite)等,可以被滅鑛沈積 (sputter-depos i ted);而添加以鐵氧磁體—樹脂膏材 (ferrite-res in paste)則可以印刷方式沈積。其中該 鐵氧磁體-樹脂膏材可為猛-鋅鐵氧磁體(Μ n — z n f e r r i t e ) 私末政佈在树脂中者。可以錢鍵、旋塗(Spin coating)或 印刷等方式形成。係如錳-辞鐵氧磁體(Μ n — z n f e r r i t e )、 鎳-锰-鋅鐵氧磁體(Ni-Mn-Zn ferrite)或四氧化三鐵 (magnetite)等’可以被錢鍵沈積(sputter-deposited ),而添加以鐵氧磁體-樹脂貧材(ferrite_resin paste )則可以印刷方式沈積。其中該鐵氧磁體-樹脂膏材可為 锰-鋅鐵氧磁體(Mn-Zn ferrite)粉末散佈在樹脂中者。 再利用一有機絕緣層作為黏著層將上述螺旋型線圈形成於 該支承板11表面。 以上’於該支承板丨丨表面直接作出該被動元件丨3之技 術手段係為習知者,於此不再予贅述。 上述陶瓷燒結型與直接形成被動元件之電極位置,與 該支承板之材質有關,當該支承板11之材質為陶瓷時,僅 可遥擇位於该被動元件1 3表面之同一側’如第1 C圖所示’ 當該支承板1 1為金屬支承板時,此種被動元件1 3上之電極 1 3 a可選擇形成於該被動元件1 3表面之同一側(如第1 C圖 所示)或不同側(如第1D圖所示)。17405 全懋 .ptd Page 13 1231595 V. Description of the invention (9) After the 'passive components' are formed by a patterning process such as exposure, etching or laser trimming 1 3 on the support plate 1丨 the upper surface 11 a °, and when the support plate 丨 丨 is a metal support plate, the electrode 1 3 a on the passive element 13 can be formed on the same side or different sides of the surface of the passive element 13 ; When the supporting plate 11 is ceramic, it can only be selected on the same side of the surface of the passive component 13. 1. The passive component 1 3 is a passive component material that can be selected from resistive, capacitive or inductive materials. If the passive element 3 is an electric 2 ^ piece, then use a remote system such as silver powder (S i 1 ver ρ 〇wder) or 'carbon particles (Carbon part i cl e) dispersed in the resin, ruthenium oxide (Ru ^) 'Spread with glass powder in a binder (Binder) and then solidify to form /, or such as nickel-chromium (Ni-Cr), nickel-phosphorus (Ni-P), nickel-tin (Ni-Sn) ", chromium Resistive materials such as aluminum (Cr-A1) and titanium nitride (TaN) alloys are deposited on the upper surface of the support plate 丨 丨 a. If the passive element 13 is a capacitor element, a dielectric capacitor material selected from a group having a large dielectric constant may be used. Such high-dielectric capacitor materials are made of polymers such as yanbazi materials, ceramic materials, ceramic powders, and the like. They may be, for example, barium titanate (β arium — titanate), osmium titanate L '(Lead -Zirc0nate —titanate), amorphous hydrogenated carbon, or its powder is dispersed in a binder (Binder) or barium strontium titanate to form a thick film capacitor material or chemical vapor phase Deposition (CVD) forms a thin film electrical material on the upper surface 1 1 3 of the support plate 1 1. If the passive element 13 is an inductive element, first a magnetic film is formed on 1231595 V. Description of the invention (10) A spiral coil is formed on the surface of a conductive fg layer. The soft magnetic film can be sputtered and spin-coated ( spin coating) or printing. Series such as Mn-Zn ferrite, Ni-Mn-Zn ferrite or magnetite, etc., can be sputter-deposited ); And ferrite-resin paste (ferrite-res in paste) added can be deposited by printing. The ferrite magnet-resin paste may be a ferrite-zinc ferrite magnet (M n — z n f r r i t e). It can be formed by money key, spin coating or printing. Departments such as manganese-ferrite magnets (Mn-znferrite), nickel-manganese-zinc ferrite magnets (Ni-Mn-Zn ferrite) or ferric oxide (magnetite), etc. can be sputter-deposited ), And ferrite magnet-resin paste (ferrite_resin paste) can be deposited by printing. The ferrite magnet-resin paste may be a Mn-Zn ferrite powder dispersed in the resin. The above-mentioned spiral coil is formed on the surface of the support plate 11 by using an organic insulating layer as an adhesive layer. The technical means for directly making the passive element 3 on the surface of the support plate 丨 is known, and will not be repeated here. The above ceramic sintering type is related to the position of the electrode directly forming the passive element, which is related to the material of the support plate. When the material of the support plate 11 is ceramic, it can only be remotely located on the same side of the surface of the passive element 13 as in the first As shown in Figure C ', when the support plate 11 is a metal support plate, the electrodes 1 3 a on the passive element 13 may be formed on the same side of the surface of the passive element 13 (as shown in Figure 1C). ) Or different sides (as shown in Figure 1D).
17405 全懋.ptd 第15頁 1231595 五、發明說明(11) 如1 E至1 G圖所不’本發明之被動元件1 3並不以設置於 支承板1 1之表面為限,其亦可依實際需求將被動元件1 3接 置於該支承板1 1之表面凹部Π 〇。 本發明之可承置被動元件之半導體承載板結構係包括 一金屬或陶瓷支承板11以及複數個形成於該支承板中之被 動元件1 3。其中於該支承板1 1之上表面1 1 a係形成有複數 個凹部1 1 0,而該被動元件1 3可為電容元件、電阻元件或 電感元件,並且可選擇形成於該凹部11 0中。形成於該凹 部1 1 0中之被動元件1 3係可藉由表面黏著技術(如第丨£圖 所示),燒結技術或直接形成方式(如第1 F圖所示)。當 欲將被動元件材料直接埋設至該支承板1 1表面之凹部丨i 〇 中時,係可利用例如電鍍、化學氣相沉積或塗佈等方式將 被動元件材料埋於該支承板1 1表面之凹部1 1 〇中,以於該 凹部1 1 0中形成所需之被動元件。 當然,形成於該被動元件1 3上之電極1 3 a亦可選擇形 成於該被動元件1 3之同一側或不同側上,端視該支承板1 1 之類型而定,當該支承板1 1為金屬支承板時,此種被動元 件1 3上之電極丨3a則可選擇形成於該被動元件1 3表面之同 一側(如第1F圖所示)或不同側(如第1G圖所示);當該 支承板1 1為陶瓷支承板時,則僅可選擇位於該被動元件i 3 表面之同一側(如第1 F圖所示),而非侷限於本實施例中 所述者。 如此一來,僅需進行一簡單製程即可將如電阻、電容 元件或電感元件等被動元件1 3整合於供半導體構裝用之支17405 Quan 懋 .ptd Page 15 1231595 V. Description of the invention (11) As shown in 1 E to 1 G, the passive component 1 3 of the present invention is not limited to the surface provided on the support plate 1 1, and it may be According to actual requirements, the passive element 13 is connected to the surface recess Π 0 of the support plate 11. The semiconductor carrier board structure capable of receiving passive components of the present invention includes a metal or ceramic support plate 11 and a plurality of driven components 13 formed in the support plate. Wherein, a plurality of recesses 1 1 0 are formed on the upper surface 1 1 a of the support plate 11, and the passive element 13 may be a capacitor element, a resistance element or an inductance element, and may be formed in the recess 11 10. . The passive components 1 3 formed in the recess 1 10 can be formed by surface adhesion technology (as shown in Fig. 丨), sintering technology or direct formation (as shown in Fig. 1 F). When the passive component material is to be directly buried in the recess 丨 i 〇 on the surface of the support plate 11, the passive component material can be buried in the surface of the support plate 11 by using methods such as electroplating, chemical vapor deposition or coating. In the recessed part 1 10, a desired passive element is formed in the recessed part 1 10. Of course, the electrodes 1 3 a formed on the passive element 13 may also be formed on the same side or different sides of the passive element 13. The end depends on the type of the support plate 1 1. When 1 is a metal support plate, the electrodes on the passive element 13 3a can be formed on the same side (as shown in FIG. 1F) or different sides (as shown in FIG. 1G) of the passive element 13 surface. ); When the support plate 11 is a ceramic support plate, it can only be selected on the same side of the surface of the passive element i 3 (as shown in FIG. 1F), and is not limited to the one described in this embodiment. In this way, only a simple process is needed to integrate passive components such as resistors, capacitors or inductive components into the support for semiconductor packaging.
17405 全懋.ptd 第16頁 1231595 五、發明說明(12) 承板11中’而可直接形成作為電性導接之被動元件1 3。隨 後,更可應用現有增層或疊層等技術以堆疊一層或多層電 路結構,並將此可承置被動元件之半導體承載板結構1可 應用於球栅陣列式、覆晶式及打線式之半導體封裝結構中 〇 此外’亦可在該支承板未接置有被動元件之表面,黏 著一散熱片(未圖示),以提升後續半導體構裝之散熱效 率。 請參閱第2A至第2F圖以及第2A,至第2F’圖,係為本發 明之可承置被動元件之半導體承載板結構第二實施例之剖 面示意圖。 如第2A至第2C圖所示,本發明第二實施例之可承置被 動元件之半導體承載板結構與第一實施例所揭示者大致相 同,其不同處係在該支承板11表面接置有被動元件1 3後, 再於該承置有被動元件1 3之支承板1 1上形成一絕緣層2 0, 並可利用圖案化製程以在該絕緣層中形成有圖案化線路結 構2 1,並使該線路結構2 1得以電性導通至該被動元件1 3之 電極1 3a。其中,該絕緣層2 0之材質可為有機材質、纖維 強化(F i b e r _ r e i n f 〇 r c e d )有機材質或顆料強化(P a r t i c 1 e -r e i n f o r c e d)有機材質等所構成,例如瓖氧樹脂(E ρ ox y r e s i n)聚乙醯胺(Po 1 y i m i d e)、順雙丁稀二酸醯亞胺/ 三氮拼(Bismaleimide triazine-based)樹脂、氣酉曰 (C y a n a t e e s t e r)等。該線路結構2 1之製作,可先於該 絕緣層2 0上形成一金屬導電層,例如為一銅層,復利用触17405 Quan 懋 .ptd Page 16 1231595 V. Description of the invention (12) In the support plate 11 ', a passive element 13 which is an electrical conduction can be directly formed. Subsequently, it is possible to apply existing technologies such as layering or stacking to stack one or more layers of circuit structures, and the semiconductor carrier board structure 1 that can support passive components can be applied to ball grid array, flip chip and wire bonding In the semiconductor package structure, in addition, a heat sink (not shown) may be adhered to the surface of the support plate where passive components are not connected, so as to improve the heat dissipation efficiency of subsequent semiconductor structures. Please refer to Figs. 2A to 2F and Figs. 2A to 2F ', which are schematic cross-sectional views of the second embodiment of the semiconductor carrier board structure capable of supporting passive components according to the present invention. As shown in FIGS. 2A to 2C, the structure of the semiconductor carrier plate capable of supporting passive components in the second embodiment of the present invention is substantially the same as that disclosed in the first embodiment, and the difference is that the support plate 11 is connected on the surface. After the passive component 13 is provided, an insulating layer 20 is formed on the support plate 11 on which the passive component 13 is housed, and a patterning process can be used to form a patterned circuit structure 2 1 in the insulating layer. And enable the circuit structure 21 to be electrically connected to the electrode 13a of the passive element 13. Wherein, the material of the insulating layer 20 may be composed of organic materials, fiber-reinforced organic materials, or organic materials reinforced (P artic 1 e-reinforced), such as ethoxy resin (E ρ ox yresin) Po 1 yimide, cis-butyric acid diimide / Bismaleimide triazine-based resin, C yanateester and so on. The circuit structure 21 can be manufactured by forming a metal conductive layer, such as a copper layer, on the insulating layer 20, and reusing the contacts.
Π405 全懋.ptd 第17頁 1231595 五、發明說明(13) 〜--- 刻技術升y成線路圖案化之線路層,該線路層亦可利用電 鍍方法於圖案化之電鍍阻層中形成細緻電路,此外,該線 路…構非以層為限。該支承板1 1可為金屬或陶瓷材料, ^被動it件1 3則可以黏著、燒結或直接作成等方式形成於 其表面。 、如第2A至第2C’圖所示之可承置被動元件之半導體承 載板結構’係與第2A至第2C圖所揭示者大致相同,其不同 處僅在該絕緣層2 〇中形成有至少一開口 2 2,並使該支承板 11得以封閉住該絕緣層開口 2 2之一側,俾得提供後續於該 絕緣層開口 2 2中安置有例如半導體晶片等電子元件。其中 4支承板1 1可為金屬或陶瓷材料,且被動元件丨3則可以黏 著、燒結或直接作成等方式形成於其凹部u 〇中。 如第2 D至第2F圖所示之可承置被動元件之半導體承載 板結構,同樣地與第一實施例所揭示者大致相同,其不同 處係在該支承板1 1之上表面1 1 a形成有複數個凹部1 1 〇,以 將被動元件1 3選擇形成於該凹部Π 〇中後,再於該承置有 被動元件之支承板11表面上形成一絕緣層2 0,並可利用圖 案化製程以在該絕緣層中形成有圖案化線路結構2 1,並使 該線路結構2 1得以電性導通至該被動元件1 3之電極1 3 a。 如第2D,至第2F,圖所示之可承置被動元件之半導體承 載板結構,係與2D至第2F圖所揭示者大致相同,复兀円# , 日日 +问處 僅在該絕緣層2 0中形成有至少一開口 2 2,並使該支承板工 得以封閉住該絕緣層開口 2 2之一側,俾得提供後續於今# 緣層開口 2 2中安置有例如半導體晶片等電子元件。f二'% 具中該Π405 全懋 .ptd Page 17 1231595 V. Description of the invention (13) ~ --- The engraving technology is used to form a circuit patterned circuit layer. This circuit layer can also be formed in a patterned plating resist layer by electroplating. Circuit, in addition, the circuit ... structure is not limited to layers. The support plate 11 may be a metal or ceramic material, and the passive it member 13 may be formed on the surface by means of adhesion, sintering, or direct fabrication. 2. The structure of the semiconductor carrier plate capable of supporting passive components as shown in FIGS. 2A to 2C ′ is substantially the same as that disclosed in FIGS. 2A to 2C, and the difference is only formed in the insulating layer 20. At least one opening 22 allows the support plate 11 to close one side of the insulating layer opening 22, so that an electronic component such as a semiconductor wafer or the like is disposed in the insulating layer opening 22 afterwards. Among them, 4 support plates 11 may be metal or ceramic materials, and passive components 丨 3 may be formed in the recess u 〇 by means of adhesion, sintering, or direct fabrication. As shown in FIGS. 2D to 2F, the structure of the semiconductor carrier plate capable of receiving passive components is similar to that disclosed in the first embodiment, and the difference lies on the upper surface 1 1 of the support plate 1 1 a is formed with a plurality of recesses 1 1 0, so that the passive element 13 is selectively formed in the recesses Π 0, and then an insulating layer 20 is formed on the surface of the support plate 11 on which the passive elements are placed, and can be used A patterning process is performed to form a patterned circuit structure 21 in the insulating layer, and the circuit structure 21 can be electrically conducted to the electrode 1 3 a of the passive element 13. As shown in Figures 2D to 2F, the structure of the semiconductor carrier board that can accommodate passive components shown in the figure is roughly the same as that disclosed in Figures 2D to 2F. Fu Wu 円 #, 日 日 + 问 处 is only in the insulation At least one opening 22 is formed in the layer 20, and the support panel worker can close one side of the insulating layer opening 22, so as to provide subsequent electrons such as semiconductor wafers and the like in the edge opening 2 2 element. f 2 '% with the
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1231595 五、發明說明(14) 支承板11可為金屬或陶瓷材料,且被動元件1 3則可以黏著 、燒結或直接作成等方式形成於其凹部11 〇中。 此外,亦可在該支承板未接置有絕緣層之表面,黏著 一散熱片(未圖示),以提升後續半導體構裝之散熱效率 〇 請參閱第3 A至第3 F圖,係為本發明之可承置被動元件 之半導體承載板結構第三實施例之剖面示意圖。 如第3 A至第3 C圖所示,本發明第三實施例之可承置被 動元件之半導體承載板結構與第一實施例所揭示者大致相 同,其不同處係在該支承板1 1中形成至少一開口 1 1 1,俾 供後續得以容置有電子元件,另於該支承板1 1表面上亦得 利用黏著、燒結或直接作成等方式接置有多數被動元件i 3 ,且當該支承板11為金屬材質,該被動元件1 3上之電極 1 3a則可選擇形成於該被動元件1 3表面之同一側或不同側 〇 如第3 D至第3 F圖所示之可承置被動元件之半導體承載 板結構,同樣地與第一實施例所揭示者大致相同,其不同 處係在該支承板1 1中形成至少一開口 1 1 1,俾供後續得以 容置有電子元件,另於該支承板1 1上形成多數可供接置有 被動元件1 3之凹部1 1 〇。其中該支承板1 1可為金屬或陶竟 材料,且被動元件1 3則可以黏著、燒結或直接作成等方式 形成於該凹部1 10中。 請參閱第4A至第4F圖,係為本發明之可承置被動元件 之半導體承載板結構第四實施例之剖面示意圖。1231595 V. Description of the invention (14) The support plate 11 may be a metal or ceramic material, and the passive component 13 may be formed in the recessed portion 11 by being adhered, sintered, or directly made. In addition, a heat sink (not shown) can be adhered to the surface of the support plate where the insulating layer is not connected to improve the heat dissipation efficiency of subsequent semiconductor structures. Please refer to Figures 3A to 3F, which are A schematic cross-sectional view of a third embodiment of a semiconductor carrier board structure capable of supporting passive components according to the present invention. As shown in FIGS. 3A to 3C, the structure of the semiconductor carrier plate capable of receiving passive components in the third embodiment of the present invention is substantially the same as that disclosed in the first embodiment, and the difference lies in the support plate 1 1 At least one opening 1 1 1 is formed in the opening, so that electronic components can be accommodated later, and on the surface of the supporting plate 1 1, most passive components i 3 must be connected by means of adhesion, sintering or direct production, and when The support plate 11 is made of metal, and the electrodes 1 3a on the passive element 13 can be formed on the same side or different sides of the surface of the passive element 13 as shown in FIGS. 3D to 3F. The structure of the semiconductor carrier board with the passive components is similar to that disclosed in the first embodiment. The difference is that at least one opening 1 1 1 is formed in the support plate 1 1 so that electronic components can be accommodated in the subsequent steps. In addition, a plurality of recessed portions 1 1 0 are formed on the support plate 11 for receiving the passive elements 13. The support plate 11 may be made of metal or ceramic material, and the passive element 13 may be formed in the recess portion 10 by means of adhesion, sintering, or direct fabrication. Please refer to FIGS. 4A to 4F, which are schematic cross-sectional views of a fourth embodiment of a semiconductor carrier board structure capable of supporting passive components according to the present invention.
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第19頁 1231595 五、發明說明(15) 如第4A至第4C圖所示,本發明第四實施例之可承置被 動元件之半導體承載板結構與第三實施例所揭示者大致相 同,其不同處係在該支承板1 1中形成至少一開口 1 11,並 於該支承板1 1上未設置有被動元件1 3之一側以一黏著層3 1 接置有一散熱片3 0,俾使該散熱片3 0得以封閉住該支承板 開口 1 1 1之一側,以供後續將至少一例如半導體晶片等電 子元件得以直接接置於該散熱片30上並收納於該支承板i i 之開口 111内。其中,該支承板11可為金屬或陶瓷材料, 且被動元件1 3則可以黏著、燒結或直接作成等方式形成於 其表面,此外,若該支承板11為金屬時,係可與該散熱片 3 0—體成型,且該散熱片3 0之結構並非以本實施例中所示 者為限,其他例如形成有鰭片以增加散熱面積之散熱片亦 可適用於本發明中。 如第4D至第4F圖所示之可承置被動元件之半導體承載 板結構,同樣地與第三實施例所揭示者大致相同,其不同 處係在該支承板11中形成至少一開口 111,並於該支承板 11上形成多數可供接置有被動元件1 3之凹部11 0,且於該 支承板1 1上未設置有被動元件1 3之一側接置有一散熱片3 0 ,俾使該散熱片3 0得以封閉住該支承板開口 1 1 1之一側, 以供後續將至少一例如半導體晶片等電子元件,得以直接 接置於該散熱片3 0上並收納於該支承板1 1之開口内。其中 該支承板1 1可為金屬或陶瓷材料,且被動元件1 3則可以黏 著、燒結或直接作成等方式形成於該凹部11 0中。 由於本發明之可承置被動元件之半導體承載板結構1Page 19, 1231595 V. Description of the invention (15) As shown in FIGS. 4A to 4C, the structure of the semiconductor carrier plate capable of supporting passive components in the fourth embodiment of the present invention is substantially the same as that disclosed in the third embodiment, At different places, at least one opening 11 is formed in the support plate 11 and a side of the support plate 11 is not provided with a passive element 13 and a heat sink 30 is connected with an adhesive layer 3 1. Allow the heat sink 30 to close one side of the opening 1 1 1 of the support plate, so that at least one electronic component such as a semiconductor wafer can be directly connected to the heat sink 30 and stored in the support plate ii. Inside the opening 111. The support plate 11 may be made of metal or ceramic material, and the passive component 13 may be formed on the surface by means of adhesion, sintering, or directly made. In addition, if the support plate 11 is metal, the support plate 11 may be connected to the heat sink. 30-body molding, and the structure of the heat sink 30 is not limited to those shown in this embodiment. Other heat sinks such as fins formed to increase the heat dissipation area can also be applied in the present invention. As shown in FIGS. 4D to 4F, the structure of the semiconductor carrier plate capable of receiving passive components is similar to that disclosed in the third embodiment, and the difference is that at least one opening 111 is formed in the support plate 11, A plurality of recessed portions 11 0 are formed on the support plate 11 to which passive components 13 can be connected, and a heat sink 3 0 is connected to one side of the support plate 11 without passive components 13. The heat sink 30 can close one side of the opening 1 1 1 of the support plate, so that at least one electronic component such as a semiconductor wafer can be directly connected to the heat sink 30 and stored in the support plate. 1 inside the opening. The support plate 11 may be a metal or ceramic material, and the passive element 13 may be formed in the recess 110 by means of adhesion, sintering, or direct fabrication. Because of the semiconductor carrier board structure capable of bearing passive components of the present invention 1
17405全懋.ptd 第20頁 1231595 五、發明說明(16) 不僅可整合該被動元件1 3,更可連接該散熱片3 0,以同時 整合禮被動元件13、散熱片30、以及電子元件(未圖示), 提供該電子元件適當之遮蔽效果(Shielding),使該電子 元件免受外界之電磁干擾(Electromagnet interference: Ε Μ I) ’更可在現今電子產品要求多功能及高電性之趨勢 下,提供有效數量之被動元件1 3與諸多半導體晶片等電子 元件於半導體構裝結構中。 以上所述者’僅為本發明之具體實施例而已,然本發 明並不受該實施例之限制應屬自明之事,亦即,本發明事 其他改變。再者,本發明亦可任意整合前述之 ^ ^1^2例如可在該支承板之上表面或其凹部内接置 有被動兀件,並可於盆卜形士、 緣Μ,日# # & 其形成一具有圖案化線路結構之絕 、’曰 使"玄線路結構得以電性導拉5兮姑私-从> + α ,當然另可為# + 包『玍蜍接至邊被動兀件之電極 …、 支承板之下表面再接置有一散埶g ,曰二方 絕緣層或支承板中孫 g 置有政…片且该 成一收納空間。“ I擇性開設有至少一開口,藉以形 本"韻"明之^ I % 免習知於多層電敗f f2件之半導體承載板結構係可避 繁瑣,以及習知枯反^ ^安置膜狀被動元件所導致之製程 值等電性特性時付:’’、*應不同設計需求之電阻值與電容 造成之製造成本大:::重新設計、,疊該多層電路板所 本增加等問題,提: 物料管理困擾、及材料庫存成 體封裝基板與印刷ς f針對所需電子裝置(例如半導 電性設計後再與—: 之電性功能,事先完成所需之 曰或夕層線路結構結合,並可承載諸如17405 全懋 .ptd Page 20 1231595 V. Description of the invention (16) Not only can the passive element 1 3 be integrated, but also the heat sink 30 can be connected to integrate the passive element 13, the heat sink 30, and the electronic component ( (Not shown), to provide the electronic component with appropriate shielding effect (Shielding), to protect the electronic component from external electromagnetic interference (Electromagnet interference: Ε Μ I) Under the trend, an effective number of passive components 13 and many electronic components such as semiconductor wafers are provided in a semiconductor package structure. The above 'are only specific embodiments of the present invention, but the present invention is not limited by this embodiment and should be self-evident, that is, the present invention is subject to other changes. Furthermore, the present invention can also arbitrarily integrate the aforementioned ^ ^ 1 ^ 2. For example, a passive element can be placed on the upper surface of the support plate or in a recess thereof, and can be used in pots, margins, and ## & It forms a patterned circuit structure, and the "metastatic line structure" can be electrically conductive. From the > + α, of course, it can also be a # + package "玍 Toad to the edge" The electrodes of the passive element ..., the lower surface of the supporting plate is connected with a scattered g, said that the two-sided insulating layer or the supporting plate of the supporting plate is provided with a political ... piece, and should be a storage space. "I selectively have at least one opening, so that the form of" Rhyme "Ming I ^ I% free from the semiconductor carrier board structure of multi-layer electrical failure f f2 pieces can avoid tedious, and the conventional ^ ^ placement The electrical characteristics such as the process value caused by the film-like passive component are paid at the time: '', * The manufacturing cost caused by the resistance value and capacitance according to different design requirements is large :: redesign, increase the cost of stacking the multilayer circuit board, etc. Questions: Material management problems, material packaging, and package substrates and printing. For the electrical functions required (for example, semi-conducting design, and-) electrical functions, complete the required circuit in advance. Structural combination and can carry
1231595 五、發明說明(17) 晶片之電子元件於其中以縮小 者,本發明之可承置被動元# 應用金屬支承板,亦可應用於 用簡單製程以整合收納有多數 被動元件於該支承板中,俾# 形成可作電性導接之被動元件 之電性設計。 因此,本發明之可承置被 可解決習知技術中限定被動元 所造成之種種問題,而$視、線 性的設置位置及佈設數量。同 件之半導體承載板結構更^Γ應、 打線式之半導體封裝結構中’ 元及電子裝置之線路佈局性° 此外,雖於上述實施例中 元件為例作說明者,但須〉主意 載複數個電子元件,該被動元 需要作改變,而非以上述實施 承板兩端部之被動元件者為限 阻元件及電容元件表示’實際 數目以及相對位置,係依實際 上述具體實施例所限定者。換 性說明本發明之原理及其功效 何熟習此技藝之人士均可在不 半導體封裝基板之尺寸。再 之半導體承載板結構不僅可 陶瓷支承板。換言之,可利 如電陴、電容或電感元件等 結合基板及封裝製程而直接 ,以完成其所供承載半導體 動元件之半導體承載板結構 件之設置位置及佈設數量等 路佈扃或其他需要來提供彈 時,本發明之可承置被動元 用於球柵陣列式、覆晶式及 而不致影響該半導體封裝單 係以該支承板承載一個電子 的是,該支承板亦可用以承 件之設置位置與數量亦得視 例中所顯示之兩個設於該支 。先前圖式中僅以部分之電 上該電阻元件與電容元件之 製程所需而加以設計而非為 言之,上述實施例僅為例示 ,而非用於限制本發明。任 違背本發明之精神及範轉下1231595 V. Description of the invention (17) Where the electronic components of the chip are reduced, the passive element of the present invention can be applied with a metal support plate. It can also be used to integrate and accommodate most passive components on the support plate with a simple process. In the middle, 俾 # forms the electrical design of the passive components that can be electrically connected. Therefore, the present invention can be used to solve various problems caused by the limitation of passive elements in the conventional technology, and the position and number of linear and linear settings. The structure of the same semiconductor carrier board is more suitable, and the circuit layout of the electronic device in the wire-type semiconductor package structure ° In addition, although the component is described as an example in the above embodiment, the idea must be plural Electronic components, the passive element needs to be changed, instead of using the passive components at the two ends of the implementation board as the limiting element and the capacitive element to indicate the 'actual number and relative position, which are limited by the actual specific embodiment . In order to explain the principle of the present invention and its effects, anyone skilled in the art can use the size of a semiconductor package substrate. Furthermore, the structure of the semiconductor carrier board can not only be a ceramic support board. In other words, it can be directly combined with the substrate and packaging process, such as electric capacitors, capacitors or inductive components, to complete the layout and number of semiconductor carrier board structural components provided by it to carry semiconductor dynamic components, or other needs. When a bomb is provided, the passive element of the present invention can be used in a ball grid array type, a flip-chip type, and does not affect the semiconductor package. The supporting plate carries an electron. However, the supporting plate can also be used to support the component. The setting position and quantity must also be set on the branch as shown in the example. In the previous drawings, only a part of the process for electrically manufacturing the resistive element and the capacitive element is designed instead of the words. The above embodiments are merely examples, not intended to limit the present invention. Any violation of the spirit and scope of the present invention
12315951231595
17405 全懋.ptd 第23頁 1231595 圖式簡單說明 【圖式簡單說明】 第1 A至1 G圖為根據本發明第一實施例之可承置被動元 件之半導體承載板結構之不意圖, 第2A至2F及第2A’至2F’圖為根據本發明第二實施例之 可承置被動元件之半導體承載板結構之示意圖; 第3A至3F圖為根據本發明第三實施例之可承置被動元 件之半導體承載板結構之示意圖;以及 第4A至4F圖為根據本發明第四實施例之可承置被動元 件之半導體承載板結構之示意圖。 1 半 導 體 承載板結構 11 支 承 板 11a 上 表 面 lib 下 表 面 110 凹 部 111 開 α 13 被 動 元 件 13a 電 極 15 黏 著 層 20 絕 緣 層 21 線 路 結 構 22 開 Ό 30 散 熱片 31 黏 著 層17405 Quan 懋 .ptd Page 23 1231595 Brief description of the drawings [Simplified description of the drawings] Figures 1 A to 1 G are the intentions of the structure of the semiconductor carrier board capable of receiving passive components according to the first embodiment of the present invention. 2A to 2F and 2A 'to 2F' are schematic diagrams of a structure of a semiconductor carrier board capable of supporting passive components according to the second embodiment of the present invention; and FIGS. 3A to 3F are capable of supporting the third embodiment of the present invention. Schematic diagrams of the structure of a semiconductor carrier board for passive components; and FIGS. 4A to 4F are schematic diagrams of the structure of a semiconductor carrier board that can support passive components according to a fourth embodiment of the present invention. 1Semiconductor load-bearing plate structure
17405 全懋.ptd 第24頁17405 懋 .ptd Page 24
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