TWI222675B - Method for copper metallization on back of GaAs device - Google Patents

Method for copper metallization on back of GaAs device Download PDF

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TWI222675B
TWI222675B TW92117929A TW92117929A TWI222675B TW I222675 B TWI222675 B TW I222675B TW 92117929 A TW92117929 A TW 92117929A TW 92117929 A TW92117929 A TW 92117929A TW I222675 B TWI222675 B TW I222675B
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copper
shielding layer
diffusion shielding
diffusion
metal
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TW92117929A
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TW200503078A (en
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Cheng-Shr Li
Yi Jang
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Univ Nat Chiao Tung
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Abstract

A method for copper metallization on back of a GaAs device comprises replacing gold with copper on metallization of metal on back of a GaAs device. Since copper has a lower resistance, and better heat dissipation and mechanical strength, a device using copper as a metallization metal can improve the heat dissipation, mechanical strength and electrical conductivity of a device, and further improve the properties and the reliability of the device. The use of a film of W, WN, or TiWN as a diffusion barrier layer can effectively inhibit the problem associated with copper easily diffusing into a GaAs substrate and altering the properties of a device.

Description

1222675 ---------案號 92117929 __^_g_修正_ 五、發明說明(1) 【發明所屬之技術領域】 本發明砷化鎵元件背面銅金屬化之製作方法,係將現 有的砷化鎵(GaAs )元件之後段製程的金屬化部分,由現 有的金為主的製程改為銅製程,由於銅的阻值較低且散熱 也比金好,機械程度也較金為優異,且本發明使用擴散障 礙層來阻擋銅的擴散,同時並具有良好的附著和阻擋能力 ’且良好的附著性及阻擋能力,可增加晶片的機械強度, 使接下來後段製程中不至於碎裂。 【先前技術】 按’自從國際商業機器公司(International Business Machines Corporation, IBM )成功的將銅應用 於矽積體電路(I C )的製程後,銅金屬化製程於矽積體電 路(I C )製程即成為一個非常熱門的主題。以銅作為矽積 體電路(1C)製程中金屬化之金屬,具有低電阻率與對電 子遷移效應抵抗性較佳之優點,然而,銅會擴散至石夕中, 因此過去並不採用銅作為金屬化之金屬,在以组(Ta)與 氮化鈕(T a N )等作為擴散障礙層解決銅擴散至矽之問題 後,銅即取代鋁作為矽積體電路(I C )製程中金屬化之金 屬。雖然目前於矽積體電路(I C )製程中使用銅作為金屬 化金屬已非常熱門,但使用銅作為砷化鎵場效電晶體 (Field_Effect Transistors, FETs)金屬化之金屬則尚 未被使用。 石申化鎵場效電晶體(Field-Effect Transistors,1222675 --------- Case No. 92117929 __ ^ _ g_Amendment_ V. Description of the invention (1) [Technical field to which the invention belongs] The manufacturing method for the copper metallization of the back surface of the gallium arsenide element according to the present invention is the existing method The metallization part of the later process of the GaAs element is changed from the existing gold-based process to the copper process. Because copper has a lower resistance value and better heat dissipation than gold, it is also superior in mechanical degree. Moreover, the present invention uses a diffusion barrier layer to block the diffusion of copper, and also has good adhesion and blocking capabilities' and good adhesion and blocking capabilities, which can increase the mechanical strength of the wafer and prevent the chip from cracking in the subsequent process. . [Previous technology] According to 'Since the International Business Machines Corporation (IBM) successfully applied copper to the silicon integrated circuit (IC) process, the copper metallization process has been used in the silicon integrated circuit (IC) process. Become a very hot topic. Using copper as the metallized metal in the silicon integrated circuit (1C) process has the advantages of low resistivity and better resistance to electron migration effects. However, copper will diffuse into the stone, so copper was not used as a metal in the past. Metalized metal, after the group (Ta) and nitride button (T a N) as diffusion barriers to solve the problem of copper diffusion to silicon, copper will replace aluminum as a silicon integrated circuit (IC) process metallization metal. Although the use of copper as a metallized metal in silicon integrated circuit (IC) manufacturing processes is currently very popular, the use of copper as a metallized metal for GaAs field effect transistors (FETs) has not been used. Shi Shenhua Gallium Field Effect Transistors (Field-Effect Transistors,

1222675 案號 92Π7929 年 月 曰 修正 五、發明說明(2) FETs)與單晶微波積體電路(Monolithic Microwave Integrated Circuits, MMICs)目前均以金(Au)作為金 屬化之金屬,如用於電容、傳輸線與接地平面等,而傳輸 線與接地平面所需金之厚度大於2-3 // m,因此使用的金量 極大,成本較高。且砷化鎵元件具有熱傳導性低與基材易 碎等問題,特別像是需要放出大量熱的砷化鎵高頻功率元 件(P 〇 w e r F E T s ),因此砷化鎵高頻功率元件之晶片厚度 需薄至2到5 m i 1 s以增加散熱效果,然而,如此一來會使得 基材非常容易碎裂,若以銅作為砷化鎵元件之背面金屬化 之金屬可提高機械強度且亦可增進散熱能力。 傳統的背面金屬化製程主要係在晶片研磨約至1 0 0 // m 厚度後,作穿孔(V i a ho 1 e )製程,隨後再鍍上鈦化鎢 (TiW ), 金(Au)等金屬,可增加散熱能力,作為接地金 屬,並增加元件的機械性質,因為晶片此時的厚度極薄, 背面鐘上一層金屬有助於幫助晶片的機械強度。金屬化材 料需要有極佳的導熱與導電性,銅與金相比,具有較佳的 機械強度’因此能使晶片有較佳的機械強度’且銅亦有較 佳的導熱性與導電性,若以銅取代金,可使元件有較好的 散熱特性與較佳的接地,因此使用銅取代金作為金屬化之 金屬具有低電阻、高導熱性、便宜等優點。 然而,由於銅於神化鎵之擴散效應極快,且銅會於石申 化鎵中形成深層受體(D e e p A c c e p t 〇 r ),使得珅化鎵元 件的電氣性質減低,因此於砷化鎵的產業上,過去一直無 使用銅作為金屬化材料,如何將銅作為神化鎵元件金屬化1222675 Case No. 92Π7929 Amendment V. Invention Description (2) FETs) and Monolithic Microwave Integrated Circuits (MMICs) currently use gold (Au) as a metallized metal, such as for capacitors, Transmission lines and ground planes, etc., and the thickness of gold required for transmission lines and ground planes is greater than 2-3 // m, so the amount of gold used is extremely large and the cost is high. In addition, the gallium arsenide element has problems such as low thermal conductivity and fragile substrate, especially a gallium arsenide high frequency power element (Power FET s) that needs to emit a lot of heat, so the gallium arsenide high frequency power element chip The thickness needs to be as thin as 2 to 5 mi 1 s to increase the heat dissipation effect. However, this will make the substrate very easy to crack. If copper is used as the metallized metal on the back of the gallium arsenide element, it can improve the mechanical strength and also Improve heat dissipation. The traditional backside metallization process is mainly after the wafer is polished to a thickness of about 100 0 // m, and then a through hole (Via ho 1 e) process is performed, followed by plating with tungsten titanium (TiW), gold (Au) and other metals. It can increase the heat dissipation ability, as a ground metal, and increase the mechanical properties of the component, because the wafer is extremely thin at this time, a layer of metal on the back clock helps the mechanical strength of the wafer. Metallized materials need to have excellent thermal and electrical conductivity. Copper and gold have better mechanical strength 'so the chip can have better mechanical strength' and copper also has better thermal and electrical conductivity. If copper is used to replace gold, the component can have better heat dissipation characteristics and better grounding. Therefore, using copper instead of gold as the metallized metal has the advantages of low resistance, high thermal conductivity, and cheapness. However, due to the extremely rapid diffusion effect of copper on gallium aluminide, and copper will form a deep acceptor (Deep Aceptor) in gallium sulphide, which will reduce the electrical properties of gallium arsenide elements. In the industry, copper has not been used as a metallization material in the past. How to metalize copper as a deified gallium element?

第6頁 1222675 案號 92117929 五、發明說明(3) 之金屬則成為一個急待 用銅為金屬化金屬之專 中華民國專利公告 障壁」(2002/11/03) 程之銅金屬化,係在一 (T a N )、氮化鈦(TiN 體電路的前端(fronts 了需多不同深寬比的圖 一層,且使用的材料亦 阻擔銅金屬的擴散效果 針對石夕材料,而本發明 後端(backside )製程Page 6 1222675 Case No. 92117929 V. The metal of invention description (3) becomes a patent for the Republic of China Patent Bulletin urgently requiring copper as a metallized metal "(2002/11/03) One (T a N), the front end of the titanium nitride (TiN body circuit) requires more layers of different aspect ratios, and the material used also blocks the diffusion effect of the copper metal against the Shixi material. Backside process

解決的問題。以下, 另字 0 . 利作一分析。 別有關採 號碼第4 6 5 0 6 9號專利之「 ,此專利主要針對石夕$二鋼金屬之 基材上依序使用妲(T a ^的前段製 )等材料形成鋼之障=)]氮化鈒 ide )製程,因此,其^’可用於積 案,然而本發明所用的、壁弋包含。 不同,如此在製程上較為簡便有: 優異。此外第4 6 5 0 6 9號專利主 乃適用於珅化鎵元件,且可適用於 〇solved problem. In the following, another word 0. Do not use the patent No. 4 6 5 0 6 9 ", this patent is mainly for the use of materials such as 妲 (T a ^ of the previous paragraph) and other materials to form steel barriers on the base material of Shixi $ Ergang =) ] Nitriding process, so it can be used in backlogs, but the niche used in the present invention includes. Different, so the process is more simple and easy: Excellent. In addition, the patent No. 4 6 5 0 6 9 It is suitable for gallium halide elements, and can be applied to 〇

而’中華民國專利公告號碼第4 3 6 9 9 5號專利之「銅製 程之阻障層製作方法」(2 0 0 1 / 0 5 / 0 3 ),主要係為銅製二 的阻障層製作方法,其使用之阻障層為鈦(T i )、氮化鈦 (T 1 N ),所採用形成阻障層的方式為離子化金屬電漿濺 錢製程或採用有機金屬氣相磊晶法(Metal Organic VaP〇r Epitax, M0CVD)。銅金屬使用離子化金屬電漿電 錄製程,所使用的無線電波頻率為13 . 5 6MHz,功率為0至 300W之間,或是使用電錢方法將銅鑛上,但是鑛銅之前需 先鍍一層銅種子層。然,本發明之阻障層與此專利有明顯 的不同,由於第436995號專利並非用於後端(backside) 製程,因此若使用第4 3 6 9 9 5號專利的阻障層製作方法,將 無法使金屬完全鍍於穿孔(V i a ho 1 e )的側壁上。The "Republic of China Patent Announcement No. 4 3 6 95" patent "Copper process barrier layer manufacturing method" (2 0 0 1/0 5/0 3) is mainly a copper 2 barrier layer manufacturing method, The barrier layer used is titanium (T i), titanium nitride (T 1 N), and the method for forming the barrier layer is an ionized metal plasma sputtering process or an organic metal vapor phase epitaxial method (Metal Organic VaPor Epitax, MOCVD). Copper metal is recorded by ionized metal plasma. The radio wave frequency used is 13.56 MHz, the power is between 0 and 300W, or the copper ore is added by electricity, but the copper must be plated before A copper seed layer. However, the barrier layer of the present invention is obviously different from this patent. Since Patent No. 436995 is not used for the backside process, if the barrier layer manufacturing method of Patent No. 4 3 6 9 5 5 is used, It will not be possible to completely plate the metal on the side walls of the perforations (Via ho 1 e).

第7頁 1222675 _案號92117929_年月曰 修正_ 五、發明說明(4) 又,中華民國專利公告號碼第2 8 0 0 0 2號專利之「銅金 屬化钽氮化物擴散屏蔽製作方法」(1 9 9 6 / 0 7 / 0 1 ),主要 係使用氮化钽(TaN )作為銅金屬之阻障層,氮化鈕(TaN )的沉積方法係採用有機金屬氣相蠢晶法(M e t a 1 Organic Vapor Epitax,MOCVD)的方法,而使用有機金 屬氣相蠢晶法(Metal Organic Vapor Epitax, MOCVD) 方法鍍完後需將晶片取出,容易造成晶片的氧化或污染, 製程上較為不便,然,本發明之阻障層乃是採用濺鍍方法 ,使用此方法不需將晶片破真空,即可直接鍍銅,因此更 適用於產業製程上。Page 7 1222675 _Case No. 92117929_ Revised Year of the Month _ V. Description of the Invention (4) In addition, the Republic of China Patent Announcement No. 2 8 0 "Paper metallized tantalum nitride diffusion shield manufacturing method" (19 9 6/0 7/0 1), mainly using tantalum nitride (TaN) as the barrier layer of copper metal, and the deposition method of nitride button (TaN) is the organic metal vapor phase stupid method (M eta 1 Organic Vapor Epitax (MOCVD) method, and the metal organic vapor phase stupid method (Metal Organic Vapor Epitax (MOCVD) method) needs to be taken out after plating, which is likely to cause oxidation or contamination of the wafer, which is inconvenient in the manufacturing process. However, the barrier layer of the present invention adopts a sputtering method. Using this method, the wafer can be directly plated with copper without breaking the vacuum, so it is more suitable for industrial processes.

由於金的價格高,且導熱性與機械性質相對較差,無 法有效改善晶片的機械性質及散熱效果’而銅金屬化極易 擴散至坤化鎵基材,且銅金屬化製程無法適用於後端 (backside )製程、製程不便種種問題尚待改進。因此本 發明人遂竭其心智研究克服,進而研發出一種砷化鎵元件 之背面銅金屬化製作方法,主要係將砷化鎵元件後段製程 採用銅作為金屬化之金屬,藉由適當的擴散阻擋層阻擋銅 ,且使用傳統之濺鍍方法,不僅獲得較佳特性之晶片,且 製程上更為便利,更適用於產業製程上。Due to the high price of gold, and its relatively poor thermal conductivity and mechanical properties, it is not possible to effectively improve the mechanical properties and heat dissipation of the wafer ', and copper metallization can easily diffuse to the gallium substrate, and the copper metallization process cannot be applied to the back end. (backside) Various problems in the process and inconveniences need to be improved. Therefore, the present inventors exhausted their mental research to overcome, and then developed a method for the copper metallization of the back side of the gallium arsenide element, which mainly uses copper as the metallized metal in the back-end process of the gallium arsenide element, with proper diffusion barrier. The layer blocks copper and uses the traditional sputtering method, not only to obtain wafers with better characteristics, but also more convenient in manufacturing process and more suitable for industrial process.

【發明内容】 由是,本發明的主要目的,即在利用滅鑛、蒸鍍或電 鍍的方式將銅作為珅化鎵元件背面金屬化金屬,並利用鎢 (W )、氮化鎢(WN )、氮化鈦鎢(TiWN )等薄膜作為擴[Summary of the Invention] Therefore, the main object of the present invention is to use copper as the metallized metal on the back of the gallium halide element by means of demineralization, evaporation or electroplating, and use tungsten (W), tungsten nitride (WN) And titanium tungsten nitride (TiWN)

第8頁 1222675 案號 92Π7929 年 修正 五、發明說明(5) 散阻障層,有效的阻擋銅擴散入砷化鎵基材,藉由銅作為 金屬化金屬可改善元件散熱、機械強度、導電度及元件特 性與可靠度,亦由於製程便利,可適用於產業上之利用。 為達上述目的,本發明是這樣實現的:一種砷化鎵元 件背面銅金屬化之製作方法,係於基材背面上鍍上一層鎢 (W )、氮化鎢(WN )、氮化鈦鎢(Ti WN )等薄膜作為擴 散阻障層,隨後鍍上一層銅作為金屬化金屬,藉由該擴散 屏蔽層阻擋銅擴散入珅化鎵基材内,且由於銅之金屬特性 可改善元件散熱、機械強度、導電度等特性。Page 812222675 Case No. 92Π7929 Amendment 5. Invention Description (5) Dispersive barrier layer effectively prevents copper from diffusing into the gallium arsenide substrate. Using copper as the metallized metal can improve the heat dissipation, mechanical strength and conductivity of the component And component characteristics and reliability, and because of the convenient process, it can be used in industrial applications. In order to achieve the above object, the present invention is realized as follows: A method for manufacturing copper metallization on the back surface of a gallium arsenide element is plated with a layer of tungsten (W), tungsten nitride (WN), and titanium tungsten nitride on the back surface of the substrate. (Ti WN) and other films as a diffusion barrier layer, and then plated with a layer of copper as a metallized metal, the diffusion shield layer prevents copper from diffusing into the gallium halide substrate, and due to the metal characteristics of copper, the heat dissipation of the device can be improved, Mechanical strength, electrical conductivity and other characteristics.

【實施方式】 為使 貴審查委員瞭解本發明之目的、特徵及功效, 茲藉由下述具體之實施例,並配合所附之圖式,對本發明 做一詳細說明,說明如后:[Embodiment] In order to make your reviewing committee understand the purpose, features and effects of the present invention, the following specific examples and the accompanying drawings are used to make a detailed description of the present invention, which will be described later:

請參閱第一圖,係為本發明之側剖圖,如圖所示,首 先,將晶片磨薄至1 0 0 // m的厚度之後,以感應耦合電漿 (Inductively Coupled Plasma, ICP)乾式钱亥丨J 的方式製 作穿孔(v i a h ο 1 e ),孔洞需具有一傾斜度,以方便後續 濺鍍或蒸鍍之金屬能夠完全填滿孔洞。將擴散障礙層以濺 鍍或蒸鍍之方式鍍於晶片背面上,厚度約為4 0至1 0 0 nm, 隨後再鍍上一層約2 — 10//m厚的銅,接著採用濺鍍或電鍍 的方式將銅鍍到所需的厚度。此外,所採用的濺鍍機需要 加裝準直器(Col 1 imatoi·),以使濺鍍金屬能夠完全覆蓋 到洞的内壁,藉此可獲得第一圖之結構,係為石英1 、蠟Please refer to the first figure, which is a side sectional view of the present invention. As shown in the figure, first, the wafer is thinned to a thickness of 1 0 // // m, and then an inductively coupled plasma (ICP) dry type is used. The through hole (viah ο 1 e) is made by Qian Hai 丨 J. The hole needs to have an inclination so that the metal can be completely filled by subsequent sputtering or evaporation. Spread or vapor-deposit the diffusion barrier layer on the back of the wafer with a thickness of about 40 to 100 nm, and then coat a layer of copper with a thickness of about 2-10 // m, followed by sputtering or Plating copper to the desired thickness. In addition, the used sputtering machine needs to be equipped with a collimator (Col 1 imatoi ·), so that the sputtered metal can completely cover the inner wall of the hole, so as to obtain the structure of the first picture, which is quartz 1, wax

第9頁 1222675 _案號92117929_年月曰 修正_ 五、發明說明(6) 2、晶片3及擴散障礙層/銅4。 如砷化鎵金屬半導體場效電晶體 (Metal-Semiconductor Field Effect Transitior , MESFET),鍍膜前需先清洗,首先將砷化鎵基底分別置入 煮沸的丙酮及異丙酮各五分鐘後,浸入氫氟酸(H F ):過 氧化氫(Η202 ):水(Η20 )為1 : 2 : 20的溶液20秒與鹽酸 (HC1 ):水(Η20 )為1 ·· 4的溶液1分鐘。將40nm的氮化鈕 (TaN )薄膜濺鍍於3-in (100)的砷化鎵基底上,接著在 多乾磁控濺鑛系統(multitarget magnetron sputtering system )未破真空的情形下,鐘上一層2 — 10nm的銅(Cu )薄膜與一層1 Onm的氮化鈕(TaN )薄膜於氮化鈕(TaN ) 薄膜之上,頂層的氮化钽(T a N )薄膜係用來防止銅(C u )層氧化及防止高溫退火時氧滲透入薄膜。氮化鈕(T a N )薄膜皆藉著钽(Ta)與氮/氬(N2/Ar)混合氣體(20% N2與8 0 % A r )所產生的反應濺鍍。此外,未濺鍍前真空壓力 為2. 6 X 1 0~5Pa,且薄膜濺鍍時總氣壓保持在0· 8 Pa。最後 置入氬(Ar)氣氛,溫度400 °c至600 °C下進行30分鐘退火 〇 將氮化鈕/銅/氮化鈕/砷化鎵(TaN/Cu/ TaN/GaAs) 進行X光繞射分析,請參閱第二圖,係為不同溫度退火後χ 光繞射分析圖,如圖所示’由下到上的分別為剛鍍完及 4 0 0 °C、5 0 0 t:、5 5 0 °C與6 0 0 t:退火,由第二圖可見氮化鈕 (TaN )及鋼(Cu )之繞射峰維持到5 5 0 T:仍然十分清楚, 表示銅/氮化鈕/砷化鎵(Cu/ TaN/GaAs)的結構之界面一Page 9 1222675 _Case No. 92117929_ Month and year Amendment _ V. Description of the invention (6) 2. Wafer 3 and diffusion barrier layer / copper 4. Such as gallium arsenide metal semiconductor field effect transistor (Metal-Semiconductor Field Effect Transistor, MESFET), you need to clean before coating, first put the gallium arsenide substrate into boiling acetone and isoacetone for five minutes, then immerse in hydrofluoride A solution of acid (HF): hydrogen peroxide (Η202): water (Η20) is 1: 2: 20 for 20 seconds and a solution of hydrochloric acid (HC1): water (Η20) is 1 ·· 4 for 1 minute. A 40nm nitride button (TaN) film was sputtered on a 3-in (100) gallium arsenide substrate, and then the vacuum was not broken on the multitarget magnetron sputtering system. A 2-10nm copper (Cu) film and a 1 Onm nitride button (TaN) film on top of the nitride button (TaN) film. The top layer of tantalum nitride (T a N) film is used to prevent copper ( The Cu) layer oxidizes and prevents oxygen from penetrating into the film during high temperature annealing. Nitriding button (T a N) films are all sputter-sputtered by tantalum (Ta) and nitrogen / argon (N2 / Ar) mixed gas (20% N2 and 80% A r). In addition, the vacuum pressure before sputtering was 2. 6 X 1 0 ~ 5Pa, and the total air pressure during film sputtering was maintained at 0.8 Pa. Finally, put in an argon (Ar) atmosphere, and perform annealing for 30 minutes at a temperature of 400 ° C to 600 ° C. X-ray winding of the nitride button / copper / nitride button / gallium arsenide (TaN / Cu / TaN / GaAs) Shot analysis, please refer to the second figure, which is the χ-ray diffraction analysis chart after annealing at different temperatures, as shown in the figure. 'From bottom to top are just finished plating and 4 0 ° C, 50 0 t :, 5 5 0 ° C and 6 0 t: Annealing, as shown in the second figure, the diffraction peaks of the nitride button (TaN) and steel (Cu) are maintained to 5 5 0 T: still very clear, indicating copper / nitride button / Gallium Arsenide (Cu / TaN / GaAs) Structure Interface I

1222675 案號92117929 年月日 修正 五、發明說明(7) 直到5 5 0 °C仍然十分穩定。經過6 0 0 °C退火後,出現砷化鈕 (T a A s )、銅鎵化合物(C u3G a )、坤化銅(C u2 A s )之繞 射峰,顯示组(Ta)與坤化鎵(GaAs)在600 °C產生反應 ,然,經過6 0 0 °C退火後氮化钽(TaN )與銅(Cu )之繞射 峰仍然存在,顯示反應與擴散並非全面性。1222675 Case No. 92117929 Amendment V. Description of the invention (7) It is still very stable until 5 50 ° C. After annealing at 600 ° C, diffraction peaks of arsenic button (T a A s), copper gallium compound (C u3G a), and copper Kun (C u2 A s) appear, showing the group (Ta) and Kun GaAs reacts at 600 ° C. However, the diffraction peaks of tantalum nitride (TaN) and copper (Cu) still exist after annealing at 600 ° C, indicating that the reaction and diffusion are not comprehensive.

表一與表二係為銅金屬化與未經銅金屬化之150 //m元 件退火前後飽和 >及源極電流(I dss )、跨導(Gm)、爽止電 壓(Vp )之變化值與變化百分比,Idss於汲-源極電壓(vds )為2V下,Gm於閘極偏壓(Vgs)為0V且Vds為2 V下進行測 試,而VP於Ids為1 50mA下進行測試。銅金屬化元件之飽和汲 源極電流(I dss )、跨導(Gra )、夾止電壓(VP )之變化百 分比分別為1.60% 、0·73% λ 1 . 3 5 % ,與未經銅金屬化之 飽和汲源極電流(I dss )、跨導(Gm )、夾止電壓(VP )之 變化百分比分別為3 . 9 3 % 、3 · 0 3 % 、3 . 0 0 %值相近,可知 銅並未擴散至砷化鎵中破壞元件。 表一Tables 1 and 2 are the changes of 150 // m elements with and without copper metallization before and after annealing, and changes in source current (I dss), transconductance (Gm), and stop voltage (Vp) Value and percentage change, Idss is tested at a drain-source voltage (vds) of 2V, Gm is tested at a gate bias (Vgs) of 0V and Vds is 2 V, and VP is tested at an Ids of 1 50mA. The percentage change of saturation drain-source current (I dss), transconductance (Gra), and pin-off voltage (VP) of copper metallized components are 1.60%, 0.73% λ 1.3.5%, and The percentage changes of the metallized saturated drain-source current (I dss), transconductance (Gm), and pinch-off voltage (VP) are 3.9 3%, 3.03%, and 3.0%, respectively. It can be seen that copper has not diffused into the gallium arsenide to damage the device. Table I

第11頁 1222675 _案號92117929_年月日 修正 五、發明說明(8) 150μιη銅金屬化元件 變化値 變化百分比(¾ ) I d s s (Ma) 0.51 Id s s / Id s s 1.60 △ Gm (Vgs=OV) (mS/mm ) 0.75 △ Gm/Gm 0.73 AVP (v) 0.04 AVP/VP 1.35Page 11 1222675 _Case No. 92117929_ Revised Year, Year, and Five. Description of the Invention (8) 150μm copper metallized element change 値 change percentage (¾) I dss (Ma) 0.51 Id ss / Id ss 1.60 △ Gm (Vgs = OV ) (mS / mm) 0.75 △ Gm / Gm 0.73 AVP (v) 0.04 AVP / VP 1.35

表二 150 μ m未經銅金屬化元件 變化値 變化百分比(¾ ) I d s s (Ma) 0.91 I d s s / I d s s 3.93 △ Gm (vgs=ov) (mS/mm ) 3.07 AGm/Gm 3.03 AVP (v) 0.08 AVp/vP 3.00Table 2 Changes in 150 μm uncopper metallized components, percent change (¾) I dss (Ma) 0.91 I dss / I dss 3.93 △ Gm (vgs = ov) (mS / mm) 3.07 AGm / Gm 3.03 AVP (v ) 0.08 AVp / vP 3.00

銅金屬化與未經銅金屬化元件之射頻特性(R F characteristics)進行熱穩定測試,如表三與表四所示Thermal stability test of RF characteristics of copper metallized and non-copper metallized components, as shown in Tables 3 and 4.

第12頁 1222675 _案號 92117929_年月日__ 五、發明說明(9) ,係以Vds為7 V下,而Ids為1 0 OmA下進行測試,,1 // m x 1 0mm之銅金屬化元件經過3 0 0 °C、2個小時退火,最大振盪 頻率(f max ),最大功率增益(Gmax )與單向功率增益(UG )的變化量分別為0.34GHz、0.38 dB與0·69 dB,而1 //m x 1 0mm之未經銅金屬化元件經過3 0 0 °C、2個小時退火,最 大振盪頻率(f max ),最大功率增益(Gmax )與單向功率增 益(UG )的變化量分別為-0· 4GHz、0· 1 dB與0· 56 dB。於 銅金屬化前後兩者變化量相近,因此電性變化乃由於元件 本身受熱效應所引起,銅金屬化並不會破壞元件之性能。Page 12122675 _Case No. 92117929_Year Month and Date__ V. Description of the invention (9), tested with Vds at 7 V and Ids at 10 OmA, 1 // mx 1 0mm copper metal After annealing at 300 ° C for 2 hours, the maximum oscillation frequency (f max), the maximum power gain (Gmax), and the unidirectional power gain (UG) were 0.34 GHz, 0.38 dB, and 0.69, respectively. dB, and 1 // mx 1 0mm non-copper metallized components after 300 ° C, 2 hours annealing, the maximum oscillation frequency (f max), the maximum power gain (Gmax) and the unidirectional power gain (UG) The changes are -0.4 GHz, 0.1 dB, and 0.56 dB, respectively. The amount of change between the two before and after copper metallization is similar, so the electrical change is caused by the heating effect of the element itself. Copper metallization does not damage the performance of the element.

表三 1μ mxlOmm之銅金屬化元件 元件參數 退火前 退火後 變化値 /max ( GHz) 10.37 10.03 A/max( GHz) 0.34 0.9GHz下之 Gmax ( dB) 17.24 16.86 0.9GHz下之 △ Gmax ( dB) 0.38 0.9GHz下之 UG ( dB) 19.00 18.31 0_9GHz下之 Δϋ〇 ( dB ) 0.69 表四Table 3 Parameters of copper metallized components at 1 μmxl0mm before and after annealing. 値 / max (GHz) 10.37 10.03 A / max (GHz) 0.34 Gmax (dB) at 0.9GHz 17.24 16.86 △ Gmax (dB) at 0.9GHz UG (dB) at 0.38 0.9GHz 19.00 18.31 Δϋ〇 (dB) at 0_9GHz 0.69 Table 4

第13頁 1222675 五、發明說明(10) 案號92117929_年月日 修正 1μ mxlOmm之銅金屬化元件 元件參數 退火前 退火後 變化値 /max ( GHz) 9.6 10 △/max( GHz) -0.4 0.9GHz下之 Gmax ( dB) 17.36 17.26 0_9GHz下之 △ Gmax ( dB) 0.1 0_9GHz下之 UG ( dB) 19.86 19.30 0.9GHz下之 Δϋ〇 ( dB ) 0.56 藉由本發明之砷化鎵元件背面銅金屬化 可以構成以下之特點: 一、 藉由銅作為背面金屬化之元件具有優良 功率性質,可改善元件的散熱、機械強 並增進元件的特性及可靠度,且由於銅 除提高元件特性外,更可降低成本。 二、 藉由鐫(W )、氮化鐫(W N )、氮化鈦J 薄膜作為擴散阻障層,可有效阻擋銅易 基材而改變元件特性之問題。 三、 本發明僅需使用單一層障壁,在製程上 阻擋銅金屬的擴散效果優異。 四、 本發明係可採用濺鍍方法,不需將晶片 接鍍銅,更適於產業利用。 承前所述,本發明較習用技術創新,且 點與便利及實用的價值,極具新穎性與進步 5 鱼(> > 法 性度宜 方 導電便 作 傳> 導格 製熱及價 之 的度之 ! (TiWN )等 擴散入砷化鎵 較為簡便,且 破真空,可直 具有前述之優 性,符合發明Page 13 1222675 V. Description of the invention (10) Case No. 92117929_Year Month Day Correction 1μmx10mm copper metallized element element parameters change after annealing before annealing 値 / max (GHz) 9.6 10 △ / max (GHz) -0.4 0.9 Gmax (dB) at GHz 17.36 17.26 △ Gmax (dB) at 0-9GHz 0.1 UG (dB) at 0-9GHz 19.86 19.30 Δϋ〇 (dB) at 0.9GHz 0.56 By the copper metallization on the back of the gallium arsenide element of the present invention, It has the following characteristics: 1. With copper as the back metallized component, it has excellent power properties, which can improve the heat dissipation, mechanical strength of the component, and improve the characteristics and reliability of the component. In addition to improving the component characteristics, copper can also reduce cost. Second, by using W (W), W N (N), and Titanium Nitride (J) films as diffusion barriers, it can effectively block the copper substrate and change the characteristics of the device. 3. The present invention only needs to use a single layer of barrier ribs, and has an excellent effect of blocking the diffusion of copper metal in the manufacturing process. 4. The present invention can adopt a sputtering method, and does not require copper plating on the wafer, which is more suitable for industrial use. According to the foregoing, the present invention is more innovative than conventional technology, and has the advantages of convenience and practical value. It is very novel and advanced. 5 Fish (> > Legality should be conductive and pass it by hand) > Guide heating and price (TiWN), etc. Diffusion into gallium arsenide is relatively simple, and it can break the vacuum, and can have the aforementioned advantages, which is consistent with the invention

第14頁 1222675 _案號92117929_年月曰 修正_ 五、發明說明(11) 專利之法定要件,爰依法提出發明專利申請。 雖本發明已一較佳實施例揭露如上,但並非用以限定 本發明之實施之範圍,任何熟習此項技藝者,在不脫離本 發明之精神與範圍内,當可做些許的變動與潤飾,及凡依 本發明所作的均等變化與修飾,應以本發明之申請專利範 圍所涵蓋,其界定應已申請專利範圍為準。Page 14 1222675 _Case No. 92117929_ Year Month Amendment _ V. Description of Invention (11) The statutory elements of a patent, an application for an invention patent is filed according to law. Although a preferred embodiment of the present invention has been disclosed as above, it is not intended to limit the scope of implementation of the present invention. Any person skilled in the art can make some changes and decorations without departing from the spirit and scope of the present invention. , And all equal changes and modifications made in accordance with the present invention shall be covered by the scope of patent application of the present invention, and its definition shall be subject to the scope of the patent application.

第15頁 1222675 _案號92117929_年月日 修正 圖式簡單說明 第一圖係為本發明之侧剖圖 第二圖係為不同溫度退火後X光繞射分析圖Page 15 1222675 _Case No. 92117929_ Year Month Date Amendment Brief Description of the Drawings The first picture is a side sectional view of the present invention. The second picture is an X-ray diffraction analysis chart after annealing at different temperatures.

第16頁Page 16

Claims (1)

1222675 _案號 92117929_年月日__ 六、申請專利範圍 1 . 一種砷化鎵元件背面銅金屬化之製作方法,該方法係包 括: 一基材 於該基材上製作穿孔(v i a h ο 1 e ); 一擴散屏蔽層形成於該基材背面;以及 一銅金屬層形成於該擴散屏蔽層之上。 2 .如申請專利範圍第1項之方法,其中該基材係由砷化鎵 所構成。1222675 _ Case No. 92117929_ Year Month__ VI. Application Patent Scope 1. A method for making copper metallization on the back of a gallium arsenide element, the method includes: making a through hole on the substrate (viah ο 1 e); a diffusion shielding layer is formed on the back of the substrate; and a copper metal layer is formed on the diffusion shielding layer. 2. The method of claim 1, wherein the substrate is made of gallium arsenide. 3. 如申請專利範圍第1項之方法,其中可採用耦合電漿( Inductively Coupled Plasma, ICP)乾式钱刻方式製作 via hole 。 4. 如申請專利範圍第1項之方法,其中該擴散屏蔽層可以 濺鍍方法形成於該基材背面。 5. 如申請專利範圍第1項之方法,其中該擴散屏蔽層可以 蒸鍍方法形成於該基材背面。 6. 如申請專利範圍第1項之方法,其中該擴散屏蔽層厚度 可為40至lOOnm 。 7. 如申請專利範圍第1項之方法,其中該擴散屏蔽層可為 鶴(W )薄膜。3. For the method of applying for the first item of the patent scope, a via hole can be made by using an inductively coupled plasma (ICP) dry money engraving method. 4. The method of claim 1, wherein the diffusion shielding layer can be formed on the back surface of the substrate by a sputtering method. 5. The method of claim 1, wherein the diffusion shielding layer can be formed on the back of the substrate by a vapor deposition method. 6. The method according to item 1 of the patent application range, wherein the thickness of the diffusion shielding layer may be 40 to 100 nm. 7. The method of claim 1, wherein the diffusion shielding layer may be a crane (W) film. 8. 如申請專利範圍第1項之方法,其中該擴散屏蔽層可為 氮化鎢(WN )薄膜。 9. 如申請專利範圍第1項之方法,其中該擴散屏蔽層可為 氮化鈦鎢(TiWN )薄膜。 1 0 .如申請專利範圍第1項之方法,其中該銅金屬層可以濺8. The method of claim 1, wherein the diffusion shielding layer may be a tungsten nitride (WN) film. 9. The method of claim 1, wherein the diffusion shielding layer may be a titanium tungsten nitride (TiWN) film. 10. The method of claim 1, wherein the copper metal layer can be sputtered. 第17頁 1222675 _案號92Π7929_年月曰 修正_ 六、申請專利範圍 鍍方法形成於該擴散屏蔽層上。 1 1.如申請專利範圍第1項之方法,其中該銅金屬層可以蒸 鍍方法形成於該擴散屏蔽層上。 1 2.如申請專利範圍第1項之方法,其中該銅金屬層可以電 鍍方法形成於該擴散屏蔽層上。 1 3.如申請專利範圍第1項之方法,其中該銅金屬層厚度可 為 2 — 10 //m 〇Page 17 1222675 _Case No. 92Π7929_ Year Month Amendment_ VI. Patent Application Scope A plating method is formed on the diffusion shielding layer. 1 1. The method of claim 1, wherein the copper metal layer can be formed on the diffusion shielding layer by an evaporation method. 1 2. The method according to item 1 of the scope of patent application, wherein the copper metal layer can be formed on the diffusion shielding layer by an electroplating method. 1 3. The method according to item 1 of the scope of patent application, wherein the thickness of the copper metal layer may be 2-10 // m 〇 第18頁Page 18
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Publication number Priority date Publication date Assignee Title
TWI504780B (en) * 2009-09-04 2015-10-21 Win Semiconductors Corp A method of using an electroless plating for depositing a metal seed layer on semiconductor chips for the backside and via-hole manufacturing processes

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI504780B (en) * 2009-09-04 2015-10-21 Win Semiconductors Corp A method of using an electroless plating for depositing a metal seed layer on semiconductor chips for the backside and via-hole manufacturing processes

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