TW540160B - Schottky structure on GaAs semiconductor substrate - Google Patents

Schottky structure on GaAs semiconductor substrate Download PDF

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TW540160B
TW540160B TW91115624A TW91115624A TW540160B TW 540160 B TW540160 B TW 540160B TW 91115624 A TW91115624 A TW 91115624A TW 91115624 A TW91115624 A TW 91115624A TW 540160 B TW540160 B TW 540160B
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layer
metal
gaas
copper
schottky
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TW91115624A
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Chinese (zh)
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Cheng-Shr Li
Yi Jang
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Univ Nat Chiao Tung
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Abstract

The present invention provides a Schottky structure on GaAs semiconductor substrate, which comprises: a GaAs semiconductor substrate; a Ti metal layer distributed on the GaAs semiconductor substrate to form the Schottky contact; a diffusion barrier layer on the metal Ti layer to block the diffusion of metal layer; and a first Cu metal layer on the diffusion barrier layer. By using the diffusion barrier layer, the Cu metal in the subsequent process can be directly plated on the first Cu metal layer.

Description

MU16U 五、發明說明(l) 發明領域 體上的蕭基 ,可以彳艮容 本發明係有關一種在砷化鎵(GaAs)半導 、、口構。因此,本發明可運用於石申化鎵元件上 易和其他製程連接配合。 發明背景 目前砷化鎵(GaAs)S件之蕭基結構,主要以 金(Ti/Pt/Au)之結構為主,金屬鈦(Ti)層主嚴、 化鎵(GaAs)形成蕭基接觸,金屬鉑(pt)居 申 礙層,金屬金(Au)層可降低整體的蕭基^構電=政= 統上砷化鎵(GaAs)元件的傳輸線主要是以金為主,’曰傳 和金相比,有更優異的導電性、散熱性、價格及機$鋼 度,若把克服銅的擴散問題,則使用銅作為金屬化強 屬,一方面可以降低蕭基結構的整體電阻,另外也金 使元件的特性更為優異,若要將金(Au)改為銅( ,勢必蕭基結構也必須作修改,以符合銅製程的需求11 Kizahi Shimada等人之美國專利第5〇 4 9 9 54號之文 獻·· GaAs field effect semiconductor device having Schottky gate structure,係在石申化鎵(GaAs) 上沉積一層鈦(T i)金屬,然後再沉積一層耐火金屬及 其氮化物或碳化物’而本發明也在砷化鎵(G a a s )上沉積 一層鈦(T i)金屬,然後再沉積擴散障礙層,該層係屬 於耐火金屬的材料;而本發明之不同點係為第一金屬 540160 五、發明說明(2) 層,分佈於該擴散障礙層上,這種結構的優點是可以和 銅製程直接配合且可以更進一步降低蕭基結構的整體電 阻。MU16U V. Description of the Invention (l) Field of the Invention The present invention relates to a gallium arsenide (GaAs) semiconducting, port structure. Therefore, the present invention can be applied to the gallium element of Shishenhua and is easy to connect and cooperate with other processes. BACKGROUND OF THE INVENTION Currently, the Schottky structure of gallium arsenide (GaAs) S pieces is mainly composed of the structure of gold (Ti / Pt / Au), the metal titanium (Ti) layer is mainly formed, and the gallium carbide (GaAs) forms a Schottky contact. The metal platinum (pt) layer is the barrier layer, and the metal gold (Au) layer can reduce the overall structure of the structure. The structure of the transmission line of the gallium arsenide (GaAs) device is mainly gold. Compared with gold, it has more excellent electrical conductivity, heat dissipation, price and mechanical strength. If the problem of copper diffusion is overcome, copper is used as a strong metallization. Gold also makes the characteristics of the components more excellent. If gold (Au) is changed to copper (, the Schottky structure must also be modified to meet the needs of the copper process. 11 Kizahi Shimada et al. US Patent No. 5094 9 Document No. 54 · GaAs field effect semiconductor device having Schottky gate structure, which deposits a layer of titanium (Ti) metal on gallium (GaAs), and then deposits a layer of refractory metal and its nitride or carbide ' The present invention also deposits a layer of titanium (G aas) on GaAs T i) metal, and then deposit a diffusion barrier layer, which is a material of refractory metal; the different point of the present invention is the first metal 540160. 5. Description of the invention (2) The layer is distributed on the diffusion barrier layer. The advantage of this structure is that it can directly cooperate with the copper process and can further reduce the overall resistance of the Schottky structure.

Val erg M· Dubin等人之美國專利第5 6 9 5 8 1 0號之 文獻:Use of cobalt tungsten phosphide as a barrier material for copper metallization,係以 CoWP的金屬層作為防止銅擴散的障礙層;而本發明之不 同點係採用耐火金屬及其氮化物作為防止銅擴散,的障礙 層。 81(1(1118 1'1:113 811(^11111^等人之美國專利第6 28844 9號 之文獻:Barrier f0r copper metalHzati〇n係使用 Ta /TaN/TiN的多層結構作為擴散障礙層,而本發明之不同 點Ϊ ^用單層的耐火金屬材料作擴散障礙層,製程上較 發明目的: 有鑑於此,本發明提供一種應 化鎵(GaAs)半導體上的蕭基結構。 用銅金屬化製程的砷 因此本發明之 性佳的蕭基結構。 本發明之另一 基結構。 本發明之再一 主要目的是提供一 目的是提供一種適 目的是提供一種鋼 種低電阻及散熱特 用於高頻元件的蕭 金屬化製程用以與 ’、他製程連接之結構 發明概述: 請參考圖一 m=於砷化鎵(GaAs)半導體的蕭基結構, ,包括:丰t電子遷移率電晶體(ΗΕΜΤ)結構示意s 2,金屬銅+空〜緣二化錄(GaAs)半導體基板1,蕭基結構 ,氮化物7,ΐ 1 4空氣4 ’金屬銅層5,η-型砷化鎵f 其元件電極的銅金屬化製程互相、结合,因 更低的電阻;^ ί Ϊ線部份已由金改為銅,戶斤以具琴 助益。Ρ及良好的散熱特性’朗元件特性有很大备 成深Ϊ體本發;可以克服鋼擴散進入坤化鎵开 鎵(Ga^中化鎵單晶石微波積體電路中,銅作為石Λ 政熱性佳,機械性質佳等好處/可1 值低,成本低, 元件製程之水準。處並可提升砰化鎵 詳細說明與較佳實施例 有關本發明為達成上述之目的, 段及具體結構特徵,茲舉較佳可 每木用之技術 示說明而更進一步揭示明瞭,詳如下:施例,並藉 540160 五 、發明說明(4)Val erg M. Dubin et al., US Patent No. 5 6 5 8 10: Use of cobalt tungsten phosphide as a barrier material for copper metallization, using a metal layer of CoWP as a barrier layer to prevent copper diffusion; and The difference of the present invention is that the refractory metal and its nitride are used as a barrier layer to prevent copper diffusion. 81 (1 (1118 1'1: 113 811 (^ 11111 ^ et al. U.S. Patent No. 6 28844 9): Barrier f0r copper metal Hzation uses a multilayer structure of Ta / TaN / TiN as the diffusion barrier layer, and Different points of the present invention: ^ A single-layer refractory metal material is used as the diffusion barrier layer, which is more invented in the process: In view of this, the present invention provides a Schottky structure on a galvanized (GaAs) semiconductor. Metalized with copper The arsenic of the process is therefore a good base structure of the present invention. Another base structure of the present invention. Another main object of the present invention is to provide an object which is to provide a suitable purpose is to provide a steel with low resistance and heat dissipation, especially for high An overview of the structure of the Xiao metallization process of the frequency element used to connect to the other processes: Please refer to FIG. 1 m = the Schottky structure of a gallium arsenide (GaAs) semiconductor, including: a t-electron mobility transistor ( ΗΕMT) structure schematic s 2, metal copper + vacant ~ GaAs semiconductor substrate 1, Schottky structure, nitride 7, 结构 1 4 air 4 'metal copper layer 5, n-type gallium arsenide f its The copper metallization process of the component electrodes is mutually, Due to the lower resistance; ^ Ϊ The wire part has been changed from gold to copper, and households have benefited from the piano. P and good heat dissipation characteristics' Long component characteristics are greatly prepared for deep body hair; It can overcome the diffusion of steel into the GaN-based gallium monocrystalline microwave integrated circuit. Copper as a stone has good thermal and mechanical properties, good mechanical properties, etc. Low value, low cost, and component manufacturing. The level and level of gallium palladium can be improved. Detailed description and preferred embodiments. In order to achieve the above-mentioned object, paragraphs and specific structural features of the present invention, it is better to use the technical description of each wood to further reveal the details. As follows: Example, and borrow 540160 V. Description of the invention (4)

本發明係提供一種在坤化鎵(G a A s )半導體上所設计 出的蕭基(Schottky)結構;目的是提供產業界或國防 上所需的銅金屬化製程。請參考圖二,本發明揭露一種 在砷化鎵(GaAs)半導體上所設計出的蕭基結構 (Schottky structure),包含一半絕緣坤化鎵(GaAs) 半導體基板1,一 η -型砷化鎵8,分佈於該半絕緣砷化鎵 (GaAs)半導體基板1上;一金屬鈦(Ti)層21,分佈於 該η-型坤化鎵(GaAs) 8上,形成蕭基接觸;一擴散障礙 層2 2,分佈於該金屬鈦(τ i)層2 1上,用以阻擋金屬層The invention provides a Schottky structure designed on a GaAs semiconductor; the purpose is to provide a copper metallization process required in industry or national defense. Please refer to FIG. 2. The present invention discloses a Schottky structure designed on a gallium arsenide (GaAs) semiconductor, which includes a semi-insulating gallium (GaAs) semiconductor substrate 1. A n-type gallium arsenide 8, distributed on the semi-insulating gallium arsenide (GaAs) semiconductor substrate 1; a metal titanium (Ti) layer 21, distributed on the n-type gallium KunAs (GaAs) 8, forming a Schottky contact; a diffusion barrier Layer 2 2 is distributed on the metal titanium (τ i) layer 21 to block the metal layer

之擴散;一第一金屬銅(Cu)層23,分佈於該擴散障礙 層22上,藉由該擴散障礙層22,解決第一金屬銅(Cu) 層2 3之擴散的問題,俾可使後續的銅製程直接鍍在本結 構上。 圖三係為習用之坤化鎵 之結構示意圖,包括:一石申 一金屬鈦(T i)層31,分佈 3 0之上,以形成蕭基接觸, 於金屬鈦(Ti)層31之上, (Au)層33’分佈於金屬翻 。當元件使用到銅製程的時 由金改為銅金屬·,因此若以 表表面的金屬層是金,因此 間鍍上一層阻礙層以防止金 (GaAs)半導體上的蕭基結構 化鎵(G a A s )半導體基板3 〇, 於砷化鎵(GaAs)半導體基板 一金屬鉑(Pt)層32,分佈 形成擴散障礙層,一金屬金 (Pt)層上’形成蕭基結構 候,金屬連線和空氣橋等都 圖三之習用蕭基結構而言, 右要和銅導線接觸必須在中 和銅擴散。A diffusion; a first metal copper (Cu) layer 23 is distributed on the diffusion barrier layer 22; the diffusion barrier layer 22 is used to solve the diffusion problem of the first metal copper (Cu) layer 23; Subsequent copper processes are directly plated on this structure. Figure 3 is a schematic diagram of a conventional gallium gallium structure, including: one stone applied to one metal titanium (Ti) layer 31, distributed over 30 to form a Schottky contact, on top of the metal titanium (Ti) layer 31, The (Au) layer 33 'is distributed over the metal. When the component is used in the copper process, it is changed from gold to copper metal. Therefore, if the metal layer on the surface is gold, a barrier layer is plated in order to prevent the Schottky structured gallium (G) on the gold (GaAs) semiconductor. a A s) semiconductor substrate 30, on a gallium arsenide (GaAs) semiconductor substrate-a metal platinum (Pt) layer 32, distributed to form a diffusion barrier layer, a metal gold (Pt) layer 'forms a Schottky structure, and the metal contacts Wires and air bridges are all shown in Figure 3. As far as the conventional Schottky structure is concerned, the right side must be in contact with the copper wire and must diffuse through the copper.

本發明的蕭基結構可以使後續的銅金屬製程直接鍍The Schottky structure of the present invention enables direct plating of subsequent copper metal processes

:)砷 UiOU 五、發明說明(5) 在蕭基結構i 結構示意圖,包^圖^所示係為本發明之較佳實施例之 屬鈦(了丨)層^ I 鎵(GaAS)半導體基板30, 一金 上,形成蕭基接觸:^於砷化鎵(GaAs)半導體基板30之 鈦(Ti)層31田了擴散障礙層321,分佈於該金屬 銅(Cu)層34,八以阻擋金屬層之擴散;一第一金屬 蕭基結構,俾可:該擴散障礙層321之上,以形成 進一步汽仓丨*〗、戈的銅製程直接鍍在本結構之上。 31係分佈於U說γ,δ如圖四所示;該金屬鈦(⑴層 nm到lOOnmR制〃aAs)半導體基板30上,其厚度為50 :德I程係採用濺鍍或蒸鍍方式。該擴散障 礙層尸1,分佈於金屬鈦(Τι) | ”上,本發明以嫣(w )、、鎢(WN)、鈷(Co)、鈕(Ta)、氮化钽(Ta N或翻(Mo)等耐火金屬材料取代傳統的金屬鉑(pt )作為擴散P早礙層3 2 1,其厚度為3 〇 .到1 〇 〇 nm間,該第 金屬銅(Cu)層34為最上層,分佈於該擴散障礙層 3 2 1上’以金屬銅取代傳統的金屬金,其厚度為2 〇 〇 nm到 500nm間。因為鎢(w)、鈷(Co)、鉬(Mo)等耐火金 屬材料和金屬鉑(pt)相比較,有較低的電阻值,同時 也不易和金屬銅起反應,另外,金屬銅和金屬金相比, 也有較低的電阻值和較佳的熱傳導性質,同時當元件改 為銅製程時,此種結構可以直接和銅製程結合,由於本 發明的整體電阻值在相同厚度下,相較於傳統如圖三所 示結構的電阻值低’因此能大幅提高元件特性,為一合 理完善之創作’不僅具備優良之實用性,而且在設計上 540160 五、發明說明(6) 屬前所未有的創新,具新穎性。 一般傳統如圖三所示之結構,係採用蒸鍍方式鍍膜 。若使用濺鍍方式,鍍膜時的晶片表面溫度較低,較不 易破壞光阻的形狀,本發明的擴散障礙層3 2 1是採用濺 鑛的方式鑛上,該金屬鈦(Ti)層31及第一金屬銅(Cu )層3 4,係採用濺鍍或蒸鍍方式鍍上。 當元件使用到銅製程的時候,一般傳統如圖三所示 之結構,最表面金屬金層3 3若要和銅導線接觸必須在中 間鍍上一層阻礙層以防止金和銅的擴散,本發明之一種 在砷化鎵(GaAs)半導體上的蕭基結構可以使後續的銅金 屬製程直接鍍在閘極上,不僅為一合理完善之創作,亦 屬突破習知技術窠臼的高度發明,相當具有進步性。 綜上觀之,本案業已符合發明專利之各項申請要件 ,懇請鈞局於以詳查,並賜予應得之發明專利,實為 感禱。 雖然本發明已以較佳實施例揭露如上,然其並非用 以限定本發明,任何熟悉本技藝之人士,在不脫離本發 明之精神和範圍内,當可做些許之更動與潤飾,因此本:) Arsenic UiOU V. Description of the invention (5) Schematic diagram of the structure of the Schottky structure i, including ^ Figure ^ shows the preferred embodiment of the present invention is a titanium (metal) layer ^ I gallium (GaAS) semiconductor substrate 30. A gold-based contact is formed: a titanium (Ti) layer 31 on a gallium arsenide (GaAs) semiconductor substrate 31 has a diffusion barrier layer 321, and is distributed on the metal copper (Cu) layer 34. Diffusion of the metal layer; a first metal Schottky structure, it is possible: the diffusion barrier layer 321 is formed to form a further vapor warehouse, and the copper process is directly plated on the structure. The 31 series are distributed in U, γ and δ as shown in FIG. 4; the metal titanium (HaAs layer made of samarium layer nm to 100nmR) semiconductor substrate 30 has a thickness of 50: the German I process uses sputtering or evaporation. The diffusion barrier layer body 1 is distributed on the metal titanium (Ti) | ". The invention uses Yan (w), tungsten (WN), cobalt (Co), button (Ta), tantalum nitride (Ta N or titanium) (Mo) and other refractory metal materials replace the traditional metal platinum (pt) as the diffusion P early barrier layer 3 21, the thickness of which is between 3.0 and 100 nm, the first metallic copper (Cu) layer 34 is the uppermost layer Distributed on the diffusion barrier layer 3 2 1 'Replace traditional metallic gold with metallic copper, with a thickness between 2000 nm and 500 nm. Because tungsten (w), cobalt (Co), molybdenum (Mo) and other refractory metals Compared with platinum metal (pt), the material has a lower resistance value, and it is not easy to react with metal copper. In addition, metal copper also has a lower resistance value and better thermal conductivity than metal gold. When the component is changed to the copper process, this structure can be directly combined with the copper process. Since the overall resistance value of the present invention is at the same thickness, the resistance value is lower than that of the traditional structure shown in Figure 3. Therefore, the device characteristics can be greatly improved. , For a reasonable and perfect creation 'not only has excellent practicality, but also in design 54016 0 V. Description of the invention (6) It is an unprecedented innovation and novelty. The general structure shown in Figure 3 is deposited by evaporation. If the sputtering method is used, the surface temperature of the wafer during coating is lower than The shape of the photoresist is not easy to break. The diffusion barrier layer 3 2 1 of the present invention is deposited on the ore by sputtering. The metal titanium (Ti) layer 31 and the first metal copper (Cu) layer 3 4 are formed by sputtering or When the component is used in the copper process, the structure is generally shown in Figure 3. The top surface metal gold layer 3 3 must be plated with a barrier layer in the middle to contact the copper wire to prevent gold and copper. Diffusion, a Schottky structure on a gallium arsenide (GaAs) semiconductor according to the present invention can enable subsequent copper metal processes to be directly plated on the gate electrode, which is not only a reasonable and perfect creation, but also a highly invented breakthrough of the conventional technology In summary, this case has already met the various application requirements for invention patents, and I urge you to investigate them in detail and grant the patents you deserve. It is really a prayer. Although the present invention has been compared with The foregoing descriptions, they are not intended to limit the invention by any person familiar with this art, the present invention without departing from the spirit and scope, as modifications and variations do little of, and therefore the present

540160 圖式簡單說明 圖式說明 圖一係為高電子遷移率電晶體(HEMT)結構示意圖; 圖二係為本發明蕭基結構之結構示意圖; 圖三係為習用之砷化鎵(GaAs)半導體上的蕭基結構之結 構不意圖, 圖四係為本案發明之較佳實施例之結構示意圖; 主要元件符號說明540160 Schematic illustrations Schematic illustrations Figure 1 is a schematic diagram of a high electron mobility transistor (HEMT) structure; Figure 2 is a schematic diagram of a Schottky structure of the present invention; Figure 3 is a conventional gallium arsenide (GaAs) semiconductor The structure of the above-mentioned Schottky structure is not intended, and FIG. 4 is a schematic structural diagram of a preferred embodiment of the present invention;

半絕緣坤化鎵半導體基板-----1 蕭基結構-------------------2 金屬銅空氣橋---------------3 空氣-----------------------4 金屬銅層-------------------5 η-型砷化鎵-----------------6 氮化物---------------------7 砷化鎵半導體基板-----------30 金屬鈦(Ti)層-------------2卜31 金屬舶(Pt)層-------------32 金屬金 (Au) 層-------------33 擴散障礙層-----------------22、321 第一金屬銅(Cu)層---------23、34Semi-Insulated Kunhua Semiconductor Substrate ----- 1 Schottky Structure ------------------- 2 Metal Copper Air Bridge ---------- ----- 3 Air ----------------------- 4 Metal copper layer ---------------- --- 5 η-type gallium arsenide ----------------- 6 nitride -------------------- -7 gallium arsenide semiconductor substrate ----------- 30 metal titanium (Ti) layer ------------- 2b 31 metal port (Pt) layer --- ---------- 32 Metal gold (Au) layer ------------- 33 Diffusion barrier layer ---------------- -22, 321 The first metallic copper (Cu) layer --------- 23, 34

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Claims (1)

540160 六、申請專利範圍 1.一種在砷化鎵(GaAs)半導體上的蕭 構,包括: 一坤化蘇(GaAs)半導體基板, 一金屬鈦(T i)層,分佈於該神化 板上,以形成蕭基接觸; 一擴散障礙層,分佈於該金屬鈦( 擋金屬層之擴散;以及 一第一金屬銅(Cu)層,分佈於該 形成蕭基結構;藉由該擴散障礙層 (Cu)金屬製程直接鍍在第一金屬 2 .如申請專利範圍第1項所述之一種 導體上的蕭基結構,其中金屬鈦( 是5 0 n m到1 0 0 n m之間。 3 .如申請專利範圍第1項所述之一種 導體上的蕭基結構,其中金屬鈦( 濺鍍或蒸鍍方式。 4 .如申請專利範圍第1項所述之一種 導體上的蕭基結構,其中擴散障礙 (W)、氮化鎢(WN)、鈷(Co) 钽,(TaN)或鉬(Mo)等耐火金屬4 5 .如申請專利範圍第1項所述之一種 導體上的蕭基結構,其中擴散障礙 或蒸鍍的方式。 6 .如申請專利範圍第1項所述之一種d 基(Schottky)結 鎵(GaAs)半導體基 Ti)層上,用以阻 擴散障礙層上,以 ,俾可使後續的銅 銅(Cu)層。 ί石申化鎵(GaAs )半 Ti)層其薄膜厚度 L石申化錄(GaAs)半 Ti)層製程係採用 L石申化蘇(G a A s )半 層材料,係選自鎢 鈕(Ta)、氮化 料中擇一者。 ί石申化蘇(GaAs)半 層製程係採用濺鍍 L砷化鎵(GaAs)半 540160 六、申請專利範圍 導體上的蕭基結構,其中擴散障礙層薄膜厚度係是3 0 n m到1 0 0 n m之間。 7. 如申請專利範圍第1項所述之一種在砷化鎵(GaAs)半 導體上的蕭基結構,其中第一金屬銅(Cu)層薄膜厚 度係是2 0 0 n m到3 5 0 n m之間。 8. 如申請專利範圍第1項所述之一種在砷化鎵(GaAs)半 導體上的蕭基結構,其中第一金屬銅(Cu)層製程係 採用濺鍍或蒸鍍方式。540160 6. Scope of patent application 1. A structure on a gallium arsenide (GaAs) semiconductor, including: a KunAs semiconductor substrate, a metal titanium (Ti) layer, distributed on the deification plate, Forming a Schottky contact; a diffusion barrier layer distributed over the metal titanium (blocking metal diffusion layer); and a first metal copper (Cu) layer distributed over the forming Schottky structure; through the diffusion barrier layer (Cu ) The metal process is directly plated on the first metal 2. The Schottky structure of a conductor as described in item 1 of the scope of patent application, wherein the titanium metal (is between 50 nm and 100 nm. 3. If applying for a patent The Schottky structure on a conductor according to item 1 in the scope, wherein metal titanium (sputtering or evaporation method. 4. The Schottky structure on a conductor as described in item 1 in the patent application scope, wherein the diffusion barrier ( W), tungsten nitride (WN), cobalt (Co), tantalum, (TaN), or molybdenum (Mo) and other refractory metals 4 5. A Schottky structure on a conductor as described in item 1 of the scope of patent application, in which diffusion Obstacle or vapor deposition method 6. As described in item 1 of the scope of patent application A d-based (Schottky) gallium (GaAs) semiconductor-based Ti) layer is used on the diffusion barrier layer so that subsequent copper-copper (Cu) layers can be made. ) Layer with a thin film thickness of L Shishen Hualu (GaAs) half Ti) layer process uses L Shishen Hua Su (G a As s) half layer material, which is selected from tungsten button (Ta), nitride By.石 Shi Shenhua's (GaAs) half-layer process system uses sputtered L-GaAs half-540160 6. Patent-based structure on the conductor, in which the thickness of the diffusion barrier film is 30 nm to 10 Between 0 nm. 7. The Schottky structure on a gallium arsenide (GaAs) semiconductor as described in item 1 of the scope of patent application, wherein the thickness of the first metal copper (Cu) layer film is between 200 nm and 350 nm. between. 8. A Schottky structure on a gallium arsenide (GaAs) semiconductor as described in item 1 of the scope of the patent application, wherein the first metal copper (Cu) layer is fabricated by sputtering or evaporation. 第12頁Page 12
TW91115624A 2002-07-12 2002-07-12 Schottky structure on GaAs semiconductor substrate TW540160B (en)

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