TWI222172B - Semiconductor wafer dividing method and semiconductor chip without edge cracking produced by the method thereof - Google Patents

Abstract

Semiconductor wafer dividing method and semiconductor chip without edge cracking produced by the method thereof are provided. The method comprises the following steps. Provide a semiconductor wafer that contains plural scribe lines along the column and row directions and plural chips divided by the scribe lines. Adhere the said wafer on a dicing tape. Cut the wafer along the scribe line extending to the column/row direction. At least along the column direction or row direction, the wafer dicing does not separate the wafer completely, that is, remaining tiny connection among the chips. Bring some mechanical force on the dicing tape to divide the wafer to plural independent chips.

Description

1222172 V. Description of the Invention (l) [Field of the Invention] The present invention relates to a semiconductor process, and particularly to a semiconductor process method for separating a semiconductor wafer into a plurality of wafers. This method can solve the problem of chip edge cracking. This improves yield and reduces costs. [Background of the Invention] As shown in FIGS. 1A to 1C, the conventional process for separating a semiconductor wafer into a plurality of wafers is shown, and FIGS. 1B and 1C are cross-sectional views taken along line AA of FIG. 1a. . As shown in FIGS. 1A and 1B, the semiconductor wafer 120 is composed of a plurality of wafers 1 2 4 separated by a plurality of saw streets 122 extending in the row and column directions; the dicing tape 1 1 〇 is composed of a base sheet u 2 and a pressure-sensitive adhesive layer 114. As shown in FIG. 1 b, before the dicing, the semiconductor wafer 120 is attached to the dicing tape 11 ； as shown in FIG. 1 c, for example A rotating diamond blade (not shown in the figure) cuts the semiconductor wafer 120 into a plurality of wafers 124 along the dicing path 122 and leaves the semiconductor wafer 1 20 and the pressure-sensitive adhesive layer 11 4 The cut surface 1 2 6 of the A material 11 2 was not cut through. However, during the cutting process, especially when cutting in the row or column direction, 'the shrinkage of the unseparated portion of the semiconductor wafer 1 2 0 makes the bearing between the ☆ rotating diamond knife and the semiconductor wafer 12 0 The semiconducting force of the applied force is reduced to a minimum, and the mass of 09 ® made on the semiconductor wafer 20 is maximized. Therefore, it is easy to cause the edge of the wafer during the cutting process. Chip out (Chip out), can seriously cause the farewell effect of cracking and reduce the yield of the process. Missing

1222172 V. Description of the invention (2) One of the features of the present invention is to provide a semiconductor process, and in particular relates to a semiconductor process method for separating a semiconductor wafer into a plurality of wafers. This method can solve the problem of chip edge cracking. Problems, which in turn increase yields and reduce costs. Even if slight chip edge chipping does not cause chip failure, the chip chipped portion will still cause reliability problems after the packaging process.纛 Figure 2 is a flowchart of the front-end process of a general semiconductor package; Figures 38 to ^ are partial cross-sectional views of a semiconductor package, in which wafer edge cracking does not occur on wafer 3 24 in FIG. 3A, and in FIG. 3B The wafer 324 shown in the figure has chipped at the edge of the wafer. Please refer to FIG. 3A. The wafer bonding 230 process is performed on a specific position of the sealing substrate 3 3 0, and an epoxy 3 3 〇 for bonding die is applied, and then the wafer 3 2 4 is bonded, and the ring for bonding the die is applied. Oxygen resin 3 4 0 overflows on the bottom surface of the wafer 3 2 4 so that the epoxy resin 350 for sealing will not invade the bottom of the wafer 324 during the subsequent sealing process of 250 to avoid the use environment of the post-processing or the final product. Under the thermal stress cycle, the sealant used to invade the bottom of the wafer 3 2 4 with oxygen resin 3 5 0 at the interface between the wafer 3 2 4 and the die-bond epoxy resin 3 4 〇 The interface between 340 and the package substrate 330 causes cracks and accelerates the failure of the semiconductor package.

Please refer to FIG. 3B. Even if the epoxy resin 34 for die bonding is overflowing on the wafer 324; but the wafer edge cracking occurs on the wafer 324 'and the missing part = may leave an empty area 352, and During the process of sealing compound 250, one adhesive invades with epoxy resin 350 and the above-mentioned semiconductor package is increased.

1222172

However, the second feature of the present invention is that the semiconductor wafer is damaged, and the two processes are separated and there is no edge-to-edge wafer adhesion. In the semiconductor packaging process, Δ is used for daily nuclear oxygen. The resin can fill the space between the package substrates, avoiding the semiconductor sealing dream due to the sealing of the wafers and the use of the Japanese film /, and the noise of the tree and the neodymium into the wafer between the resin and the wafer.舻 "sticky day-to-day daily use milk [previous technique] " Moon chemical health. Refer to Figure 4, Figure 'Cross-section view of Ru-πη Α wafer 420, a semiconductor for flip-chip packaging ; Iu? N's τ & metal bump 426 is protruding from the semiconducting =,, if the front side of the semiconductor wafer 420 is subjected to _ force Example: :: force, its compressive stress will flatten Jin Guang to the application The bump extension 'caused the adjacent metal bumps to be lost due to bridging. ^^ = It is because the bumps on the 4th and 26th are low in height and cannot be connected to the corresponding pads on the packaging soil plate in the packaging process. Please refer to Figure 5, which shows the "copper made" disclosed in the Republic of China Patent Application No. 488021. Design of metal pads for wire bonding when used with low dielectric materials ", metal pad 526 extends from the opening of the protective layer and covers over the protective layer 528 and extends to the adjacent pad, so the metal 'J: dry pad 526 The distance between them will be much smaller than that of general metal pads for wire bonding. Once subjected to stress such as compressive stress, the compressive stress will make the metal pad 526 more extend to the adjacent pads, so that the adjacent metal pads The pad 526 bridges the circuit and causes the chip 522 to fail. ^ The third feature of the present invention is to provide a semiconductor process. In particular, it relates to a semiconductor process method for cutting a semiconductor wafer into a plurality of wafers. This method can not only change the existing process equipment without changing the existing process equipment.

0503-8377TWF; TSMC2001-1382; dwwang.ptd $ 6 pages 1222172 V. Description of the invention (4) The problem of chip edge cracking, and it can be applied to various semiconductor wafer manufacturing processes: various semi-circular surfaces after semi-C cause some damages. + Conductor wafer without semiconductor crystal [Summary of the invention] [Detailed description of the invention] The main object of the present invention is the semiconductor manufacturing process of several wafers: separating semiconductor wafers into complex gates, and then: : Ϊ́: The method can solve the problem of chip edge cracking, thus achieving the same yield and reducing costs. Another object of the present invention is to provide a semiconductor wafer manufacturing method for a plurality of wafers. This method can be used to replicate existing and future advanced technologies at the lowest cost under the replication equipment; the wafer configuration and current circle are not affected by the semiconductor wafer. Surface can cause injury. Cattle conductor said that another object of the present invention is to provide an existing semiconductor wafer with a shape which can ensure that in the process of edge-making: split two-adhesion, the epoxy resin material used for sticking crystals is avoided to avoid sealing. Resin invades the soil between the wafer and the wafer, and the semiconductor package is accelerated to fail. * Reading lipids According to the above purpose, the present invention provides a semiconductor manufacturing method for semiconducting a plurality of wafers, including the following main knives, divided into two: a conductor wafer containing the above semiconductor wafers in a row direction * column j: l extension Of multiple cutting lines and the wafers separated by them; \ 1222172 V. Description of the invention (5) The semiconductor wafer is adhered to a cutting tape; and the cutting lines extending in the direction of the columns are cut separately. At least one of the semiconductor wafers in the row direction or the column direction along the above-mentioned row side is truly transparent to the above-mentioned wafer; then, when the cutting tape is applied for cutting, the uncut semiconductor wafer is separated into a plurality of individual ones. Semiconductor f mechanical force, so that in addition to the above, the present invention achieves a borderless j-piece. Containing a wafer body having a semiconductor wafer on which electrons are formed and a second surface on which no electronic component is formed; and a first surface of the present component and the wafer body from the second surface Flat two j, integrally formed in [example] 卞 仃 extended. First Embodiment: Please refer to FIGS. 6A to 6J. The 6A to 6E series show + Tian,, and other types of semi-two dichotomy that separates a semiconductor wafer into a plurality of wafers: the first series M and the second series 6A Figure is a cross-sectional view along the CC line; _ ~ 6Η shows three views of a separated semiconductor wafer of the present invention without edge cracking;% 61 ~ 6 J shows a separated and no Partial cross-sectional view of a semiconductor package manufactured by a semiconductor chip with edge cracking. The semiconductor manufacturing method capable of accurately separating a semiconductor wafer into a plurality of wafers according to the present invention is applicable to a semiconductor wafer 620 that has completed a semiconductor process and has a front surface and a bottom surface, and the front surface including the semiconductor wafer 62. The plurality of scribe lines 62 2 extending in the row direction and the column direction and the plurality of wafers 6 2 4 ′ separated therefrom include the following steps: Step-

0503-8377TW; TSMC200M382; dwwang.ptd Page 8 1222172 V. Description of the invention (6) Female Figure 6 A, as shown in Figure 6A, will have a plurality of cutting lanes 622 extending along the row and column directions and the plurals separated by them. An example of a semiconductor wafer of the individual wafer 624 is the bottom surface of the semiconductor wafer 620 having a thickness of 8 to 20 mU, which is adhered to the pressure-sensitive adhesive layer 6 丨 4 of the dicing tape 6 1 0, such as the dicing tape 6 1 0. Step 2 As shown in the figure ^ 6 ^, a plurality of cutting tracks 6 2 2 are extended along the front side of a circle 6 2 0 with a rotating diamond knife (not shown in the figure) 6 2 2 = Don't cut semiconductors Wafer ㈣ without cutting through the semiconductor wafer 620; as shown in the figure, a groove 626 having a bottom surface and one side surface is formed, from the bottom surface of the recess 2 丄 6 to the bottom surface of the semiconductor wafer 620, leaving Under 0.5 mm 1 ~ 2 mil or 1% ~ 40% of the thickness of the semiconductor wafer 620, preferably about 2.5% ~ 25% of the thickness of the conductor wafer 620 without cutting through value. 〆 Step 3 Benya :? As shown in the figure, a plurality of cutting lanes 622 flutes (ΓγΊ ^ cut the semiconductor wafer 62G) are extended by a rotating diamond knife (not shown in the figure) along the front side of the = Japanese yen 620. Cut through the semiconductor wafer 620; as shown by β, a groove 626 having a bottom surface and one side surface is formed, from the bottom surface of the groove 62 6 to the bottom surface of the semiconductor wafer 62, leaving 0.5 ~ 2 mi 1, The thickness is about 1 m 丨 1. The fourth step, as shown in Figure 6D, on the substrate sheet 612 of the cutting tape 61 ′ is rotated by the pressing device 664 in the B direction and is rolled in the A direction. The coming wafer 620 'where the M force is based on the material f of the semiconductor wafer 62q, the thickness of the wafer, the thickness left uncut through, the number of wafers 624 and other factors ~

U 0503-8377TWF, TSMC2001 · 1382; dwwang.ptd Page 9 1222172 V. Description of the invention (7) 较好 'is preferably: 10 g ~ 10 Kg; at this time, the fracture surface 628 is from the bottom of the groove 626 to the semiconductor crystal The bottom surface of the circle 6 2 0 extends until the adjacent wafer 6 2 4 is completely separated. Step 5 As shown in FIG. 6E, the dicing tape 610 is irradiated with energy rays, preferably ultraviolet rays, to reduce the viscosity of the pressure-sensitive adhesive layer 614 and to make the wafer 624 easily detach from the pressure-sensitive adhesive layer 6 1 4. In step two In the process, because the semiconductor wafer 62 is not completely separated, during the dicing process, the quality of the entire wafer 62 is used to withstand the rotating diamond knife (not shown in the figure) and the semiconductor wafer 6 2 0 Therefore, the edge cracking of the wafer 624 due to vibration will not occur. Similarly, in step 3, because the semiconductor wafer 62 is not completely separated, during the cutting process, the entire crystal is Circle 6 2 〇 mass to withstand the force between the rotating diamond knife (not shown) and the semiconductor wafer 62

Therefore, edge chipping of the wafer 624 due to vibration will not occur. X In step 4, the pressing device 664 presses the semiconductor wafer 62 on the surface of the base sheet 612 of the dicing tape 61o. At this time, the pressing device 664 only acts on the bottom surface of the semiconductor wafer 620, so in step In the fourth, even if the front side of the semiconductor wafer 620 has a metal bump or a metal layer extending and covering the protective layer, the front side of the semiconductor wafer 62 will not be harmed. In addition, as shown in FIGS. 6F to 6H, these are three views of the wafer 624 without edge cracking manufactured in the first embodiment, including the wafer body 625 and the protruding portion.

Page 10 1222172 V. Description of the invention (8) 2 m i 1, preferably about 1 623, wherein the maximum thickness of the protruding portion 623 is 0.1 mil, where it is connected to the chip body 625. As shown in FIG. 6I, the semiconductor package manufactured with the first embodiment 624 is arranged on the wafer 624 column, and Ϊ = grease 640 is between the wafer 624 and the package substrate 630, 640, between ' & Emulsion resin 65 ° invades the wafer 624 and the die attach epoxy 624 as it does not use the wafer bonding of the first embodiment without edge cracking. Partial cross-sectional view of the body in the direction of the row of the wafer 6 2 4 And 4 ° is between the wafer 624 and the package substrate 630, and between 640 'the coating resin 650 invades the wafer 624 and the epoxy resin for sticking to the crystal. The second embodiment: a picture of the' M ~ M series shows Illustrate the invention

Beans are divided from 2 conductor wafers / separated into multiple wafers. Semiconductor process method 2 7D, 7E are sectional views along line BB in Figure 7A, and sectional views along line CC in Figure 7C and Π; Figures 7F ~ 7H It shows the third view of a semiconductor wafer that has been separated / separated and has no edge cracking according to the present invention; the first figure | ^ shows that the semiconductor package manufactured with a separated and without edge cracking of the present invention ^ Partial sectional view. According to the present invention, a semiconductor manufacturing process for separating a semiconductor wafer into a plurality of wafers is performed on a Japanese yen 720 including a semiconductor wafer 720 that has completed a semiconductor process and has a front surface and a bottom surface. A plurality of cutting lines 72 2 extending along the row square σ /, column direction and the plurality of cutting roads separated by the cutting lines 72 2

1222172 V. Description of the invention (9) Wafer 724, which includes the following steps: As shown in FIG. 7A, a semiconductor having a plurality of scribe lines 722 extending in a row direction and a column direction and a plurality of wafers 724 separated therefrom The bottom surface of the wafer 720, for example, a semiconductor wafer 72 ° having a thickness of 8 to 20 mi, is adhered to the pressure-sensitive adhesive layer 714 of the dicing tape 710, such as the dicing tape 710. " As shown in FIG. 7A, a plurality of cutting tracks 7 2 2 are extended along the front side of the semiconductor wafer 7 2 0 by a rotating diamond knife (not shown in the figure), and the semiconductor wafer is not cut by the knife. Circle 720, and not cut through the semiconductor wafer 72o; as shown in FIG. 7B, a groove 726 having a bottom surface and one side surface is formed, from the bottom surface of the groove 726 to the bottom surface of the semiconductor wafer 72o, leaving 0.5 mu ~ 2 mi 1 or 1% ~ 40% of the thickness of the semiconductor wafer 620, preferably about 1 mi ~ or 2.5% ~ 25% of the thickness of the conductor wafer 620 without being cut through. Step three, as shown in FIG. 7A, cut with a rotating diamond knife (not shown on the front surface of the semiconductor wafer 720 in the plurality of rows extending in a column direction; 22 ′ respectively cut the semiconductor wafer 72), and Cut through the semiconductor wafer 720 in the column direction, and cut through the pressure-sensitive adhesive layer 714 of the dicing tape 71. Cut the base sheet layer 712 of the tape 710, as shown in FIG. 7C, and form the fourth step as shown in FIG. 7D. As shown, on the 712 side of the base sheet 710 of the cutting tape 71, the pressing device 764 is rotated in the B direction and rolled in the a direction to press the recording half.

1222172 V. Description of the invention (ίο) Conductor wafer 720, in which the pressure is determined according to the material of semiconductor wafer 72, the overall thickness, the thickness left uncut through, the number of wafers 724, etc., preferably: 10 g ~ 10 Kg; at this time, the fracture surface 728 extends from the bottom of the groove 726 to the bottom surface of the semiconductor wafer 720 until the adjacent wafers are completely separated. Step 5: As shown in FIG. 7E, a horizontal tension T1 is applied along the radial direction of the substrate sheet 712 of the cutting tape 71 °, so that the wafer 724 is easily detached from the pressure-sensitive adhesive layer 71 4; the horizontal tension T1 is in accordance with The material and extent of the base sheet 712 of the dicing tape 7 and 10, the viscosity of the pressure-sensitive adhesive layer 714, and the material and area of the semiconductor circle 720 are determined, and are preferably 10 g to 1 () ^. In step two, since the semiconductor wafer 72 is not completely separated, during the cutting process, the entire wafer 72.0 quality is used to withstand the rotating diamond knife (not shown in the figure) and the semiconductor wafer 72. Therefore, the edge cracking of the wafer 824 due to vibration will not occur. In step three, since the semiconductor wafer 72o is not completely separated in step two, even if the semiconductor wafer 72o is cut during the dicing process, the rotary diamond knife (not (Shown in the figure) and the force between the semiconductor wafer 720, so the edge chipping of the wafer due to vibration will not occur. In step four, the pressing device 764 presses the semiconductor wafer 72 on the surface of the base sheet 712 of the dicing tape 7ig. At this time, the pressing device 764 acts only on the bottom surface of the semiconductor wafer 720, so in step four, even if The front side of the conductor wafer 720 has metal bumps or extensions i to cover the protection

Page 13 1222172

The metal layer on the damaged layer will still not be damaged on the front side of the semiconductor wafer 72. In addition, as shown in FIG. 7F, the thickness of the protruding portion 723 as in the second embodiment (semiconductor, preferably at the wafer) Partial cross-section of wafer with edge cracked substrate 7 3 0 and wafer with chip edge cracked. Partial cross-section of substrate 730 and wafer 724 with epoxy chip tacked wafer, including wafer body 725 ^ The maximum thickness of the protruding portion 723 is the thickness of the wafer body m-body wafer 720, which is about 1% to 40% of the body 725. About 10% of the body 725 is connected to the wafer body 725 as shown in FIG. 7G. In the second embodiment, the semiconductor mounting body made by & 724 in the direction of the wafer 724 column pattern 'Epoxy 740 for die bonding between the chip 724 and the package' and epoxy 750 without sealant invaded to Wafer 724 between resin 740. As shown in FIG. 7H, the semiconductor package manufactured with the edgeless 724 of the second embodiment is a 724-row pattern of the wafer, and the die attach epoxy 740 is interposed between the wafer 724 and the package, and there is no ring for sealing. Oxygen resin 750 invades between wafer 724 and resin 740. Third Embodiment: Please refer to FIGS. 8A to 81. The 8A to 8D series show a method for semiconductor process for separating a semiconductor wafer into a plurality of wafers according to the present invention. The 8B, 8D, and 8E series are shown in FIG. FIG. 8A is a cross-sectional view taken along the line BB, and FIG. 8C is a cross-sectional view taken along the line S8A of FIG. CC: FIG. 18g is a third view of a separated semiconductor wafer without edge cracking according to the present invention; The figure shows a separated and non-edge chipped

1222172 V. Description of the invention (12) Accredited: I: I ί :: Partial cross-sectional view of conductor package. The method of the present invention is applicable to a semiconductor process in which a semiconductor wafer is separated into a plurality of wafers. The semiconductor semiconductor is a semiconductor process and has a front surface and a bottom surface extending in a row direction. The front surface including the semiconductor wafer 8 2 0 is included. The plurality of cutting paths M2 along the side am024 and the plural ones separated by them are called Z4, jMi pj — I. Eight daggers The following steps: Step one this + ΐ7A Figure 7F 'will have along A plurality of 820 razor pass factories 82J extending in the row direction and the column direction and the semiconductor wafers 824 of the plurality of wafers 824 that are separated by them. The bottom surface of the semiconductor wafer 820 with a phosphine of 8 to 20 mils is adhered to the angle of 81 °. O For example, on the pressure-sensitive adhesive layer 814 of the dicing tape 810. The main path of step two: as shown in the figure, a plurality of cutting paths 8 2 2 are extended along the front side of the -BΘ circle 8 2 0 with a rotating diamond knife (not shown in the figure), and the semiconductors are to be individually cut. Wafer 82 () without cutting through the semiconductor wafer 820; as shown in FIG. 8B, a groove 826 having a bottom surface and one side surface is formed, from the bottom surface of the groove 826 to the bottom surface of the semiconductor wafer 820, leaving 0.5 mil to 2 mil or 1% to 40% of the thickness of the semiconductor wafer 620, preferably about 1 mil or 2.5% to 25% of the thickness of the semiconductor wafer 620 without being cut through. Step three again

As shown in FIG. 8A, a plurality of cutting lanes 622 extending in a columnar direction along the front side of the semiconductor wafer 820 with a rotating diamond knife (not shown in the drawing) are used to cut the semiconductor wafer 820, respectively, and Cut through the conductor wafer 820 in the column direction, and cut through the pressure-sensitive adhesive layer 8lj of the dicing tape 810 without cutting.

1222172

As shown in FIG. 8C, the base sheet layer 812 of the through-cutting tape 810 is formed into a section 82 7. Step 4 is shown in FIG. 8D along the radial direction of the base sheet 812 of the cutting tape 8 10. With horizontal tension T2; at this time, the fracture surface 828 extends from the bottom of the groove 826 to the bottom surface of the semiconductor wafer 8 2 0 until the adjacent wafer 8 2 4 is completely separated; and at the same time, the wafer 8 2 4 is easily released from the pressure. The adhesive layer 8 1 4; the horizontal tension T2 is based on the material and thickness of the base sheet 812 of the dicing tape 810, the viscosity of the pressure-sensitive adhesive layer 8 1 4, the material of the semiconductor wafer 8 2 0, and the remaining The thickness that has not been cut through, the number and area of the wafers 824 are determined by factors such as 10 g to 10 K g. In step two, since the semiconductor wafer 820 is not completely separated, during the dicing process, the quality of the entire wafer 8200 is used to withstand the rotating diamond knife (not shown in the figure) and the semiconductor wafer 82. Therefore, the edge chipping of the wafer 8 2 4 due to vibration will not occur. In step three, since the semiconductor wafer 820 is not completely separated in step two, during the dicing process, even if the semiconductor wafer 820 is cut through, the quality of the entire wafer 820 can withstand the rotating diamond knife ( (Not shown in the figure) and the force between the semiconductor wafer 820 and the chip 824 due to vibration will not occur. In step 4, the “horizontal tension D 2” acts on the radial direction of the base sheet 812 of the dicing tape 810. At this time, the dicing tape 810 is deformed, so that the shear stress acts on the pressure-sensitive adhesive layer 814 and the semiconductor crystal. The bottom surface of circle 82 can not only completely separate adjacent wafers 824, but also reduce wafers 824.

1222172 V. Description of the invention (14) ---- It is easy to separate from the adhesive force of the sensitive adhesive layer 814; therefore, at step = ii even if the front side of the semiconductor wafer 820 has metal bumps or extensions, The metal layer overlying the protective layer does not cause any damage to the front side of the semiconductor wafer 820 because no stress acts on it. In addition, as shown in FIG. 8E, it is a third view of the wafer 824 without edge clothing manufactured in the third embodiment, including the wafer body 825 and the protruding portion 823, wherein the maximum thickness of the protruding portion 823 is 0.5 to 2 It is preferable that it is about 1 mil 'at the place where the chip body 825 is connected. As shown in FIG. 8F, a partial cross-sectional view of the semiconductor package manufactured using the wafer 824 without edge cracking of the third embodiment in the direction of the 8th to 24th rows of the wafer. The epoxy resin 840 for die bonding is interposed between the wafer 824 and the wafer 824. Between the package substrate 830 and the non-sealing epoxy resin 850 penetrates between the wafer 824 and the die-bonding epoxy resin 840. As shown in FIG. 8G, it is a fragmentary view of the conductor package manufactured in the third embodiment of Infinity 824 in the wafer traveling direction. An epoxy resin 840 for die bonding is interposed between the wafer 8 24 and the sealing substrate 830. In between, the epoxy resin 8500 without sealant penetrates between the wafer 8 2 4 and the epoxy resin 840 for die bonding. As mentioned above, a new semiconductor process according to the present invention is particularly related to a new semiconductor process method for cutting a semiconductor wafer into a plurality of wafers, and a semiconductor wafer that has been separated and has no edge cracking; and Compared with the wafer cutting technology, the present invention has the following advantages: (1) the problem of chip edge cracking can be solved, thereby improving the yield and reducing the cost; (2) it can be solved at the lowest cost without changing the existing process equipment Yue

1222172 V. Description of the invention (15) ------- The problem of chip edge cracking; (3) Will not cause damage to the semiconductor wafer due to positive and negative effects; (4) Can be applied to various semiconductor wafers = damage Chip configuration, as well as various advanced semiconductor crystals and semiconductor wafers made from now and in the future; (5) preventing the acceleration of semiconductor packages and the formation of processes. Therefore, the present invention can solve the problem of disappointment due to the traditional wafer cutting technology, thereby improving the yield and reducing the production cost. Although the present invention has been disclosed in the preferred embodiment as above, the bran restricts the date and time of the hair: Anyone who is familiar with this skill will not leave: Hair: Not for use and within the scope, you can make some changes and Retouching, therefore, the scope of refined arsenic shall be determined as defined in the scope of the attached patent application. $ 明 之 保护

1222172 Schematic illustrations In order to make the above and other objects, features, and comprehensibility of the present invention clear, the following features I μ stove-μ, ^, and advantages can be explained in more detail as follows: Figures, details 1 Α ~ 1C The figure is a series of cross-sectional views used to describe the process of separating a bulk wafer into a plurality of wafers. Baikou's semi-conductor. Figure 2 shows the flow of the front-end process of a general semiconductor package. Figures 3 A to 3B are a series of cross-sectional views, which are used to describe a partial cross-sectional view of a semiconductor body. Xiongyue—Semiconductor Package Figure 4 is a semiconductor wafer used for flip-chip packaging. Figure 5 is a cross-sectional view of the Republic of China Zhiyin 'under Patent Publication No. 488021. The disclosed "copper process is designed in a profit-seeking application with low dielectric materials". The metal bonding pads for wire bonding are used to explain the first embodiment of the present invention, to explain the second embodiment of the present invention, and to explain the third embodiment of the present invention. Figures 6A to 6J are a series of cross-sectional views.苐 7 A ~ 7 J are a series of cross-sectional views. Brother 8 A ~ 8 I are a series of cross-sectional views. [Symbol description] 11 0 ~ dicing tape; 11 2 ~ substrate sheet; 11 4 ~ pressure-sensitive adhesive layer; 1 2 0 ~ semiconductor wafer; 1 2 2 ~ dicing track;

0503-8377TWF; TSMC2001 · 1382; dwwang.ptd page 19 1222172 Brief description of the drawings 1 2 4 ～ wafer, 2 1 0 ～ wafer grinding; 2 2 0 ～ wafer cutting; 2 3 0 ～ wafer adhesion; 2 4 0 ~ bonding wire; 2 50 ~ sealing compound; 324, 324 '~ wafer; 3 3 ~ packaging substrate; 340 ~ epoxy resin for die bonding; 350 ~ epoxy resin for sealing compound; 352 ~ empty area; 420 ~ Semiconductor wafer; 426 ~ metal bump; 5 2 2 ~ wafer; 5 2 5 ~ protective layer opening; 526 ~ base sheet; 528 ~ metal welding pad; 6 1 0 ~ dicing tape; 6 1 2 ~ base sheet 6 1 4 ~ pressure-sensitive adhesive layer; 6 2 0 ~ semiconductor wafer; 623 ~ protruding part; 6 2 4 ~ wafer, 6 2 5 ~ wafer body;

0503-8377TWF; TSMC2001-1382; dwwang.ptd Page 20 1222172 The drawing briefly explains 626 ~ groove; 6 2 8 ~ broken surface; 6 3 0 ~ package substrate; 6 4 0 ~ epoxy tree for die bonding Purpose; 650 ~ epoxy resin for sealant; 664 ~ pressing device; UV ~ ultraviolet light; 7110 ~ cutting tape; 712 ~ substrate sheet; 7114 ~ pressure sensitive adhesive layer; 720 ~ semiconductor wafer 723 ~ protrusion; 7 2 4 ~ wafer; 725 ~ wafer body; 726 ~ groove; 727 ~ cross section; 7 2 8 ~ broken section; 7 3 0 ~ package substrate; 740 ~ epoxy for sticking crystals ; 7 50 ~ epoxy resin for sealing; 764 ~ compression device; Tb tension; T2 ~ tension; 8 10 ~ cutting tape;

0503-8377TW; TSMC2001-1382; dwwang.ptd page 21 1222172 Brief description of the drawings 8 1 2 ~ substrate sheet; 8 1 4 ~ pressure-sensitive adhesive layer; 820 ~ semiconductor wafer; 823 ~ protrusion; 824 ~ Wafer; 825 ~ wafer body; 8 2 6 ~ groove; 827 ~ cross section; 828 ~ broken section; 830 ~ package substrate; 840 ~ epoxy resin for die bonding; 8 50 ~ epoxy resin for sealing.

0503-8377TWF: TSMC200M382; dwwang.ptd page 22

Claims (1)

6. Scope of patent application 1 · A kind of separation semiconductor. U) A method of providing a semiconductor crystal with a 9-circle circle includes the following steps: a plurality of _ extending in the column and column directions, including a row of square chips on the semiconductor wafer, σ k and a plurality of crystals separated by the semiconductor crystal j The circle (c) is cut along the direction of the row, on the dicing tape, and when the semiconductor wafer is cut, and the cutting paths extending at least universally are cut in one direction, respectively. The direction (d) is to cut through the wafer at the cutting declaration; and ya τ cutting tape applies a plurality of individual Feng Mo riding moth forces to divide the semiconductor wafer into an axe body. Wafer. 2. According to the first patent application scope, wherein in the above step (c), the method of “knocking off the semiconductor wafer” by 1% to 40% of the thickness of the wafer = + direction does not cut through the wafer, Leaving the occupants did not cut through the wafer, leaving the occupants: the thickness value through the factory; and the thickness value in the column direction. It accounts for 1% ~ 40% of the thickness of 50% of the thickness, which has not been cut through. * 3: * 0 5 mi 1 * m · 1 from the semiconductor wafer. Λ has not cut through the wafer in the order direction. , Leaving the thickness of m without being cut through; and not being cut through in the direction of the column ... 4 ° such as: 0 & In the method of separating the semiconductor wafer J'C (c) described in item 1 of the broad patent scope, the wafer is not cut through in the row direction, leaving 1 to account for the thickness of the circle. / ❶ ~ 40% of the uncut through thickness cut through the wafer in the column direction. 5. Method for separating semiconductor wafers as described in item 1 of the scope of patent application In the above step (c), the 2 mil slice is cut through the wafer 'without leaving an X value, and the crystal circle is cut through in the column direction. ^, Wherein the method of separating the semiconductor wafer described in step 3 (:) of the above rail, and the method of separating the semiconductor wafer described in item 1 above does not cut through the wafer, leaving the wafer cut through the direction; and the thickness value in the column. 1% ~ 40% of the wafer thickness is not cut as described in item 1 of the patent application scope, wherein the method of rounding the conductor in step (c) above does not cut through the wafer and leaves. Through the wafer; and the value in the column. The circle leaves 0.5 · mi1 ~ 2 «nU's thick sound that is not cut through A Φ2: Method 2 of separating the semiconductor wafer as described in the first item of the scope 2: The method of applying mechanical force in the above step 为 is : Compressing the dicing tape; and the dicing tape further comprises a top wafer having a pressure-sensitive adhesive layer and the semiconductor wafer adhered to the pressure-sensitive adhesive layer. And a lower surface without the pressure-sensitive adhesive layer; and the pressing roller is on the cutting: the lower surface of the tape base, pressing the dicing tape and the semiconductor wafer; and / the roller is cylindrical. 'g 9 · The method for separating a semiconductor wafer as described in item 1 of the scope of the patent application, wherein in step (d), the method of applying mechanical force is to apply the dicing tape along the radial direction of the dicing tape. tension. 10 · The method for separating a semiconductor wafer as described in item 8 of the scope of patent application, wherein the step (d) further includes: irradiating the dicing tape to which the wafer is adhered with energy rays. 丄 ^ 1172 1 1. The method of separating a semiconductor wafer as described in item 8 of the Shen-Jin patent scope, in the step (d) above, the method further includes: applying tension to the dicing tape along the direction r of the dicing tape. 12. —A semiconductor wafer without edge cracking, comprising: a cloth surface; and a surface body formed on the wafer body from the 50th film body 'having—a surface on which an electronic component is formed, a surface and a surface on which the electronic component is formed. A second surface; and a protrusion extending in parallel. Said 1 3. As described in the scope of the patent application No. 丨 2 of the conductor without edge cracking 1; two: / wherein the maximum thickness of the protruding part is the chip body is 0. °. The thickness of the protrusion is increased with the increase of the extension range. &Amp;, and the falling body 1 · As described in the patent application scope No. 12 of the non-edge cracked two wafer, the maximum thickness of the protrusion ^ · 5 ~ 2 ^ 'The thickness of this protrusion decreases to 0 as the extension increases. Crack 15. As described in No. 12, 13, or 14 of the scope of application for patents, there is no edge, ^ " / one of them, a conductor wafer, and the semiconductor wafer contains two sets of side surfaces, and each set of side groups in the protrusion each includes a pair of The intersecting side surface outlets are connected to the two sets of side surface ancestral side surfaces of the wafer body. 1 ρ /, seven iSL edge cracks 1 6 · As in the scope of application for patents No. 丨 2, 13 or i 4 "," A, the semiconductor wafer, and the semiconductor wafer still contains two, group side Each side set of the protrusion includes a pair of disjoint side soils: a combined one / one output portion is connected to each of the two sets of side surfaces of the chip body, Side surface. 0503-8377TWF; TSMC200M382; dwwang.ptd page 25