TWI222150B - An in-situ CD feedforward system and CD control method - Google Patents

Abstract

An in-situ CD feedforward system and CD control method. A substrate with a pre-etch layer is provided, forming a mask layer thereon. The mask layer is defined to form a pattern and the first CD of the mask layer is measured, trimming the mask layer according to the first CD thereafter. The measuring and subsequent trimming step are repeated to ensure the mask layer reaching the target second CD.

Description

1222150

TECHNICAL FIELD The present invention relates to a method and system for controlling semiconductor size, and more particularly, to a method and system for controlling critical size. In the prior art, the current integrated circuit manufacturing process mainly uses thin film deposition, lithography steps, and etching and doping on the wafer to form conductors, semiconductors, and insulating materials to form high-integration electronic components, such as transistors. Or capacitors. $ After entering the ultra-large integrated circuit manufacturing process (ULSI), due to the shrinkage of the critical dimension ^ and the complexity of the multi-layer stacking process, the accuracy of the critical dimension will grow. In order to improve, so the improvement of the key size control method becomes even more important. However, as far as the quality control of wafer manufacturing is concerned, if the critical size control between grains is not good, it will cause the thickness of each line on the same wafer to be different, so the yield of semiconductor wafers produced will be uneven. For example, if the speed of the wafer is different, the stability of the quality cannot be effectively controlled. Therefore, the inter-grain = bond size control factor determines whether the overall wafer quality is consistent. The conventional key dimension control method is shown in FIG. 丨 A. First, a substrate 100 is provided, in which a to-be-etched layer 102 is formed on the substrate, and then a mask is formed> ^ 104 to be surnamed A photoresist layer 106 is formed on the engraved layer and the mask layer 104 is formed. The photoresist layer 106 is defined to form a pattern and a first critical dimension of the photoresist layer is measured by an optical measurement method. Next, as shown in FIG. 1B, with the photoresist layer 106 as the first mask, the mask layer 10 is engraved into a patterned mask layer.

^ 22150 V. Description of the invention (2) ---------, and then modify the mask layer 104a to b according to the first key dimension. As shown in FIG. 1C, the modified mask layer 1041} is used as the second inch to etch the to-be-etched layer 102 so that the to-be-etched layer approaches the target. However, in general, wafers The manufacturing process may include a plurality of single processes, for example, coating, exposure, development, baking, etching, etc. (the so-called plural \ Stage). As shown in Figure 2, this is an example of a single manufacturer of conventional wafer processes. In the example in FIG. 2, the wafer 200 is firstly sent to a thin film sink for film deposition (Film Dep siti ON), and then is sent to a bottom anti-resist coating (BARC) coating chamber 3. BARC coating is performed, followed by photoresist coating in a photoresist coating chamber 40, and a soft baking on a soft baking hot plate 50, followed by feeding into a stepper. 60 exposure process (Exposure), hard baking hot plate 70 (baking), and development through the development chamber (Deveioping), and finally through the photoresist 90 etching resist (Resist The wafer process is completed to obtain the wafer 250. The above-mentioned single processes will affect the critical size of the wafer between the grains. For example, the uniformity of the photoresist coating will determine the difference in critical size of the grains. The baking temperature will affect the thickness of the line width, usually 1. C will change the line width of 6 to 1 Onm. Moreover, as shown in Figure 2, in general wafer processing equipment, 'each single process is used There are more than one manufacturing module, such as thin film deposition chamber 2 0 includes three thin film deposition chambers dpi, Dp, j) p3, BARC coating chamber 30 includes BARC1 and BARC2, and photoresist coating chamber 40 includes two

0503-9976TWf (Nl) * TSMC2003-0031; wayne.ptd Page 6 1222150 V. Description of the invention (3) Photoresist coating chamber RC1 and RC2, soft baking hot plate 50, including SHpi, SHP2, SHP3, for exposure use Three step exposure machines STpi, STp2, STP3, hard baking hot plate 70 including ΗΗρι, HHp2, HHp3, development using DVPi and DVP2 development chambers, and photoresist etching has two photoresistance chambers ETCH1 and ETCH2. Each module of a single process may be used in the crystal process. For example, each process module shown in Figure 2 may generate I 1 296 combinations, which is equivalent to 1 29 6 process module groups. Each process module Different combinations between groups can also cause different cumulative effects on key dimensions. Due to the differences between the different modules of each single process, the control of critical dimensions will have different effects respectively. The conventional key size control method can only measure a compensation plant for each batch of wafers, and make different adjustments based on different programs set on the etching abutment. This method can only achieve one batch. The control of the critical size between a batch and a batch cannot be adjusted for each wafer, and the accuracy of the two-bond size controlled by the conventional method is insufficient. U.S. Patent No. 56 74409 discloses a method for generating nanometers by forming a photoresist layer having a larger width than the target line and `` ashing by oxygen to gather non-volatile substances In the central area of the photoresistor, and thereby reduce the line width to make the target size more accurate. U.S. Patent No. 6 2 354 4 0 discloses a method to control the critical dimension of the gate (Method to control gate CD), which is a method to reduce the critical dimension variation between the wafer and the wafer. It first increases the line width by a fixed value, and determines that all required line widths with the smallest line width are larger, and uses the ruled lines generated by the modified data to define the photoresist and generate critical dimension values.

niim 0503-9976TWf (Nl); TSMC2003-0031; wayne.ptd Page 7 1222150 V. Description of the invention (4) If the critical dimension exceeds the allowable critical dimension, that is to determine the change value between the critical dimension and the target critical scale 1, and follow this The change value is provided to a program to calculate the steps to determine the private order of ashing, so that after the ashing, the correct critical dimension value can be obtained. SUMMARY OF THE INVENTION In view of this, in order to solve the above-mentioned problems, the object of the present invention is to provide an internal feedforward control method and system for a critical size, which can accurately control the critical size of each circle. Make the size of each wafer reach the target value, effectively control the stability of the quality and improve the quality. Another object of the present invention is to provide a key manufacturing method and system that can monitor the etching correction in real time to achieve Precise target key dimensions. To achieve the above object, the method of the present invention includes the following steps: A layer to be etched is on the substrate. The military curtain layer is formed to form a mask curtain layer pattern. The subsequent steps are to modify the cover according to the first critical dimension and the steps to modify the cover layer of the subsequent critical dimension. In order to achieve the above object, the control system of the present invention includes the following component boards, and an optical feed-forward measurement of an internal feed-forward type after measuring the size of the optical key size and providing an internal feed-forward of a critical size. First, provide a The substrate has a curtain layer on the layer to be etched and defines a mask, and measures the first key scale curtain layer of the mask curtain layer. Finally, repeat the measurement steps to achieve the second goal of the cover layer. Provide an inner feed-forward key size. A coin carving machine is used to etch a substrate. The device is set in the etching machine.

1222150 V. Description of the invention (5) An etching process for measuring the critical dimensions of the substrate and returning to the etching. ， ° d machine σ to control the etching machine is obviously easy to understand, letting: 上 上 f: f his purpose, characteristics, and advantages can be explained in more detail, such as the best embodiment, and with the accompanying drawings, This embodiment provides a feedforward key size control system according to the present invention. The present invention provides-a feedforward key size = first, its package: one = connected to 舳 U / to 0, a process gas inlet pipeline 3 06 = 4 outside 1 to enter the process gas, a magnetic field coil 3〇8 is carved on the outer side of the = 4 to maintain the power supply,-the chuck 3130 position i 3 04 to carry the wafer 3 02 'a withdrawal The pipeline 312 is connected to the narrative chamber. An RF power supply 314 is connected to the chuck 3, and a key f measurement device 31 6 is connected to the etching chamber 3 04. This optical measurement device 3 1 6 is connected in this embodiment. It is a macro measuring instrument, which includes a beam emitting device 3 1 8 and a beam receiving device 3 2 0. The beam emitting device 318 is used to emit the incident beam 3 22 to the surface of the substrate 3 02, and according to the surface of the substrate 302 The difference between the pattern profile 326 and the wavelength difference between the reflected beam 3 24 and the incident beam 3 22 is calculated. Based on this, the key dimensions of the pattern profile 3 2 6 on the surface of the substrate 30 are calculated, because of the optical key size measuring device 3 i 6 is combined with I insect carving machine 30 0, and the surface pattern contour 3 of the substrate 302 measured 3 0503-9976TWf (Nl); TSMC2003-0031; wayne.ptd page 9 1222150

= Key size ’can be directly fed back to the engraving machine 300, and real-time control is performed according to the key and the etching process in the sub-etching machine 300. Schematic diagram H of the first embodiment of the closed control method of the present invention. Ding's Inner Feed

As shown in FIG. 4A, a substrate 400 is first provided, and an etching layer 402 of the substrate 400 is provided on the substrate 400. The layer to be etched 402 may be a semi-I layer or a combination thereof. The preferred semiconductor layer is a silicon layer or an amorphous silicon layer. The preferred metal layer is tungsten metal, titanium gold, nickel metal, titanium metal, aluminum metal, or copper metal. The preferred dielectric layer is siliconized silicon. Silicon dioxide or silicon oxynitride. Thereafter, a mask layer is formed on the to-be-etched layer 402 to provide a subsequent etching mask. The mask layer 404 may be a hard mask formed by a dielectric layer. It is preferably silicon nitride or silicon oxynitride. Next, a photoresist layer 406 is formed on the mask layer 404 by a spin coating method, and the photoresist layer 406 is defined by exposure and development to form a pattern.

Take the first wafer with a gate line with a target line width of 85 nm as an example. Because of the limitation of the exposure device, the line width of the photoresist layer 406 defined by the exposure line needs to be larger than the target line width, for example, 105 nm. As shown in FIG. 4B, the photoresist layer 4 06 is used as the first mask, and the mask layer 4 04 is etched into the patterned mask layer 4 04 a after a short period of time. Subsequently, the first critical dimension of the cover curtain layer 404 is measured with an In-Si tu CD feed forward measurement device. Due to the influence of its Etch bias, the line width of its first critical dimension is smaller than the line width of the photoresist layer 406, which is, for example, 93 nm. As shown in Figure 4C, since the feedforward key size measurement device is set at

1222150 V. Description of the invention (7) #In the engraving system, it can directly modify the masking layer 4 〇 4 a according to the _ key dimension without breaking the vacuum. In this embodiment, silicon nitride is used as the masking layer. 'The method of modifying the mask layer may be an isotropic etching method using CHF 3 as an etching gas. Next, as shown in FIG. 4D, the measurement and subsequent steps of modifying the mask layer are repeated so that the mask layer 4 〇 4 b reaches a second key dimension 40 4C which is slightly larger than the target line width, which is, for example, 87nm. Finally, as shown in FIG. 4E, the to-be-etched layer 4 2 is etched with the mask layer 4 04 as the second mask to achieve the to-be-etched layer 40 2 with a target line width of 85 nm. It should be noted that because the influence of the etching tendency on the second critical dimension must be greater than the final target line width by an etching tendency (Etch Bias) value. Take a second wafer with a gate line with a target line width of 85nm as another example. The photoresist layer is defined because of changes in exposure energy, and the photoresist layer is used as the first mask to etch the mask layer. The first critical dimension of the mask layer is slightly larger than the first critical dimension of the first wafer, which can be 98nm. Repeat the measurement and modification steps to achieve the target line width according to the actual situation. For example, it can be modified and measured to obtain a second critical dimension of 93nm, and then repeatedly modified and measured to obtain a third critical dimension of 87 ·, and finally use the mask as the second mask for etching. The layer is etched to reach the layer to be etched & target line 18 5 nm 'so that its line width is the same as the first wafer. In other words, this method can be based on the actual loading conditions of each wafer, for example: the thickness of the photoresist coating in the photoresist coating chamber is different, and the temperature of soft μ baking in the hot-baking hot plate is different. The energy of the first exposure in the stepping exposure machine "'The temperature of the hard baking on the hard baking hot plate is different or the developing time in the developing chamber is different.

0503-9976TWf (Nl); TSMC2003-0031; wayne.ptd Page 11 1222150 V. Description of the invention (8) The line width of the mask layer is not the same, and it is measured and modified in real time to achieve the final value of each wafer. The target line width is the same. Features and the special system, which are etched to the precise key scale, so as to have the present invention, when the appended feature is to provide a key dimension is a front-end type measurement device with an etched ruler-type measurement The key size is monitored to make the artist of each embodiment stable and change the scope of the invention. The method and system of the invention can be positive to reach the target value. Although the scope and scope of the invention are limited, it is considered as the best process. The control effect control target of the target position has been better acquainted with the qualitative application and disclosure of the patent application as mentioned above. Without retouching, the inner feed-forward control is defined as the position of the etching system. And make repairs. And the key dimension of each wafer can be high yield. However, it is not intended to depart from the spirit of the invention, the protection criterion of the invention.

0503-9976TWf (Nl); TSMC2003-0031; wayne.ptd Page 12 1222150 Brief description of the drawings Figures 1 A to 1 C show the schematic diagrams of the conventional key size control method. Figure 2 shows a schematic diagram of the modules used in each single process of the conventional wafer process. Fig. 3 shows a schematic diagram of a control system of the feedforward key size of the present invention. 4A to 4E are schematic cross-sectional views of an embodiment of the present invention. 3 0 8 ~ magnetic field coil; 3 1 2 ~ extraction pipeline; 3 1 6 ~ optical key size measurement device 4 0 2 ~ to be etched layer; 4 0 6 ~ photoresist layer. Explanation of symbols Conventional technology 100 to substrate; 104 to cover layer; 2000 to wafer; 30 to coating chamber; 60 to step exposure machine; 80 to developing chamber; 250 to wafer. The technology of the present invention is 300 ~ etching machine; 304 ~ etching chamber; 102 ~ layer to be etched; 106 ~ photoresist layer; 20 ~ thin film deposition chamber; 40 ~ photoresist coating chamber; 7 0 ~ Hard baking hot plate 9 0 ~ Etching chamber; 30 2 ~ Substrate; 306 ~ Cycle gas inlet pipe 3 1 ~ Pan plate; 314 ~ RF power supply; 4 0 ~ Substrate; 4 04 ~ Cover layer

0503-9976TWf (Nl); TSMC2003-0031; wayne.ptd p. 13

Claims (1)

1222150 Scope of patent application 1. A critical size internal feedforward control method, including the following steps: providing a substrate, wherein a layer to be etched is formed on the substrate; forming a mask layer on the layer to be etched; Define the mask layer to form a mask pattern; measure a first critical dimension of the mask layer; modify the mask layer according to the first critical dimension; and repeat the measurement steps and subsequent modification of the mask The step of the curtain layer makes the cover curtain layer approach a second critical dimension of a target size. 2. The critical-size inner feedforward control method as described in item 1 of the patent application scope, wherein the substrate is a semiconductor substrate. 3. The key size inner feedforward control method as described in item 1 of the scope of the patent application, wherein the engraved layer is a semiconductor layer, a metal layer, a dielectric layer, or a combination thereof. 4. The critical-size inner feedforward control method as described in item 3 of the patent application scope, wherein the semiconductor layer is a polycrystalline silicon layer or an amorphous silicon layer. 5. The critical size inner feed-forward control method as described in item 3 of the patent application scope, wherein the metal layer is composed of aluminum, copper, tungsten, nickel, cobalt, or titanium. 6. The critical size inner feedforward control method as described in item 3 of the patent application scope, wherein the dielectric layer is composed of silicon dioxide, silicon nitride or silicon oxynitride. 7. Key size inner feed-forward as described in the first patent application 0503-9976TWf (Nl); TSMC2003-0031; wayne.ptd Page 14 1222150 VI. Scope of patent application Chemical control, nitrogen cutting or nitrogen and oxygen control method, in which the cover layer is composed of fossils. & 8 · As in the scope of application for the jth control method ', where the measurement is an inner feedforward of the key dimensions described 9 · As in the scope of the application for patents 8 ^ Optical measurement. Two control methods, in which the optical measurement of the key size described in the first feed-forward type measurement. / π The amount I 0 is performed in an etching system. For example, the scope of the patent application, control method, in which the feed-forward type II that modifies the key dimensions of the housing, as described in the scope of patent application, ^^ 7 The method is an isotropic etching method. The control method, wherein the second key scale 7 is described, the inner feedforward type of the key size 1 2 is smaller than the first key size if the scope of the patent application is i. The control method also includes an internal feed-forward type of the critical dimension described later. The critical dimension of the target to be etched =. Step of etching the layer to be etched so that 1 3 · As in the first control method of the scope of patent application, the value size of the second key ruler J key size (forward feed-forward tendency Utch Bias) is one etch larger than the target size Su Guang. A key size internal feed-forward control method, including the following steps: 'low ^ τ ^ etched layer on the substrate to form a mask layer on the etched layer, forming a photoresist layer on the On the layer to be etched; defining the photoresist layer to form a pattern; using the photoresist layer as a first mask to etch the mask layer; Q5Q3-9976TWf (N1). TSMC2QQ3-0031; wayne.ptd Page 15 ^ 22150 6. Measure a first critical dimension of the mask layer within the scope of the patent application; modify the mask layer according to the first key dimension; repeat The measurement step and the subsequent step of modifying the mask layer are to reach the second critical dimension of the target size with the curtain layer; and ^ using the 5 mask layer as a second mask layer and the remaining layer to be etched. . 15. The inner-feedforward control method for a critical size as described in item 14 of the scope of patent application, wherein the substrate is a semiconductor substrate. 16. The feedforward control method of the critical size as described in item 14 of the scope of the patent application, wherein the layer to be etched is a semiconductor layer, a metal layer, a dielectric layer or a combination thereof. 1, 7 · The inner-feedforward control method for a critical size as described in item 1 β of the patent application scope, wherein the semiconductor layer is a polycrystalline layer or an amorphous layer. 1 8 · The inner feedforward control method of the critical size as described in item 6 of the patent application scope, wherein the metal layer is composed of Shao, copper, crane, nickel, starting or titanium. · 19 · According to the internal size feedback control method of the key size described in Item 16 of the patent application scope, wherein the dielectric layer is composed of silicon dioxide, silicon nitride or silicon oxynitride. The key size internal feed-forward control method described in the scope of application patent No. 14 wherein the cover layer is composed of> silicon oxide, silicon nitride or oxynitride. 21 · If the key size of the inner feedforward control method described in item i 4 of the patent scope is requested, the inner feedforward key size measurement method is an optical quantity 0503-9976TWf (Nl); TSMC2003- 0031; wayne.ptd 16th tribute 1222150 Sixth, the scope of patent application measuring instrument. 0503-9976TWf (Nl); TSMC2003-0031; wayne.ptd page 18