TWI222109B - Method of fabricating a titanium nitride layer - Google Patents
Method of fabricating a titanium nitride layer Download PDFInfo
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- TWI222109B TWI222109B TW90112711A TW90112711A TWI222109B TW I222109 B TWI222109 B TW I222109B TW 90112711 A TW90112711 A TW 90112711A TW 90112711 A TW90112711 A TW 90112711A TW I222109 B TWI222109 B TW I222109B
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1222109 五、發明說明(1) 發明之領域 本發明係提供一種製作氮化鈦層的方法,尤指一種可 以降低熱預算(thermal budget)並去除該氮化鈦層中的碳 氫類雜質(i m p u r i t i e s )之氮化鈦層的製作方法。 發明背景 現今的半導體製程的趨勢,金屬有機化學氣相沉積法 漸漸取代了傳統的濺鍍法(sputter ing),而被廣泛地運用 於半導體製程。其係利用金屬有機化合物,以於半導體基 底表面形成如鎢、鋁、氮化钽(TaN)、氮化鈦等之金屬薄 膜(thin film),甚至如鈕酸鉍勰(BaSrTa〇x,BST)等之鐵 電介,薄膜。然而此一方法本身亦並非沒有缺點,舉例而 言,/習知,用金屬有機化學氣相沉積法來於半導體基底表 ,5成一,,鈦層時,通常亦會伴隨著該氮化鈦層的沉積 ^私而於该氮化鈦層中生成一些碳氫類雜質,影響該金 薄膜的電阻值。1222109 V. Description of the invention (1) Field of the invention The present invention provides a method for making a titanium nitride layer, especially a method capable of reducing thermal budget and removing hydrocarbon impurities in the titanium nitride layer. ) Of a titanium nitride layer. BACKGROUND OF THE INVENTION In the current trend of semiconductor manufacturing processes, metal organic chemical vapor deposition has gradually replaced the traditional sputtering method and has been widely used in semiconductor manufacturing processes. It uses metal organic compounds to form thin films such as tungsten, aluminum, tantalum nitride (TaN), and titanium nitride on the surface of semiconductor substrates, and even bismuth osmium (BaSrTaOx, BST) Etc. ferroelectrics, thin films. However, this method is not without its shortcomings. For example, it is common practice to use a metal organic chemical vapor deposition method on the surface of a semiconductor substrate. The deposition of the carbon dioxide will generate some hydrocarbon impurities in the titanium nitride layer, which will affect the resistance value of the gold thin film.
=閱圖一與圖二,圖一與圖二係習知技術於一半 f : L :成一氮化鈦層的方法示意圖。如圖-所示, 有一二ί^供一半導體晶片1 〇,且半導體晶片1 0上包 八雷當ί ^人I 一底部導電層1 6位於石夕基底1 2之上,一 ;, 、電層1 8位於底部導電層1 6之上,用來作為= See Figure 1 and Figure 2. Figures 1 and 2 are half of the conventional techniques. F: L: A method of forming a titanium nitride layer. As shown in the figure, there are one or two semiconductor wafers 10, and the semiconductor wafer 10 is packaged with eight thunders. The bottom conductive layer 16 is located on the Shixi substrate 12; The electrical layer 18 is located on the bottom conductive layer 16 and is used as
第5頁 1222109 五、發明說明(2) 金屬介電層(inter-metal dielectric, IMD),以及複數 個插塞孔(p 1 ug ho 1 e ) 2 0 (於圖一只顯示一個)。其中,底 部導電層16係為一铭(aluminum,A1)導線(wiring),且該 鋁導線表面上形成有一由氮化鈦(titanium nitride,Page 5 1222109 V. Description of the invention (2) Inter-metal dielectric (IMD), and a plurality of plug holes (p 1 ug ho 1 e) 2 0 (one is shown in the figure). Wherein, the bottom conductive layer 16 is an aluminum (A1) wire, and a surface of the aluminum wire is formed with titanium nitride,
TiN)所構成之抗反射(anti-reflection coating, ARC)層 1 7。其中,插塞孔2 0係預備在後續製程中形成一鎢 (tungsten, W)插塞(plug),用以電連接底部導電層16。 此外,底部導電層1 6亦可為一 M0S電晶體的閘極、沒極或 源極。 如圖二所示,接著利用一金屬有機化學氣相沉積法, 以於插塞孔2 0之側壁表面沉積一氮化鈦層2 6,用來作為阻 障層,其反應式表示如下:TiN) anti-reflection coating (ARC) layer 1 7. Wherein, the plug hole 20 is prepared to form a tungsten (tungsten, W) plug in a subsequent process for electrically connecting the bottom conductive layer 16. In addition, the bottom conductive layer 16 may also be a gate, an electrode, or a source of a MOS transistor. As shown in FIG. 2, a metal organic chemical vapor deposition method is then used to deposit a titanium nitride layer 26 on the sidewall surface of the plug hole 20 as a barrier layer. The reaction formula is as follows:
Ti [N(CH3)2]广 TiN(C,H) + HN(CH3)2+其他碳氫類雜質 如上所示,於沉積氮化鈦層2 6之後,該金屬有機化學 氣相沉積法亦會於該氮化鈦層中生成一些碳氫類雜質,而 石炭氫類雜質會使氮化鈦層2 6的電阻升高,大幅降低產品的 均勻性。 因此,目前的製程技術大多會於完成該金屬有機化學 氣相沉積法之後,再利用一電漿處理來去除存在於氮化錢 層2 6中的碳氫類雜質,並使氮化鈦層26更為緻密Ti [N (CH3) 2], TiN (C, H) + HN (CH3) 2+ and other hydrocarbon impurities are as shown above. After the titanium nitride layer 26 is deposited, the metal organic chemical vapor deposition method also Some hydrocarbon-based impurities will be generated in the titanium nitride layer, and the hydrocarbon-based impurities will increase the resistance of the titanium nitride layer 26 and greatly reduce the uniformity of the product. Therefore, most of the current process technologies will use a plasma treatment to remove the hydrocarbon-based impurities existing in the nitride layer 26 after the metal organic chemical vapor deposition method is completed, and the titanium nitride layer 26 More dense
1222109 五、發明說明(3) (dense)。然而該電漿處理亦會發生一些問題。、因為在進 行該電聚處理的過程中,矽基底丨2的溫度大約會被該電漿 加熱到4 2 0°C以上,而產生兩個不好的現象:第一即底部 導電層16所包含的鋁會擠出(A1 extrusi〇n)至氮化鈦層26 f表面’而使得插塞孔2〇内形成鎢插塞之後的rc值不穩 定,第二即介電層18 (低介電常數的内金屬介電層)的結構 會遭到破壞。 發明概述 因此本發明之主要目的係在提供一種降低熱預算 (thermal budget)並製作一無碳氫類雜質(impUr:[ties)之 氮化鈦層的方法。 本發明之另一目的係在解決鋁會擠出的問題。 本發明之又一目的係在解決低介電常數的内金屬介 層的結構會遭到破壞的問題。 在本發明之最佳實施例中,係先利用一金屬有 氣相沉積法(M0CVD),於一半導體基底表面形成一氮化予 層,然後對該氮化鈦層進行一脈衝式電漿處理(pulsed plasma treatment),以去除該氮化鈦層中的碳氫類雜質 (impurities)。其中該脈衝式電漿處理係進行於一包含貝1222109 V. Description of Invention (3) (dense). However, there are some problems with this plasma treatment. Because the temperature of the silicon substrate 丨 2 will be heated by the plasma to above 40 ° C during the electropolymerization process, there are two bad phenomena: the first is the bottom conductive layer 16 The contained aluminum will be extruded (A1 extrusion) to the surface of the titanium nitride layer 26 f, so that the rc value after the tungsten plug is formed in the plug hole 20 is unstable. The second is the dielectric layer 18 (low dielectric The dielectric constant (internal metal dielectric layer) structure can be damaged. SUMMARY OF THE INVENTION Therefore, the main object of the present invention is to provide a method for reducing the thermal budget and forming a titanium nitride layer without impurities: [ties]. Another object of the present invention is to solve the problem that aluminum can be extruded. Another object of the present invention is to solve the problem that the structure of the inner metal dielectric layer with a low dielectric constant is damaged. In the preferred embodiment of the present invention, a metal nitride vapor deposition method (MOCVD) is used to form a nitride pre-layer on the surface of a semiconductor substrate, and then the titanium nitride layer is subjected to a pulse plasma treatment. (Pulsed plasma treatment) to remove hydrocarbon-based impurities in the titanium nitride layer. The pulsed plasma treatment is performed in a
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五、發明說明(4) 氮氣(NO、氫氣(H D或氬氣(Ar)的壓力搶中,且、該壓力 的壓力範圍係控制在1至3托耳(torr)之間,而該脈衝式* 漿處理功率(power )範圍則是介於5 0 0至1〇〇〇瓦特之間二二 外,本發明亦可利用一冷卻器(c h i 1 1 e r )來控制該半導體 基底之晶背冷卻溫度,以使該半導體基底之溫度在小於 39 0°C的狀況下來進行多次電漿處理,達成相同之功效'。 本發明之優點即在能使半導體基底的溫度不至升高到 會破壞元件特性,又能降低熱預算,且亦能達成清除碳氫 類雜質之目的。 發明之詳細說明 請參閱圖三與圖四,圖三與圖四係本發明於一半導體 晶片5 0上形成一氮化鈦層的方法示意圖。如圖三所示,半 導體晶片50包含有一石夕基底52,一底部導電層5 6設於石夕基 底5 2表面,一介電層5 8設於底部導電層5 6之上,以作為低 介電常數的内金屬介電層之用,複數個插塞孔60 (於圖三 只顯示一個)設於介電層5 8中。其中,在本發明之最佳實 施例中,底部導電層5 6係一鋁導線,且鋁導線表面另設有 一由氮化鈦所構成之抗反射層5 7,而插塞孔6 0係貫穿介電 層5 8以及抗反射層5 7,並預備在後續製程中形成一鎢插 塞,以電連接底部導電層5 6。5. Description of the invention (4) The pressure of nitrogen (NO, hydrogen (HD or argon) is grabbed, and the pressure range of the pressure is controlled between 1 and 3 torr, and the pulse type * The range of pulp processing power (power) is between 5000 and 1000 watts. The present invention can also use a cooler (chi 1 1 er) to control the crystal back cooling of the semiconductor substrate. Temperature, so that the temperature of the semiconductor substrate is reduced to less than 39 0 ° C for multiple plasma treatments to achieve the same effect. Element characteristics, can reduce the thermal budget, and can also achieve the purpose of removing hydrocarbon impurities. For a detailed description of the invention, please refer to FIG. 3 and FIG. 4, which are formed on a semiconductor wafer 50 according to the present invention. A schematic diagram of the method of the titanium nitride layer. As shown in FIG. 3, the semiconductor wafer 50 includes a stone substrate 52, a bottom conductive layer 56 is disposed on the surface of the stone substrate 52, and a dielectric layer 58 is disposed on the bottom conductive layer. Above 5 6 for low metal constant internal metal dielectric For the purpose of the layer, a plurality of plug holes 60 (only one is shown in FIG. 3) is provided in the dielectric layer 58. In the preferred embodiment of the present invention, the bottom conductive layer 5 6 is an aluminum wire, and An anti-reflection layer 57 made of titanium nitride is provided on the surface of the aluminum wire, and the plug hole 60 penetrates the dielectric layer 58 and the anti-reflection layer 57, and is ready to form a tungsten plug in the subsequent process. To electrically connect the bottom conductive layer 56.
第8頁 1222109 五、發明說明(5) 如圖四所示,接著利用一金屬有機化學氣‘沉積、 插塞孔6 0表面沉積一氮化鈦層6 6,以作為阻障層之用/会於 金屬有機化學氣相沉積法係進行於一以四二甲基胺錢。該 (Tetrakis(Dimethylamino)Titanium,TDMAT)作為—^ 物(precursor)的氣氛環境中,且該金屬有機化學氣相 積法之氣氛環境另可包含有氮氣、氫氣或氬氣。其、金 有機化學氣相沉積法的反應式表示如下 ”Page 8 1222109 V. Description of the invention (5) As shown in Figure 4, a metal organic chemical gas is used to deposit and deposit a titanium nitride layer 6 6 on the surface of the plug hole 60 to serve as a barrier layer. Will be carried out in the metal organic chemical vapor deposition method with tetramethylamine. The (Tetrakis (Dimethylamino) Titanium, TDMAT) is used as a precursor, and the metal organic chemical vapor deposition method may further include nitrogen, hydrogen, or argon. The reaction equation of the gold organic chemical vapor deposition method is shown below "
Ti[N(CH3)2]4— TiN(C,H) + HN(CH3)2+其他碳氫類雜質 如前所述,在沉積氮化鈦層6 6之後,該金屬有機化學 氣相沉積法亦會於氮化鈦層6 6中生成一些碳氫類雜質,而 碳氩類雜質會使氮化鈦層6 6的電阻升高。因此本發明在利 用該金屬有機化學氣相沉積法來沉積完氮化鈦層6 6之後, 隨即進行一脈衝式電漿處理,以去除氮化鈦層6 6中的雜 質。 在本發明之最佳實施例中,脈衝式電漿處理係進行於 一壓力艙中,使壓力艙的壓力範圍控制在1至3拢耳之間’ 處理功率(ρ 〇 w e r)範圍控制在5 0 0至1 0 0 0瓦特之間,且壓力 艙中另包含有氮氣、氫氣或氬氣等反應氣體。其中脈衝式 電漿處理中之氬氣係用來去除碳氫類雜質,氫氣是用來將 碳氫類雜質帶走,而氮氣則是用來補充氮化鈦層6 6中被氬 氣所去除的氮。Ti [N (CH3) 2] 4— TiN (C, H) + HN (CH3) 2+ Other hydrocarbon impurities As described above, after depositing the titanium nitride layer 66, the metal organic chemical vapor deposition The method also generates some hydrocarbon-based impurities in the titanium nitride layer 66, and the carbon-argon-based impurities increase the resistance of the titanium nitride layer 66. Therefore, in the present invention, after the titanium nitride layer 66 is deposited by using the metal organic chemical vapor deposition method, a pulse plasma treatment is performed immediately to remove impurities in the titanium nitride layer 66. In the preferred embodiment of the present invention, the pulsed plasma treatment is performed in a pressure chamber, so that the pressure range of the pressure chamber is controlled between 1 and 3 '. The processing power (ρ 〇wer) range is controlled at 5 Between 0 and 100 watts, and the pressure chamber contains reaction gases such as nitrogen, hydrogen or argon. Among them, the argon gas in the pulse plasma treatment is used to remove hydrocarbon impurities, hydrogen is used to remove the hydrocarbon impurities, and nitrogen is used to supplement the titanium nitride layer 66 which is removed by argon. Of nitrogen.
第9頁 1222109 五、發明說明(6) % 利用脈衝式電漿處理來去除氮化鈦層6 6中的雜質時, 必須對於脈衝式電漿處理之處理功率與氣體流量作調整, 亦即當處理功率大於5 0 0瓦特時(約介於5 〇 0至丨0 0 〇瓦特之 間),氮氣以及氫氣之氣體流量必須控制於1 〇 〇 seem (standard cubic centimeter per minute)〜500 sccm之 間。而當脈衝式電漿處理功率小於5 〇 〇瓦特時(介於〇至5 〇 〇 瓦特之間),則氮氣與氫氣之氣體流量必須控制於1 〇 〇 〇 seem〜3 0 0 0 seem之間,以加強冷卻(cool ing)半導體晶片 5 0,使矽基底5 2的溫度低於3 9 0°C。 換句話說,為了解決如同習知技術中,矽基底5 2的溫 度太高所產生的問題,本發明在進行脈衝式電漿處理時, 係藉由時間與功率之調整,以獲得一脈衝式電漿處理之時 間(T )與溫度(t)的關係圖,如圖五所示,俾使於第一階段 時間T <内,其處理功率係大於5 0 〇瓦特(約介於5 0 0至 1 〇 0 0瓦特之間),且矽基底5 2的溫度小於3 9 0°C,以去除碳 氫類雜質;而於第二階段時間T A内,俾使其處理功率小 於5 0 〇瓦特(介於〇至5 〇 0瓦特之間),且通入氮氣與氫氣, 以帶走後氫類雜質,並補充氮化鈦層66中被氬氣所去除的 氮,同時亦可以冷卻(C Ο Ο 1 i n g)半導體晶片5 0,俾使矽基 底5 2的溫度能低於3 9 〇t。 其中,第一階段時間T P内所通入的氮氣與氫氣之氣Page 9 1222109 V. Explanation of the invention (6)% When using the pulse plasma treatment to remove impurities in the titanium nitride layer 66, the processing power and gas flow rate of the pulse plasma treatment must be adjusted, that is, when The processing power is greater than 500 watt hours (between 500 and 丨 0 0 watts), and the gas flow of nitrogen and hydrogen must be controlled between 1 〇seem (standard cubic centimeter per minute) ~ 500 sccm . When the pulsed plasma processing power is less than 5,000 watts (between 0 and 5,000 watts), the gas flow rate of nitrogen and hydrogen must be controlled between 1000 seem ~ 3 0 0 seem In order to strengthen cooling (cooling) the semiconductor wafer 50, the temperature of the silicon substrate 52 is lower than 39 ° C. In other words, in order to solve the problem that the temperature of the silicon substrate 52 is too high as in the conventional technology, the pulse plasma processing of the present invention uses a time and power adjustment to obtain a pulse type The relationship between plasma treatment time (T) and temperature (t) is shown in Fig. 5. In the first stage of time T <, the processing power is greater than 500 watts (about 50 0 to 100 watts), and the temperature of the silicon substrate 52 is less than 390 ° C to remove hydrocarbon impurities; and in the second stage time TA, the processing power is reduced to less than 50 〇 Watts (between 0 and 5000 watts), and nitrogen and hydrogen are passed in to take away the hydrogen impurities and supplement the nitrogen removed by the argon in the titanium nitride layer 66, and it can also be cooled ( C 〇 1 ing) the semiconductor wafer 50, so that the temperature of the silicon substrate 52 can be lower than 390 t. Among them, the gas of nitrogen and hydrogen gas introduced in the first stage time T P
1222109 五、發明說明(7) 體流量即控制於1 〇 〇 s c c m〜5 0 0 s c c m之間,第二階段時間 T多内所通入的氮氣與氫氣之氣體流量則控制於1 〇 〇 〇 seem〜3 0 0 0 seem之間;而第三階段時間及第四階段 時間Τ卉所通入之氮氣與氫氣亦分別等同於第一階段時間 Τ私及第二階段時間τ内所通入之氮氣與氫氣的流量,其 餘Τη +與1\ +亦以此類推。 α 么 由於本發明之脈衝式電漿處理可有效將矽基底5 2溫度 維持在3 9 0°c以下,而不會像習知技術一般,讓半導體晶又 片在電漿處理過程中被加熱至42 0°C以上,故能降低熱 預其以避免破壞低介電常數的内金屬介電層,亦即介電層 5 8的結構,完成氮化鈦層6 6的緻密化,同時去除氮化鈦層 6 6中的碳氫類雜質,進而提高元件表現。此外,在本發明 之貫施例中,壓力艙内亦可裝置有一冷卻器(ch i 1丨e r ), 用來控制矽基底5 2之晶背冷卻溫度,以輔助本發明之脈衝 式電漿處理,而使矽基底5 2之溫度約略小於3 9 0°C,避免 夕基底5 2之溫度太南所產生的問題。 本發明之第二實施例,係對氮化鈦層6 6進行多次電漿 處理(multi - step plasma treatment)製程,而且在進行 f,電漿處理時,矽基底5 2的溫度均低於3 9 0°C,以去除 Λ氮化欽層中的碳氫類雜質。也就是說,本發明之第二實 例是利用多次連續性的電漿處理製程來對氮化鈦層6 6進 行去除碳氫類雜質的步驟。例如先對氮化鈦層6 6進行一第1222109 V. Description of the invention (7) The volume flow rate is controlled between 100 sccm and 50 sccm, and the gas flow rate of nitrogen and hydrogen gas introduced during the second stage of time T is controlled at 1000 mm ~ 3 0 0 0 seem; and the nitrogen and hydrogen gas passed in the third and fourth stages of time are equivalent to the nitrogen in the first stage of time and the second stage of time τ With the flow of hydrogen, the rest of Tn + and 1 \ + and so on. α Because the pulsed plasma treatment of the present invention can effectively maintain the silicon substrate 5 2 temperature below 39 ° C, without the conventional technology, allowing semiconductor wafers to be heated during plasma treatment. Above 42 0 ° C, it can reduce the thermal preheating to avoid damaging the internal metal dielectric layer with a low dielectric constant, that is, the structure of the dielectric layer 58, and complete the densification of the titanium nitride layer 66, while removing it Hydrocarbon-based impurities in the titanium nitride layer 66 increase the device performance. In addition, in the embodiment of the present invention, a cooler (ch i 1 er) may be installed in the pressure chamber to control the cooling temperature of the crystal back of the silicon substrate 5 2 to assist the pulsed plasma of the present invention. Treatment, so that the temperature of the silicon substrate 5 2 is slightly less than 390 ° C., to avoid problems caused by the temperature of the substrate 5 2 being too south. In the second embodiment of the present invention, a multi-step plasma treatment process is performed on the titanium nitride layer 66, and the temperature of the silicon substrate 52 is lower than the temperature of the silicon substrate 5 during the f and plasma processes. 39 ° C to remove hydrocarbon impurities in the Λ-nitride layer. That is, the second example of the present invention is a step of removing hydrocarbon impurities from the titanium nitride layer 66 using a continuous plasma treatment process. For example, first perform a first step on the titanium nitride layer 66.
第11頁 1222109 五、發明說明(8) 一電漿處理,並控制氮氣以及氫氣之氣體流量,使氮氣以 及氫氣之氣體流量分別介於1 0 0 s c c m〜5 0 0 s c c m之間,且 當矽基底5 2的溫度接近3 9 0°C時,即停止該第一電漿處 理;接著再控制氮氣以及氫氣之氣體流量,使氮氣以及氫 氣之氣體流量分別介於1 0 0 0 s c c m〜3 0 0 〇 s c c m之間。然後 當矽基底52的溫度下降至一安全溫度時,再調整氮氣以及 氫氣的流量為100 see m〜500 seem,並接續對氮化鈦層66 進行一第二電漿處理,且當矽基底5 2的溫度接近3 9 (TC 時,再次停止該第二電漿處理。如此反覆實施上述過程, 以完全去除氮化鈦層6 6中的碳氫類雜質並緻密化氮化鈦層 6 6。同理,在本發明之第二實施例中,壓力搶内亦可另裝 置有一冷卻器(c h i 1 1 e r ),以輔助本發明之脈衝式電漿處 理來降低石夕基底5 2之温度。 相較於習知技術,本發明之特徵係在於脈衝式電漿處 理與多次電漿處理中處理功率小於5 0 0瓦特的階段内,通 入相較於處理功率大於5 0 0瓦特的階段内更多量的氮氣與 氲氣’以冷卻碎基底之溫度,使吩基底之溫度恒低於3 g 〇 °c,進而避免習知技術中,矽基底溫度太高所產生的問 題。 以上所述僅本發明之較佳實施例,凡依本發明申請專 利範圍所做之均等變化與修飾,皆應屬本發明專利之涵蓋 範圍。Page 11 1222109 V. Description of the invention (8) A plasma treatment, and controlling the gas flow rate of nitrogen and hydrogen, so that the gas flow rate of nitrogen and hydrogen are between 100 sccm to 50 sccm, and when silicon When the temperature of the substrate 5 2 is close to 390 ° C, the first plasma treatment is stopped; and then the gas flow rates of nitrogen and hydrogen are controlled so that the gas flow rates of nitrogen and hydrogen are between 1 0 0 0 sccm ~ 3 0 0 〇sccm. Then when the temperature of the silicon substrate 52 drops to a safe temperature, adjust the flow of nitrogen and hydrogen to 100 see m ~ 500 seem, and then perform a second plasma treatment on the titanium nitride layer 66, and when the silicon substrate 5 When the temperature of 2 is close to 39 ° C., the second plasma treatment is stopped again. The above process is repeatedly performed to completely remove hydrocarbon impurities in the titanium nitride layer 66 and densify the titanium nitride layer 66. Similarly, in the second embodiment of the present invention, a pressure cooler (chi 1 1 er) may be additionally installed to assist the pulse plasma treatment of the present invention to reduce the temperature of the Shixi substrate 52. Compared with the conventional technology, the present invention is characterized in that in the stage where the processing power is less than 500 watts in the pulse plasma treatment and the multiple plasma treatments, the access is compared with the stage where the processing power is more than 500 watts. A larger amount of nitrogen and tritium gas is used to cool the temperature of the broken substrate, so that the temperature of the phenol substrate is constantly lower than 3 g 0 ° c, thereby avoiding the problems caused by the high temperature of the silicon substrate in the conventional technology. Only the preferred embodiments of the present invention are described. Range of application for patent made of modifications and alterations, also belong to the scope of the present invention patent.
第12頁 1222109 圖式簡單說明 圖示之簡單說明 圖一 與 圖 二 係 習知 技術於 一 半 導 體 晶 片 上 形 成 —一 氮 化 鈦 層 的方 法 示 意 圖 〇 圖三 與 圖 四 係 本發 明於一 半 導 體 晶 片 上 形 成 一 氮 化 鈦 層 的 方法 示 意 圖 0 圖五 係 本 發 明 之脈 衝式電 漿 處 理 之 時 間 與 溫 度 的 關 係 圖 〇 圖 示 之符 號 說 明 10 半 導 體 晶 片 12 矽 基 底 16 底 部 導 電 層 17 抗 反 射 層 18 介 電 層 20 插 塞 孔 26 氮 化 鈦 層 50 半 導 體 晶 片 52 矽 基 底 56 底 部 導 電 層 57 抗 反 射 層 58 介 電 層 60 插 塞 孔 66 氮 化 鈦 層Page 12122109 Brief Description of the Drawings Brief Description of the Figures Figures 1 and 2 are conventional techniques for forming a titanium nitride layer on a semiconductor wafer-Figures 3 and 4 are the invention on a semiconductor wafer Schematic diagram of the method for forming a titanium nitride layer on the top 0 Figure 5 is the relationship between the time and temperature of the pulsed plasma treatment of the present invention 〇 Symbols illustrated 10 Semiconductor wafer 12 Silicon substrate 16 Bottom conductive layer 17 Anti-reflection layer 18 Dielectric layer 20 Plug hole 26 Titanium nitride layer 50 Semiconductor wafer 52 Silicon substrate 56 Bottom conductive layer 57 Anti-reflection layer 58 Dielectric layer 60 Plug hole 66 Titanium nitride layer
第13頁Page 13
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