TW595062B - Adjustable trigger voltage circuit for sub-micrometer silicon IC ESD protection - Google Patents
Adjustable trigger voltage circuit for sub-micrometer silicon IC ESD protection Download PDFInfo
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- TW595062B TW595062B TW089115785A TW89115785A TW595062B TW 595062 B TW595062 B TW 595062B TW 089115785 A TW089115785 A TW 089115785A TW 89115785 A TW89115785 A TW 89115785A TW 595062 B TW595062 B TW 595062B
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- Prior art keywords
- transistor
- line
- esd
- string
- diodes
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title description 3
- 229910052710 silicon Inorganic materials 0.000 title description 3
- 239000010703 silicon Substances 0.000 title description 3
- 210000004508 polar body Anatomy 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 230000015556 catabolic process Effects 0.000 description 2
- 230000018199 S phase Effects 0.000 description 1
- 210000000941 bile Anatomy 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000015654 memory Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
- H03K17/0814—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/30—Modifications for providing a predetermined threshold before switching
- H03K17/302—Modifications for providing a predetermined threshold before switching in field-effect transistor switches
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
595062 五、發明說明(l) 本申請案係基於1 9 9 9年8月6曰所蔣屮夕i 、 號6 0/1 48, 0 96的申請專利範圍而請求。、國臨時申請序 本舍明與用於次微米石夕積體 保護電路有關,而且★、苴()之靜電放電(ESD) 、電ί有^ 尤其疋與用於膽保護之可調觸發電 發明背| ::M0S(金屬氧化物半導體)技術逐漸 :人楗米設計規則’更薄的閘極氧化物俞形 套二度的 潰電M ’而更低的氧化物崩潰電虔 低的電產便會觸發的esd保護裝置或電路,又:要: =在較低電壓便能觸發的ESD保護的容=月匕 決。過去ESD的保護是使用像閑 二極體之類的裝置H這些裝置 及^納 虔(用於ESD保護結構的觸發機 ζ肢接面朋讀電 二置薄氧化物的法拉挪海穿二 ordheim tunnel ing threshold)。那此枯田 物崩潰;壓:= 5 - fi佔4主 UL ΛΙ η 丁又包路的觸發電壓低於 - 5 6伙特。此外,最好是這種ESD保 矽積體電路技術。 免路使用舉世相谷的 發明摘要 每-個靜電放電卿“^路都有—個參考源裝置、 第6頁 1 595062 五、發明說明(2) :個裝置、以及一個具有一輸入與一輸出的放大 i 置和可調補償裝置都跟放大器的輸入相連 有-個%性的ESD钳位跟放大器的輸出相連接。 圖式簡诚 圖1是本發明的基本ESD保護電路的方塊圖。 :2 J明的E S D保護電路的其中一種電路圖。 圖3疋本發明的ESD保護電路的第二種電路圖。 圖4是顯不圖3中電路的電流—電壓特性的圖表。 圖5是本發明的ESD保護電路的第三種電路圖。 « 查的具體實麵說明 參考圖1,其係本發明的基本可調且低電壓的觸 ^電路10的方塊圖。電賴包含—個連接於Vss線14與_ 線16之間的I考源12。參考源12又被連接至電流增益裝置 20(例如放大器)的輸入終端18。可調補償裝置22則被連接 於Vss、線,14與電流增益裝置20的第二個輸入終端24之間。 電流增益裝置20具有一個被連接至陽性ESD鉗位28的輸出 終端26。陽性ESD鉗位28也被連接於Vss線14與Vdd線16之 間。電路10也包含一個連接於Vss線14與¥(1(1線16之間的陰 性ESD鉗位30。 在電路1 0,參考源1 2提供正常的次臨界電壓電流關係。 (例如矽接面二極體的60毫伏/電流十進位)可調補償裝置 22提供一個電壓讓電流傳導可以在一個較高且可調的電壓 之下進行。接著,電流增盈裝置2 〇就以一個因數將電流加 倍,讓電壓/電流斜度從60毫伏/電流十進位增加為<<6〇毫
第7頁 595062 五、發明說明(4) 沒極66之間的接面相連接。NM0S電晶體72的閘極90跟Vdd 線56相連接。第三個關⑽電晶體92既以其汲極“跟”^線 56相連接,又以其源極96跟Vss線54相連接。第三個nm〇S 電晶體92.的閘極9/8跟第二個!^03電晶體74的汲極8〇與第二 個NM0S電晶體76的汲極84之間的接面相連接。 ’、 ,極體38、第一個NM0S電晶體60以及第一個PM〇s電晶體 5 8形成分壓器。這些二極體必須被製造得嬌小玲瓏,如此 電流才會弱小,進而使直流電流局限於極小數值。這些二 極體形成恆定電壓參考源而使進入電路上的關⑽電晶體6〇 = PMOS電晶體58的電流減至最低。因此,流經電路的電流 疋非#低的。分壓器的設計目的在於要在正常的操作情況 下使NMOS電晶體60和PM0S電晶體58之間接面的電壓低於 ,個PMO^S電晶體74的臨界電壓。隨著輸入Vdd的電壓逐漸 ,加,第一個㈣⑽電晶體58的電壓降也會逐漸增加,以致 最終足以接通第二個PM〇s電晶體74。流經第二個pM〇s電曰曰 體74的電流最終將超過第二個NM〇s電晶體76(低傳導的 關0幻的電流變換能力,使第三個題⑽電晶體“的電壓逐 漸增加,直至達到第三個NM〇s電晶體92的臨界電壓。三 個NM0S電晶體92接著便導通並固定esd電壓。 一 電路3 2只在正電壓下栂作 . 才木作 在Vss線54與Vdd線56之間必 須連接著一個大的二極體,日1 τΓ 間必 且M %極接Vss,以陰極接 、❸入的6况下保護電路。钳位電壓可以藉著將 任 ^ 目減〆—個而被調整至一個較低 值。然而’钳位電壓卻無法因為增添一個二極體而增加,
Claims (1)
- 595062 修正 一案號 89115785 六、申請專利範圍 1 · 一種用於與一 Vss線及一 Vdd線操作之靜電放電(ESD) 保護電路,包含: 一串以串聯方式被連接於V s s線和V d d線之間複數個二 極體; 第一 P Μ 0 S電晶體和第一 N Μ 0 S電晶體係以串聯的方式連接 於該Vdd線與該串二極體的一端之間,該pM〇s電晶體的一 問極被連接於該串二極體的其中兩個二極體之間,而該 NM0S電晶體具一閘極,係連接至ydd線; ^二PM0S電晶體和第二NM0S電晶體係以串聯的方式連接 於該Vjs線與該Vdd線之間,而PM0S電晶體則有一閘極被連 接於第一個P Μ 0 S電晶體與第—個N M 〇 s電晶體之間,而第二 NM0S電晶體具一閘極,係連接至Vdd線;和 一破連接於Vss線與Vdd線之間的鉗位NM〇s電晶體,鉗位 NM0S電晶體有一個閘極被連接於第二個pM〇s電晶體與第 二個NM0S電晶體之間。 2」如申請專利範圍第i項之靜電放電(ESD)保護電路,其 中該串一極體包含四個二極體,而且第一個⑽⑽電晶體的 問極被連接於該串的第二個與第三個二極體之間。 3」如申請專利範圍第】項之靜電放電(ESD)保護電路,其 中该串一極體包含八個二極體,而且第一個pM〇s電晶體的 閘極被連接於該串的第二個與第三個二極體之間。 4·如申請專利範圍第3項之靜電放電(ESD)保護電路,還 含有一個被連接於Vdd線與第二個pM〇s電晶體之間的二極 體0O:\65\65704-921229.ptc 第14頁 595062 _ 案號89115785 年(>月>^曰 修正 ______ 六、申請專利範圍 5 ·如申請專利範圍第4項之靜電放電(ESD)保護電路,還 含有一個針對被連接於V d d線與該第二個P Μ 0 S電晶髀 門 的二極體之分流電路。 間 6·如申請專利範圍第5項之靜電放電(ESD)保護電路,其 中該分流電路包含一對以串聯方式被連接於V s s線和v d d 線之間的NM0S電晶體,其中一個分流NM0S電晶體有一個問 極跟Vdd線連接,而另一個分流NM〇S電晶體則有—個間極甲 跟第二個PM〇s電晶體與第二個.OS電晶體之間的接面▼相連 接’此外,有一個PM0S電晶體以並聯方式跟二極體並串, 並且具有一個閘極跟該兩個分流NM0S電晶體的接面相連’ 接0 了·如申請專利範圍第4項之靜電放電(ESD)保護電路,還 含有一個被連接於該串二極體與Vdd線之間的㈣⑽ ,、 1¾ 〇 %曰曰 8如申請專利範圍第7項之靜電放電(ESD)保護 中遠NM0S電晶體具有一個汲極被連接於該】 ^ 兩個二極體之以及具有—個間極,而這d中 NM0S電晶體的閘極都跟同—個節點相連接。 ,立 + 請專利範圍第8項之靜電放電(ESD)保護電路,盆 中:_S電晶體的没極被連接於該串二極 一電:盘J 四個二極體之間。 木一個與第O:\65\65704-921229.ptc 第15頁
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14809699P | 1999-08-06 | 1999-08-06 | |
US09/626,853 US6577480B1 (en) | 1999-08-06 | 2000-07-27 | Adjustable trigger voltage circuit for sub-micrometer silicon IC ESD protection |
Publications (1)
Publication Number | Publication Date |
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TW595062B true TW595062B (en) | 2004-06-21 |
Family
ID=26845509
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW089115785A TW595062B (en) | 1999-08-06 | 2000-11-04 | Adjustable trigger voltage circuit for sub-micrometer silicon IC ESD protection |
Country Status (3)
Country | Link |
---|---|
US (1) | US6577480B1 (zh) |
TW (1) | TW595062B (zh) |
WO (1) | WO2001011749A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103427407A (zh) * | 2012-05-21 | 2013-12-04 | 南亚科技股份有限公司 | 静电放电保护装置及电路 |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
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US6639772B2 (en) * | 2002-01-07 | 2003-10-28 | Faraday Technology Corp. | Electrostatic discharge protection circuit for protecting input and output buffer |
DE10203803C1 (de) * | 2002-01-31 | 2003-04-24 | Siemens Ag | Antenne mit intrinsisch leitendem Kunststoff und Verfahren zur Herstellung einer Antenne |
WO2004025702A2 (en) * | 2002-09-11 | 2004-03-25 | Pan Jit Americas, Inc | Electrostatic discharge protection device for high speed transmission lines |
US20040212936A1 (en) * | 2002-09-27 | 2004-10-28 | Salling Craig T. | Diode-string substrate-pumped electrostatic discharge protection |
US7240248B2 (en) * | 2003-11-10 | 2007-07-03 | Dell Products L.P. | Apparatus and method for reducing false triggering of a signal due to an electrostatic discharge event |
US20060215344A1 (en) * | 2005-03-11 | 2006-09-28 | Choi Nak H | Electrostatic protection device for semiconductor device |
US7279952B1 (en) * | 2005-09-09 | 2007-10-09 | Altera Corporation | Voltage clamp circuit with reduced I/O capacitance |
US7573300B2 (en) * | 2007-01-15 | 2009-08-11 | International Business Machines Corporation | Current control mechanism for dynamic logic keeper circuits in an integrated circuit and method of regulating same |
US7466171B2 (en) | 2007-01-15 | 2008-12-16 | International Business Machines Corporation | Voltage detection circuit and circuit for generating a trigger flag signal |
US7859807B2 (en) * | 2007-03-22 | 2010-12-28 | Realtek Semiconductor Corp. | ESD protection circuit and method thereof |
US8077440B2 (en) * | 2007-06-21 | 2011-12-13 | Nxp B.V. | ESD protection circuit |
DE102008019821A1 (de) * | 2007-06-27 | 2009-01-15 | Conti Temic Microelectronic Gmbh | Vorrichtung zur sonsorlosen Positionierung mit Signalverstärker |
US7459953B1 (en) * | 2007-08-14 | 2008-12-02 | Ili Technology Corp. | Voltage adjusting circuit |
US8197123B2 (en) * | 2007-10-29 | 2012-06-12 | Smiths Medical Asd, Inc. | Thermistor circuit calibration |
US7873921B2 (en) * | 2007-11-30 | 2011-01-18 | International Business Machines Corporation | Structure for a voltage detection circuit in an integrated circuit and method of generating a trigger flag signal |
FR2955699B1 (fr) * | 2010-01-26 | 2013-08-16 | St Microelectronics Rousset | Structure de protection d'un circuit integre contre des decharges electrostatiques |
US8743518B1 (en) * | 2011-07-29 | 2014-06-03 | Anadigics, Inc. | Protection circuit |
EP2822035A1 (en) | 2013-07-01 | 2015-01-07 | Ams Ag | Electrostatic discharge protection circuit and method for electrostatic discharge protection |
CN106158850B (zh) * | 2016-08-26 | 2019-06-11 | 华为技术有限公司 | 静电放电保护装置及多电源域集成电路 |
KR20220129608A (ko) * | 2021-03-10 | 2022-09-23 | 창신 메모리 테크놀로지즈 아이엔씨 | 정전기 보호 회로 및 반도체 소자 |
US11521962B1 (en) * | 2021-09-14 | 2022-12-06 | Cypress Semiconductor Corporation | ESD protection circuit |
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JPH07202584A (ja) | 1993-12-28 | 1995-08-04 | Nec Corp | 低電圧誤動作防止機能付過熱保護回路 |
US5617283A (en) | 1994-07-01 | 1997-04-01 | Digital Equipment Corporation | Self-referencing modulation circuit for CMOS integrated circuit electrostatic discharge protection clamps |
US5508649A (en) | 1994-07-21 | 1996-04-16 | National Semiconductor Corporation | Voltage level triggered ESD protection circuit |
US5640127A (en) * | 1995-11-07 | 1997-06-17 | Tektronix, Inc. | Input protection for high bandwidth amplifier |
US6011415A (en) * | 1996-10-21 | 2000-01-04 | Texas Instruments Incorporated | Shock sensor circuitry and method for amplifying an input signal including leakage currents |
US5852540A (en) | 1997-09-24 | 1998-12-22 | Intel Corporation | Circuit for protecting the input/output stage of a low voltage integrated circuit device from a failure of the internal voltage supply or a difference in the power-up sequencing of supply voltage levels |
US6038116A (en) * | 1998-05-08 | 2000-03-14 | Cirrus Logic, Inc. | High voltage input pad system |
-
2000
- 2000-07-27 US US09/626,853 patent/US6577480B1/en not_active Expired - Fee Related
- 2000-08-04 WO PCT/US2000/021229 patent/WO2001011749A1/en active Application Filing
- 2000-11-04 TW TW089115785A patent/TW595062B/zh not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103427407A (zh) * | 2012-05-21 | 2013-12-04 | 南亚科技股份有限公司 | 静电放电保护装置及电路 |
CN103427407B (zh) * | 2012-05-21 | 2016-05-04 | 南亚科技股份有限公司 | 静电放电保护装置及电路 |
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Publication number | Publication date |
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US6577480B1 (en) | 2003-06-10 |
WO2001011749A1 (en) | 2001-02-15 |
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