TW594855B - Gap filling method for forming void-free dielectric layer - Google Patents

Abstract

A gap filling method for forming a void-free dielectric layer in a semiconductor manufacturing process is disclosed, which uses high density plasma-chemical vapor deposition (HDPCVD). Firstly, 30-60 cm<3>/min of silane (SiH4) as a source gas, 40-80 cm<3>/min of oxygen (O2) as a source gas, and additionally 80-150 cm<3>/min of helium (He) as a sputtering gas are used to perform a deposition for 40 seconds, which forms a dielectric layer with thickness of 500 angstroms. Then, 50-80 cm<3>/min of SiH4 as a source gas, 90-110 cm<3>/min of O2 as a source gas, and additionally 80-150 cm<3>/min of He as a sputtering gas are used to perform deposition for 65 seconds so that a dielectric layer such as silicon dioxide (SiO2) is formed on the substrate and the dielectric layer has the total thickness of 4500 angstroms, in which the LFRF power and the HFRF power are set at the same value in the power range of 2750-3250 W. The gap filling method can achieve good filling effectiveness for those gaps with high aspect ratios to avoid the formation of voids in the dielectric layer.

Description

594855

Case No. 92114854 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a method for depositing a dielectric layer on a substrate in a semiconductor process, and particularly to a trench filling and forming a gap between wires. void-free dielectric layer is a high density plasma chemical vapor deposition. [Prior art] In the components of semiconductor circuits, an inter-metal dielectric layer (IMD) is usually used to isolate and electrically isolate other conductors between conductors. As the integrated circuit manufacturing process becomes more and more precise, the size of the semiconductor devices continues to shrink, and the distance between the wires is getting shorter and shorter, resulting in parasitic capacitance (parasitic capacitance). After several decades of development, chemical vapor deposition (c h e m i cal vapor deposi t ion, CVD) have become an important semiconductor manufacturing process and the film deposition tool main. In integrated circuit manufacturing process, a chemical vapor deposition technique is often used are: (1) atmospheric pressure chemical-vapor deposition (atmospheri c-pressure CVD, abbreviated APCVD), (2) · LPCVD Method (low-pressure CVD, abbreviation LPCVD), (3) · plasma-assisted chemical vapor deposition (plasma enhanced CVD, abbreviation PECVD). Plasma-assisted chemical vapor deposition (PECVD) uses plasma as an auxiliary source of energy to reduce the temperature of the deposition reaction, which is about 45 ° C. In integrated circuit manufacturing process, plasma enhanced chemical vapor deposition can be used to deposit silicon dioxide (Si02) and silicon nitride (Si3N4) dielectric, etc.

TW1110 (040504) CRF.ptc Page 5 594855 9a 5. 10 Case No. 9211 V. Description of the invention (2) Layers please refer to Figure 1 ', which is a diagram showing the d surface before the dielectric layer is formed during the semiconductor process A plurality of wires 14 are disposed on a substrate 12, and a gap is provided between every two wires 14. As shown in FIG. 2, it is a schematic cross-sectional view of a conventional deposition of a dielectric layer. A dielectric substance 10 is deposited from the direction indicated by the arrow [1 on the wire 14 and a part of the surface of the substrate 12 and trench filled. The gap between the wires 14. Since the dielectric material when deposited on the surface of the bit 1〇 wires 14 of the wire lateral position facing a ,, b, and interposed between the substrate surface 14 of the two conductors,

Coverage location position c and the like are not uniform, i.e., step coverage (step coverage) phenomenon. Typically, the dielectric material of 1〇 &amp; best coverage point position, so that when performing the process 10, the deposition rate of three positions on this will not be the same dielectric material is deposited, and when the wires between the two The smaller the gap distance w, or the greater the gap depth h between the two conductors, that is, the greater the h / w ratio, the more significant the 14 deposition rate differences caused by the step coverage phenomenon are. The h / w ratio It is called appearance ratio (a ect rat io, AR).

As semiconductor devices become more and more dense, trench filling with a high aspect ratio gap becomes more difficult than filling with a low aspect ratio gap. The difference in deposition rate described in Figure 2 ^ will also become more serious. When the process of the gap is the groove fill, 咼 appearance ratio of, when the dielectric substance Shu square of the surface of the wire &gt; opposing a deposition rate much higher than that of the wire side position ^ and the deposition rate of the surface position c of the substrate, the valley is easy to produce 16 · 16 (〇νεΓ) ^ ηδ) Substance 10 will not completely fill the gap, so that the trench filling is completed: holes (v〇ids) 18 are formed in the galvanic layer 20, as shown in Figure 3. shows

Docket No. 92114854 594855 correction of said five months, to complete the schematic description of the invention (3) EC dielectric layer deposition profile. In the semiconductor manufacturing process, the generated holes (voids) 18 impact element is very huge, for example, after the dielectric layer deposition process is completed, subsequent the steps such that the dielectric layer is deposited of a flat surface using a chemical mechanical polishing method (chemical mechanical polishing) The exposure of holes and voids makes it easy to fill in the impurities caused by chemical mechanical polishing, which affects the electrical properties of the dielectric layer, and even causes the semiconductor element to be disconnected or leaked, which seriously reduces the yield of the product. SUMMARY OF THE INVENTION In view of this, object of the present invention is to provide a semiconductor manufactured by using Cheng Zhongli HDP chemical vapor deposition (high dens i ty plasma-chemical vapor deposition, HDPCVD) method to form the dielectric does not have the holes the method of filling the groove layer. According to the purpose of the present invention, a trench filling method is proposed, which uses a high-density plasma-chemical vapor deposition (HDPCVD) method to deposit a dielectric layer on a substrate, and a plurality of strips are arranged on the substrate. Conductors, with multiple gaps formed between the conductors, this trench filling method is described below:

a) · used as a source of the reaction gas burning stone Yue Xi (silane, Si H4) and oxygen (Oxygen, 〇2) for depositing a dielectric layer on a substrate, which is used in an amount ranging from about gas: stone cooking Xi Yue (Si H4) ·· 30~60 cm3 / min; oxygen (〇2): 40~80 cm3 / min. At the same time as the reaction, a splash gas helium (Heium, He) with a gas usage range of about 80 to 150 cm3 / min was added, and LFRF

TW1110 (040504) CRF.ptc Page 7 594855 Case No. 92114854 Amendment V. Description of Invention (4) ---- The power and HFRF power are set to the same value, and the power range is about 275〇-325 () w (watt) . This step a is performed for about 40 seconds. At this time, the thickness of the dielectric layer is about 500 angstroms (Angst rom, A). B) Use the same silane 'Si H4' and oxygen (〇2). ) Source gas is successively deposited to form a dielectric layer like silicon dioxide (s 丨) on the substrate. The gas used in an amount ranging from about: Silicon methane (SiD: 5〇~80 cm3 / min; oxygen (〇2): 90 ~110 cm3 / min and at the same time added to a reaction gas used in an amount ranging from about 30~70 cm3 /. min of argon gas blow money · (argon, Ar), HFRF and LFRF power and the power set to the same value, the power range from about 2 7 5 0 -. 3 2 5 0 w b this step is performed for about 65 seconds, and referral the total thickness of the dielectric layer is about 4500 angstroms to make the above-described object of the present invention, features, and advantages can be more comprehensible, a preferred embodiment hereinafter, and accompanied with figures are described in detail as follows: [ Embodiment 4 FIG. 4 is a schematic cross-sectional view of a dielectric layer deposited according to a preferred embodiment of the present invention. Please refer to FIG. 4, a plurality of wires 14 are arranged on a substrate 12 between each two There is a gap between the wires 14. A dielectric substance 30 is deposited on the wires 14 using a high-density plasma-chemical vapor deposition (HDPCVD) method in a direction shown by an arrow U. And a part of the surface of the substrate 12 is filled with gaps between the wires 14 to form a dielectric layer. The material of the dielectric layer can

TW1110 (040504) CRF.ptc Page 8 594855

For example, the dielectric layer of silicon dioxide. This high-density plasma chemical vapor deposition method includes at least the following two steps: a) Use a source gas including silicon methane (Siiane, SiH4) and oxygen (〇xygen, 〇2) to deposit a dielectric substance 3 〇 On the substrate 丨 2. At the same time as the reaction, a splash gas helium (he 1 ium, He) was added to provide an ion sputtering effect on the dielectric layer to increase the effect of ion bombardment. This step a is performed for about 40 seconds. At this time, the thickness of the dielectric layer is about 500 angstroms (Angst rom, A).

b) · Xi also used comprising A burning stone (silane, Si H4) with a source of oxygen (Oxygen, 〇2) connecting the gas formed by depositing a dielectric layer such as silicon dioxide (S i 〇2) layer, in On the substrate 1 2. At the same time, another sputter gas, argon (Ar), is added to the reaction to provide ion sputtering to this dielectric layer to increase the effect of ion bombardment. This step 1) is performed for about 65 seconds, and the total thickness of the dielectric layer is about 450 angstroms. A step of said respective gas is preferably used in an amount ranging ·· Si Yue alkoxy (SiH4): 30 ~60 cm3 / min; oxygen (〇2): 40 ~80 cm3 / min; helium

(He): 80 ~ 1 50 cm3 / min. In addition, the LFRF power and HFRF power are set to the same value, and the power range is about 2750-3250 w. In step a, the length of the rate from the bottom up (bottom-up rate) than the deposition rate is large, so that the deposition rate for the interposed surface of the substrate between the position c is much greater than the two wires of the wire surface and the position of a 1 4 b side of the position of the wire deposition rate. When the gap between the constant distance between conductors, interposed between the wire to reduce the gap depth, the appearance ratio of this conductor in the slot structure also decreased. The range of each gas used in step b is preferably: silane

TW1110 (040504) CRF.ptc Page 9 594855 93. 5. 10

(SiH4): 50 ~80 cmvmin; oxygen (〇2): 9〇 ~11〇 cm3 / min; argon (Ar): 30~70 cmVmin. HFRF and LFRF power and power to the same value 'power ranging from about 275 0-3250 w. In step b, due to the molecular weight of gas of argon (Ar) of 40 more helium (He) of molecular weight 2 to be large, so step b the deposition rate is faster than the deposition rate in step a in, can compensate for the deposition rate is slow resulting The problem of poor productivity.

Case No. 921USFU \ yj j In step a and step b, the LFRF power and HFRF power used are set to the same value, the main purpose is to avoid the generation of particles. If the two steps use different lfrf and HFRF, when step 'a' is performed again after step a is completed, there will be a power conversion action, which increases the particle source. Please refer to FIG. 5A to FIG. 5D, which are the result sheets after the trench filling process of the present invention is displayed by using a scanning electron microscope (SEM). Figures 5A and 5B are taken from a cross section of a central region of a semiconductor element 'and Figures 5C and 5D are taken from a cross section of an edge region of a semiconductor element. Thus 'high-density plasma chemical vapor deposition method of the present invention' that the pay Cloth structure even with South appearance ratio (a SP e C t Γ ati square) of the groove can achieve good filling effect, prevent the dielectric layer generating a high density plasma chemical vapor deposition holes (void) square embodiment of the present invention, the above-described embodiment disclosed, the grooves may be applied to fill the gap between the semiconductor element on the substrate to form a conductor on the dielectric layer. This method does not form a dielectric layer having a hole, having at least the following advantages: a high-density plasma chemical vapor deposition process employed in the present invention

TW1110 (040504) CRF.pte Page 10 594855 S3 · 5 · _ Case No. 92114854_ Month Day Amendment 5. The two steps of the invention description (7) can be implemented on the same substrate, so not only do not need to use separate single equipment, but also because the semiconductor element and the substrate during the manufacturing process is not exposed to the atmosphere, to avoid oxidation of the interface, dust and moisture problems, to improve the yield and reliability of the electrical element and the wafer. Second, a high density plasma chemical vapor deposition method of the present invention to provide a uniform and bubble-free trench filling capabilities, and even for high aspect ratio with (aspect rat ίο) of the structure can achieve a good effect of groove fill, to avoid A void is created in the dielectric layer. The entire semi-semiconductor is fully integrated with the present invention and the product steps of the present invention. The use of the edge of the er-to-edge conductor element is improved, although it is not used. to define the spirit and scope of the scope of protection to high density semiconductor) fill efficiency on the semiconductor surface and then the inner peripheral present invention, when the element is set to make the respective fields of view no avail, in that the element is clear, when any It can be attached in the "center-to-edge" grooves have a good filling ability, in the hole-containing deposit any, improvement can be obtained of the area of the semiconductor device production yield. A preferred embodiment is disclosed above. Those skilled in this art will not deviate from various changes and retouches. Therefore, please define the scope of the patent as:

Docket No. 594855 92114854 Λ_η said correction briefly described drawings forming a schematic cross-sectional view of a front dielectric layer of Figure 1 is the schematic diagram of the semiconductor manufacturing process. FIG. 2 is a schematic cross-sectional view of a conventional dielectric layer. FIG. 3 is a schematic cross-sectional view showing the completion of a conventional dielectric layer deposition. FIG. 4 is a schematic cross-sectional view illustrating a process of depositing a dielectric layer according to a preferred embodiment of the present invention. The first to third 5Α FIG. 5D is the result of using a groove photograph scanning electron microscope (SEM) of fill displayed. FIG formula numeral 10: dielectric substance 12: substrate 14: wire 16: overhang 18: a hole surface position of the wire b ·· position c wire side surface of the substrate from the position of the gap distance w gap depth h 2 0: dielectric layer 30 : dielectric substance U: depositing a circular direction I

TW1110 (040504) CRF.ptc Page 12

Claims (1)

Docket No. 594855 93. The i〇_ __ six 92114854_ date, the patented method of filling the range of 1 • one groove, based high-density plasma chemical vapor deposition (high density plasma-chemical vapor deposition, HDPCVD ) Method is to deposit a dielectric layer on a substrate, a plurality of wires are arranged on the substrate, and a plurality of gaps are formed between the wires. The trench filling method includes: a) using a source gas and a first click sputtering gas to deposit the dielectric layer on the substrate, wherein the system comprises a silicon source gas methane (si lane, Si H4) and oxygen (oxygen, 02), the first strike sputtering system helium gas (hel ium , He); and b) using the source gas and a second sputtering gas for subsequent deposition, wherein the second sputtering gas system is argon (Ar0n, Ar). 2. The trench filling method as described in item 1 of the scope of the patent application, wherein the material of the dielectric layer comprises silicon dioxide (Si02). 3. The application of the method of filling the groove patentable scope of clause 1, wherein a step for about 40 seconds at which time the dielectric layer thickness of about 5〇〇 Angstroms (Angstr〇m, A) 'after the subsequent step b about In 65 seconds, the total thickness of the dielectric layer is about 450 Angstroms. 4. The trench filling method described in item 1 of the scope of patent application, wherein in step a, the amount of silicon methane (SiH4) used as the source gas is in the range of about 30 to 60 cm3 / min. the method of claim groove filled range clause 1, wherein the step a as the oxygen source gases (〇2), which is used in an amount ranging 4〇~8〇cm3 / miη 〇6 · Patent application range as items 1 The trench filling method, wherein 83. 5.10 594,855 Docket No. 92114854 six, the scope of patented first strike sputtering gases helium (He), which is used in an amount in the range of 80~150 c m3 / mi η · 〇7 patent application as an item range The trench filling method described above, wherein in the step b, the silicon methane (S i Η 4) used as the source gas has a usage range of about 50 to 80 cm3 / min. 〇8. The trench described in item 1 of the scope of patent application The filling method, wherein in step b as the source gas oxygen (〇2), the usage range is about 90 ~ 110 cm3 / min. 9. The application of the method of filling the groove patentable scope of clause 1, wherein wherein the second argon as the sputtering gas attack (Ar), which is used in an amount ranging from about 30~70 c m3 / mi η as 0.5 〇1 The trench filling method according to item 1 of the scope of the patent application, wherein the LFRF power and the HFRF power applied in the trench filling method are set to the same value, and the power range is about 27 50 ~ 325 0 w (watt) . • one method of filling the groove 11 with the dielectric layer without forming the hole, the method comprising: providing a substrate; a plurality of wires arranged on the substrate, having a plurality of gaps between the conductive lines; and a south-density plasma chemical vapor A phase filling (HDpcVD) method is used to perform a trench filling process. The trench filling process includes: a) using a source gas and a first sputtering gas to deposit the interlayer on the substrate, wherein the source gas system is Silicon methane (siH4) and oxygen (oxygen, 02). The first splash gas system is helium (helium, TW1110 (040504) CRF.ptc page 14 594855 -m 92J.14854_ sash B n · six years, the scope of patented &gt;.He); and B) · use of the second source gas and a sputtering gas to blow Continuing, / youji 'wherein' the first money impingement system is argon (Ar). 12. The trench filling method as described in item 11 of the scope of patent application, wherein the material of the dielectric layer includes silicon dioxide (Si 02). 1 3 · The trench filling method as described in item 11 of the scope of patent application, wherein step a is performed for about 40 seconds and the thickness of the dielectric layer is about 500 angstroms (Angstrom, A), and then step b is performed for about 6 In 5 seconds, the total thickness of the dielectric layer is about 4500 Angstroms. 14. The trench filling method as described in item 11 of the scope of patent application, wherein Shi Xiyao (S i H4), which is the source gas in step I of pain I, is used in an amount ranging from about 30 to 60 cm3 / min 〇15 · The trench filling method as described in item 11 of the scope of patent application, wherein in step a, as the source gas of oxygen (〇2), the usage range is about 4 0 ~ '80 c m3 / mi η 〇 '1 6 · The trench filling method as described in item 11 of the scope of patent application, wherein the helium (He) used as the first splash gas in step _ is in a range of about 80 to 150 cm3 / min 〇17. The trench filling method described in item 11 of the scope of patent application, wherein in the φ step b, the silicon methane (S i H4) used as the source gas has a usage range of about 50 to 80 cm3 / min 〇18. The trench filling method as described in item 11 of the scope of patent application, wherein in step b as the source gas oxygen (〇2), the usage range is about 90 ~ 110 cm3 / mi η 〇 TW1110 (040504) CRF.ptc Page 15 of 594855 93. 5. 10 _Case No. 92114854_ Year Month and Amendment _ 6. Application for Patent Scope 19. The method for filling in grooves as described in item 11 of the scope of patent application, where as argon (Ar) sputtering the second blow gases, used in an amount ranging from about 30~ 7 0 c in3 / mi η 〇20. the application of the method of filling the groove patentable scope of item 11, wherein the process to fill the groove LFRF power (power) is applied in the same value and the HFRF power, which power range from about 2750~3250 w (watt). TW1110 (040504) CRF.ptc Page 16