TW583768B - Semiconductor device fuse and manufacturing method thereof - Google Patents

Abstract

A semiconductor device fuse and a manufacturing method thereof are disclosed. The fuse is a thin metal film formed between the upper edges of top metal layers, such as an aluminum film. Since the thickness of the fuse and that of the predetermined thickness above the fuse in the fuse window are small, it is not necessary to use high power laser beam to cut off the fuse while in the step of laser repair. Therefore, not only there is a broader energy range for the laser repair step, but also the damage of inter-metal dielectric (IMD) layer due to the use of high power laser beam can be avoided, so that such as copper or silver in metal layers can be prevented from being exposed and corroded.

Description

583768 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention () Field of the invention: The present invention relates to the structure of a metal fuse (plug) with a plug + a type + conductor element and its manufacturing method. % 丨 θ 1 ⑺ 疋 relates to a structure of a thin metal fuse formed between top metal layers (Top Metal Layers) and a manufacturing method thereof. Background of the Invention: In semiconductor device manufacturing & over-private, in order to achieve the best yield and quality of the process, & < products are tested at different stages of the I process. By detecting the defective semiconductor components, the quality of the products can be ensured and the production yield can be improved. After the semiconductor device is used, the metal fuse is used to provide the backup circuit. When the test is performed, the laser can be used to repair the defective part (Laser). Repair) step, that is, using a laser to cut the metal fuse, to replace the defective part of the wafer with the backup circuit, to improve the quality of the wafer. For example, in a memory element or an element with embedded memory, the use of dense soil can be used to cut the corresponding metal fuse on the backup row or column cell to deepen the defect. Memory cell. In this way, the varnish of the memory element can be improved again. In addition, it can also be repaired by the action of cutting the metal melting line. The flag is a logic element. For example, at the beginning of making a private logic chip, usually Many interconnected logic gates will be planted. Then, during the post-processing steps Ming Ming and Jun can take

The customer needs to directly cut the metal fuse of the A ^ gate between the required logic to obtain a chip with the required circuit. —— 、 Yes (Please read the notes on the back before writing this page)

583768 A7 _____ B7 V. Description of the invention () (Please read the notes on the back before filling this page) In order to improve the signal transmission and the overall circuit performance, highly conductive materials (such as copper or silver) ¥ are used to form metals Interconnect. Among them, Inter-Metal Dielectric Layer (IMD) made of low-k material is more commonly used to further reduce the resistance and capacitance (RC) value. In the conventional semiconductor device of the copper process, the uppermost metal layer is usually used as the formation position of the metal fuse. Please refer to Figures 1A and 1B for printing by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. Figure 1A is a schematic cross-sectional view of a metal fuse line showing the conventional copper process; Figure 丨 B is a conventional copper system. A schematic top view of the arrangement of Cheng Zhi's multiple metal fuses. First, an isolation structure 102 is formed in the semiconductor substrate 100, such as a shallow trench isolation structure (STI). Then, a polycrystalline silicon conductive (poiyii) layer 10 is formed on the isolation structure 102 to cover a part of the isolating structure 1002, and the polycrystalline silicon conductive layer 10 is connected to the metallization line 1 40. External circuit components. Next, a plurality of plugs (Plugs), a metal layer, and an inner metal dielectric layer located in a plurality of layers are sequentially formed on the polycrystalline siliconized conductive layer i 〇4, that is, as shown in FIG. 1 layer of intermediate metal layer ji and intermediate inner metal dielectric layer 1 2 1; plug 1 3 1 connecting polycrystalline silicidation conductive layer and intermediate metal layer 1 1 1; intermediate metal layer located on second layer 丨丨 2 and middle inner metal dielectric layer 122; plug 1 3 2 connecting middle metal layer 112 and middle metal layer m; middle metal layer located at layer n-1 丨 3 and middle flat metal dielectric layer 123 ; The plug 133 connecting the intermediate metal layer 1 π and the next intermediate metal layer (not shown); the uppermost metal layers 114a and n4b on the nth layer and the uppermost metal dielectric layer 124; connecting the uppermost metal Layer n4a (114b) and the plug 134 of the intermediate metal layer 113, where η can be, for example: 5, ie 5 3 This paper size applies the Chinese National Standard (cns) a4 specification (210X297 mm) 583768 A7 B7 Intellectual property of the Ministry of Economic Affairs Printed by the Bureau ’s Consumer Cooperatives V. Description of the invention (that is, between the uppermost metal layer 114a and the uppermost metal layer U4b A metal fuse 140 having the same thickness and material is formed. The uppermost metal layers 114a, 1 1 4b and metal fuse 1 40 become the metal fuses. The metal fuses 1 40 and the uppermost metal layers 114a (n4b) are above It is covered with an oxide layer 152 and a nitride layer: 4 as a protective layer 156 to prevent external forces from damaging the structure below it. A fuse window 160 is formed in Dumanyu 156, and there is a gap between the fuse window 160 and the metal fuse 140. The preset thickness is 62 to facilitate laser repair. And the uppermost metal layers U4a and 114b are often power lines (P〇wer

We) or radio frequency (i)) where the components are connected 'has a relatively large thickness, usually at least' '000 Angstroms. If a radio frequency component is connected, the thickness can reach 30,000 Angstroms. Therefore, a relatively high-energy laser beam is required to cut the metal melting line 14 () of the same thickness as the uppermost metal layer (4b) to complete the laser repair process. However, the high-energy laser beam cuts the metal melt at the same time as the wire 14; it also causes considerable stress (: =) in the uppermost metal dielectric layer 124, plus the maximum of the steel process. The metal dielectric in the upper layer is made of a low dielectric constant material. Its structure is _. 丨, but it is Porous and fragile (hagUe). Therefore, the metal dielectric in the upper layer is slamming. Reliability and goodness of the metal-acoustic-into-body components in the uppermost layer of copper exposed to the air from four cold 丄 Gu Yiwen two-energy lasers were exposed to the air and rotted. . : Japan ’s Ada field reduces semiconducting. On the other hand, the conventional metal fuse is limited in thickness and cannot be reduced, which is not conducive to reducing the conductivity. Not only the design, but also the arrangement of its location is also limited by the size of the file system. The design is quite lacking. The paper size is in the middle of the standard_CNS A4 size ⑽χ297 ^ $ .......... .........., may ......... ^ 9 (Please read the notes on the back before filling out this page) Ψ: 583768 V. Description of the invention () Inflexible. It is worth mentioning that the reliability of semiconductor components is reduced due to the bad low dielectric constant material layer when the laser beam cuts the metal fuse, and the laser equipment suppliers are all committed to developing a new generation of laser equipment to: The above is strictly absent. However, when such R & D is obsolete, the problem cannot be solved immediately, and users will waste the laser equipment that has been installed. Therefore, it is very urgent to develop a structure and manufacturing method of a metal dazzle wire of a semiconductor device. The steps of snow repairing and repairing laser watches need only use a low-energy laser beam to effectively cut them. Break the metal and melt the wire without damaging the internal metal dielectric made of the low dielectric constant material; the electrical layer prevents the copper from being exposed and rotten, thus improving the reliability of the semiconductor device Degree and Yield. The purpose and summary of the invention: The metal fuse wire of the conventional semiconductor device is made by using the uppermost metal layer, and its thickness is large. 'A high-energy laser beam is required to successfully cut the metal fuse wire. The internal metal dielectric layer made of a low dielectric constant material located below the metal fuse is destroyed, and the copper is exposed and rotten, thereby greatly reducing the reliability and yield of the semiconductor device. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Therefore, one of the main objects of the present invention is to provide a structure of a metal smelting line for a semiconductor element and a manufacturing method thereof. By effectively reducing the energy of the laser beam used to avoid damaging the = metal dielectric layer 'made of low dielectric constant materials, the copper will not be exposed and will be corroded, thus improving the reliability and reliability of semiconductor components. Yield. Another object of the present invention is to provide a metal fuse for semiconductor components. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 public love) 583768 Α7 Β7 5. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, and the invention description (

, 纟 α structure and its manufacturing method. By greatly reducing the thickness of the metal fuse, its location arrangement and design can have high flexibility. X According to the above-mentioned purpose, the present invention further provides a structure of a metal fuse of a semiconductor, including at least: a substrate; an uppermost metal Z electrical layer on the substrate; a first to uppermost metal layer and The second one is the upper metal, which is located on a part of the uppermost metal dielectric layer and is surrounded by the uppermost metal dielectric layer; the metal fuse is located on the other part of the uppermost metal dielectric layer, where The metal fuse is connected to the upper surface of the first uppermost metal layer; and the protective layer covers the metal fuse, the first uppermost metal layer, and the remaining uppermost metal dielectric layers. In addition, the present invention provides a method for manufacturing a metal fuse of a semiconductor element, which at least includes: providing a substrate; forming an uppermost metal dielectric layer on the substrate; forming a first uppermost metal layer and a second uppermost metal Layer on a portion of the uppermost metal dielectric layer and surrounded by the uppermost metal dielectric layer; forming a metal fuse, located on another portion of the uppermost metal dielectric layer, wherein the metal fuse line is connected to The upper surface of the first uppermost metal layer; forming a protective layer covering the metal fuse line, the first uppermost metal layer, and the remaining uppermost metal dielectric layer; and forming a protective layer with the fuse window above the metal fuse line And the protective layer has a predetermined thickness on the metal fuse. Detailed description of the invention: The present invention discloses a structure of a metal fuse of a semiconductor element and a manufacturing method thereof. This metal fuse is formed of thin gold between the uppermost metal layers of the component. 6 The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 1.1 (please note on the back of the page before writing this page) 583768 A7

Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. This makes it unnecessary to belong to the melting line when performing laser repair, to avoid high-energy lasers caused by the low dielectric constant: =: damage to the metal dielectric layer in the broken gold. II. Damage, while avoiding the corruption of the steel in the metal layer. I. The image of "Month" and "Monthly", Figure 2, Figure 2 is a schematic cross-sectional view showing the structure of the metal melting line of the semiconductor element of the present invention. When making 4 of the present invention, first use the metal can structure For example, lithography, dry type :: =: Density Electrochemical Chemical Vapor Deposition (High Density piasma cvD: HDPCVD) technology forms an isolation structure 102 in a semiconductor substrate # 100. A layer of polycrystalline silicon silicide is deposited, and a cap The polycrystalline siliconized metal is patterned on the substrate 100 and the isolation structure using, for example, lithography and etching techniques, and a polycrystalline silicided conductive layer 104 is formed on the isolation structure 102, and a part of the isolation structure 102 is exposed, in which the polycrystalline silicon The conductive conductive layer 104 may be, for example, a linear shape. Then, an intermediate internal metal dielectric layer 1 2 1 is formed on the exposed isolation structure 102 and the polycrystalline silicided conductive layer 104 using a method such as chemical vapor deposition. And then use, for example, lithography and etching techniques to define the intermediate inner metal dielectric layer 121 and form an opening of the plug 131 therein. Then, a metal layer is filled in the opening of the intermediate inner metal dielectric layer 121, Plugs are formed in the middle inner metal dielectric layer 1 2 1 such as copper! 3 1 and the middle metal layer 1 1 1. Among them, the plug 1 3 1 is separately from the middle metal layer 1 1 1 and the polycrystalline siliconized conductive layer 1 04 contact, and provide electrical connection between the intermediate metal layer 1 1 1 and the polycrystalline silicided conductive layer 1 04. Then, using the above paper size, the Chinese National Standard (CNS) A4 specification (210X297 mm) is applied .. ........... MW ........., 耵 ......... Φ 1 (Please read the notes on the back before filling this page) 583768 A7 B7 V. Description of the invention () The methods and materials described above form the intermediate inner metal dielectric layer 122 on the intermediate inner metal dielectric layer 丨 2 1 and part of the intermediate metal layer n 丨, and the plug 132 is located on the intermediate inner metal dielectric layer. The electrical layer 122 and another part of the intermediate metal layer 111 and the intermediate metal layer 112 are located on the plug 132 in the intermediate inner metal dielectric layer 122. As shown in FIG. 2, according to actual needs, continue to form several layers of the same Structure 'where the uppermost inner metal dielectric layer 224 is located on the middle inner metal dielectric layer 123 and part of the middle metal layer 113, and the plug i34 It is located in the uppermost inner metal dielectric layer 224 and another intermediate metal layer U3, and the uppermost metal layers 214a and 214b are respectively located on the plugs 134 in the uppermost inner metal dielectric layer 224. The above-mentioned inner metal The dielectric layer is made of a low dielectric constant material. After the uppermost metal layers 214a and 214b are formed, a mask is used to form a metal fuse 240 on a part of the uppermost metal dielectric layer 224, For example, an aluminum metal fuse line, in which both ends of the metal fuse line 240 are connected to the upper surface of the uppermost metal layer 21 牦 and the upper surface of the uppermost metal layer 214] ?, respectively. The shape of the metal fuse 240 may be, for example, a rectangular parallelepiped shape, and its width may be, for example, an appropriate width smaller than the width of the uppermost metal layer. Since the formation of the metal = line 240 has nothing to do with the uppermost metal layer "" and 21 讣, the thickness of the metal dazzling line 240 can be quite thin, for example: between 1 ^ Angstrom and 6 _ Angstrom, without being limited to the uppermost layer The metal layer 21 is etched and the thickness of 21 讣. Therefore, the present invention can not only use a laser beam with a lower energy to perform the = radiation: supplement step to avoid the uppermost metal layer 214 ". The low dielectric constant material of 21 讣 is damaged by the laser beam, so that the steel in the metal layer will not be exposed to this paper standard (CNS) A4 specification (21〇 ......... f: (Please read the notes on the back before filling out this page), Yiding · Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Cooperatives X 297 mm) A7

Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 583768 V. Description of the invention () Out of money and corrupted ’is particularly beneficial to the further development of semiconductor components. Moreover, since the metal fuse 240 is externally connected to the uppermost metal layer 214; and 2 1 4b ', the arrangement of its formation position has considerable flexibility, so it can be applied to any sealed semiconductor product, such as flip chip *. Called) products and so on. After the fabrication of the metal fuse 240, the deposited oxide layer 152 covers the uppermost metal dielectric layer 224, the metal fuse 24o, and the uppermost metal layers 21 4a and 21 4b, and the nitride layer 154 covers the oxide layer. On 152, the oxide layer 152 and the nitride layer 154 are used to protect the underlying material structure from being damaged by external forces. Therefore, the oxide layer 152 and the nitride layer i 5 4 may be collectively referred to as a protective layer 156. Next, a protective layer 156 over the metal fuse is defined by, for example, lithography and etching techniques, so that a portion of the nitride layer 154 and a portion of the oxide layer 152 are removed, and a fuse is formed in the protective layer 156 above the metal fuse 240. Window 160. Because the metal fuse line 240 is located on the uppermost metal dielectric layer 224, the preset thickness of the fuse window 160 from the metal fuse line 24o is larger than the preset thickness 162 shown in Figure 1, for example: Let the thickness of the second series be between 500 Angstroms and 5,000 Angstroms. Therefore, a laser beam with a lower energy can be used to remove the metal fuse 240 and the oxide layer thereon, i52, to perform the laser repair step. Therefore, an advantage of the present invention is to provide a structure of a semiconductor metal wire and a manufacturing method thereof. Only low-energy lightning can be used to effectively cut the metal fuse, and the internal metal dielectric layer made of low dielectric constant materials will not be damaged. Therefore, the copper will not be exposed to corrosion and therefore will be exposed. Improve the reliability and yield of semiconductor devices. On another net, the paper size of the present invention is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) ... 1T ....... .. (Please read the notes on the back before filling this page) A7

583768 V. Description of the invention () The original laser can be used ^ W shot first and then ’to increase the service life of the original laser light equipment. Another advantage of the present invention is to provide a metal-solubilized structure of a semiconductor element and a manufacturing method thereof. It can greatly reduce the thickness of the metal fuse line, which is conducive to the reduction of semiconductor components. Moreover, the arrangement and design of the position of the metal melting line need not be limited to the uppermost metal M. It has a high degree of design flexibility and is suitable for various semiconductor products. As will be understood by those familiar with this technology, the above descriptions are merely preferred embodiments of the present invention, and are not intended to limit the scope of patent application for the present invention; all others completed without departing from the spirit disclosed by the present invention, etc. Effective changes or modifications' shall be included in the scope of patent application described below. Brief description of the drawings: The preferred embodiment of the present invention has been described in more detail in the foregoing explanatory text with the following figures, in which: Figure 1A is a cross-sectional view of a metal fuse line showing a conventional copper process , Figure; ^ Figure 1B is a schematic top view showing the arrangement of a plurality of metal fused greens in a conventional copper process; and Figure 2 is a cross-section of a metal structure showing a metal fuse of a semiconductor element of the present invention schematic diagram. Explanation of drawing number comparison: 100 substrate 102 isolation structure The paper size is applicable to China National Standard (CNS) A4 specification (210X297 mm) ..., possible. ........ Φ (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 583768 A7 _ B7_ V. Description of the invention () 104 Polycrystalline siliconized conductive layer 1 1 1 , 1 1 2, 1 1 3 Intermediate metal layers 114, 114b, 214a, 214b Uppermost metal layers 121, 122, 123 Intermediate inner metal dielectric layers 124, 224 Uppermost inner metal dielectric layers 131, 132, 133, 134 Plug 140, 240 Metal fuse 152 Oxidation layer 154 Nitrid layer 156 Protective layer 160 Fuse window 162, 262 Preset thickness (Please read the precautions on the back before filling this page) The paper size of the paper is applicable to China National Standard (CNS) A4 (210X 297 mm)

Claims (1)

583768 ABCD VI. Scope of patent application 1. A structure of metal fuse (semiconductor fuse) of a semiconductor device, at least (please read the precautions on the back before filling this page) Including: a substrate; a metal dielectric in the uppermost layer A layer is located on the substrate; a first uppermost metal layer and a second uppermost metal layer are located on a part of the uppermost metal dielectric layer and are surrounded by the uppermost metal dielectric layer; a metal A fuse is located on another portion of the uppermost metal dielectric layer, wherein the metallic glare is connected to the upper surface of the first uppermost metal layer; and a protective layer covers the metallic fuse. 2. The structure of the metal fuse of the semiconductor device according to item 1 of the scope of the patent application, wherein the substrate further includes at least a plurality of plugs located in the uppermost metal dielectric layer. 3. The metal fuse / wire structure of the semiconductor element as described in item 1 of the scope of the patent application, wherein the protective layer further includes at least a fuse window located in the consumer consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs and printed a thick preset -If you have online melting metal, you should protect it at the same level and make it online. Item 3 of the description of the element and body of the metal alloy is referred to as Item 3. Fan Li specially requested to apply such as 12 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 583768 ABCD VI. Line of patent application The structure, wherein the preset thickness is between 500 angstroms and 5,000 angstroms. (Please read the precautions on the back before filling this page) 5 · The structure of the metal melting line of the semiconductor device as described in item 1 of the scope of patent application, wherein the substrate further includes at least a plurality of inner metal dielectric layers' located Below the uppermost inner metal dielectric layer, the inner metal dielectric layers and the uppermost inner metal dielectric layer are made of a low dielectric constant (Lowk) material. 6. The metal-soluble structure of the semiconductor device according to item 1 of the scope of the patent application, wherein the first uppermost metal layer and the second uppermost metal layer are made of steel. 7 · The structure of the metal dazzle wire of the semiconductor device according to item 1 of the scope of the patent application, wherein the material of the metal melting wire is Shao. 8. The structure of the metal wire of the semiconductor device according to item 1 of the scope of the patent application, wherein the thickness of the metal fuse is between 1,000 Angstroms and 6,000 Angstroms. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 9. The structure of the metal melt line of the semiconductor device as described in item 1 of the scope of patent application, wherein the thickness of the first uppermost metal layer is greater than 6,000 angstroms. This paper size applies to China National Standard (CNS) A4 specification (210X297 male f) 583768 ABCD, patent application scope 10. The structure of the metal dazzle wire of the semiconductor element as described in the patent application scope 帛 丨, where the protective layer includes at least An oxide layer. (Please read the precautions on the back before filling this page) 11. The structure of the metal melting line of the semiconductor device as described in the patent application f. Workers, where the protective layer includes at least a nitride layer. 12. · A method for manufacturing a metal fuse of a semiconductor element, at least comprising: providing a substrate; forming an uppermost metal dielectric layer on the substrate; forming a first uppermost metal layer and a second uppermost layer An upper metal layer is located on a part of the uppermost metal dielectric layer and is surrounded by the uppermost metal dielectric layer; forming a metal fuse on the other part of the uppermost metal dielectric layer, wherein The metal fuse is connected to the upper surface of the first uppermost metal layer; forming a protective layer covering the metal fuse, the first uppermost metal layer, and the rest of the uppermost metal dielectric layer; and The consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs prints and forms a melting line window in the protective layer above the metal melting line, and the protective layer has a preset thickness on the metal melting line. 1 3 · The method for manufacturing a metal smelting line for a semiconductor element as described in item 12 of the scope of the patent application, wherein the substrate further includes at least a plurality of plug positions. The paper dimensions are applicable to China National Standard (CNS) A4 specifications ( 210X 297 mm) State 768 A8 B8 C8 D8 The patent application scope is in the uppermost metal dielectric layer. (Please read the precautions on the back before filling this page) 14. The method for manufacturing a metal fuse of a semiconductor element as described in item 12 of the scope of patent application, wherein the preset thickness is between 500 Angstroms and 5,00 〇 〇Angel. 15. The method for manufacturing a metal dazzle wire of a semiconductor device according to item 12 of the scope of the patent application, wherein the uppermost metal dielectric layer is made of a low dielectric constant material. 16. The method for manufacturing a metal smelting line for a semiconductor device according to item 12 of the scope of the patent application, wherein the first uppermost metal layer and the second uppermost metal layer are made of steel. 1 7. The method for manufacturing a metal melting line of a semiconductor device according to Item 12 of the application. Patent Range, wherein the material of the metal fuse is aluminum. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 18 · The method for manufacturing a metal melting line of a semiconductor device as described in Item 12 of the scope of patent application, wherein the thickness of the metal fuse is between 1,000 Angstroms and 1,000 Angstroms 6,000 Angstroms. 1 9. The method for manufacturing a metal dissolution line of a semiconductor device as described in Item 12 of the scope of the patent application, wherein the protective layer includes at least one stacked oxide layer. 15 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297). (Centi) 583768 ABCD 6. Scope of patent application and a nitrided layer. (Please read the precautions on the back before filling this page) 20. The method for manufacturing a metal fuse of a semiconductor device as described in item 12 of the scope of patent application, wherein the thickness of the first uppermost metal layer is greater than 6,000 Angstroms 2 1. A structure of a metal fuse of a semiconductor device, including at least: a substrate; an inner metal dielectric layer on the substrate, wherein the inner metal dielectric layer includes at least two adjacent metal wires; a metal A fuse is located on the upper surface of the adjacent two metal wires; and a protective layer covers the metal fuse and the inner metal dielectric layer. 22. —A structure of a metal fuse of a semiconductor element, including at least: a substrate; a first metal dielectric layer, a second metal dielectric layer and a third metal dielectric layer on the substrate; ; The Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs printed a first uppermost metal layer, a second uppermost metal layer, and a third uppermost metal layer, which are respectively located on the first metal dielectric layer and the second metal dielectric layer. An electrical layer and a portion of the third metal dielectric layer and surrounded by the first metal dielectric layer, the second metal dielectric layer and the third metal dielectric layer; The second metal dielectric layer or another part of the third metal dielectric layer, wherein the metal fuse is connected to the second uppermost paper. The size of the paper applies to the Chinese National Standard (CNS) A4 (210X 297 mm) 583768 A BCD printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the patent application scope of the metal layer or the upper surface of the top two metal layer; and a protective layer covering the metal fuse. 23. The metal-solubilized structure of a semiconductor device according to item 22 of the scope of the patent application, wherein the substrate further includes at least a plurality of plugs located on the first metal dielectric layer, the second metal dielectric layer and the In the third metal dielectric layer, the structure of the metal fuse of the semiconductor device as described in item 22 of the scope of the patent application, wherein the protective layer further includes at least one fuse window above the metal fuse, and The protective layer has a predetermined thickness on the metal melting line. 25. The structure of the metal fuse of the semiconductor element according to item 24 of the scope of the patent application, wherein the preset thickness is between 500 angstroms and 5,000 angstroms. 26. The 4th fused wire structure of the semiconductor element as described in item 22 of the scope of the patent application, wherein the substrate further includes at least a plurality of internal metal eight 'I electrical layers located on the first metal dielectric layer, the Below the second metal dielectric layer and the second metal dielectric layer, the inner metal dielectric layers, the first metal dielectric layer, the second metal dielectric layer, and the third metal dielectric layer are formed by Made of low dielectric constant material. This paper size applies to China National Standard (CNS) A4 specification (210X297 mm) ---- (Please read the precautions on the back before filling this page) • Order · Strive for 583768 ABCD VI. Patent Application Scope (Please read the back first (Please note this page before filling in this page) 27. The structure of the metal fuse of the semiconductor device described in item 22 of the scope of patent application, wherein the first uppermost metal layer, the second uppermost metal layer, and the third uppermost metal layer The upper metal layer is made of copper. 2 8. The structure of the metal fuse of the semiconductor device according to item 22 of the scope of the patent application, wherein the material of the metal fuse is aluminum. 2 9. The structure of the metal fuse of the semiconductor device according to item 22 of the scope of the patent application, wherein the thickness of the metal fuse is between 1,000 angstroms and 6,000 angstroms. 30. The structure of the metal fuse of the semiconductor device according to item 22 of the scope of the patent application, wherein the thickness of the first uppermost metal layer is greater than 6,000 Angstroms. 3 1. The structure of the metal fuse of the semiconductor device according to item 22 of the scope of the patent application, wherein the protective layer includes at least an oxide layer. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 3 2. The structure of the metal melting line of the semiconductor device as described in item 22 of the scope of patent application, wherein the protective layer includes at least a nitride layer. This paper size applies to China National Standard (CNS) A4 (210X 297 mm)