TW579553B - Method of removing native oxide layer - Google Patents

Abstract

This invention provides a method of removing a native oxide layer, which is suitable for forming a semiconductor substrate with gate and ion implanted source/drain. The steps of the above-mentioned method are to firstly form a protective oxide layer on the semiconductor substrate, selectively etch the protective oxide to expose the source/drain, perform a hydrogen annealing step to repair the ion implanted source/drain region and remove the native oxide layer, and then form a metal layer on the semiconductor substrate. Based on the invented method, the native oxide layer can be removed during annealing to simplify manufacturing processes.

Description

579553 5. Description of the invention (1) The present invention relates to the process of semiconductor device, especially after ion implantation to change the source / drain region of a metal oxide semiconductor transistor Annealing method and sequence to simplify the process.

Tempering is a technology widely used in semiconductor manufacturing. Its principle is to use thermal energy to eliminate a defect of internal stress generated in an object. The applied energy will increase the vibration and diffusion of lattice atoms and defects in the object. The arrangement of atoms can be reorganized, and the object can be recrystallized by the disappearance of defects, and even become a single crystal. In the semiconductor manufacturing process, the 'ion implantation step causes several defects on the surface of the semiconductor substrate, and the defects must usually be repaired by a tempering step. ^ Figures 1A to 1D are used below to illustrate the conventional recrystallization step of recrystallizing the surface of the semiconductor substrate in the source / dead region of the metal-oxide-semiconductor crystal. The gate oxide layer 1 is shown on the front and back. First, please refer to FIG. 1A. The semiconductor beauty symbol STI of the gate electrode 14, the ion implanted source / drain 18 is used to distinguish the active area. Shallow trench isolation. trench isolation; STI), and the symbol 16 represents the spacer wall of the 14 side wall. The source / drain 丨 8 is a 1-pole electrode. The ion-forming step is performed by implanting ions of a different type from the semiconductor substrate: a silicon substrate is implanted with pentavalent phosphorus, arsenic and other N-type ions. In the P-type single crystal, referring to FIG. 1B, the N-type ion is chemically vapor-deposited to form a protective oxide, followed by a nitrogen tempering step to repair the ion implantation 9. After that, the substrate surface

V. Description of the invention (2) Only the bad part is formed, and the source / drain 8a of recrystallization is formed. Then, referring to FIG. 1C, the above-mentioned protective oxide layer 20 is selectively etched by using a conventional lithography process and an anisotropic etching step to form an opening exposing the source / drain 18a. At this time, waiting to be sent to the next stage is called time, and it will react with the oxygen in the environment to form an unavoidable native oxide layer (native oxide) 22. Second, the primary oxidation station, on the 24th. Above the area, however, there is a hydrogen-fluorine-based fire detection method with hydrogen-acid solution. Please refer to the layer 22, the semiconductor, and use the acid solution as above to remove the original solution. According to Figure 1D, then quickly and conventionally temper the half body substrate 10 to reduce the resistance value. The process described above removes the native oxidation layer and the modified steps of the objective oxidation method of the present invention and shrinks the hydrofluoroconductor group into an example process. The silicon metal is in the nitrogen layer 22 to upgrade the tempered short-term standby acid solution to remove the above. The bottom 10 is fed into a metal base plating machine such as titanium, cobalt and other metal layers to silicide at the source / drain 18a. After the tempering step, the process steps must be more complicated. Provides a method through a specific return procedure, which can omit time and simplify the process. According to the above purpose method, it is suitable for forming two substrates with a gate electrode and a detached oxide layer. The above method includes the following steps. / The protection of the drain electrode + another step above the conductor substrate is used to repair the ion implantation layer, and then, apply a radon (h2) regenerated oxide layer. Plant source / non-polar region, and remove the original 579553

Shi Xi base. Furthermore, in the method for removing the native oxide layer, the marginal layer is a silicon dioxide layer. In addition, the above method for removing the native oxide layer, wherein the protective insulating layer of the exposed source electrode and the electrode is formed comprehensively by chemical vapor deposition, an insulating layer, and then selectively etched the insulating layer. . The method of removing the native oxide layer further includes the step of forming a gold layer over the semiconductor substrate after removing the original lice layer.

Furthermore, the method for removing the native oxide layer, wherein the hydrogen tempering step is performed at a temperature of 800 to 1 200 ° C. Hereinafter, the present invention will be briefly described with reference to the drawings and the embodiments will be used to explain the present invention in more detail. However, the present invention is not limited thereto. Brief Description of the Drawings Figures 1A ~ 1D are cross-sectional schematic diagrams of the process of forming a metal layer on the source / drain of a metal-oxide semiconductor transistor according to a conventional technique. Figures 2A to 2D are schematic cross-sectional views of a process for forming a metal layer on a source / and electrode of a metal-oxide semiconductor transistor according to an embodiment of the present invention.

Fu Lihu's note 100 ~ semiconductor substrate. 1 0 2 ~ gate oxide layer. 1 04 ~ gate electrode. 1 0 6 ~ gap wall. 108 ~ Source / drain for ion implantation.

Page 6 579553

108a ~ source / drain after tempering. 11 〇 ~ Protective insulating layer. 11 2 ~ metal layer. EXAMPLES The following is a schematic cross-sectional view of the processes from 2A to 2D to explain the present invention in more detail. First, please refer to FIG. 2A, which shows a semiconductor substrate with a gate oxide layer 102, a gate electrode 104, and a source / drain 108 of ion implantation $ 100. The symbol sti is a shallow trench spacer used to distinguish the active area, and the symbol 106 is a spacer formed on the sidewall of the gate electrode 104. The source / drain 108 is formed by implanting ions of a different type from the semiconductor substrate using an ion implantation step. For example, P-type single crystal silicon substrate is implanted with N-type ions such as pentavalent phosphorus and arsenic. 2. Next, referring to FIG. 2B, after performing the n-type ion implantation step, a protective insulating layer such as silicon dioxide is formed by chemical vapor deposition in the presence of an appropriate reaction gas (such as diethoxysilane). 〇. Then, please refer to FIG. 2C, using the conventional lithography process and the non-isotropic steep etching step to selectively etch the protective insulating layer 丨 1 Q to form an exposure

The opening of the drain electrode 108 is followed by a tempering (H2) tempering step at a temperature of 80 0 ~ 120 (rc) to repair the affected part of the source / drain region of the ion implantation. And the primary oxide layer is removed to form a surface recrystallized source / drain 108a. Finally, referring to FIG. 2D, a recrystallized source / diode 108a is formed, followed by a 'sputtering step using metal Above semiconductor substrate 100

Page 7 V. Description of the invention (5) ^ For example, the metal layer n 2 such as titanium and copper. Secondly ‘Take advantage of tradition. In order to reduce the resistance value of the metal silicon compound over the recrystallized source / drain region 8a and the like, the resistance value is reduced. Tuncheng is used for the features and effects of the present invention. The feature of the present invention is that the openings of the sound insulation / second source / drain m are etched and protected first, and then specific treatment is performed; Under the protection of the two men, she tempered with lice. Simultaneous removal of primary oxidation on the surface of the + conductor substrate. According to the present invention, the hydrogen confusion step can be omitted, and the step of the primary gate layer can be shortened during standby. -Although the present invention has been disclosed in a preferred embodiment, such as limiting the present invention, anyone familiar with this technique will not use God and the range M. When it is possible to make changes and embellishments from the essence of the present invention, The attached application patent shall prevail. X Ming's scope of protection

Claims (1)

579553 6. Scope of patent application 1. A method for removing the native oxide layer, which is suitable for the semiconductor substrate of the source / drain of ion implantation, with a gate above 70%. Steps: ΓΓ includes the following semiconductor substrates An exposed protective insulating layer is formed on the top; ^ l 4 / urine / drain electrode with hydrogen (&) tempering step, which is used to repair the off-electrode area, and remove the native oxide layer, the source of diffuse ion implantation " And method 2 = the method for removing the native oxide layer described in the first item of the scope of the patent application-the above-mentioned semiconductor substrate is a silicon substrate. The method of removing the native oxide layer described in item 1 of the scope of patent application of method 11, wherein the protective insulating layer is a silicon dioxide layer. Method 4. The method for removing a native oxide layer as described in item 丨 of the patent application, wherein the above-mentioned protective insulating layer exposing the source / drain is a chemical vapor deposition method to comprehensively form an insulating layer and then selectively etch Acoustic insulation. 5: The method for removing a native oxide layer as described in item 1 of the scope of patent application, wherein after removing the native oxide layer, the method further includes a step of forming a metal layer over the semiconductor substrate. 6 · The method for removing the native oxide layer as described in item 1 of the scope of the patent application, wherein the above-mentioned hydrogen tempering step is performed at a temperature of 800 ~ 1200; 0 ·· —a kind of method for removing the native oxide layer The method is suitable for forming a semiconductor substrate with gate and ion implanted source / non-electrode. The above method includes the following steps: Page 9 579553 6. The scope of the patent application forms a protective oxide layer above the semiconductor substrate; selectively etches the protective oxide layer to expose the source / drain electrode; and applies a hydrogen (H2) tempering step for repair Protecting the source / drain regions of the ion implantation and removing the native oxide layer; forming a metal layer above the semiconductor substrate. 8. The method for removing an oxide layer according to item 7 of the scope of the patent application, wherein the hydrogen tempering step is performed at a temperature of 800 to 1200 ° C. Page 10