TW579553B - Method of removing native oxide layer - Google Patents
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- TW579553B TW579553B TW88106843A TW88106843A TW579553B TW 579553 B TW579553 B TW 579553B TW 88106843 A TW88106843 A TW 88106843A TW 88106843 A TW88106843 A TW 88106843A TW 579553 B TW579553 B TW 579553B
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Abstract
Description
579553 五、發明說明(1) 本發明是有關於半導體裝置(semiconductor device) 的製程,特別是有關於改變金氧半電晶體(metal oxide semiconductor transistor)之源極/汲極區域的離子植入 後之回火方式(anneal ing)及順序,以簡化製程的方法。579553 5. Description of the invention (1) The present invention relates to the process of semiconductor device, especially after ion implantation to change the source / drain region of a metal oxide semiconductor transistor Annealing method and sequence to simplify the process.
回火是一種在半導體製程廣泛使用的技術,它的原理 疋利用熱能將物體内產生的内應力的一種缺陷加以消除, 所施加的能量將增加晶格原子及缺陷在物體内的振動及擴 散,使得原子的排列得以重整,物體得以藉由缺陷的消失 而進行再結晶(recrystallization),甚至成為單晶的晶 體。半導體製私中’離子植入步驟會使半導體基底表面產 生若干缺陷,通常必須藉由回火步驟修護缺陷。 ^以下利用第1A〜1D圖,以說明傳統利用回火步驟使金 氧半電晶體之源極/沒極區域之半導體基底表面再結晶的 情形。 、、口曰日 八顯示形成有閘極氧化層1 2 首先,請參照第1 A圖 閘極電極14、離子植入之源極/汲極18之半導體美曰 符號STI為用來區分主動區域之淺溝槽隔離物。 trench isolation ; STI),而符號16 代表 1 4側壁的間隙壁。源極/汲極丨8是利 1 3極電極 入與半導體基底不同型態的離子所構用成離子步驟:植 矽基底植入五價的磷、砷等N型離子。 在P型單晶 接著,請參照第1B圖,執行N型離子 利用化學氣相沈積法,以形成保護氧化居1入步驟之後, 氮氣回火步驟,以修護離子植 9 。之後’施以 步驟造成之基底表面Tempering is a technology widely used in semiconductor manufacturing. Its principle is to use thermal energy to eliminate a defect of internal stress generated in an object. The applied energy will increase the vibration and diffusion of lattice atoms and defects in the object. The arrangement of atoms can be reorganized, and the object can be recrystallized by the disappearance of defects, and even become a single crystal. In the semiconductor manufacturing process, the 'ion implantation step causes several defects on the surface of the semiconductor substrate, and the defects must usually be repaired by a tempering step. ^ Figures 1A to 1D are used below to illustrate the conventional recrystallization step of recrystallizing the surface of the semiconductor substrate in the source / dead region of the metal-oxide-semiconductor crystal. The gate oxide layer 1 is shown on the front and back. First, please refer to FIG. 1A. The semiconductor beauty symbol STI of the gate electrode 14, the ion implanted source / drain 18 is used to distinguish the active area. Shallow trench isolation. trench isolation; STI), and the symbol 16 represents the spacer wall of the 14 side wall. The source / drain 丨 8 is a 1-pole electrode. The ion-forming step is performed by implanting ions of a different type from the semiconductor substrate: a silicon substrate is implanted with pentavalent phosphorus, arsenic and other N-type ions. In the P-type single crystal, referring to FIG. 1B, the N-type ion is chemically vapor-deposited to form a protective oxide, followed by a nitrogen tempering step to repair the ion implantation 9. After that, the substrate surface
五、發明說明(2) 才貝壞部分,而形成再結晶之源極/汲極丨8a。 然後,請參照第1 C圖,利用傳統微影製程以及非等向 性蝕刻步驟選擇性蝕刻上述保護氧化層2〇,以形成露出源 極/汲極1 8a的開口。此時等待送入下一階段的過程之中 稱為time),會與環境中的氧氣反應而形成無法避免 的原生氧化層(native 〇xide)22。 其次 原生氧化 台,在上 24。其次 區域上方 然而 利用氫氟 有鑑 火方式以 氫氣酸溶 程。 ,請參 層2 2, 述半導 ,利用 形成用 ’如上 酸溶液 於此, 去除原 液處理 照第1 D圖,利 緊接著,將半 體基底1 0上形 傳統快速回火 來降低阻值的 所述之製程, 去除原生氧化 本發明的目的 生氧化層及改 的步驟並且縮 用氫氟 導體基 成一例製程, 金屬矽 在氮氣 層22, 在於提 變回火 短待機 酸溶液,以去除上述 底10送入金屬賤鍍機 如鈦、鈷等金屬層 以在源極/汲極1 8a等 化合物(silicide)。 回火步驟之後,必須 製程步驟較為繁雜。 供一種藉由特定的回 程序的方法,可省略 時間,進而簡化製 很據上述目的 法,適用於形成有閘極、離植 生氧化層的二 基底上述方法包括下列步驟 牛導體 成一露出上述源極/汲極之保这+導體基底上方另 步驟,用以修護離子植入之呢、、、曰,施以氳氣(h2)回 生氧化層。 植之源極/沒極區域,並且去除原 上述去除原生氧化層的 579553V. Description of the invention (2) Only the bad part is formed, and the source / drain 8a of recrystallization is formed. Then, referring to FIG. 1C, the above-mentioned protective oxide layer 20 is selectively etched by using a conventional lithography process and an anisotropic etching step to form an opening exposing the source / drain 18a. At this time, waiting to be sent to the next stage is called time, and it will react with the oxygen in the environment to form an unavoidable native oxide layer (native oxide) 22. Second, the primary oxidation station, on the 24th. Above the area, however, there is a hydrogen-fluorine-based fire detection method with hydrogen-acid solution. Please refer to the layer 22, the semiconductor, and use the acid solution as above to remove the original solution. According to Figure 1D, then quickly and conventionally temper the half body substrate 10 to reduce the resistance value. The process described above removes the native oxidation layer and the modified steps of the objective oxidation method of the present invention and shrinks the hydrofluoroconductor group into an example process. The silicon metal is in the nitrogen layer 22 to upgrade the tempered short-term standby acid solution to remove the above. The bottom 10 is fed into a metal base plating machine such as titanium, cobalt and other metal layers to silicide at the source / drain 18a. After the tempering step, the process steps must be more complicated. Provides a method through a specific return procedure, which can omit time and simplify the process. According to the above purpose method, it is suitable for forming two substrates with a gate electrode and a detached oxide layer. The above method includes the following steps. / The protection of the drain electrode + another step above the conductor substrate is used to repair the ion implantation layer, and then, apply a radon (h2) regenerated oxide layer. Plant source / non-polar region, and remove the original 579553
石夕基底。 再者,上述去除原生氧化層 法,其 緣層係二氧化矽層。 上江保羞絕 极另外,上述去除原生氧化層的方法,其中上述露出源 一及極之保護絕緣層係利用化學氣相沈積法全面性形成、 絕緣層,再選擇性蝕刻上述絕緣層而得。 好並且’上述去除原生氧化層的方法,其中去除上述原 虱化層之後,更包括在上述半導體基底上方形成一金 層的步驟。Shi Xi base. Furthermore, in the method for removing the native oxide layer, the marginal layer is a silicon dioxide layer. In addition, the above method for removing the native oxide layer, wherein the protective insulating layer of the exposed source electrode and the electrode is formed comprehensively by chemical vapor deposition, an insulating layer, and then selectively etched the insulating layer. . The method of removing the native oxide layer further includes the step of forming a gold layer over the semiconductor substrate after removing the original lice layer.
再者’上述去除原生氧化層的方法,其中上述氫氣回 火步驟係在800〜1 200 °C的溫度下進行。 以下配合圖式簡單說明並且利用實施例以更詳細地說 明本發明’然而本發明並非僅限於此。 圖式之簡單說明 第1 A〜1 D圖係根據習知技術在金氧半電晶體之源極/汲 極上形成金屬層之製程剖面示意圖。 第2A〜2D圖係根據本發明實施例在金氧半電晶體之源 極/及極上形成金屬層之製程剖面示意圖。Furthermore, the method for removing the native oxide layer, wherein the hydrogen tempering step is performed at a temperature of 800 to 1 200 ° C. Hereinafter, the present invention will be briefly described with reference to the drawings and the embodiments will be used to explain the present invention in more detail. However, the present invention is not limited thereto. Brief Description of the Drawings Figures 1A ~ 1D are cross-sectional schematic diagrams of the process of forming a metal layer on the source / drain of a metal-oxide semiconductor transistor according to a conventional technique. Figures 2A to 2D are schematic cross-sectional views of a process for forming a metal layer on a source / and electrode of a metal-oxide semiconductor transistor according to an embodiment of the present invention.
付ί虎之說明 100〜半導體基底。 1 0 2〜閘極氧化層。 1 04〜閘極電極。 1 0 6〜間隙壁。 108〜離子植入之源極/汲極。Fu Lihu's note 100 ~ semiconductor substrate. 1 0 2 ~ gate oxide layer. 1 04 ~ gate electrode. 1 0 6 ~ gap wall. 108 ~ Source / drain for ion implantation.
第6頁 579553Page 6 579553
108a〜回火後之源極/汲極。 11 〇〜保護絕緣層。 11 2〜金屬層。 實施例 以下利用第2A〜2D之製程剖面示意圖,以更詳細地發 明本發明。 首先,請參照第2A圖,其顯示形成有閘極氧化層 1〇2、閘極電極104、離子植入之源極/汲極1〇8之半導體基 $ 1 〇〇。符號sti為用來區分主動區域之淺溝槽隔離物,而 符號1 06代表形成於閘極電極i 04側壁的間隙壁。源極/汲 極108是利用離子植入步驟,植入與半導體基底不同型態 的離子所構成,例如在P型單晶矽基底植入五價的磷、砷 等N型離子。 、 接著,請參照第2B圖,執行n型離子植入步驟之後, 利用化學氣相沈積法在適當的反應氣體(例如二乙氧基矽 烷)存在下,形成例如二氧化矽之保護絕緣層11〇。 然後’請參照第2C圖,利用傳統微影製程以及非等向 陡蝕刻步驟選擇性蝕刻上述保護絕緣層丨1 Q,以形成露出108a ~ source / drain after tempering. 11 〇 ~ Protective insulating layer. 11 2 ~ metal layer. EXAMPLES The following is a schematic cross-sectional view of the processes from 2A to 2D to explain the present invention in more detail. First, please refer to FIG. 2A, which shows a semiconductor substrate with a gate oxide layer 102, a gate electrode 104, and a source / drain 108 of ion implantation $ 100. The symbol sti is a shallow trench spacer used to distinguish the active area, and the symbol 106 is a spacer formed on the sidewall of the gate electrode 104. The source / drain 108 is formed by implanting ions of a different type from the semiconductor substrate using an ion implantation step. For example, P-type single crystal silicon substrate is implanted with N-type ions such as pentavalent phosphorus and arsenic. 2. Next, referring to FIG. 2B, after performing the n-type ion implantation step, a protective insulating layer such as silicon dioxide is formed by chemical vapor deposition in the presence of an appropriate reaction gas (such as diethoxysilane). 〇. Then, please refer to FIG. 2C, using the conventional lithography process and the non-isotropic steep etching step to selectively etch the protective insulating layer 丨 1 Q to form an exposure
汲極108的開口,其次,在80 0〜12〇(rc的溫度下施以 ^氣(H2)回火步驟,用以修護離子植入之源極/汲極區域受 才貝的部分,並且去除原生氧化層,以形成一表面再結晶之 源極/汲極108a。 少 最後’明參照第2D圖,形成再結晶之源極/沒極1 08a 後緊接著’利用金屬濺鍍步驟在上述半導體基底1〇〇上形The opening of the drain electrode 108 is followed by a tempering (H2) tempering step at a temperature of 80 0 ~ 120 (rc) to repair the affected part of the source / drain region of the ion implantation. And the primary oxide layer is removed to form a surface recrystallized source / drain 108a. Finally, referring to FIG. 2D, a recrystallized source / diode 108a is formed, followed by a 'sputtering step using metal Above semiconductor substrate 100
第7頁 五、發明說明(5) ^例如鈦、錯等金屬層n 2。其次’利用傳統 。,以在再結晶之源極/汲極〗〇8a等區域上方、赤^负 降低阻值的金屬矽化合物。 屯成用來 本發明特徵以及效果 本發明之特徵在於,先蝕刻保護絕声/ 二源極/汲極m之開口後,再於特定;^成露 處理,以修護受損之丰導辦其庇击二门士下她以虱氣回火 層。 、+導體基底表面同時去除原生氧化 根據本發明可省略氫殽生 驟,並且可縮短待機時門瀨%二巧,原生氧化層的步 雖妙士 Ζ 時間,進而簡化製程。 —雖W本發明已以較佳實施例揭露如 限定本發明,任何熟習此項技蓺,W /、並非用以 神和範圍Μ,當可作更動與潤^離本發明之精 當視後附之申請專利範圍所界定者為準。X明之保護範圍Page 7 V. Description of the invention (5) ^ For example, the metal layer n 2 such as titanium and copper. Secondly ‘Take advantage of tradition. In order to reduce the resistance value of the metal silicon compound over the recrystallized source / drain region 8a and the like, the resistance value is reduced. Tuncheng is used for the features and effects of the present invention. The feature of the present invention is that the openings of the sound insulation / second source / drain m are etched and protected first, and then specific treatment is performed; Under the protection of the two men, she tempered with lice. Simultaneous removal of primary oxidation on the surface of the + conductor substrate. According to the present invention, the hydrogen confusion step can be omitted, and the step of the primary gate layer can be shortened during standby. -Although the present invention has been disclosed in a preferred embodiment, such as limiting the present invention, anyone familiar with this technique will not use God and the range M. When it is possible to make changes and embellishments from the essence of the present invention, The attached application patent shall prevail. X Ming's scope of protection
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