TW577166B - BiCMOS electrostatic discharge power clamp - Google Patents

Abstract

In this present invention, it provides a BiCMOS ESD protecting circuit that trigger the BiCMOS ESD protecting circuit by bipolar. Due to a layout area of the bipolar junction transistor (BJT) is smaller than a layout of an ESD protecting circuit with RC-trigger circuit, it can avoid the problem of undue large layout area. Moreover, the BJT has not the problems of leakage current and has a lower triggering voltage, it also can effectively avoid the problems of higher triggering ESD voltage and leakage current and trigger the ESD protecting circuit with lower triggering voltage.

Description

577166 V. Description of the invention ("'~~, [Technical field to which the invention belongs].' ^ The invention is about the electrostatic discharge protection of metal oxide semiconductors, and Trey's about the electrostatic discharge of metal oxide semiconductors combined with bipolar transistor. Protection 2. [Previous Technology] Electrostatic discharge (ESD) is the main factor that causes most electronic components or electronic systems to be damaged by excessive electrical stress (E 0s). Such damage will cause semiconductors Components and computer systems form permanent damage, which affects the circuit functions of integrated circuits (Integra1; ed Circuits, π s), and makes electronic products work abnormally. The damage caused by electrostatic discharge is mostly caused by It is caused by human factors, but it is difficult to avoid. During the manufacturing, production, assembly, testing, storage, and handling of electronic components or systems, static electricity can accumulate in the human body, instruments, storage equipment, etc. The components themselves can also accumulate static electricity, and people make these objects contact each other without their knowledge, Therefore, a discharge path is formed, causing electronic components or systems to be harmed by electrostatic discharge. According to the causes of electrostatic discharge and the different ways of discharging to integrated circuits, it can be divided into four categories: Human-Body Model , HBM), machine discharge mode (Machine Model, MM), component charge mode (Charged-Device Model, CD Μ) and electric field induction mode (Field-Induced Model, FIM). Take the human body discharge mode as an example. Description of the Invention (2) As far as the electrostatic discharge voltage of 200 volts is concerned, the equivalent discharge of the human body is 1 500 ohms, so its current value is about 1.3 amps. Therefore, the integrated circuit is damaged by electrostatic discharge, The body circuit is an electric discharge protection circuit. The electrostatic discharge protection circuit is a integrated circuit ^ A special circuit for electrostatic discharge protection in winter. This electrostatic discharge provides an electrostatic discharge current path to avoid electrostatic discharge discharge. The internal circuit of the body circuit (1C) It causes damage. The electrostatic discharge of the human body discharger mode comes from the outside, so the electrostatic discharge is done next to the pad (PAD). Its size of P-type metal oxide semiconductor (PMOS) and N-type metal oxide (NMOS) can be used as ESD protection components. Because of complementary semiconductor (Complementary Metal 〇xide), general commercial electrical resistors are designed to avoid static Using protective circuit current inflow mode and machine protective circuit output stage to maximize semiconductor metal oxide

Semiconductor's CMOS) integrated circuit input pads-usually connected to the metal oxide semiconductor device's gate (gate), the gate oxide layer is easy to be penetrated by electrostatic discharge, so will be made next to the input pad Group electrostatic discharge protection circuit to protect the input stage components. An electrostatic discharge protection circuit should also be placed next to the VDD pad and the v / s solder pads, because the electrostatic discharge may also be suffered between the VDD and vs's pins. The traditional ESD protection circuit of the conventional complementary metal oxide semiconductor is shown in Figure A. The trigger voltage of the metal oxide semiconductor 10 is about 10 volts. When the cross voltage is greater than 10 volts, the metal The oxidized semiconductor will enter the snapback region and discharge static electricity, so that the internal integrated circuit does not have to withstand excessive voltage and static discharge current. As shown in FIG. 1B, when the voltage V of the parasitic bipolar transistor of the metal oxide semiconductor reaches 577166 V. > Description of the invention (3) -------

At Vtl, when the metal oxide lane touches the% u conductor and enters Θ 、, and the main π ^ ^ ^ ^, the metal oxide semiconducting turns into the old area. When the current reaches the 112 collapsed area, metal oxidation = 邋 by metal oxide semiconductor Protect against electrostatic discharge during collapse. The characteristics of the cross-voltage management are no longer rising. Complementary metal: ^ Adopting complementary metal oxide semiconductor technology, the size of components has been ^ integrated circuit, with the development of mass production process ^ reduced to the second daughter of the deep; ^ 〆 section to improve the integration φ The manufacturing cost of the I-submicron step. However, the maximum energy and operation speed, and the reduction of the size of each crystal element, make = 1 J ^ the advanced process technology and the reduction of electrostatic discharge prevention ^ m complementary metal oxide semiconductor integrated circuit static electricity It hasn't decreased, so I'm pretty eve. However, the damage caused by the discharge generated in the external environment K2 is an oxidized semiconductor integrated circuit. Electrostatic semiconductor integrated circuits are annoying. § Multi-deep sub-micron complementary metal oxygen nodal products are facing this. Tricky question.

C, D Therefore, in order to improve the performance of the electrostatic discharge protection circuit, as shown in the figure, the breakdown voltage of the zener diode is used to bias the gate or substrate of the metal oxide semiconductor 10 'Enable the metal oxide semiconductor to discharge static electricity at a lower cross-voltage, but the Kina diode has a lower breakdown voltage, and its doping concentration must be higher than two, causing a problem of leakage current. As shown in the first β diagram, the K circuit is used to trigger the metal oxide semiconductor! 〇, but it must be considered that the period of the RC circuit needs to be longer than the static discharge time (in terms of human discharge mode, about i 5 〇 nanoseconds

Page 7 577166 V. Description of the invention (4) Yi) 'Causes the layout area of the electrostatic discharge protection circuit to be too large. IBM also recently published a siGe heterojunction bip0iar transistor (HBT) electrostatic discharge protection circuit in the ESD Association. As shown in Figure F, it was replaced by a bipolar transistor (bip〇lar). Pole body to solve the leakage current problem. Necessary by pending. I ’m familiar with electrostatic discharge. ’Therefore, the electrostatic discharge protection has the above problems. The structure still has many developments and researches.

3. Summary of the Invention In view of the above-mentioned background of the invention, the sound circuit has a problem that the electrostatic discharge trigger voltage is too high, and the electrostatic discharge protection voltage of ^ # is too large. According to the characteristics of the layout of the invention, the voltage, the L, and the anti-knock circuit, the electrostatic discharge protection is based on the use of the bipolar transistor circuit to have a lower electrostatic discharge trigger. Another object of the present invention is to cause the phenomenon that the electrostatic current flows back through the metal gasification and gasification semiconductor to collapse. The electric discharge protection circuit can withstand the substrate part of the static electricity = v body, so that the heat generated during static electricity is doubled. It is still another object of the present invention to use tritium to trigger a metal oxide semiconductor. But the problem that the area of the transistor as a trigger element is too large. Current and protective circuit cloth

577166 V. Description of the invention (5) According to the above-mentioned purpose, the electrostatic discharge protection electric double-carrier transistor of the metal oxide semiconductor disclosed in the present invention is used as a trigger element, and the base electrode thereof is triggered by the gate electrode (gat e tr i gger), base touch) or gate / trigger (g >> te / base trigger) metal oxide semiconductor. By using the bipolar transistor current generation and low trigger voltage characteristics, the smaller avoids the problems faced in conventional memory. Therefore, the present invention utilizes a bipolar transistor to avoid the problem of leakage current, and the required layout area is small. And its electrostatic discharge trigger voltage can be compared with the substrate part, and it can also make the heat generated by the electrostatic discharge protection circuit. 4. [Embodiments] Some embodiments of the present invention will be described in detail, such as detailed descriptions. The present invention can also be broadly limited in other scopes of the present invention. The following sections will provide a clearer description and The parts inside the easy to draw are not drawn in accordance with their relative sizes, and the scale has been exaggerated compared to other parts; irrelevant details are used for simplicity of illustration. Incorporates a bipolar transistor. The present invention uses the base as an open end, and uses a baSe trigger to connect and contact the body itself. The feature of preventing the leakage layout area can be a trigger element, which can be avoided or lower than the RC trigger circuit. The static current can be Withstand static discharge at the moment. However, except for the detailed example implementation, and the scope of benefit is prevailing. Understanding the invention, some dimensions and other phases in the diagram are not completely drawn 577166 V. Description of the invention (6)

Referring to the second figure, the internal circuit, between the voltage source and the VSS ground terminal, and between the input pad 12 and the VDD positive voltage vs. the male ground terminal, * VDD is positive T inch VDD is positive Both the source and the type or path can effectively prevent electrostatic charges that are positive to the cross-voltage across any type of electrostatic discharge: the body, which can conduct its drain-source :: type II / Chemical Semiconductor as an example . The electrostatic discharge circuit can only be =; a preferred embodiment is designed to determine the type of metal-oxide semiconductor or P-type gold. As shown in the third outline, it is a -gate drain (Trigger) design. An N-type metal oxide semiconductor 30 and are connected to a positive voltage source VDD, and the source 34 and the substrate 36 are connected to a ground terminal.

The far-off electric body 40 '. Its collector 42 is connected to a positive voltage source vdd, the gate 38 of the emitter-type metal oxide semiconductor 30, and the base 46 is open. The substrate resistance Rsub is between the source 34 and the gate of the n-type metal oxide semiconductor 30. One possible structure diagram is shown in the third diagram b. There is between the substrate 36 and the trigger electrode 35 of the metal oxide semiconductor 30 N well (

Page 10 577166 V. Description of the invention (7)

TrencK ^ 'Dual-transistor transistor has deep trenches on both sides (Deep has ΓΓ (buried layer (N " _ 58, collector 42 under the sign is open (s 1 nker) 5 6 to collect snow ,, ^ ^ 4 6 ^ r lv ^ ^. ^, Η wood electrochemical. And the actual base product of the bipolar transistor 40 changes from ^ ^ depending on the circuit design without affecting the operation of the & Two bases 46. ^ DD terminal comes in-when the static current 'makes the% house between 40% of the bipolar transistor exceed the trigger voltage, starting to conduct the base 46 to the open end, which can make the bipolar transistor' 4. The triggering voltage of the crystal 40 is lower) The current will pass through the collector 42 of the bipolar transistor 40 and the emitter 44 == substrate resistance Rsub 'and then pass through the metal oxide semiconductor 30. The substrate 36 flows out from the ground terminal VSS. At this time, the substrate resistance Rsub will form a cross-over voltage, so that the parasitic N-type bipolar transistor of the metal oxide semiconductor 30 (by the drain 32, the p-type f material 50 and the source The NPN bipolar transistor formed by the pole 34) enters a snapback state early. In this way, most of the electrostatic current is conducted through the \ -type metal oxide semiconductor 30, and the electrostatic electricity Flowing through the substrate 50, the large area of the substrate 50 can effectively withstand the thermal energy generated by the electrostatic current. Another preferred embodiment of the present invention is a χ bottom trigger (as shown in FIG. 4A). Body Trigger) design, so the design can make the trigger voltage of the electrostatic and discharge protection circuit lower. An N-type metal oxide semiconductor 30's drain 3 2 is connected to the positive voltage source VDD, the source 34 and the gate 38 Connected to the ground terminal vss. A bipolar transistor 40, whose collector 42 is connected to a positive voltage source vDD, the emitter 44 is connected to the base 36 of the N-type metal oxide semiconductor 30, and the base 46 is an open end (

577166 V. Description of the invention (8) '' —---- 〇 p e η). Substrate resistance Rsub in the N-type metal rush Ben Molin q n substrate. Among them, the source electrode 34 and the substrate 36 have ^ Φ Μ ββ,……, the composition of the moon is shown in the fourth B diagram, two to? ; There is an N-well (N) ^ between the base 36 of the conductor 30 and the trigger electrode 35, and deep trenches on both sides of the carrier transistor 40 (Deep Trench r & buried layer (/ N + Buried) 58, under the collector 42 A sinker is drilled to collect the current, and the base 46 of the bipolar transistor 40 may be one.

When an electrostatic current comes in from the VDD terminal, when the voltage across the bipolar transistor 40 exceeds the trigger voltage, the current starts to flow. The electrostatic current will flow through the collector 42 of the bipolar transistor 40 and the substrate resistance Rsub through the emitter 44 and then through the substrate 3 6 of the metal oxide semiconductor 3 〇 and flow through the substrate 5 〇 from the ground terminal vss Outflow. At this time, the substrate resistance Rsub will form a cross voltage, so that the parasitic N-type bipolar transistor of the metal oxide semiconductor 30 ('npn dual-load formed by the drain 32, the P-type substrate 50, and the source 34) A pressure is formed on the p-intestinal surface of the daughter transistor, so that an electrostatic current starts to flow through this parasitic N-type bipolar transistor, and the N-type metal oxide semiconductor 30 enters a state of snap (snap). In this way, most of the electrostatic current is derived from the N-type metal oxide semiconductor 30, and the electrostatic current flows through the substrate 50. The large area of the substrate 50 can effectively bear the thermal energy generated by the electrostatic current. Another preferred embodiment of the present invention is a gate / base trigger (Gate / Body Trigger) design as shown in FIG. 5A. A N-type metal oxide semiconductor 30 has a drain 3 2 connected to a positive voltage source VDD, and a source 3 4 connected to ground.

Page 12 577166 V. Description of the invention (9) End VSS. A bipolar transistor 40 has a collector 42 connected to a positive voltage source VDD, an emitter 44 connected to a base 36 and a gate 38 of an N-type metal oxide semiconductor 30, and a base 46 is open. A substrate resistance Rsub is provided between the source 34 and the gate 38 of the N-type metal oxide semiconductor 30. One of the possible structure diagrams is shown in the fifth diagram B. Among them, there is an N-well (N-we 1 1) 52 between the substrate 36 of the metal oxide semiconductor 3 0 and the trigger electrode 35, and a bipolar transistor 40 There are deep trenches 54 on both sides, n + Buried 58 at the bottom 58 'sinkers 56 under the collector 42 to collect the current. The base 46 of the bipolar transistor 40 may also be one. When an electrostatic current is introduced to the VDD terminal, when the voltage across the bipolar transistor 40 exceeds the trigger voltage, the current starts to flow. The electrostatic current will flow through the collector 42 of the bipolar transistor 40 and the substrate resistance Rsub through the emitter 44. The substrate 3 6 which is a gasified semiconductor 3 q flows through the substrate 5 0 and then Ground terminal VS, S \ out. At this time, the substrate resistance Rsub will form a cross-over voltage, so that the parasitic \ -type bipolar transistor of the n-type metal oxygen W half 'body 3 0 (formed by the drain electrode 3 2 and the P-type substrate across the source electrode) NPN double-carrier transistor) p-side surface forms an electrostatic current that starts to flow through this parasitic 1 ^ -type double-carrier transistor, and. Japan ’s emulsified half body 30 enters a snapback state. The gate of the N-type metal oxide semiconductor 30 is biased, which is beneficial to the static discharge φ 4 and the increase and decrease of electricity into the lamp. In this way, the electrostatic current is mostly oxidized by N-type metal f 1 π, 铪, ^ V, and the electrostatic current flows through the substrate 50. Using the substrate 50 can effectively withstand the thermal energy generated by the electrostatic current.

577166 V. Description of the Invention (ίο) As mentioned before, the above embodiments of the present invention, in addition to being used for electrostatic discharge protection between VDD and VSS, can also be used for input-VDD, input-VSS, etc. ESD protection. Or change N-type metal oxide semiconductor to P-type metal oxide semiconductor, which can be used for electrostatic discharge protection between VDD-output, VSS-output, etc. The circuit diagrams of gate trigger, base trigger, and gate / base trigger using P-type metalized semiconductor 60 are shown in Figures A, B, and C, respectively. In summary, the present invention discloses an electrostatic discharge protection circuit of a metal oxide semiconductor incorporating a bipolar transistor. According to the electrostatic discharge protection circuit of the present invention, the electrostatic discharge protection circuit has a lower electrostatic discharge trigger voltage. Furthermore, by using the collapse phenomenon of the metal oxide semiconductor, an electrostatic current flows through the substrate portion of the metal oxide semiconductor, so that the electrostatic discharge protection circuit can withstand the heat generated during the electrostatic discharge. Furthermore, a bipolar transistor is used as a trigger element to trigger a metal oxide semiconductor. It can avoid the problems of leakage current and excessive layout area of the protection circuit. The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of patent application of the present invention; all other equivalent changes or modifications made without departing from the spirit disclosed by the present invention shall be included in the following The scope of patent application. 577166 Illustration

V. [Schematic description] V The first A and the first C to the first F are the electrostatic discharge protection circuits of the conventional art; / The first B is the voltage-current relationship diagram of the collapse of the metal oxide semiconductor; The second diagram is an unintended need to install an electrostatic discharge protection circuit in a general integrated circuit, and the third A to three B are circuits and structures of a preferred embodiment of the present invention. The drawings are schematic diagrams of circuits and structures of another preferred embodiment of the present invention; the fifth A to five B diagrams are schematic diagrams of circuits and structures of yet another preferred embodiment of the present invention; and the sixth A to six C diagrams are used Schematic of electrostatic discharge protection circuit of P-type metal oxide semiconductor. 1 Representative symbols of main parts: 10 N-type metal oxide semiconductor 577166 Brief description of the diagram 12 Input pads: 1 4 Integrated circuit 1 6 Output pads 2 1 ~ 2 5 Electrostatic discharge protection circuit 30 N-type metal oxide semiconductor 32 Pole 34 source 3 5 trigger 3 3 base 3 8 gate 4 0 bipolar transistor 4 2 collector 4 4 emitter 4 6 base 5 0 substrate 52 N well 54 deep trench 5 6 nker) 5 8 Buried layer 60 P-type metal oxide semiconductor VDD Positive voltage VSS Ground terminal Rsub Substrate resistance

Page 16

Claims (1)

577166 VI. Application patent scope 1. An electrostatic discharge protection circuit of a bi-carrier / complementary metal-oxide semiconductor (BiCMOS), comprising: a metal-oxide semiconductor (M0S) transistor; a bi-carrier transistor (BJT), which The base electrode has an open end; and a substrate resistance '/ series connection with the bipolar transistor' The serial substrate resistance / bipolar transistor is connected in parallel with the metal oxide semiconductor transistor, where the substrate resistance and One end of the bipolar transistor connection is further connected to the metal oxide semiconductor transistor, so that a voltage across the resistance of the substrate allows an electrostatic current to flow through a parasitic bipolar capacitor in the metal oxide semiconductor transistor. Crystal. 2. For example, the electrostatic discharge protection circuit of the bi-carrier / complementary metal oxide semiconductor (BiCMOS) in the scope of the patent application, wherein the metal oxide semiconductor transistor system is an N-type metal oxide semiconductor transistor. 3. If the electrostatic discharge protection circuit of the bi-carrier / complementary metal oxide semiconductor (Bi CMOS) according to item 2 of the patent application scope, wherein one end of the substrate resistance is connected to a gate of the metal oxide semiconductor transistor, The other end of the substrate resistance is connected to a source electrode of the metal oxide semiconductor transistor, and a substrate of the metal oxide semiconductor transistor is connected to the source electrode. 4. The electrostatic discharge protection circuit of the bi-carrier / complementary metal oxide semiconductor (BiCMOS) according to item 2 of the patent application scope, wherein the above substrate resistance Page 17 577166 VI. One end of the scope of the patent application is connected to a source of the metal oxide semiconductor transistor, the other end of the substrate resistance is connected to a substrate of the metal oxide semiconductor transistor, and the A gate of the metal oxide semiconductor transistor is connected to the source. 5. The electrostatic discharge protection circuit of the bi-carrier / complementary metal oxide semiconductor (BiCMOS) according to item 2 of the scope of patent application, wherein one end of the substrate resistance is connected to a gate of the metal oxide semiconductor transistor. The other end of the substrate resistance is connected to a source of the metal oxide semiconductor transistor, and a base of the metal oxide semiconductor transistor is connected to the gate. 6. The electrostatic discharge protection circuit of the dual carrier / complementary metal oxide semiconductor (BiCMOS) according to item 1 of the scope of patent application, wherein the above metal oxide semiconductor transistor system is a P-type metal oxide semiconductor transistor. 7. For an electrostatic discharge protection circuit of a dual-carrier / complementary metal oxide semiconductor (BiCMOS) in the scope of the patent application, wherein one terminal of the substrate resistance is connected to a gate of the metal oxide semiconductor transistor, The other end of the substrate resistance is connected to a drain of the metal oxide semiconductor transistor, and a substrate of the metal oxide semiconductor transistor is connected to the drain electrode. 8. As in the scope of patent application No. 6 of the double carrier / complementary metal oxide half Page 18 577166 VI. Patent application range conductor (Bi CMOS) electrostatic discharge protection circuit, in which one end of the substrate resistance is connected to a drain of the metal oxide semiconductor transistor and the other end of the substrate resistance is The point is connected to a substrate of the metal oxide semiconductor transistor, and a gate of the metal oxide semiconductor transistor is connected to the drain. / 9. If the electrostatic discharge protection circuit of the bi-carrier / complementary metal oxide semiconductor (BiCMOS) according to item 6 of the application, wherein one end of the substrate resistance is connected to a gate of the metal oxide semiconductor transistor, The other end of the substrate resistance is connected to a drain of the metal oxide semiconductor transistor, and a base of the metal oxide semiconductor transistor is connected to the gate. 10. The electrostatic discharge protection circuit of the bi-carrier / complementary metal-oxide semiconductor (BiCMOS) according to item 1 of the scope of patent application, wherein the connection terminal of the above-mentioned bi-electrode transistor and the metal-oxide semiconductor transistor is connected to a First positive voltage source. 1 1. The electrostatic discharge protection circuit of the bi-carrier / complementary metal oxide semiconductor (BiCMOS) according to item 10 of the patent application scope, wherein the connection end of the substrate resistance and the metal oxide semiconductor transistor is connected to a first Two positive voltage sources. 1 2 .Bin / Complementary Metal Oxidation Page 19 577166 VI. Patent application scope: Electrostatic discharge protection circuit for semiconductors (BiCMOS), in which the connection end of the substrate resistance and the metal oxide semiconductor transistor is connected to a grounding terminal. The electrostatic discharge protection circuit of the bi-carrier / complementary metal-oxide-semiconductor (BiCMOS), wherein the connection terminal of the bi-electrode transistor and the metal-oxide semiconductor transistor is connected to an input terminal. 14. The electrostatic discharge protection circuit of the dual-carrier / complementary metal-oxide semiconductor (BiCMOS) according to item 1 of the scope of patent application, wherein the connection terminal of the above-mentioned double-carrier transistor and the metal-oxide semiconductor transistor is connected to a Output. 1 5 · According to the electrostatic discharge protection circuit of the bi-carrier / complementary metal oxide semiconductor (BiCMOS) in the first scope of the patent application, wherein the connection end of the substrate resistance and the metal oxide semiconductor transistor is connected to an input end 16. The electrostatic discharge protection circuit of the dual-carrier / complementary metal oxide semiconductor (BiCMOS) according to item 1 of the scope of patent application, wherein the connection end of the substrate resistor and the metal oxide semiconductor transistor is connected to an output end Page 20 577166 VI. Patent application scope Static thunder; ^ A bi-carrier / complementary metal oxide semiconductor; a BicMOS method for protecting the electric discharge of the moon, including ... of > 1 _: ΐ f The current causes the voltage across a bipolar transistor (BJT) to rise above its trigger voltage, thereby turning on the current. One of the bases of the electricity is open; " Zhong Yi and the carrier transistor are connected in series with the bipolar Subtransistor to a substrate resistance; / carved, 550 bipolar transistor / the substrate resistance to a metal oxide limb (MOS) transistor; and 卞 v connecting the substrate resistance to the metal oxide semiconductor transistor The crystal causes the voltage of the resistor to allow the electrostatic current to flow through a parasitic bipolar transistor in the metal oxide semiconductor. --- Electricity ^ 8. The electrostatic discharge protection method of BiCMOS / Complementary Metal Oxidation Conductor (BiCMOS) according to item 17 of the patent application scope, wherein the upper semiconductor semiconductor crystal system is a metal oxide semiconductor transistor.双 The electrostatic discharge protection method of the double-carrier / complementary metal oxide (BlCMOS) in the U range of the semiconducting patent, which further includes _: t one point of the substrate resistance connected to the metal oxide semiconductor transistor One terminal is connected to the metal oxide abundance, f2, the source, and one base and s pole of the metal oxide semiconductor transistor are connected. I and the source 20. As in the scope of patent application No. 18 for the double-carrier / complementary metal oxidation 577166 VI. Patent application method for electrostatic discharge protection of a semiconductor (BiCMOS), further comprising connecting one end of the substrate resistance to a source of the metal oxide semiconductor transistor, and connecting the other end of the substrate resistance to the A substrate of the metal oxide semiconductor transistor, and a gate of the metal oxide semiconductor transistor is connected to the source. / 2 1. According to the electrostatic discharge protection method of the bi-carrier / complementary metal oxide semiconductor (BiCMOS) according to item 18 of the patent application scope, the method further includes connecting one end of the substrate resistance to the metal oxide semiconductor transistor. A gate, the other end of the substrate resistance is connected to a source of the metal oxide semiconductor transistor, and a base of the metal oxide semiconductor transistor is connected to the gate. 2 2. The electrostatic discharge protection method of the bi-carrier / complementary metal oxide semiconductor (BiCMOS) according to item 17 of the patent application scope, wherein the above metal oxide semiconductor transistor system is a P-type metal oxide semiconductor transistor. 2 3. According to the electrostatic discharge protection method of the bi-carrier / complementary metal oxide semiconductor (BiCMOS) according to item 22 of the patent application scope, the method further includes connecting one end of the substrate resistance to a metal oxide semiconductor transistor. The gate, the other end of the substrate resistance is connected to a drain of the metal oxide semiconductor transistor, and a base of the metal oxide semiconductor transistor is connected to the drain. Page 22 577166 VI. Application for patent scope 24. For the method of electrostatic discharge protection of dual-carrier, sub / complementary metal oxide semiconductor (BiCMOS) according to item 22 of the patent application scope, it also includes an end point of the above substrate resistance Connected to a drain electrode of the metal oxide semiconductor transistor, the other end of the substrate resistance is connected to a substrate of the metal oxide semiconductor transistor, and a gate of the metal oxide semiconductor transistor is connected to the drain electrode. . 25. The electrostatic discharge protection method of the dual carrier / complementary metal oxide semiconductor (BiCMOS) according to item 22 of the patent application scope, further comprising connecting one end of the substrate resistance to one of the metal oxide semiconductor transistors. Gate, the other end of the substrate resistance is connected to a drain of the metal oxide semiconductor transistor, and a base of the metal oxide semiconductor transistor is connected to the gate. Page 23