TW575950B - Packaging structure and process thereof - Google Patents

Packaging structure and process thereof Download PDF

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Publication number
TW575950B
TW575950B TW091113353A TW91113353A TW575950B TW 575950 B TW575950 B TW 575950B TW 091113353 A TW091113353 A TW 091113353A TW 91113353 A TW91113353 A TW 91113353A TW 575950 B TW575950 B TW 575950B
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TW
Taiwan
Prior art keywords
printed circuit
circuit board
array
packaging structure
component
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TW091113353A
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Chinese (zh)
Inventor
Han-Yun Chen
Tsung-Fu Yang
Chia-Chen Hsu
Yi-An Chen
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Tai Saw Technology Co Ltd
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Priority to TW091113353A priority Critical patent/TW575950B/en
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Publication of TW575950B publication Critical patent/TW575950B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

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  • Oscillators With Electromechanical Resonators (AREA)

Abstract

A packaging structure and a process thereof are disclosed. The packaging process utilizes two printed circuit boards to assemble quartz crystal oscillators and integrated circuit chips or printed circuits directly formed on one of the two printed circuit boards. One printed circuit board comprises two sides both having arrays of cell separately used to accommodate quartz crystal oscillators and IC chips or printed circuits. The other printed circuit board having array of holes assembles with the side used to accommodate IC chips or printed circuits of the printed circuit board. By filling the holes with a dielectric material, the IC chips or printed circuits on the cells are encapsulated.

Description

575950 五、發明說明(1) 5 - 1發明領域: 本發明係關於一種元件封裝結構與其製程,特別是一 種水晶震盪器之封裝結構與其製程。 5 - 2發明背景: 頻率控制元件包含各種的水晶震盪器。典型·的水晶震 盪器包含壓電元件、積體電路、電容器、電感器與電阻器 等元件。頻率控制元件常見於許多電子通訊裝置中,例如 行動電話、呼叫器、無線電機與無線資料傳輸裝置。由於 這些電子通訊裝置必須不斷因應消費者的需求而縮小尺寸 及降低成本,因此頻率控制元件水晶震盪器的製程必須簡 化以降低成本。 水晶震盪器的封裝製程占有相當一部份的製程成本。 水晶震盪器的封裝製程一般而言比積體電路晶片的封裝製 程、耗費更多的材料與人力成本。傳統水晶震盪元件的封裝 製程一般而言為陶瓷封裝。第一 A圖顯示一傳統水晶震盪 元件的陶瓷封裝結構。第一 B圖顯示第一 A圖中陶瓷封裝結 構的截面圖。此陶瓷封裝結構包含陶瓷基板1 0 2與1 0 4,陶 瓷基板1 0 2内含有一水晶震盪器1 0 8而陶瓷基板1 0 2與1 0 4内 含有一積體電路晶片11 0。此陶瓷封裝結構係藉由將陶瓷 基板1 0 2與1 0 4結合完成,並藉由連接測試點1 0 6至一測試575950 V. Description of the invention (1) 5-1 Field of the invention: The present invention relates to a component packaging structure and a manufacturing process thereof, particularly a packaging structure and a manufacturing process of a crystal oscillator. 5-2 Background of the Invention: The frequency control element includes various crystal oscillators. Typical crystal oscillators include components such as piezoelectric elements, integrated circuits, capacitors, inductors, and resistors. Frequency control components are commonly found in many electronic communication devices, such as mobile phones, pagers, radios and wireless data transmission devices. Since these electronic communication devices must be continuously reduced in size and cost in response to consumer demand, the process of crystal-controlled crystal oscillators must be simplified to reduce costs. The packaging process of the crystal oscillator occupies a considerable part of the manufacturing cost. The packaging process of a crystal oscillator generally consumes more material and labor costs than the packaging process of an integrated circuit chip. The packaging process of traditional crystal oscillator components is generally ceramic packaging. The first diagram A shows the ceramic package structure of a conventional crystal oscillator. The first diagram B shows a cross-sectional view of the ceramic package structure in the first diagram A. The ceramic package structure includes ceramic substrates 102 and 104. The ceramic substrate 102 contains a crystal oscillator 108 and the ceramic substrates 102 and 104 contain a integrated circuit chip 110. This ceramic package structure is completed by combining ceramic substrates 102 and 104, and by connecting test points 106 to one test

第5頁 575950 五、發明說明(2) 裝置來進行測試。第二A圖顯示另一種傳統之陶瓷封裝結 構。第二B圖顯示第二A圖中陶瓷封裝結構的截面圖。此陶 瓷封裝結構包含一陶瓷基板2 0 2,陶瓷基板2 0 2内含有一水 晶震盪器2 0 6與一積體電路晶片2 0 8分別位於其兩凹槽中。 此陶瓷封裝結構亦藉由連接測試點2 0 4至一測試裝置來進 行測試。上述兩種陶瓷封裝結構雖然良率尚佳,但製程卻 複雜且生產成本較高,尤其是陶瓷封裝的材料較昂貴。此 外,上述兩種陶瓷封裝結構的測試過於浪費時間導致較高 的測試成本,這是由於測試必須在封裝完成後才能進行, 且必須一個一個進行所致。 有鑑於上述傳統封裝結構與製程的缺點,因此有必要 發展出一種新穎進步的結構與製程以克服傳統結構與製程 的缺點。本發明正能符合這樣的需求。 5 - 3發明目的及概述: 本發明之一目的為提供一種高良率低生產成本的水晶 震盪器封裝結構與其製程。 本發明之一目的為提供一種製程與測試步驟精簡的水 晶震盪器封裝結構與其製程。 本發明之一目的為提供一種設計容易材料成本低的水Page 5 575950 5. Description of the Invention (2) Device for testing. Figure A shows another traditional ceramic package structure. The second diagram B shows a cross-sectional view of the ceramic package structure in the second diagram A. The ceramic package structure includes a ceramic substrate 202, which contains a crystal oscillator 202 and an integrated circuit chip 208 in two grooves, respectively. The ceramic package structure is also tested by connecting the test point 204 to a test device. Although the above two types of ceramic packaging structures have good yields, the manufacturing process is complicated and the production cost is high, especially the ceramic packaging materials are more expensive. In addition, the test of the above two ceramic package structures is too time-consuming and leads to higher test costs. This is because the tests must be performed after the packaging is completed, and they must be performed one by one. In view of the shortcomings of the above-mentioned traditional packaging structures and processes, it is necessary to develop a novel and progressive structure and process to overcome the shortcomings of the traditional structure and process. The present invention is able to meet such needs. 5-3 Object and Summary of the Invention: One object of the present invention is to provide a crystal oscillator package structure with high yield and low production cost and its manufacturing process. It is an object of the present invention to provide a crystal oscillator package structure with simplified manufacturing process and test steps and a manufacturing process thereof. An object of the present invention is to provide a water with easy design and low material cost.

575950 五、發明說明(3) 晶震盪器封裝結構與其製程。 為了達成上述之目的,本發明提供一種元件封裝結構,該 元件封裝結構包含一具有一第一面與一第二面之第一印刷 電路板層、一固定於該第一面之第一元件、一固定於該第 二面之第二元件、一具有一開口之第二印刷電路板層與一 填滿該開口之介電材料。該第二印刷電路板層並與該第一 印刷電路板層之該第二面結合,其中該開口對準並暴露出 該第二元件。 本發明同時提供一種形成元件封裝結構的方法,該形 成元件封裝結構的方法包含以下步驟。首先固定複數個第 一元件進入一第一印刷電路板之一第一面的一第一晶胞陣 列。接著固定複數個第二元件於該第一印刷電路板之一第 二面上的一第二晶胞陣列。然後結合該第一印刷電路板之 第二面與一具有一開口陣列之第二印刷電路板,其中該開 口陣列對準並暴露出該第二元件陣列。接著以一介電材, 填滿該開口陣列,並測試已完成結合之該第一元件陣列與 該第二元件陣列。最後再切割該第一印刷電路板與該第二 印刷電路板,以分離已完成結合之該第一元件陣列與該第 二元件陣列,以形成單一已完成結合之該第一元件與該第 二元件。 上述有關發明的簡單說明及以下的詳細說明僅為範例575950 V. Description of the invention (3) Crystal oscillator package structure and manufacturing process. In order to achieve the above object, the present invention provides a component packaging structure including a first printed circuit board layer having a first surface and a second surface, a first component fixed on the first surface, A second component fixed on the second surface, a second printed circuit board layer having an opening, and a dielectric material filling the opening. The second printed circuit board layer is combined with the second surface of the first printed circuit board layer, wherein the opening is aligned and exposes the second component. The present invention also provides a method for forming a component packaging structure. The method for forming a component packaging structure includes the following steps. First, a plurality of first components are fixed into a first cell array on a first side of a first printed circuit board. A second unit cell array is fixed on the second surface of the first printed circuit board. The second side of the first printed circuit board is then combined with a second printed circuit board having an array of openings, wherein the array of openings is aligned and exposes the second array of elements. Then, the opening array is filled with a dielectric material, and the first element array and the second element array that have been combined are tested. Finally, the first printed circuit board and the second printed circuit board are cut to separate the first element array and the second element array that have been combined to form a single completed combination of the first element and the second element. element. The above brief description of the invention and the following detailed description are examples only

第7頁 575950 五、發明說明(4) ^~ _________ 並非限制。其他不脱離 應包含在的本發明的專利;;神的等效改變或修飾均 5 - 4發明的詳細說明: 在此必須說明的是 含完整之製程。本發明 僅提及瞭·解本發明所需 以下描述之製程步驟及結構並不包 可以藉各種製程技術來實施,在此 之製程技術。 以下將根據本發明 示均為簡單的形式且未 利於瞭解本發明。 所附圖示做詳細的說明,請注意圖 依照比例描繪,而尺寸均被誇大^以Page 7 575950 V. Description of the Invention (4) ^ ~ _________ is not a limitation. Others do not depart from the patents of the present invention that should be included; God's equivalent changes or modifications are 5-4 Detailed description of the invention: What must be explained here is that it contains the complete process. The present invention only mentions that the process steps and structures described below are not required to solve the present invention and can be implemented by various process technologies. The process technologies herein. In the following, the present invention is shown in a simple form and is not conducive to understanding the present invention. The attached diagrams are used for detailed explanation. Please note that the diagrams are drawn according to scale, and the dimensions are exaggerated ^

參考第三A圖所示,.翻—^ ^ A 路板3。〇包含均具有分別”電路板3°〇。此印刷電 日日胞(C e 1 1)陣列之雨面q η 9你q η /1 。。印刷電路板3 0 0可為-般的印刷電路板。第:Ba;M 印刷電路板300之面3〇4,而第一 m @ ,弟一B圖顯不 構。每一晶胞m具有四個導t曰\胞305的詳細結 二人, 1固v體接點3 1 〇。晶胞3 0 5係用於Referring to the third A picture, .turn — ^ ^ A road board 3. 〇Contains a "circuit board 3 °". The printed surface of the printed solar cell (C e 1 1) array q η 9 you q η / 1. The printed circuit board 3 0 0 can be -like printed Circuit board. Section: Ba; M. The surface 300 of the printed circuit board 300, and the first m @, the first one is shown in Figure B. Each cell m has four conductors. Human, 1 solid v body contact 3 1 0. The unit cell 3 0 5 is used for

谷納。θ 7、,曰一震盪态之兀件5 0 0 ’ 士匕元件5 0 〇包含四個導體 接點5 0 2。當元件5 0 0與印刷電路板3 0 0之晶胞3〇5結合時, 每一導體接點5 0 2均對準對應之導體接點31 〇並與導體接點 3 1 0連接。第三D圖顯示印刷電路板3 0 0之面3 0 2的晶胞3 0 6 之詳細結構。晶胞3 0 6亦具有四個導體接點3 11。晶胞3 0 6Gouna. θ7. The oscillating element 5 0 0 ′ The dagger element 5 0 0 includes four conductor contacts 5 0 2. When the component 500 is combined with the unit cell 305 of the printed circuit board 300, each conductor contact 502 is aligned with the corresponding conductor contact 31 and is connected to the conductor contact 3 1 0. The third D figure shows the detailed structure of the unit cell 3 06 of the printed circuit board 3 0 2. The unit cell 3 0 6 also has four conductor contacts 3 11. Unit cell 3 0 6

第8頁 575950 五、發明說明(5) 係用於容納7L件,例如一積體電路晶片3丨2、一電感器3 1 4 、一電容器3 1 6與一二極體3丨8。晶胞3 〇 6亦可用於容納直 ,形成於其上之印刷電路。除了積體電路晶片3丨2、電感 态3 1 4、電容器3 1 6與二極體3 1 8以及直接形成於其上之印 刷電路之外’亦可將測試點3 2 〇直接形成於印刷電路板3 〇 〇 之面3 0 2上,以連接所有晶胞3 〇 6與測試設備。當封裝完成 曰曰 但在切割分離丽即可先進行測試,測試點3 2 〇連接所有 胞3 0 6與測試設備。 參考第四A圖所示,顯示一印刷電路板4 〇 〇。此印刷電 路板4 0 0包含開口 4 0 2陣列。而第四b圖與第四C圖分別顯示 開口 4 0 2之洋細結構與俯視圖。每一開口 4 〇 2旁均有四導體 桎4 0 4。當印刷電路板4 0 0與印刷電路板3 〇 〇結合時,導體 桂4 0 4均對準對應之導體接點3丨丨並與導體接點3丨丨連接。 在本發明之較佳實施例中,開口 4 〇 2的輪廓為具有平滑弧 狀轉角的十字形。開口 4 0 2的輪廓可容納並防止灌膠時溢 流的問題。 參考第五圖所示,顯示印刷電路板4 〇 〇與印刷電路板 3 0 0結合且開口 4 0 2灌膠的結果。印刷電路板3〇〇之面3〇2接 合印刷電路板4 0 0,而晶胞3 0 6則對準對應之開口 4 〇 2。積 體電路晶片3 1 2、電感器3 1 4、電容器3 1 6與二極體3 1 8與直 接形成於晶胞3 0 6上之印刷電路則在開口 4 〇 2灌膠後被封入 。印刷電路板4 0 0與印刷電路板3 0 0也可包含形成於邊緣的Page 8 575950 V. Description of the invention (5) is used to accommodate 7L pieces, such as an integrated circuit chip 3 丨 2, an inductor 3 1 4, a capacitor 3 1 6 and a diode 3 丨 8. The unit cell 306 can also be used to hold a printed circuit formed thereon. In addition to the integrated circuit chip 3 丨 2, the inductive state 3 1 4, the capacitor 3 1 6 and the diode 3 1 8 and the printed circuit formed directly thereon, the test point 3 2 0 can also be formed directly on the printed circuit board. The circuit board 300 is on the surface 300, so as to connect all the unit cells 300 to the test equipment. When the package is complete, the test can be performed before cutting and separating. The test point 3 2 0 connects all cells 3 06 and the test equipment. Referring to FIG. 4A, a printed circuit board 4 is shown. This printed circuit board 400 includes an array of openings 402. Figures 4b and 4C show the fine structure and top view of the opening 402, respectively. There are four conductors 桎 4 0 4 next to each opening 402. When the printed circuit board 400 is combined with the printed circuit board 300, the conductors 404 are aligned with the corresponding conductor contacts 3 丨 丨 and connected to the conductor contacts 3 丨 丨. In a preferred embodiment of the present invention, the outline of the opening 4 02 is a cross shape with smooth arc-like corners. The contour of the opening 4 2 can accommodate and prevent the problem of overflow during filling. Referring to the fifth figure, the result of the combination of the printed circuit board 400 with the printed circuit board 300 and opening 402 is shown. The surface 300 of the printed circuit board 300 is connected to the printed circuit board 400, and the cell 3 06 is aligned with the corresponding opening 4 02. The integrated circuit chip 3 1 2, the inductor 3 1 4, the capacitor 3 1 6 and the diode 3 1 8 and the printed circuit formed directly on the unit cell 3 06 are sealed in the opening 4 2 after being glued. The printed circuit board 4 0 0 and the printed circuit board 3 0 0 may also include

第9頁 575950 五、發明說明(6) 複數條插腳用以連接測試設備之插槽。複數條插腳連接晶 胞3 0 6周邊之測試點3 2 0,使得所有晶胞3 0 6上之元件包含 積體電路晶片3 1 2、電感器3 1 4、電容器3 1 6與二極體3 1 8以 及印刷電路在封裝完成、切割分離前均可同時由測試設備 一次測試完畢。 本發明利用印刷電路板來結合水晶震盪器與積體電^ 晶片與直接形成於印刷電路板上之印刷電路。由於使用印 刷電路板而非昂貴的陶瓷封裝材料,封裝材料的成本可因 此降低。另外,由於封裝元件均於封裝完成、切割分離前 同時由測試設備一次測試完畢,故測試的過程可簡化成本 也可因此降低。。 上述有關發明的詳細說明僅為範例並非限制。其他不 脫離本發明之精神的等效改變或修飾均應包含在的本發明 的專利範圍之内。Page 9 575950 V. Description of the invention (6) A plurality of pins are used to connect the sockets of the test equipment. The plurality of pins are connected to the test points 3 2 0 around the unit cell 3 0 6, so that all the elements on the unit cell 3 0 6 include the integrated circuit chip 3 1 2, the inductor 3 1 4, the capacitor 3 1 6 and the diode. 3 1 8 and the printed circuit can be tested by the test equipment at the same time before the packaging is completed and the cutting is separated. The present invention utilizes a printed circuit board to combine a crystal oscillator and an integrated circuit chip with a printed circuit formed directly on the printed circuit board. By using printed circuit boards instead of expensive ceramic packaging materials, the cost of packaging materials can be reduced. In addition, because the packaged components are tested by the test equipment at the same time before the packaging is completed and cut and separated, the testing process can be simplified and the cost can be reduced. . The above detailed description of the invention is merely an example and not a limitation. Other equivalent changes or modifications that do not depart from the spirit of the invention should be included in the patent scope of the invention.

第10頁 575950 圖式簡單說明 為了能讓本發明上述之其他目的、特徵、和優點能更 明顯易懂,下文特舉一較佳實施例,並配合所附圖式,作 詳細說明如下: 第一 A圖顯示一傳統水晶震盪元件的陶瓷封裝結構; 第一 B圖顯示第一 A圖中陶瓷封裝結構的截面圖; 第二A圖顯示·另一種傳統之陶瓷封裝結構; 第二B圖顯示第二A圖中陶瓷封裝結構的截面圖; 第三A圖顯示本發明之一印刷電路板之一面; 第三B圖顯示印刷電路板之另一面; 第三C圖顯示印刷電路板之一面的晶胞的詳細結構; 第三D圖顯示印刷電路板之另一面的晶胞之詳細結構Page 575950 Brief description of the drawings In order to make the other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is described below in conjunction with the accompanying drawings, and described in detail below: Figure A shows a ceramic package structure of a conventional crystal oscillator; Figure B shows a cross-sectional view of the ceramic package structure in Figure A; Figure A shows another traditional ceramic package structure; Figure B shows A cross-sectional view of the ceramic package structure in the second diagram A; the third diagram A shows one side of a printed circuit board of the present invention; the third diagram B shows the other side of the printed circuit board; the third diagram C shows one side of the printed circuit board Detailed structure of the unit cell; Figure 3D shows the detailed structure of the unit cell on the other side of the printed circuit board

第四A圖顯示本發明之另一印刷電路板; 第四B圖顯示開口之詳細結構;Figure 4A shows another printed circuit board of the present invention; Figure 4B shows the detailed structure of the opening;

第11頁 575950 圖式簡單說明 第四C圖顯示開口之俯視圖;及 第五圖顯示兩印刷電路板結合及灌膠的結果 主要部分之代表符號 1 0 2陶瓷基板 1 0 4陶瓷基板 1 0 8水晶震盪器 1 1 0積體電路晶片 2 0 2陶瓷基板 2 0 4測試點 2 0 6水晶震盪器 2 0 8積體電路晶片 3 0 0印刷電路板 3 0 2面 m 3 0 4面 3 0 5晶胞 3 0 6晶胞 3 10導體接點 31 1導體接點 3 1 2積體電路晶片 3 1 4電感器 31 6電容器Page 575950 The diagram briefly illustrates the top view of the fourth C diagram showing the opening; and the fifth diagram shows the representative symbols of the main part of the result of the bonding and pouring of two printed circuit boards 1 0 2 ceramic substrate 1 0 4 ceramic substrate 1 0 8 Crystal oscillator 1 1 0 Integrated circuit chip 2 0 2 Ceramic substrate 2 0 4 Test points 2 0 6 Crystal oscillator 2 0 8 Integrated circuit chip 3 0 0 Printed circuit board 3 0 2 surface m 3 0 4 surface 3 0 5 unit cell 3 0 6 unit cell 3 10 conductor contact 31 1 conductor contact 3 1 2 integrated circuit chip 3 1 4 inductor 31 6 capacitor

第12頁 575950 圖式簡單說明 3 1 8二極體 3 2 0測試點 4 0 0印刷電路板 4 0 2開口 4 0 4導體柱 5 0 0元件 5 0 2導體接點Page 12 575950 Simple illustration of the diagram 3 1 8 Diode 3 2 0 Test points 4 0 0 Printed circuit board 4 0 2 Opening 4 0 4 Conductor post 5 0 0 Component 5 0 2 Conductor contact

第13頁Page 13

Claims (1)

575950 六、申請專利範圍 1. 一種元件封裝結構,該元件封裝結構包含: 一第一印刷電路板層,該第一印刷電路板層具有一第 一面與一第二面; 一固定於該第一面之第一元件; 一固定於該第二面之第二元件; 一具有一開口之第二印刷電路板層,該第二印刷電路 板層並與該第一印刷電路板層之該第二面結合,其中該開 口對準並暴露出該第二元件;及 一填滿該開口之介電材料。 2. 如申請專利範圍第1項所述之元件封裝結構,其中上述 之該第一元件包含一水晶震盪器。 3. 如申請專利範圍第1項所述之元件封裝結構,其中上述 之該第二元件包含一積體電路晶片與一印刷電路。 4. 如申請專利範圍第1項所述之元件封裝結構,其中上述 之該第二元件包含一電感器、一電容器與一二極體。 5. 如申請專利範圍第1項所述之元件封裝結構,其中上述 之該開口的輪廓為具有平滑弧狀轉角的十字形。 6. —種元件封裝結構,該元件封裝結構包含: 一第一印刷電路板,該第一印刷電路板層具有一第一575950 VI. Scope of patent application 1. A component packaging structure comprising: a first printed circuit board layer, the first printed circuit board layer having a first surface and a second surface; A first element on one side; a second element fixed on the second side; a second printed circuit board layer having an opening; the second printed circuit board layer and the first printed circuit board layer; Two-sided bonding, wherein the opening is aligned and exposed to the second element; and a dielectric material filling the opening. 2. The component packaging structure described in item 1 of the scope of patent application, wherein the first component described above includes a crystal oscillator. 3. The component packaging structure according to item 1 of the scope of patent application, wherein the second component described above includes an integrated circuit chip and a printed circuit. 4. The component packaging structure described in item 1 of the scope of patent application, wherein the second component described above includes an inductor, a capacitor, and a diode. 5. The component packaging structure according to item 1 of the scope of patent application, wherein the outline of the opening is a cross shape with smooth arc-shaped corners. 6. —A component packaging structure comprising: a first printed circuit board, the first printed circuit board layer having a first 第14頁 575950 六、申請專利範圍 面與一第二面,該第一面與該第二面分別具有一晶胞陣列 複數個固定於該第一面之該晶胞陣列之第一元件; 複數個固定於該第二面之該晶胞陣列之第二元件; 一具有一開口陣列之第二印刷電路板層,該第二印刷 電路板層並與該第一印刷電路板層之該第二面結合,其中 該開口陣列對準並暴露出該第二元件陣列; 一印刷於該第一印刷電路板上之測試電路,該測試電 路連接所有之該第二元件;及 一填滿該開口陣列之介電材料。 7. 如申請專利範圍第6項所述之元件封裝結構,其中上述 之該第一元件包含一水晶震盪器。 8. 如申請專利範圍第6項所述之元件封裝結構,其中上述 之該第二元件包含一積體電路晶片、一電感器、一電容器 與一二極體。 9. 如申請專利範圍第6項所述之元件封裝結構,其中上述 之該第二元件包含一印刷電路。 1 0. —種形成元件封裝結構的方法,該形成元件封裝結構 的方法包含: 固定複數個第一元件進入一第一印刷電路板之一第一Page 14 575950 6. The scope of the patent application and a second side, the first side and the second side respectively have a unit cell array and a plurality of first elements of the unit cell array fixed on the first side; A second element of the cell array fixed on the second side; a second printed circuit board layer having an array of openings, the second printed circuit board layer and the second printed circuit board layer of the second Surface bonding, wherein the opening array is aligned and exposes the second element array; a test circuit printed on the first printed circuit board, the test circuit is connected to all the second elements; and a filling the opening array Dielectric materials. 7. The component packaging structure described in item 6 of the scope of patent application, wherein the first component described above includes a crystal oscillator. 8. The component packaging structure according to item 6 of the scope of the patent application, wherein the second component described above includes an integrated circuit chip, an inductor, a capacitor, and a diode. 9. The component packaging structure according to item 6 of the scope of patent application, wherein the second component described above includes a printed circuit. 1 0. A method for forming a component packaging structure, the method for forming a component packaging structure includes: fixing a plurality of first components into a first printed circuit board; 第15頁 575950 六、申請專利範圍 面的一第一晶胞陣列; 固定複數個第二元件於該第一印刷電路板之一第二面 上的一第二晶胞陣列; 結合該第一印刷電路板之該第二面與一具有一開口陣 列之第二印刷電路板,其中該開口陣列對準並暴露出該第 二元件陣列; 以一介電材料填滿該開口陣列; 測試已完成結合之該第一元件陣列與該第二元件陣列 ;及 切割該第一印刷電路板與該第二印刷電路板,以分離 已完成結合之該第一元件陣列與該第二元件陣列,以形成 單一已完成結合之該第一元件與該第二元件。 11.如申請專利範圍第1 〇項所述之形成元件封裝結構的方 法,其中上述之該已完成結合之該第一元件陣列與該第二 元件陣列係以連接一印刷於該第一印刷電路板上之測試電 路至一測試設備進行測試。Page 15 575950 VI. A first unit cell array on the patent application side; a second unit cell array on which a plurality of second elements are fixed on a second side of the first printed circuit board; combined with the first printing The second side of the circuit board and a second printed circuit board having an opening array, wherein the opening array is aligned and exposes the second element array; filling the opening array with a dielectric material; testing has completed the bonding The first element array and the second element array; and cutting the first printed circuit board and the second printed circuit board to separate the first element array and the second element array that have been combined to form a single unit. The combination of the first element and the second element has been completed. 11. The method for forming a device package structure as described in item 10 of the scope of patent application, wherein the first component array and the second component array that have been combined as described above are connected to be printed on the first printed circuit. The test circuit on the board goes to a test device for testing.
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