TW563293B - Signal amplifying method, signal amplifier and devices related therewith - Google Patents

Abstract

An analog signal amplifying method, an amplifier to output a first pulse of high level by comparing an input signal with a first sawtooth-wave having an amplitude greater than that of the input signal and determining that the first sawtooth-wave is greater than the input signal; to output a narrower second pulse of one short type at every starting point of the high region of the first pulse; to continuously extract an output voltage by corresponding the second sawtooth-wave having a period identical to that of the first sawtooth-wave with a high point of the second pulse and sampling the second sawtooth-wave voltage positions at the corresponded parts; to change the extracted voltage to a condenser by a high speed switch to maintain it constant; and to eliminate a valley of a waveform, thereby performing a convenient filtering process, whereby the invention can obtain good linearity of the first sawtooth-wave very easily, with neither restrictions to an input voltage range nor use of a negative feedback, to thereby basically solve the distortion problem caused by the time delay, easily perform a filtration without any deformations in the waveform due to a lower rate of a high frequency containing component that results in little distortion. And the digital signal is directly connected to the amplifier of the invention without a D/A conversion unit in the contemporary digital reviving device (for instance, CDP), so that it is realized to effectively reproduce signals without any deformation in shape and it is relatively possible to further simplify the structure of the circuit.

Description

563293 V. Description of the Invention (1) Field of the Invention The present invention relates to a signal amplification method, a signal amplifier, and related components, wherein the signal amplification method is an analog signal amplification method in the category of a digital amplifier, and more particularly to a limited output waveform. Distortion analog signal amplification method to effectively improve the output of audio amplifiers, etc. The present invention also relates to an integrated circuit of an amplification device using the amplification method. In addition, the present invention also relates to an amplifier that can use a variety of digital data signals such as a pulse width modulation (PWM) signal or a pulse code modulation (PCM) signal as an input signal. Finally, the present invention relates to a sawtooth oscillator and a power amplifying device used in various amplifiers. BACKGROUND OF THE INVENTION Generally, amplifying devices of audio amplifiers are mostly manufactured using transistors. However, there is a serious problem in the amplifying device generally using a transistor, that is, the allowable input bias value (commonly referred to as the base voltage) is relatively low (generally less than 0.6 V). In other words, in the case of using a transistor, the expected value (usually referred to as the collector current or collector voltage) at the output can be appropriately obtained only when the base input voltage is smaller than the allowable input voltage. However, when the base input voltage exceeds 0.6 V, there may be significant waveform distortion at the output. Figure 3a illustrates the normal output when the transistor base input voltage is less than 0.6 V. (The curve in the figure corresponds to the waveform of the output current. But when the load resistor is connected to this amplifier, the output current is converted into the corresponding output voltage.) Figure 3b illustrates the output signal when the base input voltage is greater than 0.6 V. Waveform distortion. In order to solve the above-mentioned expected output due to input bias imbalance

Page 5 563293 V. Description of the invention (2) There is a method of compensating an input bias, which is to invert the output signal of a part and return it to the input terminal through a negative feedback circuit. However, this method has another problem, that is, the output of the feedback causes a time delay (Td) after passing through the negative feedback circuit, which distort the compensated input waveform (as shown in Figure 4c), so that the generated output waveform is also distortion. Figures 4a and 4b are typical examples of amplifiers using input bias compensation. Fig. 4c illustrates an input waveform distortion type and a corresponding output waveform distortion type after the input waveform is combined with a negative feedback waveform. In the amplifier circuit using the negative feedback compensation method, because the gain degree itself is low, the number of required amplification stages is quite large, and the degree of distortion of the output waveform increases proportionally with the number of amplification stages. On the other hand, a field effect transistor (FET) with a gate voltage of 1.5 V can also be used as a tool for compensating a transistor with a narrower input bias range. However, because field-effect transistors cannot be operated stably due to temperature and their own characteristics, they are only used in a few special circuits. The traditional vacuum tube amplifier has a bias voltage greater than 1.5 V and has a large amplification gain, so the number of required amplification stages is small. Because the audio amplifier circuit using a vacuum tube has little distortion after interactive modulation, professional music experts often use a vacuum tube amplifier to enjoy music. Despite this advantage, the vacuum tube amplifier has lost its practicality due to its many disadvantages such as high power consumption, large volume, sound quality damage and high manufacturing and maintenance costs. On the other hand, there is an audio amplifier called " Class-D amplifier π, which is a digital circuit using pulse width modulation (PWM), which can retain the advantages of the above-mentioned vacuum tube and compensate its disadvantages. Figure 5 is an n Class-D zoom

563293 V. Description of the invention (3) Example ". As shown in Figure 5, the Class-D amplifier has a built-in saw wave oscillator. A comparator COMP6 is used to compare the input signal Vi 6 and the sawtooth wave voltage W1. When the input signal Vi 6 is higher than the sawtooth wave voltage W1, the output W 2 is defined as a high voltage (refer to Q in FIG. 6). The pulse width of this square wave is converted as the magnitude of the input signal and the sawtooth wave changes (PWM (Modulation). One of the comparator outputs (W2) above is switched to a metal oxide semiconductor field effect transistor at one output (W3) (refer to the solid line in FIG. 6). The square wave generated by switching the supply voltage at the output end of the switch, so it contains a lot of words, and its duty rate is changed according to the magnitude of an input voltage. If a π open π signal has a larger Signal width, the output signal (W3) has a higher average voltage value. Conversely, if an "open" signal has a smaller signal width, the average voltage potential is lower (refer to the dotted line in Fig. 6). This output signal (W 3) is then integrated by a low-pass chirper (LPF), and the harmonics can be eliminated to obtain the final analog output signal (refer to S in FIG. 6). However, the known problem of this n Class-D amplifier is that the LC filter needs to be connected in multiple stages to smooth the square wave of the output signal (that is, eliminate the harmonic elements), which results in a large coil and requires further technology. In order to block the radio waves emitted by the outside world. In addition, the π Class-D amplifier π has another problem, that is, the oscillation frequency of the sawtooth wave needs to be increased to the maximum frequency of the switchable MOSFET to obtain a high level of sound quality, so further wave and switching technology is needed. SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems and provide a simple and convenient

563293 V. Description of the invention (4) Easy-to-make analog signal amplification method, which can eliminate an output waveform distortion to produce the final output similar to the original sound or original analog signal, without the need for a multi-stage filter, making the volume smaller No further filtering and switching techniques are required. It is still another object of the present invention to provide an amplification device using such a ratio signal amplification method and integrated on a semiconductor. Another object of the present invention is to provide an amplifier for inputting digital data signals such as PWM signals, combining digital devices such as modern laser discs, etc., and a power amplifier, ignoring an intermediate digital / analog (D / A) conversion process. And directly connect digital data to solve many problems that occur during the digital / analog conversion step.

It is another object of the present invention to provide a sawtooth wave oscillator for use in the amplifier or amplifying device. The present invention further provides a power amplifying device used by the amplifier or amplifying device. In order to achieve the purpose of this roar, an analog signal amplification method of an analog signal amplifier is provided according to a first characteristic structure. This method includes the following steps: Output a first sawtooth wave whose frequency is far greater than the input signal of the amplifier. The maximum frequency, and the amplitude is equal to or slightly greater than one of the maximum amplitudes of the input signal and has a predetermined period;

Compare the first sawtooth wave with the input signal, and output a high potential first pulse when the amplitude of the first sawtooth wave is greater than the input signal; in the form of a one-shot Output a second pulse with a narrow pulse width at the starting position of the high potential region;

Page 8 563293 V. Description of the invention (5) Large vibration position; Sawtooth wave electricity keeps enabled. Amplitude of the next step number is large and output large vibration level. A second sawtooth wave is output, the amplitude of which is the same as the output signal of the amplifier. The amplitude is equal or slightly larger, and each wave has the same period and phase as the first sawtooth wave, and the pressure is easily charged in one step as a Darby step: The output is the largest and there is a high-speed electrical The ground is filtered to place the starting position of the high potential region of the second pulse corresponding to the second starting point and the second sawtooth corresponding to the high potential region to continuously generate an output voltage; and the switch generates the voltage generated by this Charge to a capacitor, press it stably and eliminate the valley (wave: wave) in the output waveform. For the purpose of the present invention, according to a second characteristic structure, an analog signal amplifying method is provided. The method includes: Single output amplitude phase sawtooth wave, whose frequency is far greater than the input signal frequency of the amplifier, and the amplitude is equal to or slightly larger than one of the input signals for a maximum of a predetermined period; a sawtooth And the input signal, outputting a first pulse with a high potential when the first sawtooth wave vibrates; a second pulse with a narrow pulse width in the starting position of the high potential region of each of the first pulses; , Whose amplitude is slightly larger than that of the output signal of the amplifier, and has the same period as the first sawtooth wave, and is equal to or equal to the first input or corresponding to the starting position of the high potential region of each of the second pulses. The second sawtooth wave corresponds to the second sawtooth corresponding to this starting point and the high potential region.

Page 9 563293 V. Description of the invention (6) The position of the wave voltage continuously generates a first output voltage; a third sawtooth wave is output which is opposite to the second sawtooth wave; the south potential region of the mother, the brother, and the two pulses The starting position corresponds to the second oretooth wave, and a second output voltage is continuously generated according to the starting point and the third sawtooth wave voltage position corresponding to each other; an analog switch is used to generate the first One and the second voltage are charged to a capacitor, and the valley is adjusted according to the first or the second. The first or the first is stable and the charging can be easily filtered; and the first and the second and third characteristic structures are used to In the structure, a sawtooth wave amplitude is set. A third characteristic is in the junction structure. Amplitude characteristics are invented to adjust the structure details. The following two characteristics are far away from the input signal. One of the inventions is integrated with the semiconductor voltage. Among them, the concave output in the output waveform is eliminated to obtain an output signal with a double value. To achieve the above object of the present invention, as the first meaning, an additional method is provided including a step of adjusting the gain of the amplifier. In order to achieve the above-mentioned object of the present invention, as defined above, an additional method is provided including the step of adjusting the amplitude of the first sawtooth wave by a second input signal. The object is to provide an amplifying device using the first to fourth combinations. DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of the present invention will be described with reference to the accompanying drawings. FIG. 1 is an overview of an example of an analog signal amplifier according to the present invention. The sawtooth wave generated by the sawtooth wave generating circuit 101 has a frequency higher than the maximum frequency of the input signal. This sawtooth wave is maintained for a predetermined period

Page 10 563293 V. Description of the invention (7) It has excellent linearity and it is two ore tooth waves with different output potentials. One of the staggered signals of the output potential is used as a first staggered waveform W i η. This potential is slightly larger than the maximum peak voltage of an input signal and is used as the input signal of the non-inverting input terminal (+). The tooth wave signal of the other output potential is used as a second sawtooth wave Wout voltage, and this potential is slightly larger than the maximum amplitude of the required output signal. If an analog switch 1 05 (or a high-speed switch, in this description 'the analog switch is used as a high-speed switch in the past) is opened by the first buffer amplifier (BUF1) 104, the other output potential The wrong tooth wave is converted into electric power sufficient to charge C 2 quickly, and is connected as an input of the analog switch 105. An input flood number Π is input from the inverting input terminal (-) of the comparator (C 0 MP) 1 0 2, and the first sawtooth wave W i η is connected to the non-inverting input terminal (+. Then, the two The signals are compared with each other in the comparator 102, and finally a first pulse of pwM modulation signal is output, and the width of the pulse varies with the magnitude of the turn-in signal. The first pulse generated by the comparator 102 Received a single-shot vibrator 103 trigger input / converted to a narrow and constant pulse at the beginning of the input PW M signal, and the single-shot vibrator boundary 1 0 3 The second pulse is output. The second pulse of this output is connected to the control terminal of an analog switch 105, and the analog switch i 05 is turned on during the pulse period. The output terminal of the analog switch 105 is connected to the The non-inverting input terminal (+) of the second buffer amplifier drives a push-pull (push — pu 丨 1) power amplifier circuit 107. At the same time, the capacitor C2 is also connected to the output terminal of the analog switch 105, and When the switch 1 0 5 is opened, the voltage value of the first buffer amplifier 1 0 4 is charged, while the analog switch 1 0 5 Keep the voltage level when closed. This second buffer amplifier 563293 V. Description of the invention (8) The inverting input (-) of the device 1 0 6 is connected to an output zero (0-p ◦ int) control circuit 10 9 At the output end, the control circuit makes the output connector of the push-pull power amplifier circuit 107 always have the same common ground potential. The output of the second buffer amplifier 106 is connected to the push-pull power amplifier circuit 107. The output of the push-pull power amplifier circuit 107 is connected to the input of the output zero control circuit 10 9 and the input of the low-pass filter LPF 1 08. Then the output of the LPF 1 08 is connected to an output. The connector V 〇. The circuit established by the present invention is called nClass-E amplifier or Jin amplifier π. N J 1 η " is the surname of the inventor of the present invention. Next, this C 1 ass-E amplifier is the The operation will be explained according to the present invention and with reference to Figs. 1 to 2. The analog input signal V i and the first wrong tooth wave W i η are compared with each other in the comparator 1 0 2 (Fig. 2A in Fig. 2) to generate the first One pulse (Figure B in Figure 2a), this pulse is generated in the ore tooth wave W i η South potential is lower than the input signal V i when it is south and low when the sawtooth wave W i η is lower than the input signal. This first pulse is transmitted to an input terminal of the single-shot oscillator 103 to form a first Two pulses (Figure C in Figure 2a), which has a very narrow pulse width at the beginning of the first pulse. The width of the second pulse must correspond to a value sufficient to switch the capacitor C 2 after the analog switch 105 is turned on. Charging time. In the above operation, the analog input signal V i is only compared with the voltage of the first sawtooth wave at the rising region RAMP of the first sawtooth wave W i η to calculate and convert the change in voltage of the input signal into time. Changes. At this time, the change in time is caused when the position of the second pulse in the rising region RAMP of the first sawtooth wave is changed. In other words, if the voltage of the input signal is low, the position where this second pulse appears is closer to __ IIII E11II S 1 page 12 563293 V. Description of the invention (9) The starting point of the sawtooth wave, and the input signal When the voltage is high, it is far away from the starting point of the sawtooth wave. Therefore, the magnitude of the input signal V i and the position generated by the second pulse are in a constant interaction relationship. The second data tooth wave has the same period as the first ore tooth wave and has a maximum amplitude value required for an output signal. This second sawtooth wave is supplied to an input terminal of the analog switch 105. This second pulse controls the control connector of the analog switch 105 to open / close the analog switch 105. The analog switch 105 is turned on only during the occurrence of the second pulse to capture the voltage value of the second sawtooth wave (refer to the small circle mark in Figure D in Figure 2a) (operation 2). Figure 2b describes the process of generating an input signal Vi and an output signal. As shown in FIG. 2b, if the input signal V i is at the position a and the first ore tooth wave W i η is rising and passing through a ′, the comparator 1 0 2 generates the first pulse a 1 and the single-shot oscillation The device 1 0 3 shapes this first pulse into a second pulse a 2 with a very narrow width. The formed second pulse is then supplied to the control connector of the analog switch 105 to charge a capacitor C2 to the voltage an of the second sawtooth wave Wout. Then, if the input signal V i drops to the position b, and the first sawtooth wave W i η rises and passes b ′, the comparator 1 0 2 generates the first pulse b 1 and the single-shot oscillator 1 0 3 forms this first pulse into a second pulse b 2 with a very narrow width. The formed second pulse is then supplied to the control connector of the analog switch 105 to charge a capacitor C2 to the voltage bn of the second sawtooth wave Wout. Then, if the input signal V i drops to position c, and the first sawtooth wave W i η rises and passes through c ′, the comparator 1 0 2 generates the first pulse c 1 and the single-shot oscillator 1 0 3 Shape this first pulse into a second pulse c 2 with a very narrow width. The formed second pulse is then supplied to the control of the analog switch 105.

Page 13 563293 V. Description of the invention (ίο) The connector charges a capacitor C2 to the voltage cn of the second sawtooth Wo ut. The voltage generated by operation 2 charges capacitor C 2. This charging voltage will remain in capacitor C2 until the next charging action occurs (Figure E in Figure 2a). The charging voltage in the capacitor C 2 drives the push-pull power amplifier circuit 107 via the second buffer amplifier B U F 2. Further, if necessary, a low-pass filter LPF may be connected to the second buffer amplifier 106.

The push-pull power amplifier circuit 107 is a power amplifier for driving a load, and usually a Class A B amplifier circuit is used. The low-pass filter LPF 1 0 at the output terminal is used to eliminate high-frequency elements and integrate the waveform of the capacitor C2 voltage, which is similar to a square wave (Figure E in Figure 2a), to output only audio signals. In the above conversion process, a second pulse that is proportional to the input signal and changes in time can be generated according to the first sawtooth wave with good linearity, and then the second sawtooth wave with the same maximum amplitude as the output signal corresponds to Take out the voltage value at the position where the second pulse is generated, and charge this captured voltage value to the capacitor C 2, and finally amplify the above voltage at the push-pull, type power amplifier 107 and output it to reach the input signal The purpose of amplifying V i to the voltage level of the output signal V 0. Here, the amplification degree A of the amplifier will be described by the following formula: Equation 1

A = [Second sawtooth wave amplitude / first sawtooth wave amplitude] (times) In other words, the amplification factor is determined by the ratio of the first sawtooth wave amplitude to the second sawtooth wave amplitude. As shown in the left half of Figure 2d, when the amplitude of the first mining tooth wave Winl is small, the output signal corresponding to the second sawtooth wave is equivalent.

Page 14 563293 V. Description of the invention (11) Large, magnification is large. As shown in the right half of Fig. 2d, when the amplitude of the first sawtooth wave W i η 2 is large, the output signal corresponding to the second wrong-tooth wave is relatively small and the degree of amplification is small. This means that the higher and lower amplitudes of this first sawtooth wave are inversely proportional to the degree of amplification. Figure 2e illustrates an example of a circuit for adjusting the magnitude of the first sawtooth wave amplitude. As shown in Figure 2e, the change in the emitter resistance of Q 1 will cause the current value of a certain current circuit to change. The charging time of the capacitor adjusts the amplitude of the first sawtooth wave as the current value changes. Therefore, the gain of the amplifier can be adjusted by increasing or decreasing the amplitude of the first sawtooth wave (equivalent to changing and adjusting the slope of the sawtooth wave). For example, this adjustment function is related to the volume control of an audio device. As shown in FIG. 2c, a third sawtooth wave can be generated after the second sawtooth wave is inverted, and a voltage corresponding to the second pulse can be captured by the third sawtooth wave to obtain an inverted output. When the non-inverting first output and the inverting second output amplify the power to drive the negative load, they can get twice the output voltage, so that a bridge-tied load (BTL) amplifier can be simply established. As described above, in the present invention, the input signal V i and the first sawtooth wave W 1 η are compared with each other at the comparator COMP 102 to generate a first pulse (operation 3) and form a second pulse. The capacitor C2 is charged from the second sawtooth wave corresponding to the position where the second pulse is generated (operation 4), and the power is amplified by the push-pull power amplifier circuit 107 (operation 5) to generate an output Vo. The operation 3 as a conversion process has a sawtooth wave circuit structure having a good linearity. Therefore, operation 3 has the advantage of eliminating intermodulation distortion; operation 4 uses the second pulse generated by operation 3 to obtain an output; the push-pull amplifier circuit

Page 15 563293 V. Description of the invention (12) 1 0 7 can be used as a generally known circuit in applications. The degree of amplification of this push-pull amplifier circuit is 1, and there are few problems according to the input bias characteristic of the transistor. Since the present invention does not directly use the amplification operation of the transistor, the distortion coefficient of the output waveform can be basically eliminated. In particular, the input signal V i is only related to the linearity of the first sawtooth wave W i η and the second sawtooth wave regardless of the input bias characteristic of the transistor. Therefore, the present invention has nothing to do with the characteristics of the transistor device which affects the distortion coefficient of the output waveform. Next, a plurality of analog signal amplifiers and devices used therefor will be described in accordance with the present invention.

7-A in FIG. 7 illustrates a circuit that generates a clock by using a resistor R1 and a capacitor C1 to form a time constant, and outputs a pulse from an output terminal OUT. The resistor R2 of the clock generating circuit 7-A is used to discharge the charging voltage on the capacitor C1. The inverters IC2A and IC2B are connected to the output connector 0 UT of the clock generating circuit 7-A to buffer and invert the output of the clock generating circuit 7-A I C 1. The forward silent phase inverted by the inverter IC 2 A is used to synchronize the second broadcast tooth wave PT 产生 generated in the second sawtooth wave generating circuit 7 -B, and the pulse delay circuit 7-G and the inverted phase The negative pulse generated by the IC 2B is used to synchronize the third sawtooth wave NTΗ generated in the third sawtooth wave generating circuit 7-C.

In the second sawtooth wave generating circuit 7-B in FIG. 7, if the output of the inverter IC2A is turned to a high potential, the path through which the current flows includes resistor R3, capacitor C2, and the base and emitter of transistor Q1. And charge capacitor C 2. At this time, the collector and emitter of the transistor Q1 are conducting to discharge the voltage on the capacitor C3. In other words, this action is to reset the sawtooth wave. Furthermore, if the output terminal of the inverter IC2 A goes to a low potential, the second sawtooth wave generating circuit 7-B

Page 16 563293 V. Description of the invention (13)

The charging voltage on the medium capacitor C 2 will be discharged through the resistor R3, the output connector of the inverter IC2 A, and the diode D1 in the second sawtooth wave generating circuit 7-B (the circuit generally composed of C2 and D1 is called a clamp Bit (CLAMP) circuit). The transistor Q1 in the second sawtooth wave generating circuit 7-B has a region between the base and the emitter turned to a reverse voltage of -0.6 V, so the region between the collector and the emitter in the transistor Q1 does not change. Continuity. Thereafter, the capacitor C3 of the second sawtooth wave generating circuit 7-B is provided with a constant current by the transistor Q2, and a constant current is supplied to charge the capacitor C3 at a certain speed. Since the voltage across resistor R6 is stably controlled by the reference diode Z 1 connected to the base of transistor Q2, the current flowing through the resistor R 6 and the collector of transistor Q 2 is a constant current. This constant current is supplied to the capacitor C 3 to generate a sawtooth wave with good linearity, and the charging voltage on the capacitor C 3 is quickly discharged by the transistor Q 1 to generate a continuous sawtooth wave. At this time, the function of the capacitor C 2 is to switch on the circuit of the inverter IC2A and the transistor Q1 only when the AC power is supplied, and to open the circuit when the DC power is supplied. Changing the voltage value of +-V 2 and C 2 will not affect the normal operation of the + -VI circuit of the clock generating circuit 7 -A. Therefore, the voltage value of the + -V 2 voltage of the second sawtooth wave generating circuit 7-β can be changed without affecting the + -V 1 circuit of the clock generating circuit 7-A, and the + -V 2 voltage is equal to The peak-to-peak voltage of the sawtooth wave is proportional to the maximum output voltage of the amplifier. To change the output of the amplifier, it is only necessary to change the + -V 2 voltage value of the second sawtooth wave generating circuit 7-B, and there is no need to change any of the circuits therein. The transistor Q3 in the second sawtooth wave generating circuit 7-B buffers the sawtooth wave voltage generated by the capacitor C3, reduces the output impedance to C3 and drives the resistors R7, R8. At the output of transistor Q3, a PTH equivalent to the amplifier output level is used as the second sawtooth wave. This sawtooth wave is divided by resistors R7, R8

Page 17 563293 V. Description of the invention (14) The first sawtooth wave PTL corresponding to the input signal level is transformed, and the second sawtooth wave has the same period and phase.

7-C in FIG. 7 illustrates a third sawtooth wave generating circuit that can simultaneously generate a third sawtooth wave when the second sawtooth wave is generated. When the output terminal of the inverter IC 2 B is turned to a low potential, current will flow through the emitter and base of the transistor Q4, the capacitor C4 and the resistor R9 in the third sawtooth wave generating circuit 7-C, and the capacitor C4 charges. At this time, the region between the emitter and the base of the transistor Q4 is turned on to discharge the capacitor C5. In other words, this action is to reset the mine tooth wave. If the output terminal of the inverter IC2B is turned to a high potential, the charging voltage on the capacitor C4 will be discharged through the diode D2, the output terminal of the inverter IC 2 B and the resistor R9 (the circuit usually composed of C4 and D2 (Called the clamp circuit). The area between the base and the emitter of the transistor Q4 is reversed to a voltage of + 0.6V, so the area between the collector and the emitter in the transistor Q4 is not conductive. Thereafter, the capacitor C 5 of the third sawtooth wave generating circuit 7-C is provided with a constant current circuit composed of the transistor Q 5, and the capacitor 0 5 is charged at a certain rate. Since the voltage across the resistor R12 is stably controlled by the dalk diode Z 2 connected to the base of the transistor Q 5, the current flowing through the resistor R 1 2 and the collector of the transistor Q 5 is a constant current. This constant current is supplied to the capacitor C 5 to generate a sawtooth wave with good linearity, and the charging voltage on the capacitor C 5 is quickly discharged by the transistor Q4 to generate a continuous sawtooth wave. At this time, the function of the capacitor C 4 is to switch on the inverter I C 2 B and the transistor Q4 circuit only when the AC power is supplied, and to open the circuit when the DC power is supplied. Changing the voltage value of + -V2 and C 4 will not affect the normal operation of the + -V1 circuit of the clock generating circuit 7-A. Therefore, the + -V2 voltage of the third sawtooth wave generating circuit 7-C can be changed without affecting the + -V1 circuit of the clock generating circuit 7 -A.

Page 18 563293 V. Description of the invention (15), and the + -V2 voltage is proportional to the peak-to-peak voltage value of the sawtooth wave and the maximum output voltage of the amplifier. To change the output of the amplifier, only the +-V 2 voltage value needs to be changed, without any changes to the circuits in it. The transistor Q6 in the third sawtooth wave generating circuit 7-C buffers the sawtooth wave voltage generated by the capacitor C5, and reduces the output impedance to C5 and drives the resistor R13. An NTH corresponding to the output level of the amplifier is provided at the output of the transistor Q6 as the third sawtooth wave.

The function of 7-D in FIG. 7 is a comparator, which compares the analog signal of the input connector IN and the first sawtooth wave PTL at the comparator IC3, and when the first sawtooth wave PTL signal is higher than the High potential is output when a signal is input. The pulse width of this high-potential signal depends on the magnitude of the input signal. This high-potential signal is then turned into a narrow pulse by the single-shot oscillator 7-F I C 4 at the beginning of the pulse.

In other words, the single-shot oscillator 7-F in FIG. 7 changes the first pulse output from the comparator IC3 to form a second pulse with a narrow pulse width. In this single-shot oscillator 7-F, the narrow pulse of I C 4 is output as a positive pulse from the connector Q and supplied to the control connectors C of the analog switches A-SW1, A-SW2 in an analog switch circuit 7-E. A second pulse is generated at the rising point of the first pulse, and its pulse width is related to the time constant formed by the resistance R 1 6 and the capacitance C 7 of the single-shot oscillator 7-F. There is a time difference between the rising point of the first pulse and the second pulse, which is called the delay time Tplh between the input and output of the single-shot oscillator, which is usually 300 nS in CMOS technology. As shown in Figure B of Figure 14, when the analog input signal approaches the maximum value, a first pulse is generated in the comparator, and this first pulse is input to the single-shot vibrator 7-F.

Page 19 563293 V. Description of Invention (16) I C 4. If the delay time between the input / output of IC 4 is 0 n S, the second pulse generated is shown in Figure C in Figure 14, and the analog output waveform has the maximum voltage level, as shown in Figure E in Figure 14 . However, because I C4 has a delay time Tρ 1 h, the second pulse generated after the delay time Tρ 1 h elapses is shown in FIG. 14D. At this time, if the second sawtooth wave (Figure F in Figure 14) passes its highest point and approaches its lowest point, the second pulse (Figure D in Figure 14) will pick up a minimum voltage level And, the analog output will suddenly change to the lowest potential (Figure F in Figure 14). This situation can cause damage to a speaker when the output drives a speaker with a power amplifier. Therefore, there must be no continuous and rapid changes in the output waveform.

A method for preventing the above phenomenon will be described below. • A high potential blanking pulse (7-H in Fig. 7 and Q in Fig. 14) is connected to the reset connector of IC4 of the single-shot oscillator (7-F in Fig. 7). The rising edge of this obscuration pulse is delayed before the change position of the first sawtooth wave (Figure 0 in Figure 14) from the highest point to the lowest point, and delayed by T p 1 h. When this masking pulse is applied to the reset connector R ES ET, even if the input terminal A of the first pulse input I C 4 does not have a second pulse output. As shown in Figure 14-P, if the first pulse near the maximum value of the input signal is input to the input A of 1C 4, the second pulse will not be output because the first pulse is at a time when the signal is obscured. Within the period (S in Figure 14). At this time, the first pulse can be maintained at the last captured voltage value and the output voltage can be prevented from reversing quickly. Figure 15 illustrates the second and third sawtooth wave delays to correct the operating range of the output. The function of the comparator circuit 7-D in FIG. 7 is a comparator, which is in the comparator

Page 20 563293 V. Description of the invention (17) 1C3 compares the analog signal of the input connector IN and the first sawtooth wave PTL, and outputs a south potential when the first sawtooth wave PTL signal is higher than the input signal within a certain period of time. The pulse width of this south potential signal depends on the magnitude of the input signal. This high-potential signal is then turned into a narrow pulse by the single-shot oscillator 7-F I C 4 at the beginning of the pulse.

The single-shot oscillator 7-F in Fig. 7 is the first sawtooth wave at an input signal level and the input signal IN is input to the comparator IC 3, and then the first pulse output by IC 3 is output (b in Fig. 15) It is adjusted and changed to form a second pulse with a narrow pulse width. Although it is preferable that the second pulse is generated at the rising edge position of the first pulse (C in Fig. 14), there may still be a time difference between the rising point of the first pulse and the second pulse, which is called the single The delay time Tplh between the input and output of the oscillator is usually 300 nS in terms of CMOS technology. When the analog switch (7-E in Figure 7) captures the second and third sawtooth waves, this delay time Tp 1 h will cause a deviation, and the top part of the final output waveform will be distorted, making the maximum output range Shrink, small. The above phenomenon cannot be ignored when the sawtooth wave frequency is quite high. Even if efforts are made to eliminate this phenomenon, the delay time that the single-shot oscillator can reduce is still limited. However, if the reset pulse of the sawtooth wave generator is delayed by the 7-G pulse delay circuit in FIG. 7 and then provided to the reset circuit of the sawtooth wave generator, a wrong level of output level can be generated. Wave (the second or third sawtooth wave), and the second pulse of the output (d of FIG. 15) can extract the maximum output voltage that will not be distorted (1 of FIG. 15) (second mine of FIG. 7) The tooth wave circuit is the same as the second ore tooth wave in Figure 15). Next, a sample / hold circuit 7-E (Fig. 7) composed of an analog switch (or high-speed switch) will be described. An output level of the second sawtooth wave PTH from the second

Page 21 563293 V. Description of the invention (18) The sawtooth wave generating circuit 7-B is connected to the analog switch A-SW1 connector I of the sample / hold circuit 7-E, and a pulse of the capacitors C1 0 and C8 at the control terminal C Charge during the period (C8 capacitor value is larger than CIO). Then this second sawtooth wave PTH is buffered by transistor Q7 and filtered by LPF1 (top right part outside the sample / hold circuit 7-E in Fig. 7) to be output to the connector P-OUT. This amplified analog signal and the input The signals have the same phase. Similarly, the third sawtooth wave NT Η is from the third sawtooth wave generating circuit 7-Ci 妾 to the connector I of the analog switch A-SW2, and the capacitors C 1 3, C 9 are charged within a pulse period of the control terminal (C 9 The capacitance value is larger than C 1 3). The second tooth wave NTH is buffered by transistor Q8 and filtered by LPF2 (bottom right of the sample / hold circuit 7-E in Figure 7) to output to connector N-0 UT. This enlarged analogy The signal is inverted from this input. Even though the charging voltage on capacitor C 1 0 must be kept at a stable level until the next charging time comes, because the impedance of capacitor C 1 0 is quite large, this voltage is controlled by the input I and output of this analog switch A-SW'l The capacitance between 0 or the capacitance between the printed circuit board PCB patterns causes a ripple shape, which is the same as the second mine tooth wave PT 产生 generated by the second sawtooth wave generating circuit 7-B. This ripple cannot be completely eliminated after passing through the low-pass filter LPF 1, and only causes noise. Therefore, the third sawtooth wave NTH, which is opposite to the second sawtooth wave PTT, is divided into a smaller voltage by the trimmer capacitor TC2 and the capacitor C8 in the analog switch circuit 7 -E and overlaps with the capacitor C 1 0 on. Next, adjust the trimming capacitor TC 2 to make the divided voltage equal to the ripple voltage and reverse it, and then across the capacitor C 8 to cancel the ripple. In addition, even if the charging voltage on the capacitor 13 needs to be kept at a stable level until the next charging time comes, because the impedance of the capacitor C 1 3 is quite large,

Page 22 563293 V. Description of the invention (19) This voltage causes a ripple shape caused by the capacitance between the input I and output 0 of the analog switch A-SW2 or the capacitance between the printed circuit board PCB patterns, which is the same as Second mine tooth wave NTH. This ripple is completely eliminated naturally after passing through the low-pass filter LPF 2, and only causes noise. Therefore, the second sawtooth wave ρΤη, which is in phase with the third sawtooth wave NT version, is divided by the trimmer fast valley TC 1 and the electric valley c 9 in the analog switch circuit 7 to a smaller voltage and overlaps with the capacitor c 1 3 on. Next, 'adjust the trimmer capacitor TC1 to make the divided voltage equal to the ripple voltage and invert it therefrom' across the capacitor C9 to cancel the ripple. The output A number (P-0 UT) of the LpF1 has the same phase as the input signal (I n) of the comparator (7-d). After amplification, it is input to a power amplifier device (CBST 1) connected to the LPF 丨: A current booster (cu Γ rentb〇oster)) amplifies the power to drive a speaker (SP1) connected thereto. The circuit diagram of FIG. 8 illustrates a power amplifier cbSTI. When the output terminal OUT is 0V, it is controlled by an operational amplifier 30 to keep it with a direct current (DC) characteristic, so that the speaker can be connected to the output terminal OUT and Totally end. The non-inverting input terminal (+) of the operational amplifier IC30 is connected to a common ground terminal, and its inverting input terminal (-) is connected to an output terminal of the power amplifier device (CBST1 ·· current booster) via r 3 1 out. The output of the operational amplifier I C 3 0 is connected to the base of the transistor Q 3 0 via R 3 0 to control the bias of the transistor Q 3 0. Since the capacitor C31 is connected across the inverting terminal C-) of the operational amplifier IC3 0 and the output, the time constant R3 1 C3 1 is relatively large, so the output of the operational amplifier I C 3 0 only controls the DC state regardless of the signal voltage. The operation of the power amplification device CBST1 will be described next. When the output terminal OUT voltage increases in the positive direction (+), the inverting terminal (-) of this operational amplifier IC3〇

Page 23 563293 V. Description of the invention (20) also increases positively, but its output decreases negatively. This causes the base voltage of the transistor Q 3 0 to drop, which in turn reduces the emitter voltage of the transistor Q 3 0, so that the output terminal OUT returns to 0 EMF. In addition, the output terminal OUT voltage decreases in the negative direction (-), and the inverting terminal (-) of this operational amplifier I C 3 0 also decreases in the negative direction, but its output increases in the positive direction. This causes the base voltage of the transistor Q30 to increase, and the emitter voltages of the transistors Q 3 0 and Q 3 3 to increase, so that the output terminal OUT returns to 0 EMF. Fig. 9 is a conceptual diagram illustrating a method of amplifying a method when an input amplifier is a PWM signal. Many digital devices today, such as compact discs (CDP), can be used to repeatedly play digital recordings. Many devices use digital methods to process signals to output audio sound. FIG. 10 illustrates an example of a digital signal processing device of a compact disc and a conventional technique. In this device, the digitally processed signal is finally output as an audible sound through the following processes: digital / analog conversion, filtering and amplification. It may occur during digital / analog conversion and amplification, signal deformation, and many components are required to form this circuit.

I Figure 11 is a block diagram of a PWM signal amplifier. If the PWM signal amplifier is a device for processing a PWM signal in a digital device, the PWM signal can be directly connected to the PWM input amplifier in Fig. 9 so that the amplifier can be established in a simple manner without the need for a digital / analog conversion circuit. In addition, since there is no distortion coefficient in the amplification device, a distortion-free signal can be generated during the amplification process. The operation of the PWM input amplifier according to the present invention and with reference to Fig. 9 will be described below.

Page 24 563293 V. Description of the invention (21) A P W MU signal 9-A is input to an input terminal I N. The P W M signal 9-A requires a fixed time when rising from a low potential to a high potential. The rising point from the low potential to the high potential is the reference position of the PWM signal. The pulse width of this PWM signal 9-A at high potential is proportional to the magnitude of the signal being processed. Furthermore, the position where the signal goes from high to low is different in each period. If this P W MU signal 9-A is input to an input terminal I N, a rising point detector 9-B will detect the position where the signal changes from low potential to high potential, and then

A reset pin RESET outputs a high potential pulse. This chirp potential pulse passes the resistor R41 and the capacitor C 4 1 ′ of the second sawtooth wave generating and resetting circuit 9-D to cause a current to flow through the base and emitter of the transistor Q 4 1 and let the transistor Q 4 1 The collector and emitter are turned on and immediately discharge the capacitor C 4 2 located at the output stage of the sawtooth wave generating circuit. Similarly, when the output pulse of the reset connector R E S E T drops to a low level, the transistor Q41 is turned off and the capacitor Q42 is charged. The constant voltage on the diode Z 4 1 allows the current to always pass through the resistor R 4 4 connected to the emitter of the transistor Q 4 2. Therefore, the current charges the capacitor C 4 2 at a stable speed, thereby generating a good linear sawtooth wave. This sawtooth wave is buffered by the transistor Q 4 3 and supplied to an input connector of the analog switch A-SW4. On the other hand, the falling point detector 9-tests the input PWM signal 9-A from high to low Position, a high-potential pulse is output from an output terminal qHL. This pulse is generated in proportion to a high potential pulse region of the PWM signal 9-A. Qian In other words, if the high-potential pulse width of the PWM signal 9-A is short, the position where the QHL pulse is generated is closer to the starting point of the < sawtooth wave PTH generated by the reset terminal RESET. Conversely, if the high-potential pulse width of the PWM signal 9-A is longer, the position where the QHL pulse is generated is farther from the first

Page 25 563293 V. Description of the Invention (22)

The starting point of the wave PTH. This QHL pulse turns to a single-shot vibrating cry 9_E 9:, the oscillation forms a narrow pulse for the K41 sub, and then enters the control circuit C of the buffer circuit — = analog switch A] 4. # 提供 此 rigger 41 ^ i + Analog switch A_SW4 is turned on to turn the second sawtooth wave PTH 5F cl4. The voltage value charged to the capacitor C44 is proportional to the visibility of the package. The analog signal is generated by the detection and preservation point ^ = the position of the second sawtooth wave PTH generated by 1 ϊ from the narrow pulse (IC41 Q) of the single-shot oscillator 9 is amplified. Here: ί i is a continuous smooth and distortion-free analog signal. This analog signal is buffered by the transistor Q44 of the 9-F circuit 9-F, and then filtered by the low-efficiency filter LPF4 connected to the buffer circuit. A speaker SP4 is driven by a power amplifier CBST4 (current booster) connected to a low-pass === LPF4. The reverse action is repeated every cycle of the PWM signal. (PCM ^ U is a conceptual diagram illustrating one of the amplification methods according to the present invention when the input amplifier is a pulse code modulated into a number. As described above, the current shot is supercharged, and the device digitally processes the audio signal. Figure 10 illustrates a thunderbolt. = A representative example of digital signal processing in accordance with the conventional art. The digital signal is subjected to digital / analog conversion, filtering, and communication in the digital device. 纟 Digital / analog conversion and A signal may be produced during the amplification process; ^ ί: And many components are needed to form this electric 4. If this PCM signal dream_ / 7 ^ a device that processes PCM signals in a digital device, the device can be directly Λ is connected to the PCM input amplifier in Figure 13 to make this way out. The earlier method is established without the need for digital / analog conversion electronics, because there is no deformation coefficient in the amplification device, so

Page 26 563293 V. Description of the invention (23) A distortion-free signal is generated during amplification. The operation of the PCM input amplifier according to the present invention will be described below with reference to Figs.

In FIG. 13, a PCM signal 1 3-A is input to an input terminal I N. The PCM signal is obtained by sampling the analog signal at a predetermined period (for example, 44.1 KHz) and regularly transmitting a series of digital values (for example, the value of 2 4 b i t). This signal includes a right signal, a left signal, a control signal, or other information. Although this example uses a PCM signal 1 3-A, this device can still process any information output by optical, DSD (super audio) format, IrDA communication, IEEE 1 3 9 4 communication, these are usually called Is digital information. The PCM signal 1 3-A is input to the input terminal I N and classified and processed in a digital data (here, the PCM signal) processing controller 1 3-B. After the right signal is analyzed in the digital data (PCM signal) processing controller and is output by an RDT0 connector, a high-potential pulse is output by the RCK connector to latch a value in a recording / compare unit 1 3- Right latch KR-CH LATCH in C. Here, the storage / comparison unit 13-C includes a right latch (R-CH LATCH), a left latch (L-CH LATCH), a comparator 1 (24bit C0M1), a comparator 2 (24bit COM2), and a Counter (24bit COUNTER). On the other hand, after the left signal is analyzed in the digital data (? 0% signal) processing controller 131 and output from a 1 ^ 110 connector, a high potential pulse is output from the LCK connector to latch a value at a In the left latch (L-CH LATCH) in the store / compare unit 13-C. This latch value is a digital value corresponding to the right and left magnitudes of the analog signal. This digital data (PCM signal) processes one of the controllers 1 3-B CCLR connector output

Page 27 563293 V. Description of the invention (24) The relatively high potential pulse is used to reset the _ 24bi t counter (24bi t (: 01 ^ 1 ^ 1〇. At this time, '2413: [1; Comparator 1 ( 241 ^ 1: (: (^ 1) and 2 41 ^ seven ratio l§ 2 (24bit COM2) output 8 > slave and B > the output of AR is low power. When this 241 ^ 1: 6 in the comparator When the connector 241) 1 tree counter (241)] ^ COUNTER) is cleared to 0, the A connector of the lock is set by the pcM data, so B is smaller than A. Therefore, the wheel end B > ALA B > AR becomes π does not output a low potential at the same time. At the same time, when the digital data (p'CM signal) generates a lean material, the control signal is started and connected from; the bit pulse is then-the current is turned on so that the second tooth wave is generated And two resistors ⑸, capacitor ⑸, transistor base: emitter to connect the collector and emitter of transistor Q51. For example: s START after the capacitor 5 2 discharges to a low degree 妾 B-B CCK After outputting, the controller in the memory J ^ starts to count up (up-count) φ is compared to the 24bit count in 2 C. After counting, the fruit count value is divided into: flashing; the counter starts to compare the output B > AL and B > AR High potential. ^ ^ Head off ratio is greater than the value of the 24bU counter (RjH, then J brother 'if the head will output a high potential and vibrate with this single), "β > Αΐί followed by this formed signal into the analog Switch ^ becomes: Narrow pulse. Close A-SW5 control terminal c. When this narrow pulse is supplied to the analog switch A-SW5 from the beginning of the analog in the second channel, this is early; the Q of the off-state IC51 is connected to two sawtooth The voltage value of the wave PTH is charged to electricity six *, and the switch starts to charge the magnitude of the first charge voltage to the PCM signal:. This capacitor C54 is proportional to the sparse value of the capacitor. This kind of analog 563293 V. Description of the invention (25)

The signal is generated by detecting, holding, and amplifying the position of the second sawtooth wave PTH corresponding to the generation point of the narrow pulse (a signal generated at Q of IC 5 1). The signal here is a continuous and smooth analog signal without distortion. This analog signal is then buffered by a transistor Q 5 4 and then filtered by a low-pass filter LPF 5 connected to the analog switch and the buffer circuit 1 3-F. Finally, a speaker SP5 is driven by a power amplifier CBST 5 (current booster) connected to a low-pass filter LPF5. On the other hand, if the value of the 24bit it counter is larger than the left latch (L-CH LATCH) in the storage / comparison unit 13-C, the B > A L connector outputs a high potential. It is then input to the A connector of the single-shot oscillator IC 52 to form a narrow pulse. This shaped pulse is input to the analog switch A-SW6 control terminal C in the analog switch and the slow-link circuit 1 3-F. When the narrow pulse is supplied to the analog switch A-SW6 from the Q connector of the single-shot oscillator I C 5 2, the analog switch is turned on and starts to charge the voltage value of the second sawtooth wave PTH to the capacitor C5 6. The amount of charging voltage on this capacitor C5 6 is proportional to the left signal value of the PCM signal. This analog signal is the second sawtooth wave corresponding to the point generated by the detection, hold, and a narrow pulse (a signal generated by the Q in I C5 2) output at the single-shot oscillator 1 3 -E. The position of PTH is enlarged. The signal here is a continuous, smooth, and distortion-free analog signal. This analog signal is then buffered by a transistor Q 5 5 and then filtered by a low-pass filter LPF 6. Finally, a speaker SP 6 is driven by a power amplifier C B S T 6 (current booster). The above action is repeated every cycle of the PC M signal. As described above, the present invention has the following advantages. First, as shown in Fig. 3a, the conventional method has: the base voltage and the collector voltage are non-linear; the voltage range

Page 29 563293 V. Explanation of the invention (26) The establishment of the distortion caused by the narrow range This will not be true for the circuit, because the distortion path that is decided to be placed will be generated later (Figure 6 because of the analog signal There are very shapes. The missing wave captures the continuous smooth frequency component shape. The first sawtooth wave, so it will be distorted. Two, the output of this pair is a problem of privacy, and three, if it is used, so the R figure) The filter number is converted into a large change and the ratio of the waveform in the original and the full; the characteristic of the linear region is very narrow, the invention can be simple and convenient for the linearity of the sawtooth wave without the limitation of the voltage range. The total amplitude (total voltage range) of the rising region is used as a line signal to perform intermodulation in the linear range used by this ore tooth wave. According to a conventional IC amplification technology in Fig. 4b, the negative return waveform will vary with time. The waveform lost due to delay (Td) or the like is negatively fed back to an inverting input terminal (-) with Rf. The invention can fundamentally solve the above-mentioned cause caused by time delay and does not need to use a negative feedback circuit. The square-wave PWM of the amplified electric current composed of the conventional C 1 a s s D amplifier in FIG. 5 is modulated by the input signal Vi 6 and the sawtooth wave requires further technology and equipment to filter the valleys in the waveform. This will cause a clutter action at the connector of a power amplifier device: a low-pass chord must be used. In addition, in the process of transforming a square wave of a PWM signal back to an analog signal, it is actually impossible to completely reproduce an original wave. In the invention, the voltage is generated by the second pulse to the second sawtooth. capacitance. This can be repeated during the conversion process. Therefore, there is almost no distortion in the conversion process, because the high rate is low, it can be simply filtered and its waveform will not change. In fact, it is difficult to reproduce it with the most advanced and modern amplifier.

Page 30 563293 V. Description of Invention (27) Build a fully compensated orchestra performance. However, according to the present invention, the input signal can be amplified to its original sound due to the above factors, so that a completely compensated music performance can be completely reconstructed. Fifth, in order to change the maximum output range of the amplifier, in the traditional amplification method, it is usually necessary to redesign the configuration of the speaker from the first amplification stage to the output end. However, in the present invention, the peak-to-peak voltage value of the second or third sawtooth wave can be changed by increasing the supply voltage, thereby conveniently changing the maximum output range of the amplifier and changing the power capacity of the power amplifier device.

Sixth, to build a BTL circuit with the existing amplification method, a dual-channel amplifier structure is required, so that the inverting signal on one channel can be input into the other amplifier, thereby causing a larger phase difference between the two channels. Make signal distortion more serious. However, in the present invention, the second and third sawtooth waves are generated simultaneously at the output stage by output signals which are generated simultaneously and are opposite to each other, so the structure is simple, and the distortion caused by the same phase delay of the two channels is very small. small.

Seventh, in the conventional method, a digital signal is reproduced by a digital device such as a laser disc via digital / analog conversion and amplifying the output signal of the filtered signal. However, in the present invention, the digital signal to be processed in the digital device is directly input into an amplifier of the present invention to be reconstructed, so that the distortion in the digital / analog signal conversion is eliminated, the establishment of the circuit is simplified, and the long distance is The connection can also be noise-free. Eighth, because the present invention has nothing to do with the characteristics of the transistor that affects the output waveform, the convenient structure of the present invention enables small signal amplifiers for analog signals, power amplifiers for analog signals, speaker driver amplifiers, or the like.

Page 31 563293 V. Description of the invention (28) He has a semiconductor device similar to an integrated circuit and has a better machine. The above description is only for the scope of the specific embodiments of the present invention and is not limited to this. In the field of this skill, all the changes or modifications implemented are covered by this area. can. However, the inventor's patent scope of the present invention is 563293. The diagram is briefly explained. Figure 1 illustrates an example of an analog signal amplifier according to the present invention. Figure 2a illustrates the waveform of an amplifier at each step. Figure 2b is an enlarged perspective view illustrating the correspondence between the input and output signal waveforms in Figure 2a. Figure 2c illustrates an inverse relationship between an input signal and a second sawtooth wave when the output signal increases to twice the original amplitude. I FIG. 2d illustrates changing the amplitude of an output signal! | According to the amplitude change of a first sawtooth wave.

Figure 2e illustrates an example of a sawtooth wave circuit.丨 Figure 3a illustrates the input / output conversion characteristics when the transistor has a small input. Signal in a conventional technique. Figure 3b illustrates the input / output conversion characteristics of a conventional technique when the transistor has a large input signal. Figure 4a illustrates a conceptual diagram of a conventional amplifier using a transistor amplifier circuit plus 1 | negative feedback. Figure 4b illustrates a conceptual diagram of an integrated circuit composed of a transistor and negative feedback using conventional techniques. Figure 4c illustrates a conceptual diagram of the distortion of the output waveform due to the negative feedback signal delay using conventional techniques.

Figure 5 illustrates the use of Class-D amplifiers, one of the conventional techniques. Figure 6 illustrates the operating waveforms of a Class-D amplifier, one of the conventional techniques. FIG. 7 illustrates a complete circuit diagram of an analog signal amplifier according to an example of the present invention.

Page 33 563293 Brief Description of Drawings Figure 8 illustrates a circuit diagram of a power amplifier device used in an analog amplifier according to an example of the present invention. Fig. 9 illustrates a circuit diagram of an amplifier capable of inputting a PWM signal according to the present invention. FIG. 10 is a block diagram illustrating a typical structure of a conventional digital device such as a CD player. FIG. 11 is a block diagram illustrating a structure of a PWM signal amplifier according to the present invention. FIG. 12 illustrates a block diagram of a digital data (PC signal) amplifier according to the present invention.

FIG. 13 illustrates a circuit diagram of a digital data (PCM signal) input amplifier according to the present invention. FIG. 14 is a graph for comparing and explaining a plurality of waveforms related to an analog output waveform according to the present invention; and FIG. 15 is a graph for explaining an analog input / output waveform relationship according to the present invention Drawing number 1 0 1 Sawtooth wave generating circuit 1 0 2 Comparator 1 〇 3 single-shot oscillator 1 0 4 buffer amplifier 1 0 5 analog switch 1 0 6 buffer amplifier

1 0 7 Push-pull power amplifier circuit 1 0 8 Low-pass filter 1 0 9 Output zero control circuit

Page 34

Claims (1)

1. An analog signal amplification method for an analog signal amplifier, the method comprising the steps of: outputting a first sawtooth wave having a frequency much larger than one of the maximum frequency of the input signal of the amplifier, and one of the maximum frequency of the input signal; The same or slightly larger amplitude and a predetermined period; comparing the first sawtooth wave with the input signal, and outputting a first pulse of a high potential when the amplitude of the first sawtooth wave is greater than the input signal; in the form of a single shot Output a second pulse with a narrow pulse width at the beginning of the high potential region of each of the first pulses; output a second sawtooth wave whose amplitude is equal to or slightly larger than one of the maximum amplitudes of the output signal of the amplifier, and The first sawtooth wave has the same period and phase; the starting position of the high potential region of each of the second pulse balances corresponds to the second sawtooth wave, and according to the starting point and the second sawtooth wave corresponding to the high potential region Voltage position, continuously generating an output voltage; and charging the generated voltage to a capacitor with a high-speed switch, stably maintaining the charging voltage therein and eliminating the output wave The valleys in the shape enable easy filtering. 2. —An analog signal amplifying method of a kind of analog signal amplifier, the steps of the method include: outputting a first sawtooth wave having a frequency much larger than one of the maximum frequency of the input signal of the amplifier, and one of the maximum frequency of the input signal; The same or slightly larger amplitude and a predetermined period; comparing the first sawtooth wave with the input signal at the first sawtooth wave Page 35 563293 ^ _Case No. 91108832_ Year and Month Amendment_ VI. The first pulse of a high potential is output when the amplitude of the patent application is greater than the input signal; in the form of a single shot, the high potential of each of the first pulses A second pulse with a narrow pulse width is output at the starting position of the zone; a second sawtooth wave is output, the amplitude of which is equal to or larger than one of the maximum amplitude of the output signal of the amplifier, and has the same period and phase as the first sawtooth wave ; Corresponding to the starting position of the high potential region of each of the second pulses to the second sawtooth wave, and continuously generating a first output voltage according to the starting point and the second sawtooth voltage position corresponding to each other in the high potential region; Output a third miscellaneous tooth wave which is opposite to the second data tooth wave; corresponding to the starting position of the high potential region of each second pulse to the third sawtooth wave, according to the starting point and the third sawtooth wave The third sawtooth wave voltage positions corresponding to each other continuously generate a second output voltage; the analog output is used to charge the generated first and second voltages to a capacitor, and the charging voltage is stably maintained therein and Eliminating the valleys in the output waveform enables easy filtering; and using the first and second output voltages to obtain an output signal with a magnitude twice. 3. The method according to item 1 or 2 of the patent application scope, further comprising a step of controlling the amplitude of the first sawtooth wave to adjust the gain of the amplifier. 4. The method of claim 1 or 2, further comprising a step of adjusting the amplitude of the first sawtooth wave using a second input signal far from the input signal, and modulating the amplitude of the input signal. 5. The method according to item 1 or 2 of the patent application scope, wherein the method is applied Page 36 563293 ----- No. 911〇883g-_year month g amendment Sixth, the scope of patent application for a semiconductor amplifier device. 6. The method of claim 3, wherein the method is applied to a semiconductor amplification device. > 7 The method according to item 4 of the scope of patent application, wherein the method is applied to a semiconductor amplification device. '8 · — A kind of sawtooth wave generating circuit is used in the type of signal amplification circuit. The circuit includes: a clock generator (7-A) for generating a clock; a second sawtooth wave generator (7-B) for The clock generator (7_ generated pulses are converted into positive and negative pulses) and the positive pulse is used in the output stage ^ capacitor (C3) discharge circuit (Q1) to obtain one of the output signal levels, continuing the second sawtooth wave, and Resetting the second sawtooth J ′ when a positive pulse is used to finally obtain the first sawtooth wave of an input signal level using the second sawtooth wave; and a third sawtooth wave generator (7-C) is used to reduce the first sawtooth wave The impedance of the two sawtooth waves in two rounds is driven by a buffer circuit (Q3) and a negative pulse generated by the clock generator at the same time to drive a ^ J circuit of the voltage level of a round to reset the voltage at each negative pulse. The ore tooth ^ obtains a continuous third sawtooth wave, wherein the third sawtooth is output with a lower output impedance due to a buffer path (Q6), thereby generating two sawtooth waves with the same period but opposite phases.: Application The circuit of item 8 of the patent, wherein the second saw The second output voltage level of the sawtooth wave generating capacity of the amplitude is attenuated to generate a sawtooth input signal of the first voltage level, which is the Page 37 563293 _Case No. 91108832_ Year Month Day Amendment __ VI. Patent Application Scope The second sawtooth wave has the same phase and period. 1 0 · The circuit of item 8 in the scope of patent application, further comprising a positive pulse circuit (IC2A) connected to an output of the clock generator (7-A) to output a positive pulse, and a negative pulse circuit (IC2B) is connected to the positive pulse to generate a negative pulse and is opposite to the positive pulse. A capacitor (C2) is connected to the positive pulse circuit (IC2A) with a capacitor discharge circuit Ql, Dl, R4 and forms a clamp ( CLAMP) circuit in the second sawtooth wave generator (7-B); and a capacitor (C4) is connected to the negative pulse circuit (IC2B) with a capacitor discharge circuit Q4, D2, R10 and forms a clamp (CLAMP ) Circuit in the third staggered wave generator (7-C), so that the supply voltage (+ -V2) of the second and third sawtooth wave generators (7-B, 7-C) can be changed to Conveniently change the maximum output of this amplifier. 11 · An analog signal amplification circuit uses a sawtooth wave generating circuit, which includes: a clock generator (7-A) for generating a clock; a second sawtooth wave generator (7 -B) for The pulse generator (7-A) generates a second sawtooth wave with an output signal level, and uses the second sawtooth wave to generate a first miscellaneous tooth wave with an input signal level; a third ore tooth wave generates The generator (7-C) generates a third sawtooth wave with an output signal level, which has an opposite phase to the second sawtooth wave generated by the second sawtooth wave generator (7-B); a comparator circuit (7 -D) An input connector IN and a comparator (IC3) are used to compare the signals generated by the second sawtooth wave generator (7-B). Page 38 563293 ___ Case No. 91108832_ Year B Amendment __ VI. Patent application scope The first sawtooth wave is input with an analog signal input through the input connector IN, and the first sawtooth wave signal is compared with the analog input. When the signal is high, a high-potential first pulse is output; a single-shot oscillator (7-F) regularly changes the shape of the first pulse generated by the comparator circuit (7-D) to generate a second pulse ' Its width is narrower than the first pulse; and an analog switch circuit (7-E) uses the second and third sawtooth waves generated by the second and third sawtooth wave generators respectively to generate a phase and the input signal The same analog output is used as the first output (P — οϋΤ) and an analog output with the opposite phase to the input signal is used as a second output (N-OUT). Wherein, the analog switch circuit 7-E includes: an analog switch 1 (A-SW1) for inputting the second sawtooth wave signal PTZ of an output level and in phase with the input signal; an analog switch 2 (A-SW2) Used to input an output level and communicate with the input The third sawtooth wave signal NTH in reverse phase; the first ripple compensation tool includes a capacitor (ci0) connected to the analog switch 1 (A-SW1) output connector and the first voltage dividing tool (TC2, C8) Dividing the third sawtooth wave (NTH), superimposing the divided voltage signal on the capacitor (C 1 0) to reduce and remove ripples; and the second ripple compensation tool includes a connection to the analog switch 2 ( A-SW2) The capacitor (C13) of the output connector and the first voltage dividing tool (TCI, C9) divides the second sawtooth wave (PTH), and divides this divided voltage signal. Page 39 563293 —Case No. 91108832_Year Month Day Amendment __ VI. Patent Application Scope Overlap to this capacitor (C1 3) to reduce and remove ripple. 1 3 · If the circuit in the patent application item 丨 丨, the power amplifier element (CBST1) is connected to the first output of the circuit with a low-pass filter (LPF1), and the output connector OUT is connected via a resistor (R31 ) Is connected to an inverting input connector (-) of the operational amplifier IC30, a capacitor (C31) is connected between the inverting input (-) and the output of the operational amplifier and a resistor (R30) is connected to the operational amplifier ( 13〇) output terminal and the base of the transistor (& 330), and feedback a DC component with a high time constant composed of resistance {{31 and capacitor 〇31, to control the power amplifier's output connector (OUT ) The electromotive force is constant at 0v. 1 4 · According to the circuit of the scope of application for patent application item 丨 丨, in the case where the first pulse regularly forms the second pulse in the single-shot oscillator 7-F, in the single-shot oscillator 7-F A delay time (Tplh) occurs between the input and output during the second sawtooth wave from the highest point to the lowest point. A high potential masking pulse advances the delay time (Tp 丨 h) from this time point and supplies it to The reset connector (RESET) of the single-shot oscillator IC4 prevents the second pulse from being output, and prevents the output voltage from suddenly reversing when the first pulse input is close to the maximum value of the input signal. 15 · The circuit of item 11 in the scope of patent application, wherein if the first sawtooth wave of an input signal level and an input signal of an input terminal 1 ^ 1 generate the first pulse in a comparator I C3 As an output time point, there is a time delay between the time point at which the single-pulse oscillator I C4 regularly generates the second pulse width output, and the output captured by the analog switch circuit 7-E can be used. The delay time delays the sawtooth wave drive pulse, and Page 40 563293-Case No. 91108832__Year Month J_Μι__ VI. Patent Application Range The delayed driving pulse generates an output-level sawtooth wave to correct the maximum output voltage without distortion. 16 · —Amplifier for inputting a PWM signal 'The amplifier includes: a rising area detector (9-B) detects a rising area of the PWM signal and generates a high-potential pulse in one of the rising areas of the PWM signal ; A falling area detector (9-B) detects the falling area of the PWM signal and generates a high-potential pulse in one of the falling areas of the PWM signal; a sawtooth wave generator (9-D) detects by the rising area The high-potential pulse of the detector is activated to generate a sawtooth wave of an output level; a single-shot oscillator (9-E) regularly forms the high-potential pulse of the falling area detector into a narrower pulse; and a switch The circuit (9-F) is turned on by the narrow pulse formed by the single-shot oscillator (9-E) and charges a capacitor with the sawtooth wave generated by the sawtooth wave generator (9-D), thereby generating a continuous and smooth Analog signal. 1 7 · —An amplifier for inputting a digital signal output by a digital signal output device, which digitally processes an analog signal and outputs digital data. The amplifier includes: Take a child's shell •, a w / into the ground》 Wang Pingwu u 3 —, which is used to analyze the digital signal control signal type including a right signal, left signal, control signal, etc. to output the signal after analysis; w a storage comparator (13-C), which is Use the age digital data control and processing unit (丨 3 ^ ^ wavelet to compare the control signal generated by the flat U d — β) to identify a high-potential pulse corresponding to an analog signal value; (13-E), which is used to store the comparator Page 41 563293 _ Case No. 91108832 ^ __ VI. The starting position of the high-potential signal generated by the patent application scope (13-C) forms a sawtooth wave generation and reset circuit (13-D), the control and processing unit ( 13-B) sends a high-potential start signal to generate and reset a sawtooth wave; an analog switch (1 3 -F), which is used to control the narrow pulse formed by (13-E), using the sawtooth wave production ( 1 3-D) of the sawtooth wave, which captures a voltage corresponding to the saw's charge and hold capacitors C54, C5 6 for a continuous and smooth analog signal. 18 · The amplifier according to item 16 of the patent application, which is placed in a semiconductor amplifying element. 19 · The amplifier according to item 17 of the patent application scope, which is placed in a semiconductor amplifying element. 20. An amplifier comprising: a sawtooth wave generating tool for generating the first sawtooth amplitude that is greater than an input signal; and a second sawtooth first sawtooth wave having the same amplitude as the first sawtooth wave comparison tool for comparing The input signal and the first voltage value, and when the first sawtooth voltage value is greater than the high potential voltage signal; and a sample / hold tool, when the high potential voltage signal appears, detect and maintain the first 21. A kind of amplifier of two sawtooth waves, including: the edge detection tool is used to correct a narrow pulse by measuring pulse width modulation; using the digital data pulse and a data J to generate and reset the single-shot oscillator The voltage of the circuit tooth wave generates a voltage which is connected to the amplifier system and the amplifier system. The frequency and the frequency are the same as those of the amplifier, and a voltage is inputted to the comparison tool when a signal of the electrical input of the tooth wave is generated. value. Up and down 563293 _Case No. 91108832_ Modification of the month of the year _ 6. Apply for a patent to reduce the edge; The sawtooth wave generating tool is used to generate a sawtooth wave with the same period as the rising edge; The sampling / holding tool is used to detect the falling edge And maintain a voltage value of the sawtooth wave. (22. A type of amplifier, including: a sawtooth wave generating tool for generating a sawtooth wave having the same period as a pulse code modulation signal of one of the contained data; a comparison tool for comparing a pulse code modulation signal containing the data Value and a count value obtained after counting a clock signal for a predetermined period, and outputting a high potential voltage signal when the count value is greater than the data value; and a sampling / holding tool, when the high potential voltage signal is in the comparison When present in the tool, detect and maintain a voltage value of the sawtooth wave. Page 43