TW554650B - Lamination method of eight-layered circuit board and the product thereof - Google Patents

Abstract

The present invention provides an eight-layered circuit board in which the 2nd and 7th layers are the grounding layers, the 5th layer is the power layer, the 1st, 3rd, 4th, 6th and 8th layers are the signal line layers. The circuit further has a 1st insulation layer located between the 4th and 5th layers of the said circuit board; two 2nd insulation layers located between the 3rd-4th, and the 5th-6th layers of the said circuit board respectively; two 3rd insulation layers located between the 2nd-3rd, and the 6th-7th layers of the said circuit board respectively; two 4th insulation layers located between the 1st-2nd, and the 7th-8th layers of the said circuit board respectively. Its feature is that the thickness of the 1st, 2nd, and the 3rd insulation layers is within 3-9 mil, and the thickness of the 4th insulation layer is within 2.5-6.5 mil. The impedances among each signal line layers are matched, so as to achieve the effect of reducing the reflection and electromagnetic wave interference of high-speed signal, and applications in high-speed signal.

Description

554650 A7 _____________ B7__ 5. Description of the invention (1) The present invention provides an eight-layer circuit board pressing method and its finished product, especially refers to an eight-layer circuit board that reduces the reflection and electromagnetic wave interference of high-speed signals and is suitable for high-speed signals. By. According to the general traditional eight-layer circuit board, taking the industry standard thickness 5 of the circuit board as 1.2mm, the arrangement of the layers is as shown in the first figure. The first, third, fourth, sixth, and eighth of the circuit board The layers are the signal routing layers SI, S2, S3, S4, and S5, the second and seventh layers are the ground layer GND1, GND2, and the fifth layer are the power supply layer Power, and the first and eighth layers are also parts layout layers; Among them, the fourth layer and the fifth layer are separated by a first insulating layer with a thickness of 8 mil, H1, and the fourth layer is separated from the third layer, and the fifth layer and the sixth layer are separated from each other. A second insulating layer H2 with a thickness of 5 mil is pressed, and the third layer is pressed with a third insulating layer H3 with a thickness of 8 mil between the second and sixth and seventh layers, and the second layer is pressed. A fourth insulating layer H4 with a thickness of 2.5 mils is pressed together with the first layer, the seventh layer, and the eighth layer, respectively. Generally speaking, the first insulating layer H1 and the third insulating layer H3 are Is the base material, and the material of the second and fourth insulating layers H2 and H4 is a film (prepreg; Pp ·); 浐 中 中 呔 ii. ^ F ^ h 5 please Read the notes on the back and rewrite this page} And the combination of the layers as described above will make the impedance of the first layer of the circuit board to the second layer GND1 of the circuit board RS1 = the eighth layer of the circuit board S5 The resistance value RS5 and 44 ohms for the seventh layer GND2 of the circuit board, the second layer GND1 of the circuit board S2 and the second layer GND1 of the circuit board and the resistance value Rs2 of the circuit board's jade layer P0wef = The fourth layer S3 is the resistance value Rs3 and 55 ohms of the second layer of the circuit board and the fifth layer of the power of the circuit board. The sixth layer S4 of the circuit board is the fifth layer of the circuit board and the fifth layer of the power and the second wall of the circuit board. The impedance value of GND2 is Rs4 and 51 ohms. From this we can see that 'Page / Page 4 ___- ------------------- This paper standard applies to Chinese national standards (CNS) A4 specification (210X297 mm) 554650 A7 B7 V. Description of the invention (2) (Please read the precautions on the back before filling this page} S1 (outer board) and eighth layer S5 (outer board) impedance values Rsi and Rs5 are 11 ohms away from the resistance values RS2 and Rs3 of the third layer S2 (inner board) and the fourth layer S3 (inner board), and the impedance difference between this inner and outer board will be Impedance mismatch, so that when a high-speed signal is transmitted in this circuit board, the high-speed 5 signal passes from the outer layer, that is, the part layout layer (such as the first layer or the eighth layer) to the inner layer (such as the third layer) Layer board or fourth layer board), it will cause the signal reflection of the high-speed signal, resulting in poor signal transmission quality; here we can calculate the reflection coefficient of the high-speed signal as P Q = 111; and,

Zl + Zo Rs \ + Rs2 Because the reflection of the high-speed signal will generate a standing wave, and the standing wave will strengthen the electromagnetic wave radiation of the high-speed signal, causing its magnetic flux cancellation effect to deteriorate, resulting in excessive electromagnetic interference. Therefore, if the first, third, fourth, and eighth layers of the circuit board can be the signal routing layers SI, S2, S3, and S5, the relative impedance values Rsl, Rs2, Rs3, and Rs5 are closer or the same, which will reduce the reflection coefficient, and further Reduce electromagnetic wave interference. 15 In addition, when this circuit board is used for high-speed signals, the impedance design of its transmission line, that is, the layer-to-layer impedance value, according to the specifications set by Intel, the theoretical value should preferably be 55Ω ± 10%, That is, it is preferably between 49 · 5 Ω ~ 60.5Ω, but the outer layer resistance value Rsl (Rs5) = 44Q calculated by the conventional circuit board, the inner layer resistance value Rs2 (Rs3) = 55Q, Rs4 = 51Q, 20 of which The outer layer impedance is far beyond this range and is not suitable for high-speed signals. Therefore, if the first, third, fourth, sixth, and eighth layers of the circuit board are used as the signal routing layers S2, S3, S4, and S5 The relative impedance values of Rs, Rs2, Rs3, Rs4, and Rs5 will be more suitable for high-speed lines in this range, thereby improving the use of the product. Page 5 This paper applies the Chinese National Standard (CNS) A4 specification (210X: 297 mm ) 554650 5. Description of the invention (3) When the layout is made, the impedance is controlled, so when the traces are routed to different layers, there is no need to change the trace width to match the impedance and improve the timeliness of the layout. The known disadvantage is that the inventor has accumulated many years of experience in the industry ' Extremely engaged in research, and finally the invention of the "disposable 5-composite method of eight-layer circuit board and its finished product". The main purpose of this month is to provide an eight-layer circuit board press-fitting method and its finished product, so as to reach all layers The impedance matching of the signal routing layer can further reduce the reflection of high-speed signals and the interference of electromagnetic waves and the effect applicable to high-speed signals. 1. The characteristics of the present invention are that the thickness of the first, second, and third insulation layers is between 3 and 3. Within 9 to 1 range, and the thickness of the fourth insulation layer is in the range of 2.5 to 6.5 mils, so that the impedance matching of these signal trace layers can be achieved, thereby reducing the reflection and electromagnetic interference of high-speed signals and applying to The effect of high-speed signals. 15 il A il \\ X eliminates i: a bamboo a 卬% 20 (诮 read the precautions on the back before filling this page) In order to achieve the above purpose, the present invention is an eight-layer circuit board For the lamination method, the second and seventh layers of the circuit board are ground layers, the fifth layer is a power layer, and the first, third, fourth, sixth, and eight layers are signal routing layers. The method includes the following: Step: a · Fourth of the above circuit board The layer is laminated with the fifth insulating layer with a first insulating layer having a thickness in the range of 3-9mil; b. The two surfaces of the laminated circuit board in step a are separated by a thickness of 3 The second insulation layer in the range of -9mi 1 is assembled with the third and sixth layers of the above-mentioned circuit board; c. The two surfaces of the pressed circuit board in step b are separated by a thickness in the range of 3-9mil. The third insulation layer is laminated with the second and seventh layers of the above circuit board, and d. The two surfaces of the circuit board that have been pressed in step c are separated by ____m. This paper size applies to Chinese National Standard (CNS) A4 specifications ( 210X297 mm) 554650 A7 -------------- B7__ V. Description of the invention (4, ~ " ------ ~ The -thickness within the range of 2.5-6.5mil The four insulating layers are laminated with the first and eighth layers. Taking the above method, the present invention is an eight-layer circuit board, wherein the first and seventh layers of the circuit board are ground layers, the fifth layer is a power layer, and the first four, six, and eight layers are signals. Wiring layer, the circuit board includes: a first insulating layer, located between the fourth and fifth layers of the above circuit board, and its thickness is in the range of 3-9mil; two second insulating layers, respectively located The thickness of the third and fourth layers of the circuit board above and between the fifth and sixth layers are in the range of 3-9 mils; the two third insulation layers are located on the second and tenth layers of the circuit board, respectively. Between the third layer, the sixth layer and the seventh layer, and their thicknesses are in the range of 3-9mil; and the two fourth insulation layers are respectively located on the first layer and the second layer and the seventh layer of the circuit board and Between the eighth layer, and its thickness is in the range of 2 · 5-6 · 5mil. Regarding the technical means adopted by the present invention to achieve the above-mentioned objects and features, and its effects, the preferred embodiments are illustrated with drawings to illustrate the following: The first diagram is a conventional press-fitting between layers of an eight-layer circuit board and The schematic diagram of the thickness, the second diagram is a schematic diagram of the compression and thickness between the layers of the preferred embodiment of the present invention; 20 the third diagram is a partial diagram of the preferred embodiment of the present invention; the fourth diagram is a diagram of the preferred embodiment of the present invention Partial schematic diagram; and the fifth diagram is a partial schematic diagram of a preferred embodiment of the present invention. Drawing number comparison table: GND1, GND2 Ground layer Power supply layer __ Page 7 This paper size is suitable for China National Standard (CNS) A4 specification (210X297 mm) " "-----; —— #! (Please read the precautions on the back before filling in this page j Ding-kou 554650 A7 B7 V. Description of the invention (5) SI, S2, S3, S4, S5 signal wiring layer HI, H2, H3, H4 insulation layer Thickness First, please refer to the second figure, the present invention is an eighteen-layer circuit board, wherein the second and seventh layers of the circuit board are ground layers GND1, GND2, and the fifth layer is the power layer Power, and The first, third, fourth, sixth, and eighth layers are the signal routing layers SI, S2, S3, S4, and S5, and the first layer S1 and the eighth layer S5 of the circuit board are also arranged for power supply sub-components, and the signal goes The wire layers SI, S2, S3, S4, and S5 mostly use copper and platinum. In addition, the circuit board further includes: a first insulating layer between the fourth layer and the fifth layer of the circuit board, and two series at 10 The second insulating layer between the third and fourth layers of the circuit board and the fifth and sixth layers, and two of the second and third layers of the circuit board and A third insulating layer between the sixth and seventh layers, and two fourth insulating layers between the first and second layers of the circuit board and the seventh and eighth layers, respectively, wherein the first An insulation layer and a third insulation layer are a thin core, and the second insulation layer and the fourth insulation layer are a prepreg. The i?. ^-X; hT Eliminate it (please read the precautions on the back before filling out this page) As mentioned above, the relative impedance values of the signal routing layers SI, S2, S3, S4, and S5 of the circuit board are the best Equal or similar, and preferably within the range of 49.5 to 60.5 ohms of high-speed line theoretical impedance specified by Intel, the inventor found that each of the signal wiring layers 20 SI, S2, S3 can be changed by changing the thickness of each insulating layer The relative impedance values of S4, S4, and S5 change accordingly, thereby achieving the purpose of impedance matching of each layer. In addition, due to the pressing method of the eight-layer circuit board, the first insulating laminate is sandwiched between the fourth layer and the fifth layer. Then, a second insulating layer is sandwiched between the third and fourth layers and the fifth and sixth layers, respectively. Between the second and third layers, and between the sixth and seventh layers, respectively_ ^ 81_ This paper size applies the Chinese National Standard (CNS) A4 specification (210X29 * 7 mm) 554650 A7 B7 L, Description of the invention ( 6) A third insulating laminate is sandwiched, and finally a fourth insulating layer is sandwiched between the first and second layers and the seventh and eighth layers, respectively, and then pressed to form an eight-layer circuit board. Therefore, in general, in order to facilitate symmetry compression, manufacturers usually design the two second insulation layers to have the same thickness, the two third insulation layers to have the same thickness, and the two fourth insulation layers to have the same thickness, which is not only more convenient in manufacturing, It is also more in line with the current manufacturing methods, so the inventor has improved the thickness of the insulating layer based on the above considerations. ίο To make the present invention easier to understand, the R & D process of the present invention is roughly explained by the following formula, but it should be noted that the following description is for the industry standard board thickness of eight-layer circuit board is L2mm, but The implementation of the present invention should not be limited to eight-layer circuit boards with a thickness of 1.2mm: 15 (please read the precautions on the back first and then this page) First, please refer to the third figure, the relative impedance value of the outer layer of the circuit board is The resistance value R1 of the first signal wiring layer S1 relative to the ground layer GND1 (also the resistance value R5 of the fifth signal wiring layer S5 relative to the ground layer GND2). The appropriate thickness H4 of the fourth insulation layer can be set before use The following formula 1 is used to find the resistance value R1 (or R5. In this embodiment, because the two fourth insulation layers have the same thickness, R1 = R5) R1 = 87 _ | η (5.98H4) ^ R + 1.41 | 〇.8W + Tl! • Formula 1 where: ER = dielectric constant = 4.5 H4 = = thickness of the fourth insulation layer 20 W = line width = can be in the range of 2 ~ 8mi 1, in this embodiment the line width is 5mi 1 T1 = Thickness of the first signal trace layer S1 = 1.4 mil. In this embodiment, the thickness of each layer of the circuit board is excluded ( Page 9 for the paper scale applicable state China National Standard (CNS) A4 size (210X297 mm) A7

554650 V. Description of the invention (7 The first signal trace layer S1 and the fifth signal trace layer S5) The thickness is, in addition, the thickness of each layer is Q.7mil, please refer to the fourth picture The two adjacent signal routing layers S2, S3 between the ground layer GND1 and the power layer Power, and the relative impedance R2 of the second signal routing layer S2 relative to the ground layer 5 and the power layer Power (also the third Signal trace layer% relative to the relative impedance R3 of the power layer Power and the ground layer GND), the same thickness of the second insulation layer H3 and the thickness of the second insulation layer and the thickness HI of the first insulation layer can also be set first. When the thickness of the third insulating layer H3 is the same, and then assume the values of H2 and H3, then use the following formulas 2 and 3 to find the resistance 10 impedance value R2 (or R3, because in this embodiment, R2 = R3): ( (Please read the notes on the back before filling this page) Φ R2 2YZ Y + Z Formula 2

. 丁 J.SU: ¾¾ • Ministry ^ il ^-^ h T · Consumer Cooperation Private Printing 15 • Formula 3 where: ER = dielectric value coefficient = 4.5 H3 = thickness of the third insulation layer = H1 H2 = The thickness of the second insulation layer T2 = the thickness of the second signal trace layer == 〇7mil = the thickness of the third signal trace layer W = line width = can be in the range of 2 ~ 8mil, in this embodiment the line width is 5mi 1 page ίο The paper size applies to Chinese National Standard (CNS) A4 (210X297 mm) 554650 A7 B7 V. Description of the invention (8)-Furthermore, please refer to the fifth figure, when the signal wiring layer is lost In the case of a power supply layer ρo and a ground layer GND, that is, the case of the fourth signal wiring layer s4 ', assuming the thicknesses of the second and third insulation layers H2 and H3, and then use the following formula 4 for calculation Find the impedance of the fourth signal trace layer relative to the ground layer 5 Power and the ground layer GND2 R4:

R4:-^ 2 = rlll · VER 4 (H2 + H3) 0.67πΨ 0.8 + Τ2 w7… · Equation 4 where 10 15 20 ·· ER = dielectric value coefficient = 4.5 5 H3 = thickness of the third insulation layer Η2 = The thickness of the second insulating layer T2 = also the thickness of the fourth signal wiring layer W = line width == can be in the range of 2 ~ 8mil, in this embodiment the line width is 5mil 2Η4 + 2Η3 + 2Η2 + 1Η1 + 2Ή + 6T2 three 48mil ..... male, in this embodiment, the total thickness of the circuit board must be h 2mm (that is, 48mil) or within its error range. It can also be said that as shown in Equation 5, the inventor uses The above method finds a preferred embodiment of the present invention, that is, when the thickness H1 of the first insulation layer is in the range of 3-9mil, it is better here that H1 = 6mil, and the thickness of the second insulation layer H2 is in the range of 3-9mil. Within the range, H2 = 6mil is preferred, the thickness of the third insulation layer H3 is in the range of 3-9mU, H3 = 6mil is preferred, and the thickness of the fourth insulation layer H4 is in the range of 2.5-6.5mil, with H4 = 4.5mil as In this case, the resistance value of the first signal wiring layer S1 relative to the ground layer GND1 Ri = the fifth signal wiring layer 邡 the resistance value of the first signal wiring layer S5 to the ground layer GND2 R5 = 58 ohms, and the second signal wiring layer S2 In addition to

-----! — #! (Please read the notes on the back before filling this page)

-rIT Haobu Zhongrong «. and h 5 consumer Hezhu it 554650 A7 B7 V. Description of the invention (9) The relative impedance of the ground layer GND1 and the power layer Power R2 = the third signal routing layer S3 relative to The relative impedance of the power layer Power and the ground layer GND1 is R3 = 57 ohms, and conforms to 2H4 + 2H3 + 2H2 + 1H1 + 2T1 + 6T2 = 2X4.5 mil + 2x6 mil + 2x6 mil + lx6 mil + 2xl.4 mil + 6x0. 5 范围 内。 7 mil 5 = 46mil and 1.2mm (within tolerance) and each impedance value within the high-speed line theoretical impedance specified by Intel 49.5 to 60. 5 range. In summary, because the present invention has the following advantages: 1. Reduce the reflection of high-speed signals: Because R1 = R5 = 58 ohms and R2 = R3 = 57 ohms in this embodiment, the reflection coefficient is 10 0.087 close to 0, and compared with the conventional reflection coefficient of 0.111, the present invention can better achieve that the high-speed signal does not reflect, and is more suitable for high-speed signal walking. 15 2. Reduce electromagnetic wave interference: Because the reflection coefficient is close to 0, high-speed signals will hardly be reflected, and no standing wave will be generated, making the magnetic flux cancellation effect very good, which meets the EMI standards required by the society today. 20 3. Applicable to high-speed signals: because the reflection of high-speed signals is reduced, that is, the electromagnetic wave interference is reduced, so that high-speed signals will not cause problems during walking, which is in line with the current trend of manufacturing industries toward high-speed signals. Page 12 This paper size applies to Chinese National Standard (CNS) A4 (210X297 mm) (Please read the precautions on the back before copying this page)

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high. 4. Improving the timeliness of the layout: In the case of routing, when the wiring runs from the outer layer to the inner layer, because the thickness of each insulating layer and the relative impedance of the inner and outer layers have reached impedance matching, there is no need to change the wiring. The line width 'can achieve the effect of impedance control, and then the timeliness of the layout. To sum up, the "pressing method of eight-layer circuit board and its ten products" of the present invention can indeed achieve the desired purpose and effectiveness through the structures and devices disclosed above. The material has not been used publicly, which meets the requirements of novelty and progress of the invention patent. However, the formulas and descriptions disclosed above are only examples of the present invention, and are not intended to limit the implementation of the present invention; anyone who is familiar with the technology, 15 does other things based on the characteristics of the present invention, Equivalent changes or modifications should be covered by the scope of patent application in the following case. -----! — #! (Please read the notes on the back before filling this page)

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Page 13 This paper size applies to China National Standard (CNS) Α4 specification (210X297 mm)

Claims (1)

554650 A8 B8 C8 ry 嗲 正 毛 (Amendment _ • 10.22) D8 VI. Patent Application No. 88114636 Patent Application No. 46 and 1_ An eight-layer circuit board pressing method. The second and seventh layers of the circuit board are ground layers. The fifth layer is the power supply layer, and the eighth layer is the signal routing layer. The method includes the following steps: a. The fourth layer of the above circuit board is separated by a first layer with a thickness in the range of 3 to 8 mils. The insulation layer is laminated with the fifth layer of the above circuit board; b. The two surfaces of the circuit board that have been pressed in step a are separated by a first insulation layer having a thickness in the range of 3-8 mils from the first layer of the above circuit board. Two and six laminations; c. The two surfaces of the pressed circuit board in step b are laminated to the second and seventh laminations of the above circuit board with a third insulating layer having a thickness in the range of 3-8mil, respectively. ; And d. The two surfaces of the circuit board that have been pressed in step c are laminated with the first and eighth layers of the circuit board via a fourth insulating layer having a thickness in the range of 2.5-5.5 mil, respectively. 2 · The method for laminating an eight-layer circuit board as described in item 1 of the scope of patent application, wherein the first and third insulation layers in the steps a and c are thin cores. 3 · As the scope of patent application The pressing method of the eight-layer circuit board according to item 2, wherein the second and fourth insulating layers in steps b and e are prepreg ° 4. As described in item 1 or 2 or 3 of the scope of patent application An eight-layer circuit board pressing method, in which the thickness of the circuit board is in the range of 0. 7-1. 4mm. 5. The pressing method of the eight-layer circuit board according to item 4 of the scope of patent application, wherein the thickness of the circuit board is 1.2 mm. This paper size applies the Chinese National Standard (CNS) A4 specification (21 × 297 mm) Page 14 554650 A8 B8 C8 D8 22) 6. According to the pressing method of the eight-layer circuit board described in item 5 of the scope of the patent application, the thickness of each of the β-Hydrogen four insulation layers in the eighth is 4 · $ m 丨 1. 7. The pressing method of the eight-layer circuit board as described in item 6 of the scope of the patent application. The thickness of each of the second insulating layers in the eighth member is 6 m i 1. 8. The method for laminating an eight-layer circuit board according to item 7 of the scope of the patent application, wherein the thickness of each of the second insulating layers is 8 mil. 9. The method of laminating an eight-layer circuit board according to item 8 of the declared patent scope, wherein the thickness of the first insulating layer is 6 mi 1. 1 0 · —An eight-layer circuit board, in which the second and seventh layers of the circuit board are ground layers, the fifth layer is a power layer, and the first, third, fourth, sixth, and eight layers are signal routing layers. The circuit board includes: a first insulating layer, located between the fourth and fifth layers of the circuit board, and its thickness is in the range of 3-8mil; two second insulating layers, respectively located above Between the third and fourth layers of the circuit board, and between the fifth and sixth layers, and their thicknesses are in the range of 3-8mil; the two third insulation layers are located on the second and first layers of the circuit board, respectively. Between the three layers, the sixth layer and the seventh layer, and their thicknesses in the range of 3-8 mil: and two fourth insulation layers, which are respectively located on the first layer, the second layer, the seventh layer, and Between the eighth layer and its thickness in the range of 2.5-5. 5m il. 11 · The circuit board as described in item 10 of the scope of patent application, wherein the first and third insulation layers are thin cores. This paper size applies the Chinese National Standard (CNS) A4 specification (210x 297 mm) Page 15 554650 戠 ___ VI. Application for Patent Scope No. 88114636 Amendment of the scope of patent application (Amendment date: 91.1〇.22) 1 2 · The circuit board according to item 1 of the patent application scope, wherein each of the second and fourth insulation layers is a prepreg. 13. The circuit board according to item 10 or 丨 丨 or 12 of the scope of patent application, wherein the thickness of the circuit board is in the range of 0.7 to 1.4. 14. The circuit board according to item 13 of the scope of patent application, wherein the thickness of the circuit board is 1.2 mm. 5mi 1。 15. The circuit board according to item 14 of the scope of patent application, wherein the thickness of each of the fourth insulating layers is 4. 5mi 1. 16. The circuit board according to item 15 of the scope of patent application, wherein the thickness of each of the third insulation layers is 6 mi i. 17. The circuit board according to item 16 of the scope of patent application, wherein the thickness of each of the second insulating layers is 8 mils. 1 8 · The circuit board according to item 7 of the scope of patent application, wherein the thickness of the first insulating layer is 6 mil. This paper size applies to China National Standard (CNS) A4 (2l0X 297mm) Page 16