TW552694B - Wiring substrate, semiconductor device and the manufacturing method thereof - Google Patents

Wiring substrate, semiconductor device and the manufacturing method thereof Download PDF

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Publication number
TW552694B
TW552694B TW090121689A TW90121689A TW552694B TW 552694 B TW552694 B TW 552694B TW 090121689 A TW090121689 A TW 090121689A TW 90121689 A TW90121689 A TW 90121689A TW 552694 B TW552694 B TW 552694B
Authority
TW
Taiwan
Prior art keywords
wiring
manufacturing
conductor
patent application
scope
Prior art date
Application number
TW090121689A
Other languages
Chinese (zh)
Inventor
Naoki Fukutomi
Kazuhisa Suzuki
Osamu Shimada
Kazumasa Takeuchi
Yoshiaki Wakashima
Original Assignee
Hitachi Chemical Co Ltd
Hitachi Metals Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd, Hitachi Metals Ltd filed Critical Hitachi Chemical Co Ltd
Priority to TW090121689A priority Critical patent/TW552694B/en
Application granted granted Critical
Publication of TW552694B publication Critical patent/TW552694B/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Manufacturing Of Printed Wiring (AREA)

Abstract

The present invention relates to an insulative substrate, semiconductor device using the wiring substrate and the manufacturing method thereof, wherein wires are disposed on one side of the insulative substrate. The insulative substrate has buried conductor inside. One end of the conductor is connected to the wires exposed out of the surface on the insulative substrate, and the other end of the conductor is buried into the wiring substrate in the insulative substrate.

Description

552694 A7 B7 五、發明説明（1) 發明說明 技術領域 本發明係有關配線基板、半導體裝置及此等之製造方 法。 先行技術 爲提高半導體的聚集度.，輸出入之接線端數已有增加 。因此’半導體裝置有必要具較多輸出入之接線端數。一 般之輸出入接線端以一列型配置於組件週邊，或以多列型 配B於週邊甚至於內部。前者以Q F P ( Quad Flat Package )四面封裝爲代表。將此轉爲多接線端時，接線端的間隔 有必要縮小。間隔在〇 · 5 m m以下的領域，配線板的連 接須高度的技術。後者之矩陣型可配置間隔較大的接線頭 ，適於複數化接線柱。 向來矩陣型一般爲具接線柱的PG A (Pin Grid Array )，與配線板的連接爲插入型，不適於表面安裝。因此， 開發可以表面安裝的所謂B G A ( Ball Grid Array )組件。 B G A可分類爲（1 )陶瓷型、（2 )印刷配線板型及（ 3 )使用丁 A B (tape automated bonding)的膠帶型。在 其中，有關陶瓷型與向來的P GA比較時由於母板與組件 間的距離較短，母板與組件間的熱應力較差而引起的組件 扭曲爲嚴重的問題。又，有關於印刷配線板型亦有基板扭 曲、耐濕性、信賴性等加上基板厚度較厚的問題，而建議 使用適用TAB技術的膠帶BGA。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ----1---Λ----^^裝-- (請先閱讀背面之注意事項再填寫本頁) 訂552694 A7 B7 V. Description of the Invention (1) Description of the Invention Technical Field The present invention relates to a wiring substrate, a semiconductor device, and a manufacturing method thereof. Prior technology In order to improve the concentration of semiconductors, the number of input and output terminals has been increased. Therefore, it is necessary for the 'semiconductor device to have a larger number of input and output terminals. Generally, the input and output terminals are arranged in a row in the periphery of the module, or multiple rows are arranged in the periphery and even inside. The former is represented by Q F P (Quad Flat Package). When converting this to a multi-terminal, the terminal spacing must be reduced. In areas with an interval of 0.5 m or less, the connection of wiring boards requires high-level technology. The latter's matrix type can be configured with larger spacing terminals, which is suitable for pluralizing terminal posts. The conventional matrix type is generally PG A (Pin Grid Array) with terminals, and the connection to the wiring board is plug-in type, which is not suitable for surface mounting. Therefore, a so-called B G A (Ball Grid Array) component that can be surface-mounted is developed. B G A can be classified into (1) ceramic type, (2) printed wiring board type, and (3) tape type using D A (tape automated bonding). Among them, when the ceramic type is compared with the conventional P GA, the distortion of the module caused by the short distance between the motherboard and the module and the poor thermal stress between the motherboard and the module is a serious problem. In addition, the printed wiring board type also has problems such as substrate warpage, moisture resistance, reliability, etc., and a thick substrate, and it is recommended to use TAB tape BGA. This paper size applies to Chinese National Standard (CNS) A4 specification (210X297mm) ---- 1 --- Λ ---- ^^ installed-(Please read the precautions on the back before filling this page) Order

經濟部智慧財產局員工消費合作杜印製 -4- 552694 A7 B7 五、發明説明（2) 爲對應尺寸更小型化的組件，建議使用約略與半導體 元件同等尺寸，所謂元件尺寸組件（CSP: Chip Size Package )。此並非在半導體元件的週邊部份，而係安裝範圍內具 與外部配線基板連接部的組件。 具體的說，使具突出物的聚醯亞胺薄膜與半導體元件 的表面粘貼，由元件與金導線取得電路的連接後，以環氧 樹月旨封裝的產品（NIKKEI MATERIAL & TECHNOLOGY 94. 4，No. 140，P18-19)，或在假設基板上相當於半導體元件 與及外部配線板的連接部位置形成金屬突出物，半導體元 件以壓伏粘貼後，於假設基板上移轉注模者（Smallest Flip-chip-like package CSP; The second VLSI package workshop of Japan，p46-5 0,1 994 ) 一方面，檢討如上述利用B G A或C S P領域以聚醯 亞胺薄膜爲基層薄膜的組件，此時，一般的聚醯亞胺膠帶 係於聚醯亞胺薄膜上介入粘著劑與銅箔層壓所成者，以耐 熱性或耐濕性的觀點來看，在銅箔上直接形成聚醯亞胺層 ，即所謂二層可撓性基材較爲理想。 關於此二層可撓性基材的製造方法，可分爲①於銅箔 上以聚醯胺的先驅物聚醯胺酸POLYAMIC ACID塗覆後熱 硬化的方法、②於硬化後的聚醯亞胺薄膜上以真空成膜法 或無電解電鍍法等金屬薄膜成形方法的二大分別。 二層可撓性基材，例如雷射加工適用將聚醯亞胺薄膜 的希望部份除去形成達到銅箱的凹形部時，聚醯亞胺薄膜 的理想厚度儘可能薄。反之，二層可撓基材加工成框架導 本紙張尺度Ϊ用中國國家標準（CNS ) A4規格（210X297公釐) ~ ' — (請先閱讀背面之注意事項再填寫本頁) 1·裝. 訂 經濟部智慧財產局員工消費合作社印製 552694 經濟部智慧財產局員工消費合作社印製 A7 ___B7五、發明説明（3) 線狀操作時，基層薄膜的厚度太薄時欠缺操作性或作爲框 架的剛直性等問題。 如上述能對應半導體裝置的小型化高集成度化，有種 種的提案，希望能更進一步全面改善性能、特性、生產性 等。 發明揭示 本發明係提供能對應半導體裝置（半導體組件）的小 型化、高集成度化，具良好的生產性且安定製造的半導體 元件搭載用配線基板、使用該基板的半導體裝置及此等的 製造方法爲目的。 本發明係提供絕緣基材，設置於該絕緣基材的表裏之 一面備有配線的配線材料、該絕緣基材內備有埋入的導體 構件，導體材之一端與露出絕緣基材表面的配線連接，他 端埋入絕緣基材內之配線基板。又，本發明的配線基板、 可在該絕緣基材的的另一面（即表裏中沒露出導線構件的 一面）設有支撐構件。 更且，本發明提供絕緣基材、及該絕緣基材的表裏的 一面具有配線的配線構件、該絕緣基材的的另一面設有支 撐構件的配線基板。此配線基板亦可備有埋入該絕緣基材 內連接配線的.導體構件，亦可不備導體構件。備有導體構 件時一端必需與配線連接，他端亦可用絕緣基材被覆，支 撐材與導體構件的蝕刻的條件相異時，導體構件的他端可 達支撐構件。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) 裝· 訂 麵 l#v— · 552694 A7 B7 五、發明説明（4) 又，本發明提供上述本發明的線基板的製造方法爲 (請先閱讀背面之注意事項再填寫本頁) ()以表裏之一面備有突出狀的導體構件、與絕緣 基材以導體構件作爲內側面對面層壓的層壓步驟之配線基 板製造方法。 (2 )以表裏之一面備有突出狀的導體構件導體層， 與絕緣基材以導體構件作爲內側面對面層壓的層壓步驟， 含除去不要的導體層形成配線構件的配線構件形成步驟的 配線基板製造方法。及 (3 )依配線構件、絕緣基材、支撐構件的順序層壓 的層壓步驟之配線基板製造方法。 經濟部智慧財產局員工消費合作社印製 更進一步，本發明係提供於上述本發明的配線基板的 配線構件表面搭載半導體元件的搭載步驟、半導體元件與 配線構件表面的配線連接電路的連接步驟、以封裝構件覆 蓋封裝半導體元件的封裝步驟、及除去部份的絕緣基材至 少露出一小部份的導體構件的構件絕緣基材的去除步驟之 半導體裝置的製造方法。又，備有以封裝構件覆蓋封裝半 導體裝置的封裝步驟亦可。此時封裝步驟與絕緣基材去除 步驟何者爲先都沒關係。 又，本發明係提供備有在本發明的配線基板的配線構 件側表面搭載半導體元件的搭載步驟、連接半導體元件與 配構件表面的.配線的電路連接步驟、至少去除支撐構件的 一部份至少露出一部份絕緣基材的支撐構件去除步驟、至 少去除一部份絕緣基材形成貫通孔、至少露出一部份配線 的絕緣基材去除步驟、及以導體塡充貫通孔連接配線形成 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） " 552694 A7 ___ B7_ 五、發明説明（5) 導體構件的導體形成步驟的半導體裝置之製造方法。 (請先閲讀背面之注意事項再填寫本頁) 又，本發明的半導體裝置之製造方法，半導體元件搭: 載至配線基板以粘著劑爲媒介進行，亦可不以粘著劑爲媒 介進行。 更進一步本發明係提供依上述本發明的製造方法製造 的半導體裝置。 圖面之簡單說明 圖1 a〜1 g爲顯示依本發明半導體裝置的製造步驟 的剖面圖。 圖2 a〜2 f爲威不依本發明半導體裝置的製造步驟 的剖面圖。 圖3 a〜3 f爲威不依本發明半導體裝置的製造步驟 的剖面圖。 圖4 a〜4 g爲顯示依本發明半導體裝置的製造步驟 例的剖面圖。 經濟部智慧財產局員工消費合作社印製 圖5 a〜5 f爲顯示依本發明半導體裝置的製造步驟 例的剖面圖。 圖6 a〜6 g爲顯示依本發明半導體裝置的製造步驟 例的剖面圖。 圖7 a〜7 g爲顯示依本發明半導體裝置的製造步驟 例的剖面圖。 圖8 a〜8 f爲顯示依本發明半導體裝置的製造步驟 例的剖面圖。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X m公釐） -8- 552694 A7 B7 五、發明説明（6 ) 發明半導體裝置的製造步驟 圖9 a〜9 g爲顯示依本 例的剖面圖。 圖1 0 a〜1 〇 f爲顯示依本發明半導體裝置的製造 步驟例的剖面圖。 圖1 1 a〜1 1 f爲顯示依本發明配線基板的製造步 .驟例的剖面圖。 2 g胃顯示依本發明配線基板的製造步 (請先閱讀背面之注意事項再填寫本頁) 圖1 2 a〜 驟例的剖面圖。 圖1 3 a〜1 3 g爲顯示依本發明配線基板的製造步 驟例的剖面圖。 圖1 4 a〜1 4 g爲顯示依本發明配線基板的製造步 驟例的剖面圖。 圖1 5 a〜1 5 g爲顯示依本發明配線基板的製造步 驟例的剖面圖。 圖1 6 a〜1 6 h爲顯示依本發明配線基板的製造步 驟例的剖面圖。 圖1 7 a〜1 7 e爲顯示依本發明配線基板的製造步 驟例的剖面圖。 經濟部智慧財產局員工消費合作社印製 圖1 8 a〜1 8 g爲顯示依本發明配線基板的製造步 驟例的剖面圖。 主要元件對照表 1 金屬片 2 粘著劑 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -9 552694 A7 五、發明説明（7) 3 突出物 4 配線 5 粘著劑膜 6 LSI (大型集成電路）元件 7 半導體封裝樹脂 8 焊點 經濟部智慧財產局員工消費合作社印製 1 0 〇 焊 接 線 1 1 〇 配 線 基 板 1 2 0 半 導 體 裝 置 1 1 液 狀 壞 氧 樹 脂 2 0 0 金 突 出 物 1 3 0 半 導 體 裝 置 1 0 絕 緣 層 3 0 0 配 線 基 板 3 1 〇 半 導 體 裝 置 4 a 襯 墊 4 〇 0 配 線 基 板 4 1 〇 半 導 髀 裝 置 5 a 非 導 電 性 膜 5 0 0 配 線 基 板 5 1 〇 半 導 體 裝 置 2 1 配 線 6 1 貫 通 孔 6 2 導 體 構 件 •裝-- (請先閱讀背面之注意事項再填寫本頁) 訂 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -10- 552694 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（8) 600 配線基板 6 1 0 半 導 體 裝 置 7 0 0 配 線 基 板 7 1 〇 半 導 體 裝 置 8 0 0 配 線 基 板 8 1 0 半 導 體 裝 置 9 0 0 配 線 基 板 9 1 0 組 裝 物 9 2 0 半 導 體 裝 置 1 0 0 0 配 線 基 板 1 〇 1 0 半 導 體 裝 9 端 子 1 1 0 0 配 線 基 板 1 1 1 0 半 導 體 裝 3 1 電 解 銅 箔 3 2 鎳 層 3 3 銅 箔 3 4 蝕 刻 圖 案 3 5 鎳 膜 3 6 金 膜 3 7 電 鍍 圖 案 4 2 突 出 物 1 2 0 0 配 線 基 板 4 1 電 解 銅 箔 (請先閱讀背面之注意事項再填寫本頁)Consumer Cooperation of Intellectual Property Bureau of the Ministry of Economic Affairs, Du Printing -4- 552694 A7 B7 V. Description of the Invention (2) For components with a smaller size, it is recommended to use approximately the same size as semiconductor components, so-called component size components (CSP: Chip Size Package). This is not a peripheral part of a semiconductor device, but a component having a connection portion with an external wiring board within a mounting range. Specifically, a polyimide film with a protrusion is attached to the surface of a semiconductor element, and the circuit connection is obtained by the element and the gold wire, and the product is encapsulated with an epoxy resin (NIKKEI MATERIAL & TECHNOLOGY 94. 4 , No. 140, P18-19), or metal protrusions are formed on the hypothetical substrate corresponding to the connection portion between the semiconductor element and the external wiring board. After the semiconductor element is pasted with pressure, the injection mold is transferred on the hypothetical substrate ( Smallest Flip-chip-like package CSP; The second VLSI package workshop of Japan, p46-5 0,1 994) On the one hand, review the use of polyimide film as the base film in the BGA or CSP field as described above. The general polyimide tape is formed by laminating an adhesive and a copper foil on a polyimide film. From the viewpoint of heat resistance or moisture resistance, polyimide is directly formed on the copper foil. An amine layer, that is, a so-called two-layer flexible substrate is preferable. The manufacturing method of the two-layer flexible substrate can be divided into ① a method of thermally curing a copper foil coated with a polyamine precursor POLYAMIC ACID on a copper foil, and ② a polyacrylate after curing. There are two major differences between the amine film and the metal film forming method such as a vacuum film forming method or an electroless plating method. When a two-layer flexible substrate, such as laser processing, is suitable for removing a desired portion of a polyimide film to form a concave portion reaching a copper box, the ideal thickness of the polyimide film is as thin as possible. On the contrary, the two-layer flexible substrate is processed into a frame guide. The paper size is in accordance with Chinese National Standard (CNS) A4 (210X297 mm) ~ '— (Please read the precautions on the back before filling out this page). 1 · Packing. Order printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 552694 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 ___B7 V. Description of the invention (3) When the line is operated, the thickness of the base film is too thin and lacks operability or serves as a framework. Rigidity and other issues. As mentioned above, various proposals have been made in response to the miniaturization and high integration of semiconductor devices, and it is hoped that performance, characteristics, productivity, and the like can be further improved in a comprehensive manner. DISCLOSURE OF THE INVENTION The present invention provides a semiconductor device mounting wiring substrate capable of coping with the miniaturization and high integration of semiconductor devices (semiconductor components), having good productivity, and stable manufacturing, a semiconductor device using the substrate, and the like. Method for the purpose. The invention provides an insulating base material, a wiring material provided on one surface of the insulating base material with wiring thereon, an embedded conductive member provided in the insulating base material, and one end of the conductive material and the wiring exposed on the surface of the insulating base material. For connection, the other end is a wiring board embedded in an insulating substrate. In the wiring substrate of the present invention, a supporting member may be provided on the other surface of the insulating base material (that is, the surface on which the lead member is not exposed on the front and back surfaces). Furthermore, the present invention provides an insulating base material and a wiring member having wiring on one surface of the insulating base material, and a wiring substrate provided with a supporting member on the other surface of the insulating base material. The wiring board may be provided with or without a conductive member embedded in the insulating substrate to connect wiring. When a conductive member is provided, one end must be connected to the wiring, and the other end may be covered with an insulating base material. When the etching conditions of the supporting material and the conductive member are different, the other end of the conductive member may reach the supporting member. This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page) Binding and binding surface l # v— · 552694 A7 B7 V. Description of the invention (4) The present invention provides the above-mentioned method for manufacturing the wire substrate of the present invention (please read the precautions on the back before filling in this page) () one of the front and back surfaces is provided with a protruding conductive member, and the insulating base material has the conductive member as the inner side A method for manufacturing a wiring board in a lamination step of face-to-face lamination. (2) A lamination step in which a protruded conductive member conductor layer is provided on one of the front and back surfaces, and the insulating substrate is laminated with the conductive member as the inner side face to face, and the wiring including the wiring member formation step of removing the unnecessary conductor layer to form the wiring member is performed. Substrate manufacturing method. And (3) a method for manufacturing a wiring board in a laminating step of sequentially laminating a wiring member, an insulating substrate, and a support member. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the present invention provides the steps for mounting semiconductor elements on the surface of the wiring member of the wiring substrate of the present invention, and the steps for connecting the semiconductor element and the wiring connection circuit on the surface of the wiring member. A method for manufacturing a semiconductor device in which a packaging member covers a step of packaging a semiconductor element, and a step of removing a part of the insulating substrate from which a part of the insulating substrate is exposed exposes at least a small portion of the conductive member. Alternatively, a packaging step of covering the semiconductor device with a packaging member may be provided. At this time, it does not matter which of the packaging step and the insulating substrate removal step is the first. In addition, the present invention provides a mounting step of mounting a semiconductor element on a side surface of a wiring member of the wiring substrate of the present invention, a circuit connection step of connecting the semiconductor element and a surface of the wiring member, and at least a portion of the supporting member is removed. A support member removing step exposing a part of the insulating base material, at least a part of the insulating base material being removed to form a through hole, an insulating base material removing step exposing at least a part of the wiring, and a conductor filling the through hole to connect the wiring to form the paper The dimensions apply to the Chinese National Standard (CNS) A4 specification (210X297 mm) " 552694 A7 ___ B7_ V. Description of the invention (5) Semiconductor device manufacturing method of the conductor forming step of the conductor member. (Please read the precautions on the back before filling in this page.) In the method of manufacturing the semiconductor device of the present invention, the semiconductor device is mounted on the wiring substrate using an adhesive as the medium, or it can be performed without the adhesive as the medium. Furthermore, the present invention provides a semiconductor device manufactured according to the above-mentioned manufacturing method of the present invention. Brief Description of the Drawings Figs. 1a to 1g are sectional views showing manufacturing steps of a semiconductor device according to the present invention. 2a to 2f are cross-sectional views of steps of manufacturing a semiconductor device according to the present invention. 3a to 3f are cross-sectional views of the manufacturing steps of a semiconductor device according to the present invention. 4a to 4g are cross-sectional views showing examples of manufacturing steps of a semiconductor device according to the present invention. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Figs. 5a to 5f are cross-sectional views showing examples of manufacturing steps of a semiconductor device according to the present invention. 6a to 6g are cross-sectional views showing examples of manufacturing steps of a semiconductor device according to the present invention. 7a to 7g are cross-sectional views showing examples of manufacturing steps of a semiconductor device according to the present invention. 8a to 8f are cross-sectional views showing examples of manufacturing steps of a semiconductor device according to the present invention. This paper size applies Chinese National Standard (CNS) A4 specification (210X mmm) -8- 552694 A7 B7 V. Description of the invention (6) Manufacturing steps of the invention semiconductor device Figures 9a ~ 9g show the section according to this example Illustration. 10a to 10f are cross-sectional views showing examples of manufacturing steps of a semiconductor device according to the present invention. Figs. 1a to 1f are cross-sectional views showing examples of manufacturing steps and steps of a wiring substrate according to the present invention. 2 g stomach display manufacturing steps of the wiring board according to the present invention (please read the precautions on the back first and then fill out this page) Figure 1 2 a ~ sectional view of the example. Figs. 13a to 1g are sectional views showing examples of manufacturing steps of a wiring substrate according to the present invention. Figs. 14a to 14g are cross-sectional views showing examples of manufacturing steps of a wiring substrate according to the present invention. Figs. 15a to 15g are cross-sectional views showing examples of manufacturing steps of a wiring substrate according to the present invention. 16a to 16h are cross-sectional views showing an example of a manufacturing process of a wiring substrate according to the present invention. Figs. 17a to 17e are sectional views showing examples of manufacturing steps of a wiring substrate according to the present invention. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Figures 18a to 18g are cross-sectional views showing an example of a manufacturing process of a wiring substrate according to the present invention. Comparison table of main components 1 Metal sheet 2 Adhesive The paper size is applicable to Chinese National Standard (CNS) A4 specification (210X297 mm) -9 552694 A7 V. Description of the invention (7) 3 Protrusion 4 Wiring 5 Adhesive film 6 LSI (Large Integrated Circuit) components 7 Semiconductor packaging resin 8 Solder joint Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Employee Consumer Cooperatives 1 0 〇Solder wire 1 1 〇Wiring board 1 2 0 Semiconductor devices 1 1 Liquid bad oxygen resin 2 0 0 Gold Projection 1 3 0 Semiconductor device 1 0 Insulating layer 3 0 0 Wiring board 3 1 〇Semiconductor device 4 a Pad 4 〇0 Wiring board 4 1 〇Semiconductor device 5 a Non-conductive film 5 0 0 Wiring board 5 1 〇Semiconductor device 2 1 Wiring 6 1 Through-hole 6 2 Conductor components and installation-(Please read the precautions on the back before filling in this page) The size of this paper is applicable to Chinese National Standard (CNS) A4 (210X297 mm)- 10- 552694 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 8) 600 wiring substrate 6 1 0 semiconductor device 7 0 0 wiring substrate 7 1 〇 semiconductor device 8 0 0 wiring substrate 8 1 0 semiconductor device 9 0 0 wiring substrate 9 1 0 assembly 9 2 0 semiconductor device 1 0 0 0 wiring Substrate 1 〇1 0 Semiconductor device 9 Terminal 1 1 0 0 Wiring board 1 1 1 0 Semiconductor device 3 1 Electrolytic copper foil 3 2 Nickel layer 3 3 Copper foil 3 4 Etching pattern 3 5 Nickel film 3 6 Gold film 3 7 Electroplating pattern 4 2 protrusions 1 2 0 0 wiring board 4 1 electrolytic copper foil (please read the precautions on the back before filling this page)

裝· 訂 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） -11 - 552694 A7 B7 五、發明説明（9) 4 4 抗 鍍 圖 案 1 3 0 0 配 線 基板 4 3 突 出 物 1 4 0 配 線 基 板 4 〇 突 出 物 1 5 0 配 線 基 板 4 6 突 出 物 1 6 0 配 線 基 板 3 9 JcfcJ. 樹 脂 層 4 5 銅 層 4 7 貫 通 孔 4 8 貫 通 孔 4 9 銅 電 鍍 膜 1 7 0 配 線 基 板 (請先閲讀背面之注意事項再填寫本頁)The size of the bound and bound paper is in accordance with Chinese National Standard (CNS) A4 (210X 297 mm) -11-552694 A7 B7 V. Description of the invention (9) 4 4 Anti-plating pattern 1 3 0 0 Wiring board 4 3 Projection 1 4 0 Wiring substrate 4 〇Projection 1 50 0 Wiring substrate 4 6 Projection 1 6 0 Wiring substrate 3 9 JcfcJ. Resin layer 4 5 Copper layer 4 7 Through hole 4 8 Through hole 4 9 Copper plating film 1 7 0 Wiring substrate (Please read the notes on the back before filling this page)

、11 經濟部智慧財產局員工消費合作社印製 發明之最佳實施形態 本發明的配線基板配備絕緣基材、配線構件、導線構 件，導體構件的一端露出於絕緣基材的表面連接配線構件 的配線，另一端埋入於絕緣基材內， 關於此配線構件的 絕緣基材的材質無特別的限制 ，可使用含環氧樹脂、聚醯胺醯亞胺樹脂等樹脂組成物、 樹脂先驅物或其硬化物。樹脂組成物或樹脂先驅物以含有 單晶體結晶體短纖維爲理想，樹脂則以使用聚醯胺醯亞胺 樹脂爲最佳。絕緣基材的樹脂硬化前與半硬化狀態都沒關 本紙張尺度適用中國國家標準（CNS)八4規格（210>< 297公釐） -12- 552694 經濟部智慧財產局員工消費合作社印製 A7 B7五、發明説明（A 係，關於半導體裝置以硬化後爲理想。 有關適合於作爲本發明絕緣基材的環氧樹脂硬化物， 係由含環氧樹脂及硬化劑的環氧樹脂組成物硬化而得。此 環氧樹脂組成物（以熱硬化性樹脂組成物爲理想）依需要 可配合硬化促進劑、觸媒、彈性物、難耐劑等使用。 可使用於此處的環氧樹脂，只要其分子內具環氧基的 任何物質均可，如雙酚A型環氧樹脂、雙酚F型環氧樹脂 、雙酚S型環氧樹脂、脂環式環氧樹脂、脂肪族鏈狀環氧 樹脂、苯酚醛型環氧樹脂、甲酚醛型環氧樹脂、雙酚醛A 型環氧樹脂、聯苯的二縮水甘油醚化物、萘二醇的二縮水 甘油醚化物，酚類的二縮水甘油醚化物，醇類的二縮水甘 油醚化物、及此等的烷基取代物、鹵化物、氫添加物等。 可倂用此等物質，環氧樹脂以外的成分可視爲含於其中的 不純物。 關於本發明，使用鹵化雙酚A型環氧樹脂、鹵化雙酚 F型環氧樹脂、鹵化雙酚S型環氧樹脂、四氟化雙酚A等 鹵化雙酚化合物及環氧氯丙烷反應可以得到的環氧樹脂， 該結合醚基的苯環其醚基的鄰位被氯素、溴素等的鹵原子 所取代的環氧樹脂時，有關形成貫通孔時的去除處理，環 氧樹脂硬化物的分解及/或溶解的效率特別好。 本發明使用的環氧樹脂用硬化劑、只要能硬化環氧樹 脂即可’無使用上的限制。如多官能酣類、胺類、咪唑、 酸酐、有機磷化合物及此等的鹵化物等 多官能酚類如單環二官能苯酚的對苯二酚、間苯二酚 本紙張尺度適用中關家縣（CNS ) A4規格（21GX297公釐) ' " ~ 13 - ------：----•裝-- (請先閱讀背面之注意事項再填寫本頁) 訂 0 JmMMf —1 —%ΓΙ · 552694 A7 ___B7 五、發明説明（11) 、鄰苯二酚、多環官能苯酚的雙酚A、雙酚F、萘二醇類 、二苯酚類、及此等的鹵化物、烷基取代物等。此外，此 等酚類及醛類的聚縮合物如酚醛清漆、甲基酚醛樹脂等。 胺類如脂肪族或芳香族的第一級胺、第二級胺、第三 級胺第四級氨鹽及脂肪族環狀胺類、脈類、尿素衍生物等 。此等化合物如N，N —苄基二甲基胺、2 -（二甲胺甲 基）苯酚、2 ，4，6 —三（二甲胺甲基）苯酚、四甲基 脈、三乙醇胺、N，N —二甲基對二氮己環、1 ，4 —二 氮雙環〔2，2，2〕辛烷、1，8 -二氮雙環〔5，4 ，〇〕-7—十一碳燒、1 ，5 —二氮雙環〔4，4，0 〕_ 5 —壬燒、六甲撐四胺、d比卩定、甲基π比u定、哌卩定、d比 咯烷、二甲基環己胺、二甲基己胺、環己胺、二異丁胺、 二一 n -丁胺、二苯胺、N —甲基苯胺、三—η -丙胺、 三—η —辛胺、三—η - 丁胺、三苯胺、氯化四甲基氣、 碘化四甲基氨 '三乙撐四胺、二氨基二苯甲烷、二氨基二 苯醚、二醐基脲、甲苯基雙胍、雙胍尿素、二甲基尿素等 〇 咪唑化合物如咪唑、2 —乙基咪唑、2 -乙基一 4 — 甲基咪唑、2 —甲基咪唑、2 —苯基咪唑、2——h—碳基 咪唑、1—苄基一 2 -甲基咪唑、2 -十七碳基咪唑、4 ，5 -二苯基咪唑、2 -甲基咪唑啉、2 -苯基咪唑啉、 2-^ 碳基咪唑啉、2 -十七碳基咪唑啉、2 -異丙基 咪唑、2 ，4 一二甲基咪唑、2 -苯基—4 —甲基咪唑、 2 -乙基咪唑啉、2 -苯基一 4 一甲基咪唑啉、苯并咪唑 本紙張尺度適财酬家辟（CNS ) A4規格（21GX297公釐)— " -14- 丨 ！----•裝-- (請先閱讀背面之注意事項再填寫本頁)11,11 The best embodiment of the invention printed by the employee's consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs The wiring board of the present invention is provided with an insulating substrate, a wiring member, and a wire member, and one end of the conductor member is exposed on the surface of the insulating substrate to connect the wiring of the wiring member. The other end is buried in an insulating base material. There is no particular limitation on the material of the insulating base material of this wiring member. A resin composition such as epoxy resin, polyamide-imide resin, resin precursor, or the like can be used. Hardened. The resin composition or the resin precursor is preferably a single crystal crystalline short fiber, and the resin is preferably a polyimide resin. The resin of the insulating substrate does not matter before hardening or semi-hardening. The paper size is applicable to China National Standard (CNS) 8-4 specifications (210 > < 297 mm) -12- 552694 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (Series A, semiconductor devices are ideally cured. The epoxy resin hardened product suitable as the insulating substrate of the present invention is an epoxy resin composition containing epoxy resin and hardener. It is obtained by curing. This epoxy resin composition (preferably a thermosetting resin composition) can be used with a hardening accelerator, a catalyst, an elastomer, a refractory agent, etc. as required. The epoxy resin that can be used here, As long as it has any epoxy group in its molecule, such as bisphenol A epoxy resin, bisphenol F epoxy resin, bisphenol S epoxy resin, alicyclic epoxy resin, aliphatic chain Epoxy resin, phenol-formaldehyde epoxy resin, cresol-form epoxy resin, bisphenol-A epoxy resin, diglycidyl etherate of biphenyl, diglycidyl etherate of naphthalene glycol, diglycidyl phenol Glyceryl etherate, Diglycidyl etherate, and alkyl substituents, halides, hydrogen additives, etc. These materials can be used, and components other than epoxy resins can be regarded as impurities contained therein. Regarding the present invention, Epoxy obtained by the reaction of halogenated bisphenol A epoxy resin, halogenated bisphenol F epoxy resin, halogenated bisphenol S epoxy resin, halogenated bisphenol compound such as tetrafluorinated bisphenol A, and epichlorohydrin. In the case of a resin, the benzene ring bonded to an ether group, in which the ortho position of the ether group is replaced by a halogen atom such as chlorine, bromine, etc., the removal treatment when forming a through hole, the decomposition of the hardened epoxy resin, and / Or the efficiency of dissolution is particularly good. As long as the hardener for epoxy resin used in the present invention can harden the epoxy resin, there is no restriction on its use. For example, multifunctional amidines, amines, imidazoles, acid anhydrides, and organic phosphorus compounds Polyfunctional phenols such as these halides, such as monocyclic difunctional phenol, hydroquinone, and resorcinol. The paper size is applicable to Zhongguanjia County (CNS) A4 specification (21GX297 mm) '" ~ 13 ------- ： ---- • Install-- (Please read first Note on the back, please fill in this page again) Order 0 JmMMf —1 —% ΓΙ · 552694 A7 ___B7 V. Description of the invention (11), catechol, polycyclic functional phenol, bisphenol A, bisphenol F, naphthalene glycol Phenols, diphenols, and their halides, alkyl substitutes, etc. In addition, these polycondensates of phenols and aldehydes such as novolacs, methylphenol resins, etc. Amines such as aliphatic or aromatic Primary amines, secondary amines, tertiary amines, tertiary ammonia salts and aliphatic cyclic amines, veins, urea derivatives, etc. Such compounds as N, N-benzyldimethylamine , 2- (dimethylaminomethyl) phenol, 2,4,6-tris (dimethylaminomethyl) phenol, tetramethyl vein, triethanolamine, N, N-dimethyl-p-diazepine, 1 , 4-diazabicyclo [2,2,2] octane, 1,8-diazabicyclo [5,4, 〇] -7-undecene, 1,5-diazabicyclo [4,4, 0] _ 5 —nonan, hexamethylenetetramine, d-pyridine, methyl π-pyridine, piperidine, d-pyrrolidine, dimethylcyclohexylamine, dimethylhexylamine, cyclohexylamine , Diisobutylamine, di-n-butylamine, di Amine, N-methylaniline, tri-n-propylamine, tri-n-octylamine, tri-n-butylamine, triphenylamine, tetramethyl chloride, tetramethylammonium iodide'triethylenetetramine , Diaminodiphenylmethane, diaminodiphenyl ether, difluorenyl urea, tolyl biguanide, biguanide urea, dimethyl urea, and the like. 0 Imidazole compounds such as imidazole, 2-ethylimidazole, 2-ethyl-1, 4-methyl Imidazole, 2-methylimidazole, 2-phenylimidazole, 2-h-carbonimidazole, 1-benzyl-2-methylimidazole, 2-heptadecenylimidazole, 4,5-diphenyl Imidazole, 2-methylimidazoline, 2-phenylimidazoline, 2- ^ carbon imidazoline, 2-heptadecyl imidazoline, 2-isopropylimidazole, 2, 4-dimethylimidazole, 2 -Phenyl-4-methylimidazole, 2-Ethylimidazoline, 2-Phenyl-4-methylimidazoline, Benzimidazole This paper is suitable for financial standards (CNS) A4 specification (21GX297 mm) — &Quot; -14- 丨! ---- • Equipment-- (Please read the notes on the back before filling in this page)

、1T 經濟部智慧財產局員工消費合作社印製 552694 A7 B7 經濟部智慧財產局員工消費合作社印％ 五、發明説明（12) 、1 一氰乙基咪唑等。 酸酐如酞酸酐、六氫化酞酸酐、均苯四甲酸二酐、二 苯甲酮四羧酸二酐等。 具有機基的磷化合物即可作爲有機磷化合物，無特別 限定，如六甲基磷酸三胺、三（二氯丙烯）磷酸、三（氯 丙烯）磷酸、三苯基亞磷酸、三甲基磷酸、苯基磷酸、三 苯基磷、三一 η - 丁基磷、二苯基磷等。 此等硬化劑可單獨使用一種，亦可組合二種以上使用 〇 此等環氧樹脂硬化劑的配合量，以能進行環氧基的硬 化反應即可，無特別限定，理想的範圍爲1 m 〇 1的環氧 基使用0.01〜5.Omo1 ，更理想的使用範圍爲 0.8 〜1.2mol〇 又，環氧樹脂組成物依需要可配合使用硬化促進劑， 代表的硬化促進劑如第三級胺、咪唑類、第四級氨鹽等， 但不限定於此類。 只要環氧樹脂組合物能進行硬化反應，任何反應溫度 都可以，一般理想的硬化的範圍在室溫至2 5 0 °C。又此 反應可在加壓下、大氣壓、或減壓下進行。 絕緣基材使用聚醯胺醯亞胺樹脂時，以使用矽變性聚 醯胺醯亞胺爲理想。此矽變性聚醯胺醯亞胺爲具矽氧烷結 合’醯亞胺結合及醯胺結合的聚合物，其製造方法爲 (1)含有具矽氧烷結合之二醯亞胺二羧酸之二醯亞 胺二羧酸1 a與二異氰酸酯化合物1 b的反應方法， (請先閱讀背面之注意事項再填寫本頁)Printed by 1T Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 552694 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs% 5. Description of the invention (12), 1 Monocyanoethylimidazole, etc. Acid anhydrides such as phthalic anhydride, hexahydrophthalic anhydride, pyromellitic dianhydride, benzophenone tetracarboxylic dianhydride, and the like. An organic phosphorus compound can be used as an organic phosphorus compound, and is not particularly limited, such as hexamethyl phosphate triamine, tri (dichloropropylene) phosphoric acid, tri (chloropropylene) phosphoric acid, triphenylphosphite, and trimethylphosphoric acid , Phenyl phosphate, triphenyl phosphorus, tri-n-butyl phosphorus, diphenyl phosphorus, and the like. These hardeners may be used singly or in combination of two or more. The blending amount of these epoxy resin hardeners is not particularly limited as long as it can carry out the epoxy group hardening reaction. The ideal range is 1 m. 〇1 epoxy group uses 0.01 ~ 5. Omo1, more ideal use range is 0.8 ~ 1.2mol. Also, the epoxy resin composition can be used with a hardening accelerator as required. Representative hardening accelerators such as tertiary amine , Imidazoles, fourth-order ammonia salts, and the like, but are not limited to these. As long as the epoxy resin composition can undergo a hardening reaction, any reaction temperature is acceptable. Generally, the ideal hardening range is from room temperature to 250 ° C. The reaction can be performed under pressure, atmospheric pressure, or reduced pressure. When a polyimide resin is used as the insulating substrate, it is preferable to use a silicon-modified polyimide resin. The silicon modified polyfluorene imine is a polymer having a siloxane bond, a fluorene imine bond, and a fluorene bond, and a manufacturing method thereof is (1) containing a sulfoximine-binding difluorene imine dicarboxylic acid. Method for the reaction of diamidoimine dicarboxylic acid 1 a and diisocyanate compound 1 b, (Please read the precautions on the back before filling this page)

裝· 、π 本紙張尺度適用中國國家標準（CNS ) Α4規格（210 X 297公釐） -15- 552694 A7 _ B7五、發明説明（13) (2 )含有具矽氧烷結合之二胺之二胺化合物2 a與 氯化三羧酸2 b的反應方法， (3 )含有具矽氧烷結合之二異氰酸酯之二異氰酸酯 化合物3 a與三羧酸酐3 b的反應方法， 等三種方法。 依上述（1 )的方法所得的矽變性聚醯胺醯亞胺詳述 如下，具矽氧烷結合之二醯亞胺二羧酸1 a之二醯亞胺二 羧酸，有下列化合物。 具矽氧烷結合之二醯亞胺二羧酸以外之二醯亞胺二羧 酸中與醯亞胺基連結的二價殘基爲芳香族之二醯亞胺二羧 酸，可舉以下（1式）及（2式）爲例。 (請先閲讀背面之注意事項再填寫本頁)Packing, π This paper size is applicable to Chinese National Standard (CNS) A4 specification (210 X 297 mm) -15- 552694 A7 _ B7 V. Description of the invention (13) (2) There are three methods for reacting diamine compound 2a and tricarboxylic acid 2b chloride, (3) a method for reacting diisocyanate compound 3a containing diisocyanate with siloxane bond and tricarboxylic anhydride 3b, and so on. The silicon-denatured polyfluorenimidine imine obtained according to the method of the above (1) is described in detail below. The dihydramine iminodicarboxylic acid having a siloxane-bound diamimine dicarboxylic acid 1 a includes the following compounds. The divalent residues linked to the fluorenimine in the fluorenimine dicarboxylic acid other than the fluorinimide dicarboxylic acid having a siloxane bond are aromatic fluorinimide dicarboxylic acids, and the following ( (Formula 1) and (Formula 2) are examples. (Please read the notes on the back before filling this page)

HOOCHOOC

J~Ri—Ν,J ~ Ri-Ν,

I COOH (1式） 此處—χ—0 CjH8 經濟部智慧財產局員工消費合作社印製I COOH (Type 1) Here—χ—0 CjH8 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs

，修。-0,repair. -0

本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 552694 A7 _ B7 _五、發明説明（14) 又，作爲具矽氧烷結合之二醯亞胺二羧酸之例，1式 之R 1爲二價的脂肪族基（可含有氧元素）。作爲二價脂肪 族基的有丙烯基、環己烷基、環辛烷基、環癸烷基、環十 八烷基等的亞烷基，亞烷基的兩端可能有與氧元素結合的 基。This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 552694 A7 _ B7 _V. Description of the invention (14) In addition, as an example of dioximine dicarboxylic acid with siloxane combination, formula 1 R 1 is a divalent aliphatic group (may contain an oxygen element). As the divalent aliphatic group, there are alkylene groups such as propenyl, cyclohexane, cyclooctyl, cyclodecyl, and cyclooctadecyl. Both ends of the alkylene may be bonded to oxygen. base.

HOOCHOOC

(2式) (請先閲讀背面之注意事項再填寫本頁) 衣· 此處R 2爲 式中R3，R4，爲二價的有機基，R5〜R8爲烷基、 苯基或取代苯基，N爲1〜5 0的整數。 上述二價的有機基111及112爲丙烯基的亞烷基、亞苯 基、烷基取代亞苯基等。 又，作爲二異氰酸酯化合物1 a，芳香族二異氰酸酯 化合物可舉例如下列（3式）。 訂(Formula 2) (Please read the precautions on the back before filling in this page) Clothing. Here R 2 is R3 and R4 in the formula, which are divalent organic groups, and R5 to R8 are alkyl, phenyl, or substituted phenyl , N is an integer from 1 to 50. The divalent organic groups 111 and 112 are propenyl alkylene, phenylene, alkyl-substituted phenylene, and the like. Examples of the diisocyanate compound 1 a include the following (Formula 3). Order

經濟部智慧財產局員工消費合作社印製 〇CN — R9 — NCO 此處R 9爲Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 〇CN — R9 — NCO Here R 9 is

3式）Type 3)

本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 17-. 552694 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（3 又’作爲R9，有亞烷基等的二價脂肪族基或具環亞院 基等的二價環式基的二異氰酸酯化合物或脂環式二異氰酸 酯化合物。 具矽氧烷的二醯亞胺二羧酸及此等以外的二醯亞胺二 羧酸’可各自以具矽氧烷結合的二胺化合物及此外之二胺 與偏苯三酸酐反應而得。 使用具矽氧烷結合的二醯亞胺二羧酸及此外的二醯亞 胺二羧酸的混合物較爲理想。 使用具矽氧烷結合的二胺化合物及此外的二胺之混合 物與偏苯三酸酐反應所得的二醯亞胺二羧酸的混合物更爲 理想。 作爲具矽氧烷結合的二胺化合物以外的二胺，以芳香 族二胺爲理想，特別是具三個以上芳香族環更爲理想。具 矽氧烷結合的二胺化合物以外的二胺中芳香族二胺以使用 5〇〜l〇〇mo 1%爲理想。 又，（A )具矽氧烷結合的二胺化合物以外的二胺及 (B)矽氧烷二胺的使用以（a)/(B)爲99 . 9/ 〇·1〜0.1/99.9爲理想。 又，（A )具矽氧烷結合的二胺化合物以外的二胺及 (B )矽氧烷二胺與偏苯三酸酐的比例以（A ) + ( B ) 的合計爲1 m ο 1比偏苯三酸酐2 . 0 5〜2 · 2 0的比 例進行反應爲理想。 二異氰酸酯化合物以芳香族二異氰酸酯化合物爲理想 ，二異氰酸酯化合物中使用5 0〜1 0 〇mo 1%的芳香 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -18- 552694 經濟部智慧財產局員工消費合作社印製 A7 _B7五、發明説明（1弓 族二異氰酸酯化合物爲理想。 二醯亞胺二羧酸全體與二異氰酸酯化合物以前者i mo 1比後者1 · 05〜1 · 50mo 1進行反應爲理想 〇 二胺化合物與偏苯三酸酐，在非原胺紳性極性溶媒的 存在下，於5 0〜9 0 °C進行反應，更進一步將可能與水 共沸的的芳香族烴，使用非原胺紳性極性溶媒的〇 . 1〜 0 · 5重量比投入，於1 2 0〜1 80 °C進行反應，製造 含二醯亞胺二羧酸與矽氧烷二醯亞胺二羧酸的混合物，此 混合物與二異氰酸酯化合物進行反應，二醯亞胺二羧酸製 造後，將此溶液中的芳香族烴除去。 二醯亞胺二羧酸與二異氰酸酯化合物的反應溫度，低 的時候反應時間加長，太高則異氰酸酯之間會引起反應， 爲防止此現象，理想的的反應溫爲1 0 〇〜1 2 0 °C。 作爲芳香族二胺，如亞苯基二胺、雙（4 一氨基苯） 甲烷、2，2 —雙（4 —氨基苯）丙烷、雙（4 一氨基苯 )異氰酸苯醋、雙（4 一氨基苯）碼、雙（4 一氨基苯） 醚等，特別具三個以上芳香族的二胺，有2，2雙〔4 一 (4 一氨基苯氧基）苯基〕丙烷（以下略稱爲BAPP) 、雙〔4 一（3 -氨基苯氧基）苯基碼、雙〔4 一（4 一 氨基苯氧基）苯基〕碼、2，2 —雙〔4 一（4 一氨基苯 氧基）苯基〕六氟丙院、雙〔4 一（4 一氛基苯氧基）苯 基〕甲烷、4 — 4’ 一雙（4 一氨基苯氧基）二苯基、雙 〔4 一（4 一氨基苯氧基）苯基〕醚、雙〔4 一（4 一氨 本紙張尺度適用中國國家標準（CNS ) A4規格（21〇Χ297公釐） 一 -19- ----------- (請先閲讀背面之注意事項再填寫本頁)This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 17-. 552694 A7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (3 Also as R9, there are alkylene, etc. A divalent aliphatic group, a diisocyanate compound having a divalent cyclic group such as a cyclic amidino group, or an alicyclic diisocyanate compound. A diimide dicarboxylic acid having a siloxane and dioxins other than these Amine dicarboxylic acid 'can be obtained by reacting a diamine compound having a siloxane bond and other diamines with trimellitic anhydride. Using a diamine imine dicarboxylic acid having a siloxane bond and other diimide diamines Mixtures of carboxylic acids are preferred. Mixtures of diamine imine dicarboxylic acids obtained by reacting a diamine compound having a siloxane bond and other diamines with trimellitic anhydride are more preferred. As a siloxane bond The diamine other than the diamine compound is preferably an aromatic diamine, and particularly preferably has three or more aromatic rings. Among the diamines other than the diamine compound having a siloxane bond, aromatic diamines are used in 5 ~ 100% 1% is ideal. In addition, the use of (A) a diamine other than a diamine compound having a siloxane bond and (B) a siloxane diamine is (a) / (B) being 99. 9 / 〇 · 1 to 0.1 / 99.9 is preferable. In addition, the ratio of (A) diamine other than the diamine compound having a siloxane bond, and (B) the ratio of the siloxane diamine to the trimellitic anhydride is (A) + (B ) Is a total of 1 m ο 1 than trimellitic anhydride 2. 0 5 ~ 2 · 2 0 is ideal for the reaction. The diisocyanate compound is preferably an aromatic diisocyanate compound, and the diisocyanate compound is used 50 to 1 0 〇mo 1% aroma (please read the precautions on the back before filling this page) This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) -18- 552694 Printed by the Consumers ’Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs A7 _B7 V. Description of the invention (1 Bow group diisocyanate compound is ideal. The reaction of the whole diisoimide dicarboxylic acid with the diisocyanate compound i mo 1 is better than the latter 1. 05 ~ 1 · 50 mo 1. Diamine compound and Trimellitic anhydride in the presence of a non-protoamine gentle polar solvent The reaction is carried out at 50 to 90 ° C, and the aromatic hydrocarbons that may be azeotroped with water are further injected at a weight ratio of 0.1 to 0 · 5 using a non-ortho amine gentle polar solvent at 1 2 0 The reaction is carried out at ~ 1 80 ° C to produce a mixture containing diimide dicarboxylic acid and siloxane diimide dicarboxylic acid. This mixture is reacted with a diisocyanate compound. After the diimide dicarboxylic acid is produced, The aromatic hydrocarbons in this solution are removed. The reaction temperature of the dihydrazine dicarboxylic acid and the diisocyanate compound is longer when the reaction temperature is lower, and too high will cause a reaction between the isocyanates. The reaction temperature is 100 to 120 ° C. As aromatic diamines, such as phenylenediamine, bis (4-aminophenyl) methane, 2,2-bis (4-aminophenyl) propane, bis (4-aminophenyl) isocyanate phenylacetate, bis ( 4-Aminobenzene) code, bis (4-Aminophenyl) ether, etc., especially with more than three aromatic diamines, there are 2,2bis [4-A (4-Aminophenoxy) phenyl] propane (below Abbreviated as BAPP), bis [4-a (3-aminophenoxy) phenyl code, bis [4-a (4-aminophenoxy) phenyl] code, 2,2-bis [4 one (4 one Aminophenoxy) phenyl] Hexafluoropropane, bis [4-mono (4-aminophenoxy) phenyl] methane, 4-4'-bis (4-aminophenoxy) diphenyl, bis [4-mono (4-aminophenoxy) phenyl] ether, bis [4-mono (4-monoammonium paper size applicable to Chinese National Standard (CNS) A4 specification (21〇 × 297 mm) One -19- --- -------- (Please read the notes on the back before filling this page)

、1T, 1T

552694 經濟部智慧財產局員工消費合作社印製 A7 ___ B7五、發明説明（17) 基苯氧基）苯基〕酮、1，3 -雙（4 一氨基苯氧基）苯 等。 作爲脂肪酸二胺，有己甲撐二胺、辛甲撐二胺、癸甲 撐二胺、十八甲撐二胺、末端氨基化丙二醇等。又，脂環 式二胺有，4 一二氨基環己烷等。 作爲矽氧烷二胺則可用如一般式（4式）所示的化合 物。 H A-R十!卜。 式中R3，R4，爲二價的有機基，Rs〜R8爲烷基、 苯基或取代苯基，η爲1〜5 0的整數。 此類矽氧烷二胺可例舉如（5式）所示者。其中二甲 基矽氧烷二胺系之兩端具胺的胺變性矽油，市面上有販賣 的如信越化學工業株式會社製商品名X - 2 2 -161AS(胺當量 450) 、Χ— 22 — 161Α (胺 當量 840) 、Χ— 22 — 161Β(胺當量 1500) 、及TORAY-DOWCORNING株式會社製商品名Β Υ - 1 6 — 853 (胺當量 650) 、ΒΥ— 16 — 853Β (胺 當量2 2 0 0 )等。552694 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 ___ B7 V. Description of the invention (17) Phenyloxy) phenyl] one, 1,3-bis (4-aminophenoxy) benzene, etc. Examples of fatty acid diamines include hexamethylene diamine, octyl diamine, decyl diamine, octadecyl diamine, terminally aminated propylene glycol, and the like. Examples of the alicyclic diamine include 4-diaminocyclohexane. As the siloxane diamine, a compound represented by the general formula (Formula 4) can be used. H A-R X! Bu. In the formula, R3 and R4 are divalent organic groups, Rs to R8 are alkyl, phenyl, or substituted phenyl, and η is an integer of 1 to 50. Such a siloxane diamine can be exemplified as shown in (Formula 5). Among them, dimethylsiloxane diamines are amine-modified silicone oils with amines at both ends. They are commercially available under the trade name X-2 2 -161AS (amine equivalent 450), X 22-manufactured by Shin-Etsu Chemical Industry Co., Ltd. 161A (amine equivalent 840), X-22 — 161Β (amine equivalent 1500), and trade names manufactured by TORAY-DOWCORNING Co., Ltd. BΥ-1 6-853 (amine equivalent 650), BΥ-16-853Β (amine equivalent 2 2 0 0) and so on.

(4式） (請先聞讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS ) Α4規格（210 X 297公釐） -20- 552694 A7 B7 五、發明説明（榨 \CHa /nCHs / Qii g \ Q Jis Η ίί -eH £H £H 2Mi—-0 -r^i—CH £H £H £—NH ； Cg ' C JI b J^C eHb bCH£H£H 2~NH； (5式）(Type 4) (Please read the precautions on the back before filling out this page) This paper size applies to Chinese National Standard (CNS) A4 specification (210 X 297 mm) -20- 552694 A7 B7 V. Description of the invention (squeezing \ CHa / nCHs / Qii g \ Q Jis ί ίί -eH £ H £ H 2Mi—-0 -r ^ i—CH £ H £ H £ —NH; Cg 'C JI b J ^ C eHb bCH £ H £ H 2 ~ NH; (Form 5)

HaN· ^ \CiIS /nCeHS ^ (N爲1〜5 0的整數。） 芳香族二異氰酸酯具體的如4, 4 二苯甲烷二異 氰酸酯（以下以MDI稱之）、2，4 一甲苯撐二異氰酸 酯、2， 6-甲苯撐二異氰酸酯、萘一1， 5-二異氰酸 (請先閱讀背面之注意事項 本頁) 經濟部智慧財產局員工消費合作社印製 酯、2， 上異氰酸 的濃度相 脂肪 異佛爾酮 非原 、二甲亞 、環己酮 -2 -甲 此等混合 不能充分 在0 · 2 具三個以 量的比例 等，醯亞胺化 基吡咯烷酮（ 溶媒中的水分 進行，成爲聚 重量％以下。 上芳香族環的 ，多的時候偏 4-甲苯撐二聚物等，特別是MDI在分子構造 酯基已分離，對聚胺醯亞胺的醯胺基或醯亞胺基 對的比較低，可提高溶解性較爲理想。 族或脂環式二異氰酸脂，有己甲撐二異氰酸脂、 二異氰酸脂、甲撐雙（環己基二異氰酸脂）等。 胺紳性極性溶媒有二甲替乙醯胺、二甲基甲醯胺 硕、N —甲基一吡咯烷酮、4 — 丁內酯、環丁碼 須高溫反應、以高沸點的N -甲基 以下稱爲NMP )最爲理想。含於 因與TMA生成偏苯三酸，使反應 合物分子量降低的原因，必須管理 又，非性極性溶媒無特別的限制， 二胺及環己烷二胺與三酸酐合計重 苯三酸的溶解性降低反應不能進行 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -21 - 經濟部智慧財產局員工消費合作社印製 552694 A7 __B7 ___ 五、發明説明（， 、低的時候，不利於工業化製造，所以理想的範圍爲1 〇 重量％〜7 0重量％。 可能與水共沸的芳香族烴有苯、二甲苯、苯、甲苯等 的芳香族烴，特別是沸點較低、不影響作業環境的甲苯較 好，使用量以非原胺性極媒的0 · 1〜0 · 5重量比（ 1 0〜5 0重量％)的範圍爲佳。 其次說明依上述（2 )的方法所得矽變性聚醯胺醯亞 胺，具矽氧烷結合二胺的二胺化合物2 a，有如上述（5 式）所示的化合物。又，其他的二胺亦可使用上述的二胺 〇 氯化三羧酸2 b有氯化偏苯三酸，可用眾知的酸氯化 法製造。 其次說明依上述（3 )的方法所得矽變性聚醯胺醯亞 胺，具3 a矽氧烷結合二異氰酸酯的二異氰酸酯化合物， 如上述（4式）所示具矽氧烷結合的二異氰酸酯化合物的 矽氧烷二胺對應的二異氰酸酯化合物，其他二異氰酸酯化 合物可使用上述的化合物。 三羧酸酐3 b有偏苯三酸酐等，可依向來眾知的二胺 化合物與二異氰酸酯化合物反應製造。 又，絕緣基材可用含單結晶體短纖維樹脂組成物。特 別是樹脂本身不具薄膜形成能時，配合單結晶體短纖維很 有效。又’此處所謂薄膜形成能係指塗覆淸漆形成承載薄 膜時，容易控制所定的厚度，加熱乾燥後形成半硬化狀後 具良好的搬運、切斷等作業性，使用於層壓步驟時不易發 本ϋ尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ' ' --— -22 - (請先閱讀背面之注意事項再填寫本頁)HaN · ^ \ CiIS / nCeHS ^ (N is an integer from 1 to 50.) Specific examples of the aromatic diisocyanate are 4, 4 diphenylmethane diisocyanate (hereinafter referred to as MDI), and 2,4 monotolyl diisocyanate. , 2, 6-tolyl diisocyanate, naphthalene-1, 5-diisocyanate (please read the notes on the back page first) The esters printed by the consumer co-operatives of the Intellectual Property Bureau of the Ministry of Economy, 2, Concentration phase: Fatty isophorone non-protozoal, dimethylene, cyclohexanone-2, methyl, etc. These mixtures cannot be fully mixed at a ratio of 0.3 in three, etc., imidamidinated pyrrolidone (water in solvent It will be poly% by weight or less. The aromatic ring is often 4-tolyl dimer, etc., especially MDI has been separated in the molecular structure of the ester group. The imide group is relatively low, which is ideal for improving solubility. Family or alicyclic diisocyanate includes hexamethylene diisocyanate, diisocyanate, and methylenebis (cyclohexyl diisocyanate) Cyanate ester) etc. The amine gentle polar solvents are dimethyltetramidine, dimethylformamide, N-methyl-pyrrolidone, 4-butyrolactone, and cyclobutane are preferably reacted at a high temperature, and N-methyl having a high boiling point is hereinafter referred to as NMP). Contained in the cause of the reduction of the molecular weight of the reactant due to the formation of trimellitic acid with TMA. There is no particular limitation on the non-polar solvent. Diamine, cyclohexanediamine and triacid anhydride combined The solubility reduction reaction cannot be carried out. The paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -21-Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 552694 A7 __B7 ___ V. Description of the invention (,, low It is not conducive to industrial production, so the ideal range is 10% to 70% by weight. Aromatic hydrocarbons that may be azeotropic with water are aromatic hydrocarbons such as benzene, xylene, benzene, toluene, etc., especially those with lower boiling points. Toluene that does not affect the working environment is better, and the amount used is preferably in the range of 0. 1 to 0. 5 weight ratio (10 to 50% by weight) of the non-orthoamine polar medium. The next description is based on the above (2) The silicon-modified polyamidamine / imine obtained by the method described above has a diamine compound 2 a having a siloxane-bound diamine, as shown in the above formula (5). Further, other diamines can also use the above diamines. 〇Tricarboxylic acid 2 b Chlorinated trimellitic acid can be produced by the well-known acid chlorination method. Next, the silicon modified polyfluorene amine imine obtained according to the method (3) described above, and a diisocyanate compound having 3 a siloxane bonded diisocyanate, The diisocyanate compound corresponding to the siloxane diamine having the siloxane-bound diisocyanate compound as shown in the above formula (Formula 4), and other diisocyanate compounds can be used. The tricarboxylic anhydride 3 b includes trimellitic anhydride, etc. Conventionally known diamine compounds are produced by reacting with diisocyanate compounds. Insulating substrates can be composed of single crystal short fiber-containing resin compositions. Especially when the resin itself does not have film-forming ability, it is effective to mix single crystal short fibers. The so-called film-forming energy refers to the ease of controlling a predetermined thickness when applying a lacquer to form a carrier film. After heating and drying to form a semi-hardened state, it has good workability for handling and cutting. ϋDimensions are applicable to China National Standard (CNS) A4 specifications (210X297 mm) '' --- -22-(Please read the notes on the back first (Please fill this page again)

552694 經濟部智慧財產局員工消費合作社印製 A7 ___ B7_五、發明説明（20) 生樹脂割裂或缺損，能確保其後加熱加壓時層間的絕緣層 爲最小厚度。無薄膜形成能的樹脂，通常分子量爲不超過 3 0，0 0 0的低分子量者。 具體的說，以玻璃纖維布爲基材浸漬熱硬化性樹脂的 絕緣基材較爲理想，熱硬化性樹脂可使用如環氧樹脂、雙 三吖嗪樹脂、聚醯亞胺樹脂、酚樹脂、三聚腈胺樹脂、矽 樹脂、不飽和聚酯樹脂、氰酸酯樹脂、二異氰酸酯樹脂、 或此等之變性樹脂等。 此中，爲提高層壓板的特性，以環氧樹脂、聚醯亞胺 樹脂或雙三吖嗪樹脂爲合適。 更進一步，環氧樹脂可自雙酚F型環氧樹脂、雙酚S 型環氧樹脂、苯酣醛型環氧樹脂、曱酚醛型環氧樹脂、雙 酚醛A型環氧樹脂、水楊酸醛型環氧樹脂、雙酚醛F型環 氧樹脂、脂環式環氧樹脂、環氧丙基醚型環氧樹脂、環氧 丙基胺型環氧樹脂、海因型環氧樹脂、三聚異氰酸酯型環 氧樹脂、脂肪族環狀環氧樹脂、及此等之鹵化物、氫添加 物之中選擇一種以上的樹脂使用。其中以雙酚醛A型環氧 樹脂及水楊酸醛型環氧樹脂、具優良耐熱性爲理想。 構成絕緣基材樹脂組成物配合的單結晶體短纖維，有 電路絕緣性陶瓷系單結晶體短纖維，以彈性率爲2 0 〇 G p a以上者爲佳，不足2 0 0 G p a者使用爲配線板材 料或配線時有可能得不到充分的剛性。 材料可自硼酸銘、砂灰石、鈦酸鉀、驗性硫酸鎂、氮 化矽及α氧化鋁中選擇一種以上使用。其中硼酸鋁單結晶 本紙張尺度適用中國國家標準（CNS ) Α4規格（210X 297公釐） (請先閱讀背面之注意事項再填寫本頁) #衣· 訂552694 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 ___ B7_ V. Description of the invention (20) The raw resin is cracked or defective, which can ensure the minimum thickness of the interlayer insulation layer after heating and pressing. A resin having no film-forming ability generally has a low molecular weight of not more than 30,000. Specifically, an insulating base material impregnated with a thermosetting resin using a glass fiber cloth as a base material is preferable. For the thermosetting resin, for example, epoxy resin, bis-triazine resin, polyimide resin, phenol resin, Trinitrile resins, silicone resins, unsaturated polyester resins, cyanate resins, diisocyanate resins, or these modified resins. Among these, in order to improve the characteristics of the laminate, an epoxy resin, a polyimide resin, or a bistriazine resin is suitable. Furthermore, the epoxy resin can be selected from bisphenol F-type epoxy resin, bisphenol S-type epoxy resin, benzaldehyde-type epoxy resin, fluorenol-type epoxy resin, bisphenol-A type epoxy resin, and salicylic acid. Aldehyde type epoxy resin, bisphenol F type epoxy resin, alicyclic epoxy resin, epoxypropyl ether type epoxy resin, epoxypropylamine type epoxy resin, Hein type epoxy resin, trimer Isocyanate-type epoxy resin, aliphatic cyclic epoxy resin, and these halides and hydrogen additives are selected from one or more resins. Among them, bisphenol-A epoxy resin and salicylic acid-aldehyde epoxy resin are preferable because they have excellent heat resistance. The single-crystal short fibers combined with the resin composition constituting the insulating base material include circuit-insulating ceramic-based single-crystal short fibers. The elastic modulus is preferably at least 200 G pa, and those with less than 200 G pa are used as wiring boards. Material or wiring may not be sufficiently rigid. The material can be selected from more than one type of borate name, limestone, potassium titanate, magnesium sulfate, silicon nitride, and alpha alumina. Among them, aluminum borate single crystal This paper size applies to Chinese National Standard (CNS) Α4 size (210X 297 mm) (Please read the precautions on the back before filling this page) # 衣 · 订

-23- 552694 A7 __B7 五、發明説明（21) ------1---衣-- (請先閲讀背面之注意事項再填寫本頁) 體短纖維、及駄酸紳卓結晶體短纖維的莫氏硬度與—·般半 固化基材的E玻璃約見相同，可得到向來固化片同樣的鑽 孔加工性。硼酸鋁單結晶體短纖維的彈性率高約爲4 〇 〇 G p a，容易與樹脂淸漆混合更爲理想。 此單結晶體短纖維的平均直徑以〇 . 3 // m〜3 // m 爲佳，範圍在0 · 5 // m〜1 . 〇 // m更好。此單結晶體 短纖維的平均直徑在0 . 3; m以下時，不容易與樹脂淸 漆混合，超過3 // m時不能充分的分散於樹脂中，表面形 成凹凸不平狀所以不理想。 又，平均直徑與平均長度的比在1 〇以上時可增加剛 性較爲理想，2 0以上更佳。比例不足1 〇的時候纖維的 強化效果小。平均長度的上限爲1 〇 〇 // m，以5 0 // m 較理想。超出此上限時除了難於分散在樹脂淸漆中外，二 個導體的迴路與一個單結晶體短纖維接觸的機率大增，銅 離子沿著單結晶體短纖維移轉的發生率提高。-23- 552694 A7 __B7 V. Description of the invention (21) ------ 1 --- Clothing-- (Please read the precautions on the back before filling in this page) Short body fibers and short acid crystals The Mohs hardness of the fiber is about the same as that of the E glass of a semi-cured base material, and the same drilling processability as a conventional cured sheet can be obtained. The aluminum borate single crystal short fiber has a high elasticity of about 400 G p a, and it is more preferable to be easily mixed with resin paint. The average diameter of the single crystal short fibers is preferably 0.3 // m3 to 3 // m, and the range is preferably from 0.5m / m to 1.m / m. When the average diameter of this single crystal short fiber is less than 0.3 m, it is not easy to mix with resin varnish. When it exceeds 3 // m, it cannot be sufficiently dispersed in the resin, and the surface is uneven, so it is not ideal. When the ratio of the average diameter to the average length is 10 or more, it is desirable to increase the stiffness, and it is more preferable to increase the rigidity by 20 or more. When the ratio is less than 10, the reinforcing effect of the fiber is small. The upper limit of the average length is 1 0 0 // m, and 50 0 // m is ideal. When the upper limit is exceeded, in addition to difficulty in dispersing in the resin varnish, the probability of the two conductor loops coming into contact with a single crystal short fiber is greatly increased, and the incidence of copper ion migration along the single crystal short fiber is increased.

經濟部智慧財產局員工消費合作社印製 又，爲提高配線基板的剛性、耐熱性及耐濕性，以使 用與樹脂有優秀濕潤性及聯結性的聯結劑處理表面的電路 絕緣性單結晶體短纖維爲佳，此類的聯結劑有矽系聯結劑 、鈦系聯結劑、鋁系聯結劑、鉻系聯結劑、鋁鉻系聯結劑 、鉻系聯結劑；硼系聯結劑、磷系聯結劑、氨基酸系聯結 劑等可供選擇使用。 此等樹脂的硬化劑，可使用向來使用的硬化劑，樹脂 爲環氧樹脂時可用醐基脲，雙酚A、雙酚F、聚乙烯酚、 醛樹脂，雙酚A醛樹脂及此等酚樹脂的鹵化物等可供使用 本紙張尺度適用中國國家標準（CNS ) A4規格（210 X 297公釐） -24- 552694 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（θ ，以耐熱性優異的隻酚Α醛樹脂爲理想。 此硬化劑與前述樹脂的比例，以向來使用的比例即可 ，以1 0 0重量份樹脂對2〜1 〇 〇重量份的範圍爲理想 ，更進一步，醐基脲則爲2〜5重量份，其他的硬化劑的 範圍則爲3 0〜8 0重量份。 樹脂爲環氧樹脂時可用咪唑化合物、有機磷化合物、 第三級胺 '第四級氨鹽作爲硬化促進劑。 此硬化劑促進與前述樹脂的比例，以向來使用的比例 即可，以1 0 0重量份樹脂對0 · 0 1〜2 0重量份的範 圍爲理想，更佳的範圍爲0 · 1〜1 . 〇。 此等硬化促進劑可使用溶劑加以稀釋、此類溶劑爲丙 酮、甲乙基酮、甲苯、二甲苯、甲基異丁烷、醋酸乙烯、 乙二醇單甲醚、甲醇、乙醇' N，N —二甲基二醯胺、二 甲替乙醯胺等。 此稀釋劑與前述樹脂的比例，以向來使用的比例即可 ，以1 0 0重量份樹脂對1〜2 0 0重量份的範圍爲理想 ，更理想的範圍爲3 0〜1 0 0重量份。 熱硬化性樹脂與單結晶體短纖維的比例爲硬化後樹脂 中單結晶體短纖維的體積比率調整爲5〜5 〇 %爲理想。 硬化後樹脂中單結晶體短纖維的體積比率不足5 %時，附 有銅箔的半固化片（銅箔/熱硬化樹脂層）切斷時樹脂細 碎飛散’作業上有顯著的困難，作成配線板時剛性降低。 一方面樹脂中單結晶體短纖維的體積比率超出5 〇 %時， 在加熱加壓成形時形成孔穴或迴路間隙充塡不完全，成形 (請先閲讀背面之注意事項再填寫本頁) 、11Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. In order to improve the rigidity, heat resistance and humidity resistance of the wiring board, the surface of the circuit is insulated with single crystal short fibers with a bonding agent that has excellent wetting and bonding properties with the resin. Preferably, such coupling agents include silicon-based coupling agents, titanium-based coupling agents, aluminum-based coupling agents, chromium-based coupling agents, aluminum-chromium-based coupling agents, chromium-based coupling agents; boron-based coupling agents, phosphorus-based coupling agents, Amino acid-based linking agents and the like are optional. As the hardener of these resins, conventional hardeners can be used. When the resin is epoxy resin, fluorenyl urea, bisphenol A, bisphenol F, polyvinyl phenol, aldehyde resin, bisphenol A aldehyde resin, and these phenols can be used. Resin halides, etc. can be used. This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) -24- 552694 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (θ, It is preferable that only phenol A aldehyde resin is excellent in heat resistance. The ratio of this hardener to the aforementioned resin may be a ratio that has been used conventionally, and a range of 100 parts by weight of the resin to 2 to 1,000 parts by weight is preferable. Furthermore, fluorenyl urea is 2 to 5 parts by weight, and the range of other hardeners is 30 to 80 parts by weight. When the resin is an epoxy resin, imidazole compounds, organic phosphorus compounds, and tertiary amines can be used. Quaternary ammonium salt is used as a hardening accelerator. The ratio of this hardening agent to the aforementioned resin may be the ratio used in the past, and the range of 100 parts by weight of resin to 0 · 0 1 to 20 parts by weight is ideal, and more The preferred range is from 0.1 to 1.0. These hardening accelerators can be diluted with solvents such as acetone, methyl ethyl ketone, toluene, xylene, methyl isobutane, vinyl acetate, ethylene glycol monomethyl ether, methanol, ethanol 'N, N — Dimethyldiamine, dimethylacetamide, etc. The ratio of this diluent to the aforementioned resin may be the ratio used in the past, and the range of 100 parts by weight of resin to 1 to 200 parts by weight is Ideally, a more desirable range is 30 to 100 parts by weight. The ratio of the thermosetting resin to the single crystal short fibers is preferably adjusted to 5 to 50% by volume of the single crystal short fibers in the cured resin. When the volume ratio of the single crystal short fibers in the rear resin is less than 5%, the resin shards are scattered when the prepreg with copper foil (copper foil / thermosetting resin layer) is cut off, and there is a significant difficulty in the operation, and the rigidity is reduced when the wiring board is made. On the one hand, when the volume ratio of the single crystal short fibers in the resin exceeds 50%, the formation of holes or circuit gaps during heating and pressure molding is incomplete and the molding is not completed (please read the precautions on the back before filling this page), 11

本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） -25- 552694 經濟部智慧財產局員工消費合作社印紫 A7 B7五、發明説明（23) 後發生空隙或網紋，絕緣有降下的狀況。又，樹脂與單結 晶體短纖維的比率，硬化後樹脂中單結晶體短纖維的體積 比率爲20〜40%爲理想。 本發明可使用的絕緣基材，由樹脂與溶劑所成的淸漆 與單結晶體短纖維混合，加以攪拌使單結晶體短纖維均勻 分散於淸漆中，塗覆於銅箔等支撐構件的一面後，加熱乾 燥除去溶劑使樹脂形成半固化狀。 於支撐構件上塗覆上述樹脂組成物形成絕緣基材時， 樹脂組成物的塗覆方式無特別限制，可採用括板塗覆機、 桿式塗覆機、括刀塗覆機、擠出塗覆機、逆轉輥輪塗覆、 移轉輥輪塗覆機等依支撐構件（如銅箔）的平行面方向以 剪力負載，或銅箔面的垂直方向以壓縮力負載的塗覆方法 〇 本發明的配線基板絕緣基材沒有露出導體構件的片面 可備以支撐構件，此處所用的支撐構件只要達到一定程度 的剛性，並無特別限制，金屬、樹脂及陶瓷之中最少含其 中的任一項即可。關於本發明的支撐構件係以金屬板或塑 膠板爲宜。 金屬板以銅板、鐵板、鋁板或其金屬的合金爲經濟且 理想。塑膠板可使用熱硬化性塑膠板或熱可塑性塑膠板。 熱硬化性塑膠板可使用酚樹脂、尿素樹脂、三聚氰胺 樹脂、醇酸樹脂、丙烯酸樹脂、不飽和聚酯樹脂、鄰苯二 甲酸二烯丙基酯樹脂、環氧樹脂、矽樹脂、由環戊烷二烯 所合成的樹脂、含三（2 -羥乙基）三聚異氰酸酯的樹脂 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) -26- 552694 經濟部智慧財產局員工消費合作社印製 A7 ___ B7_五、發明説明（24) 、由芳香族腈所合成的樹脂、三量化芳香族二氨腈樹脂、 含三燃丙基三甲基丙儲酸酯的樹脂、咲喃樹脂、酮類樹月旨 、二甲苯樹脂、含縮合多環芳香族的熱硬化性樹脂等。 熱可塑性塑膠可使用聚乙稀、聚丙烯、或4 -甲基戊 烷- 1樹脂、聚丁烷樹脂、及高壓法乙烯共聚物等的聚燦 樹脂，苯烯系樹脂、聚氯乙烯、聚偏氯乙烯、聚乙烯醇、 聚丙烯腈、聚丙烯酸系塑膠、二烯烴塑膠、聚胺、聚酯、 聚碳酸酯 '聚酵、氟素系樹脂、聚氨基甲酸乙酯系塑膠、 及聚苯乙烯系彈性物、聚烯系熱可塑性彈性物、聚胺系熱 可塑性彈性物、低結晶性1，2 -聚丁二烯、氯化聚合物 系熱可塑性彈性物等熱可塑性彈性物。 更進一步，此類樹脂、以玻璃纖維或纖維素等的絕緣 性纖維的織布、不織布之浸漬物，短玻璃纖維絲或絕緣性 單結晶體短纖維等的短纖維之混合物，或形成薄膜狀物作 爲支撐構件使用。 關於本發明的配線構件，單一的配線層亦可，或爲複 數的配線層及該配線層間形成絕緣的層間絕緣層，及層間 絕緣層內具預設的配線層間連線的貫通孔的多層配線構造 物亦可。配線層可置入複數的迴路，通常銅箔等的導體膜 可依蝕刻等的模紋化形成。又，以多層配線構造物形成爲 配線構件時，其形成方法無特別限制，配線層的形成、層 間絕緣層的形成、及貫通孔的形成依所定次數反覆進行， 可使用通常的薄膜製程。又，配線層的形成如成爲配線層 的導體層的表面所定的圖案在鍍金層形成後，以此鍍金層 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) 552694 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（2尹 作爲抗蝕圖將導體層蝕刻進行模紋化。 本發明的配線基板係將導體構件埋入於絕緣基材中， 導體構件的厚度以0.0lmm〜〇·15mm爲理想， 絕緣基材的厚度與導體構件厚度的差以大於0小於〇 . i mm爲理想。導體構件厚度不足〇.〇1mm時，於其上 搭載半導體元件得到最終的半導體裝置絕緣基材的厚度不 能達到充分絕緣性的厚度的情形。比0 · 1 5 m m厚的時 候導體構件形成的精度有不充分的情況。又，絕緣基材的 厚度與導體構件厚度的差，以導體構件的另一端能被絕緣 基材覆蓋的程度即已充分，超出0 · 1 mm時，要露出導 體構件的硏磨量太大，工業化的生產效率有惡化的情形。 又，絕緣基材裏面置入支撐材時，導體構件與絕緣基材的 厚度相同（即導體材貫穿絕緣基材的狀況）亦無妨。 導體構件埋入絕緣基材內的本發明的配線基板，提供 以較厚狀況的絕緣基材搭載半導體元件的步驟，獲得充分 的強度可耐此步驟或搬運時等附加的應力。特別是在絕緣 基材裏面（表裏之中無置入配線基材的那一面）置入支撐 構件時強度可增加較理想。使用本發明的絕緣基材內置入 支撐構件的配線基板，雖然配線構件的絕緣基材厚度較薄 ’亦有充分的強度可耐此步驟或搬運時等附加的應力。 更且依本發明的配線基板，搭載元件後除去一部份絕 緣基材，露出導體構件成爲外部電極，得到最終的半導體 裝置絕緣基材的厚度可以較薄，有助於組件的小型化。 本發明的配線基板，係以備有可在表裏的一面置入突 ---------— (請先閲讀背面之注意事項再填寫本頁) 訂This paper size applies Chinese National Standard (CNS) A4 specification (210X 297 mm) -25- 552694 Employee Cooperative Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs printed purple A7 B7 V. Description of the invention (23) A gap or netting occurs after insulation, and there is insulation Lowered condition. The ratio of the resin to the single-crystal short fibers is preferably 20 to 40% by volume of the single-crystal short fibers in the hardened resin. The insulating base material usable in the present invention is mixed with a varnish made of resin and a solvent and single crystal short fibers, and is stirred to uniformly disperse the single crystal short fibers in the varnish, and is coated on one side of a supporting member such as copper foil. , Heat and dry to remove the solvent to make the resin semi-cured. When the above-mentioned resin composition is coated on a support member to form an insulating substrate, the coating method of the resin composition is not particularly limited, and a plate coating machine, a rod coating machine, a knife coating machine, and extrusion coating can be used. Coater, reverse roll coater, transfer roll coater, etc., a method of applying a load according to the parallel plane direction of a supporting member (such as a copper foil) or a vertical direction of a copper foil surface by a compressive force. The insulative substrate of the wiring substrate of the invention can be provided with a supporting member without exposing the conductor member. The supporting member used here is not particularly limited as long as it achieves a certain degree of rigidity. At least one of metals, resins and ceramics is included. Item. The supporting member of the present invention is preferably a metal plate or a plastic plate. As the metal plate, a copper plate, an iron plate, an aluminum plate, or an alloy of a metal thereof is economical and desirable. As the plastic plate, a thermosetting plastic plate or a thermoplastic plastic plate can be used. Thermosetting plastic sheet can be made of phenol resin, urea resin, melamine resin, alkyd resin, acrylic resin, unsaturated polyester resin, diallyl phthalate resin, epoxy resin, silicone resin, cyclopentene Resin synthesized by alkadiene, resin containing tris (2-hydroxyethyl) trimeric isocyanate The paper size is applicable to China National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling in this Page) -26- 552694 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 ___ B7_ V. Description of Invention (24), Resin Synthesized from Aromatic Nitrile, Three-Quantitative Aromatic Diamino Nitrile Resin, Tripropylene Trimethylpropionate-based resins, sulfonated resins, ketone-based resins, xylene resins, thermosetting resins containing polycyclic aromatic rings, and the like. Thermoplastic plastics can be made of polyethylene, polypropylene, or 4-methylpentane-1 resin, polybutane resin, and high-pressure method ethylene copolymers, such as polycan resins, styrene-based resins, polyvinyl chloride, and polyethylene. Vinylidene chloride, polyvinyl alcohol, polyacrylonitrile, polyacrylic plastics, diene plastics, polyamines, polyesters, polycarbonate 'polymerases, fluorine resins, polyurethane plastics, and polybenzenes Thermoplastic elastomers such as ethylene-based elastomers, polyolefin-based thermoplastic elastomers, polyamine-based thermoplastic elastomers, low-crystalline 1,2-polybutadiene, and chlorinated polymer-based thermoplastic elastomers. Furthermore, a mixture of such resins, woven fabrics made of insulating fibers such as glass fibers or cellulose, impregnated non-woven fabrics, short fibers such as short glass fiber filaments or insulating single crystal short fibers, or formed into a film. Used as a support member. Regarding the wiring member of the present invention, a single wiring layer may be used, or a plurality of wiring layers and an interlayer insulating layer forming insulation between the wiring layers, and a multilayer wiring having a through-hole in the interlayer insulating layer with a predetermined wiring interlayer connection line. Structures are also possible. The wiring layer can be placed in a plurality of circuits. Generally, a conductor film such as copper foil can be formed by patterning such as etching. When a multilayer wiring structure is formed as a wiring member, the method for forming the wiring member is not particularly limited. The formation of the wiring layer, the formation of the interlayer insulating layer, and the formation of the through-holes are repeated a predetermined number of times, and a normal thin film process can be used. The formation of the wiring layer, such as the pattern defined on the surface of the conductor layer of the wiring layer, is formed after the gold plating layer is formed, and the gold plating layer is used for this paper. Please pay attention to this page and fill in this page) 552694 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (2 Yin is used as a resist to etch and pattern the conductor layer. The wiring substrate of the present invention is a conductor member Buried in an insulating substrate, the thickness of the conductive member is preferably from 0.0lmm to 0. 15mm, and the difference between the thickness of the insulating substrate and the thickness of the conductive member is preferably greater than 0 and less than 0.1 mm. The thickness of the conductive member is less than 〇. If the thickness is 0 mm, the thickness of the final insulating substrate of a semiconductor device obtained by mounting a semiconductor element on it may not be sufficiently thick. If it is thicker than 0 · 15 mm, the accuracy of formation of the conductive member may be insufficient. In addition, the difference between the thickness of the insulating base material and the thickness of the conductive member is such that the other end of the conductive member can be covered by the insulating base material, which is more than 0 · 1 mm. If the amount of honing of the conductive member is exposed, the industrial production efficiency may be deteriorated. In addition, when the supporting material is placed in the insulating substrate, the thickness of the conductive member and the insulating substrate is the same (that is, the conductive material penetrates the insulating substrate). The wiring board of the present invention in which a conductor member is embedded in an insulating substrate provides a step for mounting a semiconductor element on a relatively thick insulating substrate, and obtains sufficient strength to withstand additional steps such as this step or during transportation. Stress. Especially when the supporting member is placed inside the insulating substrate (the side where the wiring substrate is not placed), the strength can be increased. The wiring substrate using the insulating substrate of the present invention built into the supporting member, although The thickness of the insulating substrate of the wiring member is relatively thin. It also has sufficient strength to withstand additional stresses such as this step or during transportation. Furthermore, according to the wiring substrate of the present invention, a part of the insulating substrate is removed after the component is mounted to expose the conductive member. As an external electrode, the thickness of the final insulating substrate of the semiconductor device can be reduced, which contributes to the miniaturization of the module. The base plate is provided with a projection that can be placed on one side of the table ---------— (Please read the precautions on the back before filling this page) Order

本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -28- 552694 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（3 起狀的配線構件、與絕緣基材，以導體構件爲內側相向層 壓的層壓步驟的製造方法而製作的配線基板。又，本發明 的配線基板，係以備有可在表裏的一面置入突起狀的導體 層、與絕緣基材，以導體構件爲內側相向層壓的層壓步驟 ，及除去不需要的導體層的地方形成配線層的配線層形成 步驟的製造方法而製作的配線基板。 絕緣基材與配線構件的粘著，係使用由熱硬化性樹脂 組成物所成的硬化前的粘著劑作爲絕緣基材，將配線構件 重疊加熱加壓使其硬化的技巧達成。作爲絕緣基材使用的 未硬化前的粘著劑自身無支撐性時，支撐構件表面將硬化 前的粘著劑製成膜狀作爲絕緣基材即可。在此狀況，依支 撐構件、絕緣基材、配線基材的順序層壓，可得到導體構 件埋入絕緣基材中的配線基板。 又，配線基板置入支撐構件時，以配線層/導體層置 入的導體構件的一面，與絕緣基材置入支撐構件的一面相 向層壓的層壓步驟即可。 又，配線層/導體層過薄而無自身的支撐性時，配線 層/導體層的另一面（即無置入導體構件的那一面）可設 置臨時支撐板，依此狀況本發明的配線基板製造方法，在 層壓步驟後準備除去臨時支撐板的步驟爲理想。 有關本發明的導體構件爲配線層/導體層表面置入的 突起狀構件。可用電鍍形成此導體構件，或以除去一部份 的導體膜形成亦可。 又，本發明的配線板製造方法，亦可備有將導體板的 本纸張尺度適用中國國家襟準（CNS ) A4規格（210X297公釐） ' -29- (請先閲讀背面之注意事項再填寫本頁) 552694 A7 B7 經濟部智慧財產局員工消費合作社印紫 五、發明説明（27) 一部份去除而形成配線層及/或導體構件的蝕刻步驟。此 時可使用依第一導體層、第二導體層及第三導體層順序層 壓的層壓板作爲導體板。使用此三層的層壓板時，蝕刻步 驟以具備第一導體層的一部份蝕刻後形成配線層的配線層 形成步驟、第三導體層的一部份蝕刻後形成導體構件的導 體構件形成步驟，及第二導體層的露出位置以蝕刻除去的 隔離鈾刻步驟爲理想。此配線層形成步驟，係在第一導體 層表面以鍍金形成圖案，以該鍍金圖案爲抗蝕圖將第一導 體層蝕刻形成配線層的步驟。 又，本發明的配線基板製造方法，可更進一步具備將 導體板的一部份除去後形成導體構件的導體構件形成步驟 。此時可使用依第一導體層、第二導體層及第三導體層順 序層壓的層壓板作爲導體板。使用此三層的層壓板時，蝕 刻步驟以具備第一導體層的一部份蝕刻後形成配線層的配 線層形成步驟、第三導體層的一部份蝕刻後形成導體構件 的導體構件形成步驟，及第二導體層的露出位置以蝕刻除 去的隔離蝕刻步驟爲理想。 本發明的配線基板特別適合於搭載半導體元件樹脂封 裝型半導體裝置的製造。所以本發明具備上述本發明的配 基板的配線層表面搭載半導體元件的搭載步驟，半導體元 件與配線層表面的配線連接電路的連接步驟，及除去一部 份絕緣基材至少露出一部份上述導體構件的絕緣基材去除 步驟的半導體裝置的製造方法，並提供依該製造方法所製 造的半導體裝置。依本發明的製造方法所製造的半導體裝 (請先閱讀背面之注意事項再填寫本頁)This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) -28- 552694 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (3 Wiring wiring members and insulating substrates, A wiring board produced by a manufacturing method of a lamination step in which a conductive member is laminated inside. The wiring board of the present invention includes a conductive layer that can be placed on the front and back surfaces and an insulating substrate. , A wiring substrate produced by a manufacturing method of a lamination step in which a conductor member is laminated inside and a wiring layer forming step in which a wiring layer is formed at a place where an unnecessary conductor layer is removed. Adhesion of an insulating substrate to the wiring member, This is achieved by using a pre-curing adhesive made of a thermosetting resin composition as an insulating substrate, and heating and pressing the wiring member in an overlapping manner to cure it. The uncured adhesive used as an insulating substrate is achieved. If it is not supportive, the surface of the support member can be made into a film as an insulating substrate before the hardening adhesive. In this case, depending on the support member, the insulating substrate, Wire substrates are sequentially laminated to obtain a wiring board with a conductor member embedded in an insulating base material. When the wiring board is placed in a support member, one side of the conductor member placed in the wiring layer / conductor layer and the insulating base material are obtained. The lamination step of one side where the supporting member is placed facing each other is sufficient. When the wiring layer / conductor layer is too thin and does not have its own supportability, the other side of the wiring layer / conductor layer (that is, the one without the conductive member) (One side) A temporary support plate may be provided. According to the situation, the method for manufacturing a wiring substrate of the present invention is preferably a step of removing the temporary support plate after the lamination step. The conductor member of the present invention is provided on the surface of the wiring layer / conductor layer. The protruding member. This conductive member can be formed by electroplating, or it can be formed by removing a part of the conductive film. In addition, the method for manufacturing a wiring board of the present invention can also be prepared by adapting the paper size of the conductive board to the national standard of China. Standard (CNS) A4 specification (210X297 mm) -29- (Please read the precautions on the back before filling out this page) 552694 A7 B7 Employee Cooperative Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs Explain (27) An etching step in which a part is removed to form a wiring layer and / or a conductor member. At this time, a laminate plate sequentially laminated with the first conductor layer, the second conductor layer, and the third conductor layer may be used as the conductor plate. When using this three-layer laminate, the etching step includes forming a wiring layer forming step of forming a wiring layer after part of the first conductor layer is etched, and forming a conductor member of the third conductor layer to form a conductor member after etching. The step and the exposed position of the second conductor layer is preferably an isolation uranium etch step that is removed by etching. This wiring layer forming step is to form a pattern on the surface of the first conductor layer by gold plating, and use the gold plating pattern as a resist pattern to change the first The step of etching the conductor layer to form a wiring layer. The method for manufacturing a wiring board of the present invention may further include a step of forming a conductor member by removing a part of the conductor plate to form a conductor member. In this case, a laminate plate in which the first conductor layer, the second conductor layer, and the third conductor layer are sequentially laminated may be used as the conductor plate. When using this three-layer laminate, the etching step includes a wiring layer forming step in which a part of the first conductor layer is etched to form a wiring layer, and a portion of the third conductor layer is etched to form a conductor member. And the exposed position of the second conductor layer is preferably an isolated etching step for etching and removing. The wiring substrate of the present invention is particularly suitable for manufacturing a semiconductor device resin-molded semiconductor device. Therefore, the present invention is provided with the mounting step of mounting the semiconductor element on the surface of the wiring layer of the distribution board of the present invention, the step of connecting the semiconductor element and the wiring connection circuit on the surface of the wiring layer, and removing a part of the insulating substrate to expose at least a part of the conductor A method for manufacturing a semiconductor device in the step of removing an insulating base material of a member, and a semiconductor device manufactured by the manufacturing method is provided. Semiconductor device manufactured by the manufacturing method of the present invention (please read the precautions on the back before filling this page)

本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -30- 552694 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（28) 置’導體構件具半導體裝置的外部電極（外部連接端子） 的機能。 又’配線基板具支撐構件時，上述本發朋的半導體裝 、 · 的製造方·法，以具備至少除去支撐構件的一部'儉至少露出 絕緣基材的支撐構件去除步驟爲理想。有關此支撐構件去 除步驟可用硏磨、化學蝕刻及機械加工之中任一方法除去 支撐構件。 又，有關絕緣基材的去除步驟可用硏磨、雷射、及触 刻之中任一方法除去上述絕緣基材。 將絕緣基材除去至少露出一部份導體構件作爲外部電 極的機能。爲此，在絕緣去除步驟後，可具備導體的露出 位置形成鍍金層的步驟、及/或導體構件的露出位置形成 焊點的步驟。形成鍍金層時，可先以鍍鎳作爲其基礎。 本發明允許一個配線基板上搭載複數的半導體元件， 亦可更進一步搭載半導體元件以外的被動配件。半導體元 件舆配線層的配線之連接可用引線接合，亦可用直接元件 連接的突出物配線的接續式元件 本發明的半導體裝置的製造方法，更進一步具備以封 裝構件覆蓋封裝半導體元件的封裝步驟更爲理想。在此情 況時，具硏磨封裝構件至少露出半導體元件一部份（例如 背面）的步驟.爲理想。如此露出半導體元件的一部份時， 可獲得優異放熱特性的半導體裝置。 本發明的半導體裝置具體的說可如下述方式獲得，即 首先在支撐構件的金屬板上，形成柱狀導體構件成爲將來 本紙張尺度適用中.國國家標準（CNS ) A4規格（210 X 297公釐） I --1·- II —ί-_ - - - I —1 ϋ (請先閲讀背面之注意事項再填寫本頁) 訂This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) -30- 552694 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (28) 'Conductor members with external electrodes for semiconductor devices (External connection terminal) function. In the case where the wiring board has a supporting member, the above-mentioned manufacturing method of the semiconductor device is preferably a step of removing the supporting member with at least a part of the supporting member removed, at least exposing an insulating base material. The supporting member removal step may be performed by any of honing, chemical etching, and machining. In addition, in the step of removing the insulating substrate, the insulating substrate may be removed by any of honing, laser, and contacting methods. Removing the insulating base material exposes at least part of the function of the conductive member as an external electrode. For this purpose, after the insulation removal step, a step of forming a gold plating layer at the exposed position of the conductor and / or a step of forming a solder joint at the exposed position of the conductor member may be provided. When forming a gold-plated layer, nickel plating can be used as the basis first. The present invention allows a plurality of semiconductor elements to be mounted on one wiring substrate, and passive components other than semiconductor elements can be further mounted. The connection of the wiring of the semiconductor element wiring layer can be wire-bonded, or a spliced element that can also be connected by the protrusions of the direct element connection. The method for manufacturing a semiconductor device of the present invention further includes a packaging step of encapsulating the semiconductor element with a packaging member. ideal. In this case, the step of honing the package member to expose at least a part of the semiconductor element (for example, the back surface) is ideal. When a part of the semiconductor element is exposed in this way, a semiconductor device having excellent heat dissipation characteristics can be obtained. Specifically, the semiconductor device of the present invention can be obtained as follows. First, a columnar conductive member is formed on a metal plate of a supporting member to become applicable to this paper standard in the future. National Standard (CNS) A4 (210 X 297) %) I --1 ·-II —ί-_---I —1 ϋ (Please read the precautions on the back before filling this page) Order

-31 - 552694 A7 B7 五、發明説明（2¾ 外部電極的的導體層（例如金屬層），將導體構件與支擦 構件重疊連接，以絕緣基材的粘著性樹脂媒介貼合。其次 ，除去金屬層不需要的部份形成由含複數回路的配線層所 成的配線構件。由此獲得本發明半導體晶片搭載用配線基 板。又，以層間絕緣層爲媒介將配線層複數層壓，使配線 材含有多層配線。續之，半導體元件搭載於所得的配線基 板，將配線層的回路與半導體元件作電路的連接後，以樹 脂封裝半導體元件（模型封裝），去除支撐構件後得到樹 脂封裝型半導體裝置。 又，成爲外部電極的柱狀的導體構件，由金屬面較厚 的一面將導電構件位置以外的位置以蝕刻除去將較厚方向 的部份形成導構件後，形成此導電構件的金屬層及支撐構 件，使導體構件與支撐部重疊接觸，介入作爲絕緣基材的 粘著劑使其粘貼，由形成導體構件的金屬層未被蝕刻而殘 留的金屬層以蝕刻除去不需要位置，形成由配線層而成的 配線構件，可得到本發明搭載半導體元件用配線基板。與 上述情況一樣，於所得的配線基板上搭載元件，將配線層 的回路與半導體元件連接電路後，半導體元件以樹脂封裝 (模型封裝），去除支撐構件後得到樹脂封裝型半導體裝 置。 此方法的情況，上述比較厚的金屬層，可使用由第一 導體層成的配線層，及由第三導體層所成的導體構件，及 與第一及第三導體層相異蝕刻條件的第二導體層，依第一 導體層/第二導體層/第三導體層的順序層壓的層壓膜。 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） — IL——r---曹_丨 (請先閱讀背面之注意事項再填寫本頁)-31-552694 A7 B7 V. Description of the invention (2¾ Conductor layer (such as metal layer) of the external electrode, the conductor member and the support member are overlapped and connected, and the resin substrate is bonded by the adhesive resin medium of the insulating substrate. Next, remove The unnecessary portion of the metal layer forms a wiring member made of a wiring layer including a plurality of circuits. Thus, a wiring substrate for mounting a semiconductor wafer according to the present invention is obtained. In addition, a plurality of wiring layers are laminated using an interlayer insulating layer as a medium to make wiring. The material contains multilayer wiring. Continuing, the semiconductor element is mounted on the obtained wiring substrate. After the circuit of the wiring layer and the semiconductor element are connected as a circuit, the semiconductor element is encapsulated with a resin (model package), and the resin-encapsulated semiconductor is obtained after removing the supporting member. In addition, a columnar conductive member that becomes an external electrode is formed by etching a portion of a thicker portion of the conductive member from a position other than the conductive member by a thicker metal surface, and then forming a metal layer of the conductive member. And the supporting member, the conductive member and the supporting portion are brought into contact with each other, and an adhesive as an insulating substrate is interposed to make the adhesive The wiring member for mounting a semiconductor element according to the present invention can be obtained by forming a wiring member made of a wiring layer by removing unnecessary positions by etching the metal layer remaining on the metal layer forming the conductor member without etching, and obtaining a wiring board for mounting a semiconductor element according to the present invention. A component is mounted on the obtained wiring substrate, and the circuit of the wiring layer and the semiconductor component are connected to the circuit, and then the semiconductor component is encapsulated with a resin (model package), and a resin-molded semiconductor device is obtained after removing the supporting member. As the metal layer, a wiring layer composed of a first conductor layer, a conductor member composed of a third conductor layer, and a second conductor layer different from the etching conditions of the first and third conductor layers can be used. Layer, second conductor layer, and third conductor layer. Laminated film laminated in this order. This paper size applies to China National Standard (CNS) A4 specification (210 × 297 mm) — IL——r --- 曹 _ 丨 (Please (Read the notes on the back before filling out this page)

、1T, 1T

經濟部智慧財產局員工消費合作社印製 -32- 552694 A7 __B7__ 五、發明説明（Μ 即除去此三層層壓膜的第三導體層的不需要的位置，形成 由柱狀導體構件的外部電極，蝕刻除去依此露出的第二導 體層後，形成此導體構件的第三層壓膜及支撐構件，使導 體構件與支撐部重疊接觸，介入作爲絕緣基材的粘著劑使 其粘貼，除去第一導體層不需要的位置，形成由含複數回 路的配線層所成的配線構件，可得到本發明搭載半導體元 件用配線基板。與上述情況一樣，於所得的配線基板上搭 載元件，將配線層的回路與半導體元件連接電路後，半導 體元件以樹脂封裝（模型封裝），去除支撐構件後得到樹 脂封裝型半導體裝置。 如此，使用具備支撐構件的配線基板製作半導體裝置 時，通常在搭載元件後除去支撐構件後，將絕緣基材面硏 磨，容易的露出導體構件端部。又，除去支撐構件後，亦 可用雷射照射被埋設的導體構件使其露出一部份。 本發明亦使用未具備導體構件的本發明的配線基板製 造半導體裝置。即使用由配線構件及絕緣基材及撐構件依 此順序層壓所成的配線基板，在該配線基板上搭載半導體 元件，連接半導體元件與配構件表面的配線的電路、至少 去除支撐構件的一部份至少露出一部份絕緣基材、至少去 除一部份絕緣基材形成貫通孔、至少露出一部份配線、及 以導體塡充貫通孔連接配線形成導體構件得到半導體裝置 〇 又，貫通的形成，以硏磨、蝕、雷射加工等的任一方 法均無妨。例如以雷射加工打通貫通孔時，雷射的種類無 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） — ~ ----^---r---衣-- (請先閲讀背面之注意事項再填寫本頁)Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs-32- 552694 A7 __B7__ V. Description of the invention (M is the unnecessary position of the third conductor layer except the three-layer laminate film, forming an external electrode made of a columnar conductor After the second conductor layer exposed in this way is removed by etching, a third laminated film and a supporting member of the conductive member are formed, the conductive member and the supporting portion are brought into contact with each other, and an adhesive as an insulating base material is interposed to stick and remove A wiring member made of a wiring layer including a plurality of circuits is formed at an unnecessary position of the first conductor layer, and a wiring board for mounting a semiconductor element according to the present invention can be obtained. In the same manner as described above, a component is mounted on the obtained wiring board, and wiring is performed. After the circuit of the layer is connected to the semiconductor element, the semiconductor element is encapsulated in a resin (model package), and the resin-encapsulated semiconductor device is obtained after removing the supporting member. Thus, when a semiconductor device is manufactured using a wiring substrate provided with a supporting member, the component is usually mounted after After removing the support member, honing the insulating substrate surface to easily expose the end of the conductor member In addition, after removing the supporting member, the buried conductive member may be exposed by laser irradiation. The present invention also uses a wiring substrate of the present invention that does not include a conductive member to manufacture a semiconductor device. That is, the wiring member and the insulating substrate are used. The wiring board formed by laminating materials and supporting members in this order. A semiconductor element is mounted on the wiring board. The circuit connecting the semiconductor element and the wiring on the surface of the distribution member is removed at least a part of the supporting member and at least a part of the insulation is exposed. The semiconductor device is obtained by removing a base material, removing at least a part of the insulating base material to form a through hole, exposing at least a part of the wiring, and forming a conductive member by filling the through hole with the conductor and connecting the wiring to the semiconductor device. Any method such as laser processing is not necessary. For example, when laser processing is used to open through holes, the type of laser is not the same as this paper. The Chinese standard (CNS) Α4 specification (210 × 297 mm) is applicable. ~ ~ ---- ^ --- r --- yi-- (Please read the precautions on the back before filling this page)

、1T, 1T

經濟部智慧財產局員工消費合作社印製 552694 經濟部智慧財產局員工消費合作社印製 A7 __ B7五、發明説明（31) 特別限制，二氧化碳雷射、U V — Y A G雷射等均適用。 開孔的條件，依絕緣基材配線板的厚度及材質適當的 加調整即可，以實驗求得較爲理想。雷射照射的能量以 〇 · 0 0 1 W〜1 W的範圍，雷射振盪用電源加以脈衝化 ’控制不使大量的能量集中爲理想。 又，以雷射開出的貫通孔要使其達到配線構件的配線 ’且孔徑要僅可能的小，驅動雷射振盪用電源的脈衝波形 占空率比在1 / 1 0 0 0〜1 / 1 0的範圍、照射1〜 2 0發（脈衝）爲理想。脈衝波形占空率比不足1 / 1 0 0 0時開孔時間長無生產效率，超出1 / 1 0時照射 能量過大穴徑大於1mm以上不實用。發（脈衝）數以實 驗求得穴內的粘著劑蒸發達到內層回路爲止所需而定，不 足1發無法開穴，2 0發以上時，1發的脈衝波形占空率 比接近1/1 0 0 0時，穴徑亦過大不實用。 如此形成貫通孔後，爲除去貫通孔內的粘著劑，以進 行消拖尾處理爲理想。消拖尾處理一般可使用酸性的氧化 性粗化液或鹼性氧化性粗化液。可使用的酸性的氧化性粗 化液有鉻/硫酸，鹼性氧化粗化液有過錳酸鉀等。 又，粘著劑以氧化性的粗化液粗化後，絕緣樹脂表面 的氧化性粗化液作化學中和爲理想，可使用一般的技巧。 例如使用鉻/硫酸粗化液時，於室溫以1〇忌/中的亞硫 酸氫鈉處理5分鐘，又，使用過錳酸鉀粗化液時於室溫以 1 5 0 m 1 / 1的硫酸浸漬5分鐘完成中和。 ------1---衣-- (請先閲讀背面之注意事項再填寫本頁) 訂Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 552694 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 __ B7 V. Description of the Invention (31) Special restrictions, carbon dioxide laser, U V — Y A G laser, etc. are applicable. The conditions for opening the holes can be adjusted appropriately according to the thickness and material of the wiring board of the insulating base material, which is ideally obtained through experiments. The energy of the laser irradiation is in the range of 0. 0 1 W to 1 W, and the laser oscillation power supply is pulsed. It is desirable that the control does not concentrate a large amount of energy. In addition, the through hole opened by the laser must reach the wiring of the wiring member, and the aperture must be as small as possible, and the duty ratio of the pulse waveform for driving the laser oscillation power supply is 1/1 0 0 0 ~ 1 / A range of 10, and 1 to 20 shots (pulses) are ideal. When the duty ratio of the pulse waveform is less than 1/1 0 0 0, the hole opening time is long and there is no production efficiency. When the ratio exceeds 1/10, the irradiation energy is too large and the hole diameter is greater than 1 mm. It is not practical. The number of shots (pulses) is determined by experimentally obtaining the evaporation of the adhesive in the hole to the inner circuit. If the number of shots is less than 1 shot, the hole cannot be opened. When the shot is more than 20 shots, the duty ratio of the pulse waveform of 1 shot is close to 1. At / 1 0 0 0, the hole diameter is too large and impractical. After the through-holes are formed in this manner, in order to remove the adhesive in the through-holes, a smearing treatment is preferably performed. Anti-smearing treatment can generally use an acidic oxidizing roughening solution or an alkaline oxidizing roughening solution. Examples of the acidic oxidizing roughening solution include chromium / sulfuric acid, and the basic oxidizing roughening solution includes potassium permanganate. After the adhesive is roughened with an oxidizing roughening solution, the oxidizing roughening solution on the surface of the insulating resin is preferably chemically neutralized, and general techniques can be used. For example, when using a chromium / sulfuric acid roughening solution, treat with sodium bisulfite at 10 ° C for 5 minutes at room temperature, and use potassium permanganate roughening solution at room temperature at 150 m 1/1 Neutralize by immersing in sulfuric acid for 5 minutes. ------ 1 --- 衣-(Please read the precautions on the back before filling this page) Order

本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） 552694 經濟部智慧財產局員工消費合作社印製 A7 B7五、發明説明（今 實施例 <實施例1 > 本實施例如圖1 a〜圖1 g所示製作成樹脂封裝型半 導體裝置。 首先，0 · 0 3 5mm厚的電解銅箔的表裏的一面鍍 上0 · 0 0 1 m m厚的鎳層（圖上未顯示）後，在其表面 鍍0 _ 0 0 9 m m厚的銅膜。其次，在電解銅箔的另一面 層壓感光性抗蝕乾膜（日立化成工業（株）製FOTEX T Y - 3 0 2 5 )經曝光、顯像、形成突出物的圖案，以 鹼性浸鈾劑鈾刻電解銅箔形成高度0 . 0 3 5 m m的突出 物（導體構件）3後，將抗蝕膜剝離，以銅浸蝕速度慢的 鎳浸蝕液除去露出的鎳層。 接著，所得的附有突出物3的銅膜與厚度0‘· 0 5 0 mm的金屬片1 (不繡鋼SUS304)的支撐構件，介 以厚度0 . 0 5 m m的粘著劑2 (日立化成工業（株）製 S P A I )作爲絕緣基材，將突出物3以層壓埋入粘著劑 2中。 其次在鍍銅膜上層壓感光性抗鈾乾膜（日立化成工業 (株）製FOTEX RY— 3025)經曝光、顯像、 形成配線鍍金用抗蝕圖案後，鍍上厚度0 · 0 0 3 m m的 鎳（圖上未顯示）及厚度爲0 . 0 0 0 3 m m純度爲 9 9 · 9 %以上的金（圖上未顯示），以鹼性浸蝕劑蝕刻 電解銅箔，得到具由配線模紋所成的配線層的配線構件4 。依此得到配線基板1 1 0。 (請先閲讀背面之注意事項再填寫本頁) 訂This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 552694 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (this embodiment < Example 1 > A to Figure 1g are fabricated into resin-encapsulated semiconductor devices. First, a 0. 0 0 1 mm thick nickel layer (not shown in the figure) is plated on the front and back surfaces of a 0. 0 3 5 mm thick electrolytic copper foil. A copper film with a thickness of 0 _ 0 0 9 mm was plated on the surface. Next, a photosensitive dry resist film (FOTEX TY-3 0 2 5 manufactured by Hitachi Chemical Industries, Ltd.) was laminated on the other side of the electrolytic copper foil. After exposing, developing, and forming a pattern of protrusions, the electrolytic copper foil was etched with alkaline uranium leaching agent uranium to form protrusions (conductor members) 3 with a height of 0.35 mm, and the resist film was peeled off at a copper etching speed. The slow nickel etching solution removes the exposed nickel layer. Next, the obtained copper film with the protrusions 3 and the supporting member of the metal sheet 1 (stainless steel SUS304) with a thickness of 0 ′ · 0 50 mm are interposed by a thickness of 0. 0 5 mm Adhesive 2 (SPAI manufactured by Hitachi Chemical Industries, Ltd.) as an insulating substrate The protrusion 3 is laminated in the adhesive 2. The photosensitive uranium-resistant dry film (FOTEX RY-3025 manufactured by Hitachi Chemical Industries, Ltd.) is laminated on the copper-plated film, and then exposed, developed, and formed wiring gold plating. After using the resist pattern, nickel with a thickness of 0 · 0 0 3 mm (not shown in the figure) and gold with a thickness of 0. 0 0 3 mm with a purity of 9 9 · 9% or more (not shown in the picture), The electrolytic copper foil is etched with an alkaline etchant to obtain a wiring member 4 having a wiring layer formed by a wiring pattern. In this way, a wiring board 1 1 0 is obtained. (Please read the precautions on the back before filling this page)

本紙張尺度適用中國國家標準（CNS ) A4規格（210X29*7公釐） -35- 552694 經濟部智慧財產局員工消費合作社印製 A7 B7____五、發明説明（3弓 續之，在具內藏突出物3的配線4的配線基板1 1 0 上，以半導體用非導電性粘著劑膜（模粘合材）將L S I (大型集成電路）元件6搭載後（圖1 b) ’ LS I元件 的端子與配線端子4以配線1 0 〇連接（圖1 c ) ° 依此所成的組裝物固定於遞模上，以半導體封裝樹脂 7 (日立化成工業（株）製C E L 4 0 0 )封裝。以蝕刻 除去金屬片1 ，露出粘著劑2的表面後（圖1 e )’硏磨 粘著劑表面露出突出物的頂端（圖1 ί )。 最後，在突出物露出的頂部配置熔融焊點8 ’得到如 圖1 g的樹脂封裝型半導體裝置1 2 0。所得的半導體裝 置1 2 0其配線4以突出物3及焊點8爲媒介與外部的配 線連接。 <實施例2 > 本實施例如圖2 a〜圖2 f所示製作成樹脂封裝型半 導體裝置。 與實施例1相同，製作具金屬支撐構件1與配線4及 突出物3的配線基板1 1 0 (圖2 a )，此基板1 1 0的 配線4上搭載端子部具金突出物2 0 0的L S I元件6， 金突出物2 0 0與配線4以熱壓使其相互連接後（圖2 b )，L S I元件6與配線基板之間以液狀環氧樹脂（下塡 材）11充塡硬化（圖2c)。 依此所成的組裝物固定於遞模上，以半導體封裝樹脂 7 (日立化成工業（株）製CEL400 )封裝後（圖 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公f ) -36- 552694 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（ 2 d )。以酸性浸蝕液除去金屬片1，露出粘著劑2的表 面， 接著，以機機硏磨粘著劑層2至表面露出突出物3的 頂端（圖2 e )，在突出物露出的頂部配置焊點8 ’該位 置再熔融之後，得到如圖2 f的樹脂封裝型半導體裝置 1 3 0。所得的半導體裝置1 3 0其配線4以突出物3及 焊點8爲媒介與外部的配線連接。 <實施例3 > 本實施例如圖3 a〜圖3 f所示製作成樹脂封裝型半 導體裝置。 首先，以0 · 0 2 0 m m厚的電解銅箔的一面鑛上 〇 · 〇 〇 1 m m厚的鎳層（圖上未顯示）後形成鎳膜，在 其表面鑛上0 . 0 1 2mm厚的銅膜。其次，在電解銅箔 的另一面層壓感光性抗鈾乾膜（日立化成工業（株）製 F Ο T E X TY - 3025)經曝光、顯像、形成突出 物的鈾刻圖案，以鹼性浸蝕劑蝕刻電解銅箔形成高度 0 . 0 2 0 m m的突出物（導體構件）3後，將抗蝕膜剝 離，以銅浸蝕速度慢的鎳浸鈾液除去露出的鎳層。 接著，所得的附有突出物3的銅膜與厚度0 . 1 0 0 mm的金屬片1 (不繡鋼SUS304)的支撐構件，介 以厚度0 · 0 3 0 m m的粘著劑2 (日立化成工業（株） 製S P A I )作爲絕緣基材，將突出物3以層壓埋入粘著 劑2中。 丨 r---衣-- (請先閱讀背面之注意事項再填寫本頁) 、11This paper size applies the Chinese National Standard (CNS) A4 specification (210X29 * 7mm) -35- 552694 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7____ V. Description of the invention (continued with 3 bows. After the LSI (large integrated circuit) device 6 is mounted on the wiring board 1 1 0 of the wiring 4 of the protrusion 3 with a non-conductive adhesive film (mold adhesive) for semiconductors (Fig. 1 b) 'LS I device The terminals and wiring terminals 4 are connected by wiring 100 (Figure 1c). The assembly thus formed is fixed on a transfer mold and packaged with semiconductor packaging resin 7 (CEL 4 0 0 manufactured by Hitachi Chemical Industry Co., Ltd.). The metal sheet 1 is removed by etching, and the surface of the adhesive 2 is exposed (Fig. 1e). The top of the protrusion is exposed by honing the adhesive surface (Fig. 1). Finally, fusion welding is arranged on the exposed top of the protrusion. At point 8 ', a resin-encapsulated semiconductor device 120 as shown in Fig. 1g is obtained. The obtained semiconductor device 120 has its wiring 4 connected to the external wiring with the protrusion 3 and the solder joint 8 as the medium. ≪ Example 2 > This example is made into a resin-encapsulated semiconductor as shown in Figure 2a to Figure 2f The device is the same as in Example 1. A wiring board 1 1 0 (FIG. 2 a) having a metal supporting member 1 and wiring 4 and protrusions 3 is fabricated, and the terminal 4 with gold protrusions 2 is mounted on the wiring 4 of this substrate 1 10. 0 0 LSI element 6, gold protrusion 2 0 0 and wiring 4 are connected to each other by hot pressing (Fig. 2b), liquid epoxy (lower metal) 11 is used between LSI element 6 and wiring substrate Filled and hardened (Figure 2c). The assembly thus formed is fixed on a transfer mold and sealed with semiconductor packaging resin 7 (CEL400 manufactured by Hitachi Chemical Industry Co., Ltd.) (picture (please read the precautions on the back before filling) (This page) This paper size applies to Chinese National Standards (CNS) A4 (210X297 male f) -36- 552694 A7 B7 Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (2d). Removed with acidic etching solution The metal sheet 1 exposes the surface of the adhesive 2, and then the adhesive layer 2 is machine-machined to the top of the surface exposing the protrusion 3 (FIG. 2 e), and a solder joint 8 is disposed on the exposed top of the protrusion. After remelting the position, a resin-encapsulated semiconductor device 1 3 0 as shown in FIG. 2 f is obtained. In the obtained semiconductor device 130, the wiring 4 was connected to the external wiring using the protrusions 3 and the solder joints 8 as media. ≪ Example 3 > This example is made into a resin-encapsulated type as shown in FIGS. 3a to 3f. Semiconductor device. First, a 0. 001 mm thick nickel layer (not shown in the figure) was formed on one side of an electrolytic copper foil with a thickness of 0. 0 20 mm, and a nickel film was formed on the surface of the electrode. 1 2mm thick copper film. Next, a photosensitive uranium-resistant dry film (F 0 TEX TY-3025 manufactured by Hitachi Chemical Industries, Ltd.) was laminated on the other side of the electrolytic copper foil, and exposed, developed, and formed a protruding uranium engraved pattern, which was etched with alkali. After the electrolytic copper foil is etched to form a protrusion (conductor member) 3 with a height of 0.020 mm, the resist film is peeled off, and the exposed nickel layer is removed with a nickel immersion uranium solution having a slow copper etching rate. Next, the obtained copper film with the protrusions 3 and the supporting member of the metal sheet 1 (stainless steel SUS304) having a thickness of 0.10 mm was interposed with an adhesive 2 (Hitachi) having a thickness of 0. 0 3 0 mm. As an insulating base material, SPAI (manufactured by Kasei Kagaku Kogyo Co., Ltd.) is used to embed the protrusions 3 in the adhesive 2 in a laminate.丨 r --- clothing-- (Please read the precautions on the back before filling out this page), 11

本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -37- 552694 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（3弓 其次在銅膜表面上層壓感光性抗蝕乾膜（日立化成工 業（株）製F〇TEX RY— 3025)經曝光、顯像 '形成配線4蝕圖案後’以鹼性浸蝕劑蝕刻電解銅箔形成 配線4。接著將抗鈾膜剝離，以選擇鎳浸蝕液除去露出的 鎳層。 其次在配4上以液狀塗覆樹脂用絹網印刷法塗覆’形 成露出配線4連接位置的絕緣層（抗焊錫）1 〇，配線4 露出的位置，依序鑛上厚度0 · 〇 0 3 m m以上的鎳（圖 上未顯示）及厚度爲0 · 0 0 〇 3mm以上純度爲 9 9 . 9 %以上的金（圖上未顯示），形成層壓層。依此 得到如圖3 a的配線基板3 0 0。 接著，所得到配線基板3 0 0的絕緣層1 0的表面， 以半導體用銀漿5搭載LSI元件6 (圖3b) ，LSI 元件6的端子與配線端子4以焊接線1 0 0連接（圖3 c )° 依此所成的組裝物固定於遞模上，以半導體封裝樹脂 7 (日立化成工業（株）製CEL400)封裝（圖3d )。其後以鈾刻除去金屬片1 ，露出粘著劑2的表面後（ 圖3 e )，硏磨粘著劑表面露出突出物的頂端。 最後，在突出物露出的頂部配置熔融焊點8，得到如 圖3 f的樹脂封裝型半導體裝置3 1 0。所得的半導體裝 置3 1 0其配線4以突出物3及焊點8爲媒介與外部的配 線連接。 (請先閲讀背面之注意事項再填寫本頁) 訂This paper size applies to China National Standard (CNS) A4 (210X297 mm) -37- 552694 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economy Etched dry film (FOTEX RY-3025, manufactured by Hitachi Chemical Co., Ltd.) is exposed and developed 'after wiring 4 etch pattern is formed' and the electrolytic copper foil is etched with alkaline etchant to form wiring 4. Then the anti-uranium film is peeled off In order to select the nickel etching solution, the exposed nickel layer is removed. Next, the liquid coating resin is applied on the distribution 4 by silk screen printing to form an insulating layer (solder resistance) 1 that exposes the connection position of the wiring 4, and the wiring 4 is exposed. Position, in order of nickel on the ore with a thickness of 0 · 〇3 mm or more (not shown on the picture) and gold with a thickness of 0 · 0 〇3mm or more and a purity of 99.9% or more (not shown on the picture), A laminated layer is formed. Thus, a wiring substrate 300 as shown in FIG. 3a is obtained. Next, the surface of the insulating layer 10 of the obtained wiring substrate 300 is mounted with an LSI element 6 with a silver paste 5 for a semiconductor (FIG. 3b). The terminals of the LSI element 6 and the wiring terminals 4 are connected by soldering wires 1 0 0 (Fig. 3c) ° The assembly thus formed is fixed on a transfer mold, and is encapsulated with a semiconductor encapsulation resin 7 (CEL400 manufactured by Hitachi Chemical Industries, Ltd.) (Fig. 3d). Thereafter, the metal sheet 1 is removed by uranium etching, After exposing the surface of the adhesive 2 (Fig. 3e), honing the surface of the adhesive to expose the tops of the protrusions. Finally, fused solder joints 8 are arranged on the exposed tops of the protrusions to obtain a resin-encapsulated semiconductor as shown in Fig. 3f. Device 3 1 0. The obtained semiconductor device 3 1 0 has its wiring 4 connected to the external wiring using the protrusion 3 and the solder joint 8 as the medium. (Please read the precautions on the back before filling this page)

本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -38- 552694 A7 B7 五、發明説明（％ <實施例4 > 本實施例如圖4 a〜圖4 g所示製作成樹脂封裝型半 導體裝置。 首先，在0 · 0 3 5mm厚的電解銅范的一面鍍上 0 · 001mm厚的鎳層（圖上未顯示）後’在其表面鍍 0 · 009mm厚的銅膜。其次，在電解銅箔的另一面層 壓感光性抗蝕乾膜（日立化成工業（株）製1?0丁£乂 T Y - 3 0 2 5 )經曝光、顯像、形成突出物的蝕刻圖案 ，以鹼性浸鈾液蝕刻電解銅箔形成突出物3後’將抗蝕膜 剝離，以鎳浸蝕液除去鎳層。 接著，所得的附有突出物3的銅膜與厚度〇 · 1 0 0 mm的金屬片1(不繡鋼SUS 3 04)的支撐構件，介 以厚度0 · 0 4 0 m m的粘著劑2 (日立化成工業（株） 製S P A I )作爲絕緣基材，將突出物3以層壓埋入粘著 劑2中。其次在銅膜表面上層壓感光性抗蝕乾膜（日立化 成工業（株）製F〇TEX RY - 3025)經曝光、 顯像、形成襯墊4蝕圖案後，以鹼性浸蝕劑蝕刻電解銅箔 形成襯墊4 a。接著將抗蝕膜剝離，以選擇鎳浸蝕液除去 鎳層後，在襯墊4a表面，依序鍍上厚度0.003 mm以上的鎳（圖上未顯示）及厚度爲〇 · 〇 〇 〇 3mm 以上純度爲9 9 · 9 %以上的金（圖上未顯示），形成層 壓層。依此得到如圖4 a之配線基板4 0 0。 接著，所得到配線基板4 0 0的絕緣基材粘著劑2的 表面，以半導體用銀漿5搭載LSI元件6(圖4b)， 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） I — *rI--r---#衣I — (請先閱讀背面之注意事項再填寫本頁) 訂This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -38- 552694 A7 B7 V. Description of the invention (% < Example 4 > This example is made as shown in Figure 4a ~ 4g A resin-encapsulated semiconductor device. First, a 0. 001 mm thick nickel layer (not shown in the figure) is plated on one side of a 0. 0 3 5 mm thick electrolytic copper foil, and then a copper film of 0. 009 mm thick is plated on its surface. Next, a photosensitive resist dry film (1 to 0 丁 £ 乂 乂 TY-3 0 2 5 manufactured by Hitachi Chemical Co., Ltd.) was laminated on the other side of the electrolytic copper foil, and an etching pattern was formed by exposure, development, and projection. After the electrolytic copper foil was etched with an alkaline leaching solution to form the protrusions 3, the resist film was peeled off, and the nickel layer was removed with a nickel etching solution. Next, the obtained copper film with the protrusions 3 and a thickness of 0.10 Supporting member of metal sheet 1 (stainless steel SUS 3 04) with a thickness of 0 mm, with an adhesive 2 (SPAI manufactured by Hitachi Chemical Industry Co., Ltd.) with a thickness of 0 · 0 4 0 mm as an insulating substrate, and a protrusion 3 Laminate is buried in the adhesive 2. Next, a photosensitive resist dry film is laminated on the surface of the copper film (Hitachi Chemical Industries, Ltd. ( F0TEX RY-3025) After exposure, development, and formation of pad 4 etching pattern, the electrolytic copper foil was etched with an alkaline etchant to form pad 4 a. Then the resist film was peeled off to select a nickel etchant After removing the nickel layer, the surface of the pad 4a is sequentially plated with nickel (though not shown in the figure) having a thickness of 0.003 mm or more, and gold having a thickness of not less than 0.003 mm and a purity of more than 99.9% (above) (Not shown), forming a laminated layer. As a result, a wiring substrate 400 as shown in FIG. 4 a is obtained. Next, the surface of the obtained insulating substrate adhesive 2 of the wiring substrate 400 is mounted on the silver paste 5 for semiconductors. LSI element 6 (Figure 4b), this paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) I — * rI--r --- # 衣 I — (Please read the precautions on the back before filling in this Page) order

經濟部智慧財產局員工消費合作社印製 -39- 552694 經濟部智慧財產局員工消費合作社印製 A7 B7五、發明説明（37) L S I元件6的端子與配線4以焊接線1 0 0連接（圖 4 c ) 〇 依此所成的組裝物固定於遞模上，以半導體封裝樹脂 7 (日立化成工業（株）製CEL400)封裝（圖4d )。其後以鈾刻除去金屬片1 ，露出粘著劑2的表面後（ 圖4 e )，硏磨粘著劑表面露出突出物的頂端（圖4 f ) 〇 最後，在突出物露出的頂部配置熔融焊點8，得到如 圖4 g的樹脂封裝型半導體裝置4 1 0。又焊點8爲配置 在L S I元件6外側的扇形型端子。所得的半導體裝置 4 1 0其配線4以突出物3及焊點8爲媒介與外部的配線 連接。 <實施例5 > 本實施例如圖5 a〜圖5 f所示製作成樹脂封裝型半 導體裝置。 首先，製作與實施例1 一樣的配線基板5 0 0。但是 ，實施例1的突出物3形成於配線4的內側範圍（即元件 搭載範圍近側的配線部份），本實施例則如圖5 a所示， 突出物3形成於配線4外側（即元件搭載範圍遠側的配線 部份）。 接著，在配線基板的元件搭載範圍，以半導體用非導 電性膜爲媒介將L S I元件6搭載後（圖5 b ) ，L S I 元件6的端子與配線4的連接範圍以焊接線1 〇 〇連接（ 氏張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） '~ -40- ----r--r---—— (請先閲讀背面之注意事項再填寫本頁)Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs-39- 552694 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Invention Description (37) The terminals of LSI element 6 and wiring 4 are connected by soldering wires 1 0 0 (Figure 4 c) 〇 The assembly thus formed is fixed on a transfer mold, and is encapsulated with semiconductor packaging resin 7 (CEL400 manufactured by Hitachi Chemical Industries, Ltd.) (Fig. 4d). After that, the metal sheet 1 was removed by uranium engraving to expose the surface of the adhesive 2 (Fig. 4e), and the top of the protrusion was exposed by honing the adhesive surface (Fig. 4f). Finally, the top of the protrusion was exposed. The solder joint 8 is fused to obtain a resin-encapsulated semiconductor device 4 1 0 as shown in FIG. 4 g. The solder joints 8 are sector-shaped terminals arranged outside the L S I element 6. The obtained semiconductor device 4 1 0 had wiring 4 connected to external wiring through the protrusions 3 and the solder joints 8 as the medium. < Embodiment 5 > In this embodiment, a resin-encapsulated semiconductor device is fabricated as shown in Figs. 5a to 5f. First, the same wiring board 50 as in Example 1 was produced. However, the protrusion 3 of the embodiment 1 is formed on the inner side of the wiring 4 (that is, the wiring portion near the component mounting range). In this embodiment, as shown in FIG. 5a, the protrusion 3 is formed on the outer side of the wiring 4 (that is, The wiring part on the far side of the component mounting range). Next, in the element mounting range of the wiring substrate, after the LSI element 6 is mounted using the semiconductor non-conductive film as a medium (FIG. 5 b), the connection range of the terminal of the LSI element 6 and the wiring 4 is connected by a bonding wire 100 ( The Zhang scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) '~ -40- ---- r--r ---—— (Please read the precautions on the back before filling this page)

、1T, 1T

552694 經濟部智慧財產局員工消費合作社印製 A7五、發明説明（3S) 圖5 c )。又，本實施例配線4的連接範圍置於比突出物 3更爲內側（即元件6的近側）° 依此所成的組裝物固定於遞模上，以半導體封裝樹脂 7 (日立化成工業（株）製CEL400)封裝（圖5d )。其後以蝕刻除去金屬片1 ，露出粘著劑2的表面後， 硏磨粘著劑表面露出突出物3的頂端（圖5 e )。 最後，在突出物3露出的頂部配置熔融焊點8，得到 如圖5 f的樹脂封裝型半導體裝置5 1 0。又焊點8爲配 置在L S I元件6外側的扇形型端子。所得的半導體裝置 5 1 0其配線4以突出物3及焊點8爲媒介與外部的配線 連接。 〈實施例δ &gt; 本實施例如圖6 a〜圖6 g所示製作成樹脂封裝型半 導體裝置。 首先，在0 _ 0 1 8mm厚的電解銅箔的一面鍍上 〇· 0 0 1mm厚的鎳層（圖上未顯示）後，在其表面鍍 0 · 0 0 9mm厚的銅膜。其次，在電鍍銅膜的表面層壓 感光性抗蝕乾膜（日立化成工業（株）製F Ο T E X R Y — 3 0 2 5 )經曝光、顯像、形成配線2 1的蝕刻圖 案，以鹼性浸蝕液蝕刻電解銅箔形成配線2 1。 所得的附有配線2 1的銅膜與厚度0 · 〇 2 5 m m的 金屬片1 (不總鋼SU S 3 0 4 )的支撐構件，介以厚度 0 . 0 2 5 m m的粘著劑2 (日立化成工業（株）製 本&amp;張尺度適用中國國家標準（CNS ) A4規格（210 X297公釐） — ' '一&quot; -41 - (請先閱讀背面之注意事項再填寫本頁)552694 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 V. Invention Description (3S) Figure 5c). In addition, the connection range of the wiring 4 in this embodiment is placed more inside than the protrusion 3 (ie, near the element 6). The assembly thus formed is fixed on a transfer die, and the semiconductor packaging resin 7 (Hitachi Chemical Industry CEL400) (Package: Fig. 5d). Thereafter, the metal sheet 1 is removed by etching to expose the surface of the adhesive 2, and then the surface of the adhesive is honed to expose the tip of the protrusion 3 (FIG. 5 e). Finally, a molten solder joint 8 is arranged on the exposed top of the protrusion 3, and a resin-encapsulated semiconductor device 5 1 0 as shown in FIG. 5 f is obtained. The solder joint 8 is a fan-shaped terminal arranged outside the L S I element 6. The obtained semiconductor device 5 1 0 had wiring 4 connected to external wiring through the protrusions 3 and solder joints 8 as the medium. <Example δ> In this example, a resin-encapsulated semiconductor device is fabricated as shown in Figs. 6a to 6g. First, a 0. 0 0 1 mm thick nickel layer (not shown in the figure) was plated on one side of an electrolytic copper foil with a thickness of 0 _ 0 1 8 mm, and then a copper film with a thickness of 0. 0 0 9 mm was plated on the surface. Next, a photosensitive resist dry film (F 0 TEXRY — 3 0 2 5 manufactured by Hitachi Chemical Co., Ltd.) was laminated on the surface of the electroplated copper film, and an etching pattern of the wiring 21 was formed by exposure, development, and alkali. The etching solution etches the electrolytic copper foil to form the wiring 21. The obtained copper film with wiring 2 1 and a supporting member of a metal sheet 1 (not total steel SU S 3 0 4) with a thickness of 0.5 mm and a thickness of 0.5 mm were interposed with an adhesive 2 with a thickness of 0.05 mm (Hitachi Chemical Industry Co., Ltd.'s &amp; Zhang scales apply Chinese National Standard (CNS) A4 specifications (210 X297 mm) — '' 一 &quot; -41-(Please read the precautions on the back before filling out this page)

、1T 4 552694 Α7 Β7 經濟部智慧財產局員工消費合作社印製 五、發明説明（39) 5 P A I )作爲絕緣基材，將配線2 1以層壓埋入粘著劑 2中。 其次，以鹼性浸鈾劑僅蝕刻銅箔露出鎳層，該鎳層以 銅浸蝕性較小的鎳剝離液除去，露出配線2 1後，在配線 2 1上電鍍形成厚度0 . 〇 〇 3mm以上的鎳膜及厚度爲 〇· 0 0 0 3 m m以上純度爲9 9 · 9 %以上的金膜。依 此得到如圖6 a的半導體搭載用配線基板6 0 0。 續之，所得到配線基板6 0 0的絕緣基材側的表面， 以半導體用非導電性薄膜5搭載L S I元件6 (圖6 b ) ，L S I元件6的端子與配線4以焊接線1 0 0連接（圖 6 c ) 〇 依此所成的組裝物固定於遞模上，以半導體封裝樹脂 7 (日立化成工業（株）製CEL400)封裝（圖6d )。其後以蝕刻除去金屬片1 ，露出粘著劑2的表面後（ 圖6 e )，以雷射照射粘著劑2特定位置開設貫通孔6 1 露出配線2 1 (圖6 f )。 最後以焊錫將貫通孔6 1底部露出配線2 1的位置融 接。在貫通孔內充塡焊錫形成導體構件6 2之同時形成焊 點8，得到如圖6 g的樹脂封裝型半導體裝置6 1 0。所 得的半導體裝置6 1 0其配線2 1以導體構件6 2及焊點 8爲媒介與外部的配線連接。 &lt;實施例7 &gt; 本實施例如圖7 a〜圖7 g所示製作成樹脂封裝型半 本紙張尺度適用中國國家標準（CNS ) A4規格（21〇Χ297公釐） (請先閱讀背面之注意事項再填寫本頁) ~^裝. 訂 4 -42- 552694 經濟部智慧財產局員工消費合作社印製 A7 ___B7 __五、發明説明（40) 導體裝置。 首先，以厚度0 · 050mm的金屬片1 (不繡鋼 31133 04)與厚度0.012111111的銅箔，介以厚度 〇 · 〇25mm的粘著劑2 (日立化成工業（株）製 S PA I )層壓。其次在銅膜表面上層壓感光性抗触乾膜 (日立化成工業（株）製FOTEX RY— 3025) 經曝光、顯像、形成配線4電鍍用鈾刻圖案。 續之，在銅箔的露出位置，以電鍍依序層壓形成厚度 〇.003mm以上的鎳膜及厚度〇.〇〇3mm以上純 度9 9 . 9 %以上的金膜，接著將抗蝕膜剝離，以金作爲 抗蝕膜，以鹼性浸鈾劑蝕刻銅箔形成配線4模紋。依此得 到如圖7 a之配線基板7 0 0。 使用此配線基板7 0 0，與實施例2同樣在端子部搭 載具突出物200的LS I元件6，金突出物200與配 線4以熱壓使其相互連接後（圖7 b ) ，L S I元件6與 配線基板之間以液狀環氧樹脂1 1充塡硬化（圖7 c )， 以半導體封裝樹脂7 (日立化成工業（株）製 CEL400)封裝後（圖7d)。 其後，以蝕刻除去金屬片1 ，露出粘著劑2的表面（ 圖7 e )，以雷射照射粘著劑2特定位置開設貫通孔6 1 露出配線4 (圖7 f )。 最後以焊錫將貫通孔6 1底部露出配線4的位置融接 。在貫通孔6 1內充塡焊錫形成導體構件6 2之同時在其 端部形成焊點8，得到如圖7 g的樹脂封裝型半導體裝置 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐）&quot; — -43- ¥-- (請先閲讀背面之注意事項再填寫本頁) 訂 Φ 552694 Α7 Β7 五、發明説明（41) 7 1 0。又焊點8爲配置在L S I元件6內側的扇形型端 子。所得的半導體裝置7 1 0其配線4以導體構件6 2及 焊點8爲媒介與外部的配線連接。 &lt;實施例8 &gt; 本實施例如圖8 a〜圖8 f所示製作成樹脂封裝型半 導體裝置。 首先，在0 . 0 1 2 m m厚的銅箔層壓感光性抗蝕乾 膜（日立化成工業（株）製FOTEX TY— 3025 )經曝光、顯像、形成突出物3的蝕刻圖案，其次在銅箔 露出位置以硫酸銅電鍍浴進行電鍍後，將抗蝕膜剝離得到 突出物3。 所得的附有突出物3的銅膜與厚度0 . 0 5 0 m m的 金屬片1 (不繡鋼SUS 3 0 4)的支撐構件，介以厚度 〇 . 〇5mm的粘著劑2 (日立化成工業（株）製 SPAI)，將突出物3以層壓埋入粘著劑2中。其次在 銅箔側壓感光性抗鈾乾膜（日立化成工業（株）製 F〇T E X R Y — 3 0 2 5 )經曝光、顯像、形成襯墊 4抗電鍍圖案。 在銅箔露出位置，依序電鍍層壓形成厚度〇 . 〇 〇 3 m m以上的鎳膜及厚度爲〇 · 〇 〇 〇 3 m m以上純度爲 9 9 · 9 %以上的金膜，以鹼性浸蝕劑僅鈾刻銅箔形成配 線4模紋。依此得到如圖8 a之突出物3埋入絕緣基材2 中之配線基板8 0 0。 本紙張尺度適用中國國家標準（CNS ) A4規格（2ΐ〇χ：297公楚)~ &quot;&quot; -44 - (請先閱讀背面之注意事項再填寫本頁) k衣- 訂 經濟部智慧財產局員工消費合作社印製 552694 經濟部智慧財產局員工消費合作社印製 A7 B7五、發明説明（θ 接著，在所得到的配線基板8 0 0的絕緣基材側表面 ，以半導體用非導電性膜爲媒介將L S I元件6搭載後（ 圖8 b ) ，L S I元件6的端子與配線4以焊接線1 0 0 連接（圖8 c )。 依此所成的組裝物固定於遞模上，以半導體封裝樹脂 7 (日立化成工業（株）製CEL400)封裝（圖8d )。其後以蝕刻除去支撐構件的金屬片1，露出粘著劑2 的表面，硏磨粘著劑表面露出突出物3的頂端（圖8 e ) 〇 最後，在突出物3露出的頂部配置熔融焊點8，得到 如圖8 f的樹脂封裝型半導體裝置8 1 0。又焊點8爲配 置在L S I元件6內側及外側的扇形型端子。所得的半導 體裝置8 1 0其配線4以突出物3及焊點8爲媒介與外部 的配線連接。 &lt;實施例9 &gt; 本實施例如圖9 a〜圖9 g所示製作成樹脂封裝型半 導體裝置。 首先，在0 · 0 3 5mm厚的電解銅箔的一面鍍上 0 · 0 0 1 m m厚的鎳層（圖上未顯示）後，在此鎳層表 面鍍0.009mm厚的銅膜。其次，在電鍍銅膜的表面 層壓感光性抗蝕乾膜（日立化成工業（株）製F〇T E X R Y - 3 0 2 5 )經曝光、顯像、形成突出物3的抗鈾刻 圖案，其次以鹼性浸蝕液蝕刻電解銅箔形成〇 . 〇 3 5高 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁)1T 4 552694 Α7 Β7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs V. Description of the invention (39) 5 P A I) As the insulating substrate, the wiring 2 1 is buried in the adhesive 2 with a laminate. Secondly, only the copper foil was etched with an alkaline leaching agent to expose the nickel layer, and the nickel layer was removed with a nickel stripping solution having a low copper etching property. After the wiring 21 was exposed, the wiring 21 was plated to a thickness of 0.03 mm. The above nickel film and a gold film having a thickness of 0.03 mm or more and a purity of 99. 9% or more. Thereby, a wiring board for semiconductor mounting 600 as shown in FIG. 6a is obtained. Continuing, on the surface of the insulating substrate side of the obtained wiring substrate 600, the LSI element 6 (FIG. 6b) was mounted with a non-conductive film 5 for a semiconductor, and the terminals of the LSI element 6 and the wiring 4 were bonded with a bonding wire 100. Connection (Fig. 6c) 〇 The assembly thus formed was fixed on a transfer die, and was encapsulated with semiconductor packaging resin 7 (CEL400 manufactured by Hitachi Chemical Industries, Ltd.) (Fig. 6d). After that, the metal sheet 1 is removed by etching to expose the surface of the adhesive 2 (FIG. 6 e), and a through hole 6 1 is opened at a specific position of the adhesive 2 by laser irradiation to expose the wiring 2 1 (FIG. 6 f). Finally, the position of the bottom of the through hole 61 exposed to the wiring 21 is fused with solder. The through hole is filled with solder to form a conductor member 62 and a solder joint 8 is formed, to obtain a resin-encapsulated semiconductor device 6 1 0 as shown in Fig. 6g. The obtained semiconductor device 6 1 0 has wirings 2 1 connected to the external wirings through the conductor members 6 2 and the solder joints 8 as media. &lt; Embodiment 7 &gt; In this embodiment, the resin-encapsulated half-size paper produced as shown in Figs. 7a to 7g is applicable to the Chinese National Standard (CNS) A4 specification (21 × 297 mm) (Please read the back Please fill in this page again for instructions) ~ ^. Order 4 -42- 552694 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 ___B7 __V. Description of the invention (40) Conductor device. First, a metal sheet 1 (non-embossed steel 31133 04) with a thickness of 0. 050 mm and a copper foil with a thickness of 0.012111111 were interposed with an adhesive 2 (S PA I manufactured by Hitachi Chemical Co., Ltd.) with a thickness of 0.025 mm. Pressure. Next, a photosensitive anti-drying film (FOTEX RY-3025 manufactured by Hitachi Chemical Industries, Ltd.) was laminated on the surface of the copper film. After exposure and development, a uranium engraved pattern for wiring 4 plating was formed. Next, at the exposed position of the copper foil, a nickel film having a thickness of 0.003 mm or more and a gold film having a thickness of 0.03 mm or more and a purity of 99.9% or more were sequentially laminated by electroplating, and then the resist film was peeled off. The pattern of the wiring 4 is formed by using gold as a resist film and etching the copper foil with an alkaline leaching agent. In this way, a wiring substrate 700 as shown in Fig. 7a is obtained. Using this wiring board 7 0, the LS I element 6 with the protrusions 200 is mounted on the terminal part in the same manner as in Example 2. After the gold protrusions 200 and the wiring 4 are connected to each other by heat pressing (Fig. 7b), the LSI element 6 and the wiring board are filled and cured with a liquid epoxy resin 11 (Fig. 7c), and then encapsulated with a semiconductor encapsulation resin 7 (CEL400 manufactured by Hitachi Chemical Industries, Ltd.) (Fig. 7d). Thereafter, the metal sheet 1 is removed by etching to expose the surface of the adhesive 2 (FIG. 7 e), and a through-hole 6 1 is opened at a specific position of the adhesive 2 by laser irradiation to expose the wiring 4 (FIG. 7 f). Finally, the position where the bottom of the through hole 61 is exposed to the wiring 4 is fused with solder. A through-hole 61 is filled with solder to form a conductive member 6 2 and a solder joint 8 is formed at its end to obtain a resin-encapsulated semiconductor device as shown in FIG. 7 g. This paper is in accordance with Chinese National Standard (CNS) A4 (210X297). (Mm) &quot; — -43- ¥-(Please read the precautions on the back before filling out this page) Order Φ 552694 Α7 Β7 V. Description of the invention (41) 7 1 0. The solder joint 8 is a fan-shaped terminal arranged inside the L S I element 6. In the obtained semiconductor device 7 1 0, the wiring 4 was connected to the external wiring through the conductor member 62 and the solder joint 8 as the medium. &lt; Embodiment 8 &gt; In this embodiment, a resin-encapsulated semiconductor device is fabricated as shown in Figs. 8a to 8f. First, a photosensitive resist dry film (FOTEX TY-3025 manufactured by Hitachi Chemical Industries, Ltd.) was laminated on a copper foil with a thickness of 0.12 mm, and an etching pattern of protrusions 3 was formed by exposure, development, and After the copper foil was exposed at a copper sulfate plating bath, the resist film was peeled to obtain the protrusions 3. The obtained copper film with protrusions 3 and a supporting member of a metal sheet 1 (stainless steel SUS 3 0 4) having a thickness of 0.05 mm, was passed through an adhesive 2 (Hitachi Kasei) having a thickness of 0.05 mm SPAI (manufactured by Kogyo Co., Ltd.), the protrusions 3 are embedded in the adhesive 2 in a laminated manner. Next, a photosensitive uranium-resistant dry film (FOT E X R Y — 3 0 2 5 manufactured by Hitachi Chemical Co., Ltd.) was pressed on the side of the copper foil, and exposed, developed, and a pad 4 anti-plating pattern was formed. At the exposed position of the copper foil, a nickel film having a thickness of more than 0.03 mm and a gold film having a thickness of more than 0.03 mm and a purity of more than 99. 9% were sequentially formed by electrolytic plating and lamination, and were etched with alkali. Only uranium-etched copper foil forms the pattern of the wiring 4 pattern. According to this, the wiring substrate 800, in which the protrusion 3 as shown in FIG. 8a is embedded in the insulating base material 2, is obtained. This paper size applies Chinese National Standard (CNS) A4 specification (2ΐ〇χ: 297 Gongchu) ~ &quot; &quot; -44-(Please read the precautions on the back before filling out this page) K-clothing-Order the intellectual property of the Ministry of Economic Affairs Printed by the Consumer Cooperative of the Bureau of Staff 552694 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (θ Next, a non-conductive film for semiconductor is used on the surface of the insulating substrate side of the obtained wiring substrate 800 After the LSI element 6 is mounted as a medium (Fig. 8b), the terminals of the LSI element 6 and the wiring 4 are connected by soldering wires 100 (Fig. 8c). The assembly thus formed is fixed on a transfer die, and the semiconductor Encapsulation resin 7 (CEL400 manufactured by Hitachi Chemical Co., Ltd.) is encapsulated (Fig. 8d). Thereafter, the metal sheet 1 of the supporting member is removed by etching to expose the surface of the adhesive 2 and the surface of the adhesive is honed to expose the protrusion 3 Tip (Fig. 8e) 〇 Finally, a molten solder joint 8 is arranged on the exposed top of the protrusion 3 to obtain a resin-molded semiconductor device 8 1 0 as shown in Fig. 8f. The solder joint 8 is arranged inside and outside the LSI element 6. Sector terminal. The resulting semiconductor package 8 1 0 The wiring 4 is connected to the external wiring with the protrusion 3 and the solder joint 8 as the medium. &Lt; Embodiment 9 &gt; In this embodiment, a resin-molded semiconductor device is fabricated as shown in Figs. 9a to 9g. First, After plating a 0. 0 0 1 mm thick nickel layer (not shown) on one side of a 0. 0 3 5 mm thick electrolytic copper foil, a copper film of 0.009 mm thick was plated on the surface of the nickel layer. Second, A photosensitive resist dry film (FOTEXRY-3 0 2 5 manufactured by Hitachi Chemical Industry Co., Ltd.) was laminated on the surface of the electroplated copper film. After exposure and development, a uranium-resistant pattern of protrusions 3 was formed, followed by alkaline Etching solution is used to form electrolytic copper foil. 〇3 5 This paper size is applicable to China National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page)

-45- 552694 經濟部智慧財產局員工消費合作社印製 A7 B7五、發明説明（， 的突出物3後，接著將抗鈾膜剝離，露出的鎳以銅浸蝕較 慢的鎳浸鈾液除去。 接著，所得的附有突出物3的銅膜與厚度〇 . 0 5 0 mm的金屬片1 (不繡鋼SUS304)的支撐構件，介 以厚度〇 . 〇5mm的粘著劑2 (日立化成工業（株）製 S P A I )作爲絕緣基材，將突出物3以層壓埋入粘著劑 2中。其次在銅膜面層壓感光性抗蝕乾膜（日立化成工業 (株）製FOTEX RY - 3025)經曝光、顯像、 形成襯墊4鈾圖案後，在銅膜的露出位置，依序鍍上厚度 0 .〇〇 3mm以上的鎳膜及厚度爲〇 · 〇〇〇3mm以 上純度爲9 9 · 9 %以上的金膜。接著將抗蝕膜剝離，’以 鹼性浸蝕劑鈾刻銅箔形成配線4模紋，依此得到如圖9 a 之配線基板9 0 0。 接著，在所得到的配線基板9 0 0的絕緣基材側表面 ，以半導體用非導電性膜爲媒介將L S I元件6搭載後（ 圖9 b ) ，L S I元件6的端子與配線4以焊接線1 〇 〇 連接（圖9 c )。 依此所成的組裝物固定於遞模上，以半導體封裝樹脂 7 (日立化成工業（株）製CEL400)封裝（圖9d )。其後以鈾刻除去支撐構件的金屬片1，露出粘著劑2 的表面，硏磨粘著劑表面露出突出物3的頂端（圖9 e ) 〇 續之，在突出物3露出的頂部配置熔融焊點8 (圖 9 f )，又焊點8爲配置在L S I元件6內側的扇形型端 本紙張尺度適用中.國國家標準（CNS ) A4規格（210 X 297公釐) ~ ’裝-- (請先閱讀背面之注意事項再填寫本頁) 訂 0 rAm IMIB1 9«1_| · 552694 經濟部智慧財產局員工消費合作社印製 A7 _ B7_______五、發明説明（41 子。最後完成封裝的組裝物9 1 0切割分成個片，得到如 圖9 g的複數樹脂封裝型半導體裝置9 2 0。所得的半導 體裝置9 2 0其配線4以突出物3及焊點8爲媒介與外部 的配線連接。 &lt;實施例1 0 &gt; 本實施例如圖1 0 a〜福1 0 f所示製作成樹脂封裝 型半導體裝置。 首先，在0 · 0 3 5mm厚的電解銅箱的一面鍍上 0 . 0 0 1mm厚的鎳層（圖上未顯示）後，在此鎳層表 面鍍0.009mm厚的銅膜。其次，在電鍍銅膜的表面 層壓感光性抗鈾乾膜（日立化成工業（株）製F〇T E X R Y - 3 0 2 5 )經曝光、顯像、形成突出物3的抗蝕刻 圖案，其次以鹼性浸鈾液蝕刻電解銅箔形成〇 . 〇 3 5 m m高的突出物3後，接著將抗蝕膜剝離，露出的鎳以銅 浸蝕較慢的鎳浸蝕液除去。 接著，所得的附有突出物3的銅膜與厚度0 . 0 5 0 m m的金屬片1 (不繡鋼S U S 3 0 4 )的支撐構件，介 以厚度0 · 0 5mm的粘著劑2 (日立化成工業（株）製 S P A I )作爲絕緣基材，將突出物3以層壓埋入粘著劑 2中。 其次在銅膜面層壓感光性抗蝕乾膜（日立化成工業（ 株）製F〇T E X R Y - 3 0 2 5 )經曝光、顯像、形 成配線4電鍍圖案後，在銅膜的露出位置，依序鍍上厚度 本紙張尺度適用中國國家標準（CNS ) A4規格（210'〆29?公釐） (請先閲讀背面之注意事項再填寫本頁) -47 - 552694 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（4S) 〇.〇〇3mm以上的鎳膜及厚度爲〇·〇〇〇3mm以 上純度爲9 9 . 9 %以上的金膜。接著將抗蝕膜剝離，以 鹼性浸鈾劑鈾刻銅箔形成配線4模紋，依此得到如圖 1 0 a突出物3被層壓埋入粘著劑2中的配線基板 1 0 0 0° 接著，在所得到的配線基板1 0 0 0的絕緣基材側表 面，以半導體用非導電性膜5爲媒介將L S I元件6搭載 後（圖1 0 b ) ，L S I元件6的端子與配線4以焊接線 100連接（圖10c)。 依此所成的組裝物固定於遞模上，所有的元件6以半 導體封裝樹脂7 (日立化成工業（株）製CEL40 0 ) 封裝（圖1 0 d )後，以蝕刻除去支撐構件的金屬片1 ， 露出粘著劑2的表面，硏磨粘著劑表面露出突出物3的頂 端（圖1 0 e )。 續之，在突出物3露出的頂部配置熔融焊點8，將完 成封裝的組裝物切割分成個片，得到如（圖1 0 f )複數 樹脂封裝型半導體裝置1 0 1 0，焊點8爲配置在L S I 元件6內側及外側的扇形型端子。所得的半導體裝置 1 〇 1 〇其配線4以突出物3及焊點8爲媒介與外部的配 線連接。 &lt;實施例1 1 &gt; 本實施例如圖1 1 a〜圖1 1 f所示製作成樹脂封裝 型半導體裝置。 ▼裝-- (請先閱讀背面之注意事項再填寫本頁) 訂 * 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -48- 552694 經濟部智慧財產局員工消費合作社印製 A7 B7五、發明説明（％ 首先，在0 · 0 3 5mm厚的電解銅箔的一面鍍上 〇 . 001mm厚的鎳層（圖上未顯示）後，在此鎳層表 面鍍0 · 0 0 9 m m厚的銅膜。其次，在電鍍銅膜的表面 層廳感光性抗蝕乾膜（日立化成工業（株）製F〇T E X r Y — 3 0 2 5 )經曝光、顯像、形成突出物3的抗鈾刻 圖案，其次以鹼性浸鈾液蝕刻銅箔形成〇 . 〇 3 5 m m高 的突出物3後，接著將抗蝕膜剝離，露出的鎳以銅浸蝕較 慢的鎳浸鈾液除去。 接著，所得的附有突出物3的銅膜與厚度0 · 0 5 0 mm的金屬片1 (不繡鋼SUS304)的支撐構件，介 以厚度〇 · 〇5mm的粘著劑2 (日立化成工業（株）製 S P A I )作爲絕緣基材，將突出物3以層壓埋入粘著劑 2中。 其次在銅膜面層壓感光性抗蝕乾膜（日立化成工業（ 株）製F〇T E X R Y — 3 0 2 5 )經曝光、顯像、形 成配線4電鍍圖案後，在銅膜的露出位置，依序鍍上厚度 〇 .〇〇3mm以上的鎳膜及厚度爲〇.0003mm以 上純度爲9 9 . 9 %以上的金膜。接著將抗蝕膜剝離，以 鹼性浸蝕劑蝕刻銅形成配線4模紋，依此得到如圖1 0 a 突出物3被層壓埋入粘著劑2中的配線基板1 1 0 0。 接著，在所得到的配線基板1 1 0 0的絕緣基材側表 面，以半導體用非導電性膜5爲媒介將L S I元件6搭載 後（圖1 1 b ) ，L S I元件6的端子與配線4以焊接線 1〇〇連接（圖1 1 c )。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ~ &quot; • 49 - I裝-- (請先閲讀背面之注意事項再填寫本頁)-45- 552694 A7 B7 printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. After the protrusion 3 of the invention, the anti-uranium film was peeled off, and the exposed nickel was removed by the slower copper-etched nickel uranium solution. Next, the obtained copper film with the protrusions 3 and the supporting member of the metal sheet 1 (stainless steel SUS304) having a thickness of 0.05 mm was interposed with an adhesive 2 (Hitachi Chemical Industries, Ltd.) having a thickness of 0.05 mm. SPAI (manufactured by Co., Ltd.) is used as an insulating substrate, and the protrusions 3 are laminated in the adhesive 2. The photosensitive resist dry film (FOTEX RY, manufactured by Hitachi Chemical Industries, Ltd.) is laminated on the copper film surface- 3025) After exposure, development, and formation of a pad 4 uranium pattern, a nickel film having a thickness of 0.03 mm or more and a thickness of 0.03 mm or more are sequentially plated at the exposed position of the copper film, and the purity is 9 9 · 9% gold film. Then peel off the resist film and 'etch the copper foil with etched copper foil with alkaline etchant to form the 4 pattern of wiring, and then obtain the wiring substrate 900 as shown in Figure 9a. The obtained insulating substrate side surface of the wiring board 900 was an LSI element using a semiconductor non-conductive film as a medium. 6 After mounting (Fig. 9b), the terminals of the LSI element 6 and the wiring 4 are connected by soldering wires 100 (Fig. 9c). The assembly thus formed is fixed on a transfer mold and a semiconductor packaging resin 7 (Hitachi CEL400 (manufactured by Kasei Kagaku Kogyo Co., Ltd.) (Figure 9d). Thereafter, the metal piece 1 of the supporting member was removed by uranium engraving to expose the surface of the adhesive 2 and the surface of the adhesive was exposed to the top of the protrusion 3 (Figure 9d) e) 〇 Continuing, the fusion solder joint 8 (FIG. 9f) is arranged on the exposed top of the protrusion 3, and the solder joint 8 is a fan-shaped end arranged on the inside of the LSI element 6. The national paper standard (CNS) ) A4 size (210 X 297 mm) ~ 'pack-(Please read the precautions on the back before filling out this page) Order 0 rAm IMIB1 9 «1_ | · 552694 Employee Consumption Cooperative of Intellectual Property Bureau, Ministry of Economic Affairs Print A7 _ B7_______ V. Description of the invention (41). The final packaged assembly 9 1 0 is cut into pieces to obtain a plurality of resin-encapsulated semiconductor devices 9 2 0 as shown in FIG. 9 g. The obtained semiconductor device 9 2 0 and its wiring 4 It is connected to the external wiring using the protrusion 3 and the solder joint 8 as media. &Lt; Example 10 &gt; In this embodiment, a resin-encapsulated semiconductor device is fabricated as shown in Figs. 10a to 10f. First, one side of an electrolytic copper box having a thickness of 0.5 mm is plated with a nickel layer having a thickness of 0.01 mm. (Not shown in the figure), the surface of this nickel layer was plated with a copper film with a thickness of 0.009 mm. Next, a photosensitive uranium-resistant dry film (FOTEXRY-3 manufactured by Hitachi Chemical Industries, Ltd.) was laminated on the surface of the electroplated copper film. 0 2 5) After exposure, development, and formation of an anti-etching pattern of the protrusions 3, followed by etching the electrolytic copper foil with an alkaline immersion uranium bath to form 0.03 mm of the protrusions 3 with a height of 5 mm, and then stripping the resist film The exposed nickel is removed with a slower nickel etch solution with copper etch. Next, the obtained copper film with the protrusions 3 and the supporting member of the metal sheet 1 (stainless steel SUS 3 0 4) with a thickness of 0.05 mm were interposed with an adhesive 2 with a thickness of 0.5 mm Hitachi Chemical Industry Co., Ltd. (SPAI) was used as an insulating base material, and the protrusions 3 were embedded in the adhesive 2 in a laminate. Next, a photosensitive resist dry film (FOTEXRY-3 0 2 5 manufactured by Hitachi Chemical Industries, Ltd.) was laminated on the copper film surface, and after exposure, development, and formation of a wiring 4 plating pattern, the copper film was exposed at the exposed position. Sequential plating thickness This paper size applies the Chinese National Standard (CNS) A4 specification (210'〆29? Mm) (Please read the precautions on the back before filling this page) -47-552694 A7 B7 Intellectual Property Bureau, Ministry of Economic Affairs Printed by the Employee Consumption Cooperative. V. Description of Invention (4S) Nickel film with a thickness of more than 0.0003mm and a gold film with a thickness of more than 0.003mm and a purity of more than 99.9%. Then, the resist film was peeled off, and copper foil was etched with alkaline uranium leaching agent uranium to form a pattern of the wiring 4, so as to obtain a wiring substrate 100 as shown in FIG. 10a where the protrusions 3 were laminated and buried in the adhesive 2. 0 ° Next, on the obtained insulating substrate side surface of the obtained wiring substrate 100, the LSI element 6 is mounted using the semiconductor non-conductive film 5 as a medium (FIG. 10b). The terminals of the LSI element 6 and The wiring 4 is connected by the bonding wire 100 (FIG. 10c). The assembly thus formed is fixed on a transfer die, and all the elements 6 are packaged with a semiconductor packaging resin 7 (CEL40 0 manufactured by Hitachi Chemical Industry Co., Ltd.) (Fig. 10 d), and then the metal sheet of the supporting member is removed by etching. 1, the surface of the adhesive 2 is exposed, and the top of the adhesive 3 is exposed by honing the surface of the adhesive (Fig. 10e). Continuing, a molten solder joint 8 is arranged on the exposed top of the protrusion 3, and the completed package is cut into pieces to obtain (Fig. 10f) a plurality of resin-encapsulated semiconductor devices 1 0 1 0. The solder joint 8 is Fan-shaped terminals arranged inside and outside the LSI element 6. The obtained semiconductor device 10 was connected to the external wiring with the wiring 4 using the protrusions 3 and the solder joints 8 as media. &lt; Embodiment 1 1 &gt; In this embodiment, a resin-encapsulated semiconductor device is fabricated as shown in Figs. 1a to 1f. ▼ Packing-(Please read the precautions on the back before filling this page) Order * This paper size applies to China National Standard (CNS) A4 specification (210X297 mm) -48- 552694 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (% First, a 0.001 mm thick nickel layer (not shown in the figure) is plated on one side of a 0. 0 3 5 mm thick electrolytic copper foil, and then the surface of this nickel layer is plated with 0 · 0 0 9 mm thick copper film. Next, a photosensitive resist dry film (FOTEX r Y — 3 0 2 5 manufactured by Hitachi Chemical Industry Co., Ltd.) was exposed on the surface layer of the electroplated copper film. The anti-uranium engraving pattern of object 3, followed by etching the copper foil with an alkaline immersion uranium solution to form a 0.05 mm high protrusion 3, and then stripping the resist film, and the exposed nickel was immersed with a slower nickel etched copper. The uranium solution was removed. Next, the obtained copper film with the protrusions 3 and the supporting member of the metal sheet 1 (stainless steel SUS304) with a thickness of 0.5 mm were interposed by an adhesive 2 with a thickness of 0.5 mm. (Hitachi Chemical Industry Co., Ltd. SPAI) As the insulating base material, the protrusions 3 are laminated in the adhesive 2 Next, a photosensitive resist dry film (FOTEXRY — 3 0 2 5 manufactured by Hitachi Chemical Industries, Ltd.) was laminated on the copper film surface. After exposure, development, and formation of a wiring 4 plating pattern, the copper film was exposed at the exposed position. A nickel film having a thickness of 0.0003 mm or more and a gold film having a thickness of 0.0003 mm or more and a purity of 99.9% or more are sequentially plated. Then, the resist film is peeled off, and the copper is etched with an alkaline etchant to form wirings 4 The pattern is obtained, as shown in FIG. 10a, and the wiring board 1 1 0 where the protrusion 3 is laminated and buried in the adhesive 2 is obtained. Next, on the insulating substrate side surface of the obtained wiring board 1 100 After the LSI element 6 is mounted on the semiconductor non-conductive film 5 as a medium (Fig. 1b), the terminal of the LSI element 6 and the wiring 4 are connected by a soldering wire 100 (Fig. 1c). This paper standard applies China National Standard (CNS) A4 specification (210X297 mm) ~ &49; I--(Please read the precautions on the back before filling this page)

、1T I γϋ· a— ymn · 552694 經濟部智慧財產局員工消費合作社印製 A7 B7____五、發明説明（47 依此所成的組裝物固定於遞模上，所有的元件6以半 導體封裝樹脂7 (日立化成工業（株）製CEL400) 封裝（圖1 0 d )後，以鈾刻除去支撐構件的金屬片1 ’ 露出粘著劑2的表面，硏磨粘著劑2表面露出突出物3的 頂端（圖1 1 e )。 最後，在突出物3露出的頂部以鎳金薄鍍形成端子9 ，將完成封裝的組裝物切割分成個片，得到如（圖1 1 f )複數樹脂封裝型半導體裝置1 11 〇。 端子9爲配置在L S I元件6內側及外側的扇形型端 子。所得的半導體裝置1 0 1 0其配線4以突出物3及端 子9爲媒介與外部的配線連接。 &lt;實施例1 2 &gt; 本實施例如圖1 2 a〜圖1 2 g所示製作成樹脂封裝 型半導體裝置。 首先，在0 · 0 3 5mm厚的電解銅箔3 1的一面鑛 上0 · 0 0 1mm厚的鎳層3 2後，在此鎳層表面鍍 〇 · 009mm厚的銅膜33 (圖12a)。其次，在電 鍍銅膜3 1的表面層壓感光性抗蝕乾膜（日立化成工業（ 株）製F〇T E X R Y — 3 0 2 5 )經曝光、顯像、形 成突出物4 2形成用的抗蝕刻圖案34 (圖12b)，其 次以鹼性浸鈾液蝕刻電解銅箔形成〇 · 〇 3 5 m m高的突 出物4 2後（圖1 2 c )，將抗蝕膜3 4剝離，露出的鎳 3 2以銅浸蝕較慢的鎳浸蝕液除去（圖1 2 d )。 本紙張尺度適用中.國國家標準（CNS ) A4規格（210X297公釐）~ ' -50 - (請先閱讀背面之注意事項再填寫本頁) 裝·1T I γϋ · a— ymn · 552694 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7____ V. Description of the invention (47 The assembly made based on this is fixed on the die, and all the components 6 are semiconductor packaging resin 7 (CEL400 manufactured by Hitachi Chemical Co., Ltd.) After encapsulation (Fig. 10d), the metal piece 1 'of the supporting member is removed with uranium engraving to expose the surface of the adhesive 2 and the surface of the adhesive 2 is honed to expose the protrusion 3 At the top (Fig. 1 1e). Finally, on the exposed top of the protrusion 3, a terminal 9 is formed with a thin nickel-gold plating, and the packaged assembly is cut into pieces to obtain (Fig. 1 1 f) a plurality of resin-encapsulated types. Semiconductor device 1 11 〇 The terminal 9 is a fan-shaped terminal arranged inside and outside the LSI element 6. The obtained semiconductor device 1 0 1 0 has a wiring 4 connected to the external wiring through the protrusion 3 and the terminal 9 as a medium. &Lt; Example 1 2 &gt; In this example, a resin-encapsulated semiconductor device is fabricated as shown in Figs. 12a to 12g. First, a copper ore on one side of an electrolytic copper foil 3 1 with a thickness of 0 · 0 3 5 mm is 0 · 0. 0 1mm thick nickel layer 3 2, the surface of this nickel layer is plated 0.09mm A thick copper film 33 (Fig. 12a). Next, a photosensitive resist dry film (FOTEXRY — 3 0 2 5 manufactured by Hitachi Chemical Industries, Ltd.) was laminated on the surface of the electroplated copper film 31, and exposed and developed. 2. Formation of an etching resist pattern 34 for forming the protrusions 42 (Fig. 12b), followed by etching the electrolytic copper foil with an alkaline immersion uranium solution to form protrusions 42 having a height of 5 mm (Fig. 12c), The resist film 34 was peeled off, and the exposed nickel 32 was removed with a slower copper etching solution (Fig. 12 d). This paper is applicable. National Standard (CNS) A4 size (210X297 mm) ~ '-50-(Please read the notes on the back before filling this page)

、1T 552694 經濟部智慧財產局員工消費合作社印製 A7 __B7五、發明説明（呷 其次，所得的附有突出物4 2的銅膜3 3與厚度 0 · 050mm的金屬片1 (不繡鋼SUS304)的支 撐構件，介以厚度〇 . 〇 5 m m的粘著劑2 (日立化成工 業（株）製S P A I )作爲絕緣基材，將突出物4 2以層 壓埋入粘著劑2中。 接著在銅膜3 3表面層壓感光性抗鈾乾膜（日立化成 工業（株）製FOTEX RY— 3025)經曝光、顯 像、形成配線4電鍍圖案3 7後，在銅膜3 3的露出位置 ，依序鍍上厚度0 . 〇 〇 3mm以上的鎳膜3 5及厚度爲 0 . 0 0 0 3 m m以上純度爲9 9 · 9 %以上的金膜 3 6。接著將抗鈾膜3 7剝離，以鹼性浸鈾劑鈾刻除銅箔 3 3的露出位置，形成由銅箔3 3、鎳膜3 5及金膜3 6 所成的三層構造的配線4模紋，依此得到如圖1 2 g所示 的配線基板1 2 0 0。 &lt;實施例1 3 &gt; 本實施例如圖1 3 a〜圖1 3 g所示製作成樹脂封裝 型半導體裝置。 首先，在0 · 0 3 5 m m厚的電解銅箔4 1的一面鍍 上0 · 0 0 1mm厚的鎳層3 2，在此鎳層3 2表面層壓 感光性抗蝕乾膜（日立化成工業（株）製F Ο T E X Η 一 9 0 5 0 )經曝光，形成突出物4 3的抗電鍍圖案4 4 (圖13b)，其次在鎳層32露出表面的位置以電鍍形 成0.035 mm高的銅膜突出物43後（圖13c) ’ (請先閱讀背面之注意事項再填寫本頁) •^一衣. -、111T 552694 A7 __B7 printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs V. Description of the invention (呷 Secondly, the obtained copper film 3 with protrusions 4 2 3 and metal sheet 1 with a thickness of 0 · 050mm 1 ), A support member, with an adhesive 2 (SPHI, manufactured by Hitachi Chemical Industries, Ltd.) having a thickness of 0.05 mm as an insulating base material, and the protrusions 42 were embedded in the adhesive 2 in a laminate. A photosensitive uranium-resistant dry film (FOTEX RY-3025 manufactured by Hitachi Chemical Industries, Ltd.) was laminated on the surface of the copper film 3 3, and after exposure, development, and formation of wiring 4 plating patterns 3 7, the exposed position of the copper film 3 3 Then, a nickel film 35 with a thickness of more than 0.03 mm and a gold film with a thickness of more than 0.03 mm and a purity of 9 9 · 9% or more are sequentially plated. Then the anti-uranium film 37 is peeled off. The exposed position of the copper foil 3 3 was etched with alkaline uranium leaching agent uranium to form a three-layer wiring 4 pattern consisting of copper foil 3 3, nickel film 3 5 and gold film 3 6. The wiring substrate 1220 shown in Fig. 12g. &Lt; Example 1 3 &gt; This embodiment is made of a resin-encapsulated semiconductor as shown in Figs. 13a to 13g. First, a 0 · 0 0 1mm thick nickel layer 3 2 was plated on one side of a 0 · 0 3 5 mm thick electrolytic copper foil 4 1, and a photosensitive resist dry film was laminated on the surface of the nickel layer 3 2 ( Hitachi Chemical Industry Co., Ltd. F 〇 TEX Η 9 0 5 0) After exposure, the anti-plating pattern 4 4 (FIG. 13 b) of the protrusion 4 3 is formed, and then 0.035 mm is formed by plating at the position where the nickel layer 32 is exposed on the surface. After the high copper film protrusion 43 (Figure 13c) '(Please read the precautions on the back before filling in this page) • ^ 一 衣.-、 11

本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -51 - 552694 Α7 Β7 五、發明説明（叫 接著將抗蝕膜4 4剝離，露出的鎳層3 2以銅浸蝕較慢的 鎳浸蝕液除去（圖1 3 d )。 接著，所得的附有突出物4 3的銅膜4 1與厚度 〇·050mm的金屬片1(不繡鋼SUS304)的支 撐構件，介以厚度〇 . 〇 5 m m的粘著劑2 (日立化成工 業（株）製S P A I )作爲絕緣基材，將突出物4 3以層 壓埋入粘著劑2中（圖13e)。 其次在銅膜4 1表面層壓感光性抗蝕乾膜（日立化成 工業（株）製FOTEX RY— 3025)經曝光、顯 像、形成配線4電鍍圖案3 7後，在銅膜4 1的露出位置 ’依序以電鍍層壓厚度〇 · 〇 〇 3mm以上的鎳膜3 5及 厚度爲0 · 〇〇〇 3mm以上純度爲9 9 · 9%以上的金 膜3 6 (圖1 3 f )。接著將抗蝕膜3 7剝離，以鹼性浸 蝕劑蝕刻銅箔4 1 ，得到由銅箔3 3、鎳膜3 5及金3 6 所形成的配線4模紋，依此得到如圖1 3 g所示的配線基 板 1 3 0 0。 &lt;實施例1 4 &gt; 本實施例如圖1 4 a〜圖1 4g所示製作成樹脂封裝 型半導體裝置。 首先，在0·035mm厚的電解銅箔31的一面鍍 上0 · 0 0 1mm厚的鎳層3 2，在此鎳層3 2表面層壓 感光性抗鈾乾膜（日立化成工業（株）製F〇T E X Η 一 9 0 5 0 )經曝光，形成突出物4 3的抗電鍍圖案4 4 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） 1-- (請先閱讀背面之注意事項再填寫本頁) 訂This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -51-552694 A7 B7 V. Description of the invention (called the stripping of the resist film 4 4 and the exposed nickel layer 3 2 is slower with copper etching The nickel etching solution was removed (Fig. 1 3d). Next, the obtained support member of the copper film 41 with the protrusions 43 and the metal sheet 1 (stainless steel SUS304) having a thickness of 0.050 mm was interposed with a thickness of 0.1. 〇5 mm adhesive 2 (SPAI manufactured by Hitachi Chemical Co., Ltd.) was used as an insulating base material, and the protrusions 43 were laminated in the adhesive 2 (Fig. 13e). Next, on the surface of the copper film 41 A photosensitive dry resist film (FOTEX RY-3025 manufactured by Hitachi Chemical Industries, Ltd.) was laminated, and after exposure, development, and formation of wiring 4 plating pattern 3 7, the plating film was sequentially deposited at the exposed position of the copper film 4 1. Press a nickel film 35 having a thickness of 3.0 mm or more and a gold film 3 6 having a thickness of 0. 003 mm or more and a purity of 99. 9% or more (Fig. 1 3f). Next, the resist film 3 7 After peeling, the copper foil 4 1 was etched with an alkaline etchant to obtain the pattern of the wiring 4 formed by the copper foil 3 3, the nickel film 3 5, and the gold 3 6. A wiring substrate 1 3 0 0 shown in 13 g. &Lt; Example 1 4 &gt; In this example, a resin-encapsulated semiconductor device is fabricated as shown in FIGS. 14 a to 14 g. First, a 0 · 035 mm thick One side of the electrolytic copper foil 31 is coated with a nickel layer 3 2 with a thickness of 0 · 0 0 1 mm, and a photosensitive uranium-resistant film is laminated on the surface of the nickel layer 3 2 (FOTEX 制 manufactured by Hitachi Chemical Industry Co., Ltd.-9 0). 5 0) After the exposure, the anti-plating pattern of the protrusions 4 3 4 4 This paper size applies the Chinese National Standard (CNS) A4 specification (210 × 297 mm) 1-- (Please read the precautions on the back before filling this page) Order

經濟部智慧財產局員工消費合作社印製 •52- 552694 Α7 Β7 經濟部智慧財產局員工消費合作社印製 五、發明説明（ (圖l4b)，其次在銅箔31露出表面的位置以電鍍形 成0.035mra高的銅膜突出物43後（圖14c) ’ 接著將抗蝕膜4 4剝離（圖1 4 d ) ° 接著，所得的附有突出物4 3的銅膜3 1與厚度 〇 · 050mm的金屬片1 (不繡鋼SUS304)的支 撐構件，介以厚度〇 · 〇 5 mm的粘著劑2 (日立化成工 業（株）製S P A I )作爲絕緣基材，將突出物4 3以層 壓埋入粘著劑2中（圖1 4 e )。 其次在銅膜3 1表面層壓感光性抗蝕乾膜（日立化成 工業（株）製FOTEX RY—3025)經曝光、顯 像、形成配線4電鍍圖案3 7後’在銅膜3 1的露出位置 ，依序以電鍍層壓厚度0 . 〇 〇 3 m m以上的鎳膜3 5及 厚度爲0 · 0 0 0 3 m m以上純度爲9 9 · 9 %以上的金 膜3 6 (圖1 4 f )。接著將抗蝕膜3 7剝離，以鹼性浸 蝕劑蝕刻銅箔3 1的露出位置，得到由銅箔3 1、鎳膜 3 5及金3 6所形成的配線4模紋，依此得到如圖1 4 g 所示的配線基板1 4 0。 &lt;實施例1 5 &gt; 本實施例如圖1 5 a〜圖1 5 g所示製作成樹脂封裝 型半導體裝置.。 首先，在0 · 0 3 5 mm厚的電解銅箔3 1的〜面層 壓感光性抗蝕乾膜（日立化成工業（株）製F〇T e X Η - 9 0 5 0 )經曝光，形成突出物4 0的抗電鍍圖案 ：----衣-- (請先閲讀背面之注意事項再填寫本頁) -、1ΤPrinted by the Employees 'Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs • 52-552694 Α7 Β7 Printed by the Employees' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs After the high copper film protrusion 43 (Fig. 14c) ', the resist film 4 4 is peeled off (Fig. 14 d) ° Next, the obtained copper film 31 with the protrusion 4 3 and the metal with a thickness of 0.050 mm are obtained. Sheet 1 (Stainless Steel SUS304) is a support member with an adhesive 2 (SPAI manufactured by Hitachi Chemical Industries, Ltd.) with a thickness of 0.05 mm as an insulating base material, and protrusions 4 and 3 are embedded in a laminate. Adhesive 2 (Fig. 1 4e). Next, a photosensitive resist dry film (FOTEX RY-3025 manufactured by Hitachi Chemical Industries, Ltd.) was laminated on the surface of copper film 3 1 and exposed, developed, and formed wiring 4 plating After the pattern 37, at the exposed position of the copper film 31, a nickel film 35 with a thickness of 0.03 mm or more and a thickness of 0. 0 0 0 3 mm or more are sequentially laminated with a purity of 9 9 · 9 % Of the gold film 36 (Fig. 1 4f). Next, the resist film 37 was peeled off, and the copper foil 31 was exposed with an alkaline etchant. Position, the pattern of the wiring 4 formed by the copper foil 31, the nickel film 35, and the gold 36 is obtained, and the wiring board 1 40 shown in FIG. 14g is obtained accordingly. &Lt; Example 1 5 &gt; In this embodiment, a resin-encapsulated semiconductor device is fabricated as shown in FIGS. 15 a to 15 g. First, a photosensitive resist dry film is laminated on the surfaces of the electrolytic copper foil 3 1 of 0 · 0 3 5 mm thick. (Hitachi Chemical Industry Co., Ltd. FOT e X Η-9 0 50 0) After exposure, the anti-plating pattern of the protrusion 40 is formed: ---- clothing-(Please read the precautions on the back before filling (This page)-, 1Τ

本紙張尺度適用中國國家標準（CNS ) Α4規格（210 X 297公釐） -53- 552694 經濟部智慧財產局員工消贽合作社印製 A7 __ B7五、發明説明（5) 3 4 (圖1 5 b )，其次在銅箔3 1以蝕刻形成 〇.〇30mm深的突出物40後（圖15c)，接著將 抗蝕膜3 4剝離（圖1 5 d )。 接著，所得的附有突出物4 0的銅膜3 1與厚度 0 · 050mm的金屬片1 (不繡鋼SUS304)的支 撐構件，介以厚度〇 . 0 5 m m的粘著劑2 (日立化成工 業（株）製S P A I )作爲絕緣基材，將突出物4 0以層 壓埋入粘著劑2中（圖1 5 e )。 其次在銅膜3 1表面層壓感光性抗蝕乾膜（日立化成 工業（株）製FOTEX RY— 3025)經曝光、顯 像、形成配線4抗電鍍圖案3 7後（圖1 5 f )，在銅膜 3 1的露出位置，依序以電鍍層壓厚度〇 . 〇 〇 3 m m以 上的鎳膜及厚度爲〇 . 0003mm以上純度爲99 · 9 %以上的金膜（圖1 4 f )。接著將抗蝕膜3 7剝離，以 鹼性浸蝕劑蝕刻銅箔3 1的露出位置，得到由銅箔3 1、 鎳膜3 5及金3 6所形成的配線4模紋，依此得到如圖 1 5 g所示的配線基板1 5 0。 &lt;實施例1 6 &gt; 本實施例如圖1 6 a〜圖1 6 h所示製作成樹脂封裝 型半導體裝置， 首先，在0 · 0 3 5 m m厚的電解銅箔3 1的一面鍍 上0 · 0 0 1mm厚的鎳層3 2，在此鎳層3 2表面鍍上 〇· 0 0 9 m m的銅膜3 3 (圖1 6 a )，其次在銅膜 本紙張尺度適用中國國家標準（CNS ) A4規格（210X2W公釐） ~ ~~ -54 - ----1__:---费-I (請先閱讀背面之注意事項再填寫本頁) ,ιτ 552694 經濟部智慧財產局員工消費合作社印製 A7 B7____五、發明説明（5? 3 3表面層壓感光性抗蝕乾膜（日立化成工業（株）製 F〇T E X R Y — 3 0 2 5 )經曝光、顯像、形成配線 4鈾刻圖案3 7後（圖1 6 b )，以蝕刻除去銅膜3 3的 露出位置，接著將抗蝕膜3 7剝離形成配線4 (圖1 6 c )° 其次在配線4與配線4之間露出的鎳層3 2的表面層 壓感光性抗鈾乾膜（日立化成工業（株）製1；^0丁£：}( Η - 9 0 5 0 )經曝光、顯像、形成突出物4 6電鑛圖案 3 4後（圖1 6 d )，在配線4的露出位置’電鍍 0 · 035mm的銅，形成突出物46 (圖16e)，將 抗鈾膜3 4剝離。 接著，所得的附有突出物4 6的銅膜3 1與厚度 0.0 5 0 111111的金屬片1(不繡鋼31183 0 4)的支 撐構件，介以厚度〇 . 〇 5 m m的粘著劑2 (日立化成工 業（株）製S P A I )作爲絕緣基材，將突出物4 6以層 壓埋入粘著劑2中（圖1 6 g )，以鹼性浸蝕劑鈾刻銅箔 3 1 ，露出鎳層3 2，露出的鎳層3 2以以銅浸蝕較慢的 鎳浸鈾液除去。其次在配線4的表面依序以電鍍層壓厚度 0 . 003 mm以上的鎳膜及厚度爲〇 . 00〇3mm以 上純度爲9 9 · 9 %以上的金膜。依此得到如圖1 6 h所 示的配線基板.1 6 0。 &lt;實施例1 7 &gt; 本實施例如圖1 7 a〜圖1 7 e所示製作成樹脂封裝 本紙張尺度適用中國國家標準（CNS ) A4規格（210 Χ297公釐） — -55 - (請先閲讀背面之注意事項再填寫本頁)This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -53- 552694 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 __ B7 V. Description of the invention (5) 3 4 (Figure 1 5 b) Secondly, after the copper foil 31 is etched to form a 0.030 mm deep protrusion 40 (FIG. 15c), the resist film 34 is then peeled off (FIG. 15d). Next, a support member of the obtained copper film 31 with protrusions 40 and a metal sheet 1 (stainless steel SUS304) having a thickness of 0. 050 mm was interposed with an adhesive 2 (Hitachi Chemical Co., Ltd.) having a thickness of 0.05 mm. SPAI (manufactured by Kogyo Co., Ltd.) was used as an insulating base material, and the protrusions 40 were laminated in the adhesive 2 (Fig. 15e). Next, a photosensitive resist dry film (FOTEX RY-3025 manufactured by Hitachi Chemical Co., Ltd.) was laminated on the surface of the copper film 31, and after exposure, development, and formation of wiring 4 anti-electroplating pattern 3 7 (Fig. 15 f), At the exposed position of the copper film 31, a nickel film having a thickness of 0.03 mm or more and a gold film having a thickness of 0.0003 mm or more and a purity of 99 · 9% or more were sequentially laminated by electroplating (Fig. 14f). Then, the resist film 37 is peeled off, and the exposed position of the copper foil 31 is etched with an alkaline etchant to obtain the pattern of the wiring 4 formed by the copper foil 31, the nickel film 35, and the gold 36. The wiring board 150 shown in FIG. 15g. &lt; Example 1 6 &gt; In this example, a resin-encapsulated semiconductor device is fabricated as shown in FIGS. 16 a to 16 h. First, one side of an electrolytic copper foil 3 1 having a thickness of 0. 0 3 5 mm is plated. 0 · 0 0 1mm-thick nickel layer 3 2, the surface of this nickel layer 32 is plated with a copper film 3 3 (Figure 16 a) of copper layer 9 and secondly, the Chinese standard is applied to the copper film. (CNS) A4 specification (210X2W mm) ~~~ -54----- 1 __: --- Fee-I (Please read the notes on the back before filling out this page), ιτ 552694 Staff of Intellectual Property Bureau, Ministry of Economic Affairs A7 B7____ printed by consumer cooperatives V. Description of the invention (5? 3 3 surface laminated photoresist dry film (Fotexry — 3 0 2 5 manufactured by Hitachi Chemical Industry Co., Ltd.) After exposure, development and wiring formation 4 After the uranium engraved pattern 3 7 (Fig. 16 b), the exposed position of the copper film 3 3 is removed by etching, and then the resist film 37 is peeled to form the wiring 4 (Fig. 1 6 c) ° Next, the wiring 4 and the wiring 4 A photosensitive uranium-resistant dry film (manufactured by Hitachi Chemical Co., Ltd .; 1; 00 丁 £:} (Η-9 0 5 0) exposed on the surface of the nickel layer 3 2 between the exposed layers was formed, and the protrusions were formed. Figure 4 6 After case 34 (Fig. 16d), copper 0. 035 mm was plated at the exposed position of wiring 4 to form protrusions 46 (Fig. 16e), and the uranium-resistant film 34 was peeled off. Next, the obtained protrusions were attached. 4 6 copper film 3 1 and 0.05 0 111111 metal sheet 1 (stainless steel 31183 0 4) support member with an adhesive 2 (made by Hitachi Chemical Co., Ltd.) with a thickness of 0.05 mm SPAI) was used as an insulating substrate, and the protrusions 46 were laminated in the adhesive 2 (Fig. 16g), and the copper foil 3 1 was etched with the alkaline etchant uranium to expose the nickel layer 32 and the exposed nickel. Layer 32 was removed with a nickel leaching uranium solution that was slower with copper etching. Secondly, a nickel film with a thickness of 0.003 mm or more and a thickness of 0.003 mm or more was 9 9 on the surface of wiring 4 in order. A gold film of 9% or more. In this way, a wiring substrate shown in FIG. 16 h is obtained. 1 60. &lt; Example 1 7 &gt; This example is fabricated as shown in FIGS. 17 a to 17 e Resin packaging This paper is sized for China National Standard (CNS) A4 (210 x 297 mm) — -55-(Please read the precautions on the back before filling this page)

552694 A7 __ _B7 ____ 五、發明説明（邛 型半導體裝置。 首先，在0 _ 0 3 5mm厚的電解銅箔3 1的一面鍍 上0 · 001mm厚的鎳層32，在此鎳層32表面鍍上 〇 ·009mm的銅膜33 ，其次在銅膜31表面層壓感 光性抗蝕乾膜（日立化成工業（株）製F〇T E x R γ 一 3 〇 2 5 )經曝光、顯像、形成突出物3蝕刻圖案’以 蝕刻除去銅膜3 1的露出位置，形成高度爲〇 · 〇 3 5 m m的突出物3後，將抗鈾膜剝離。 其次所得的附有突出物3的銅膜3 3與厚度 0.050mm的金屬片1(不繡鋼SUS304)的支 撐構件，介以厚度〇 · 〇 5 m m的粘著劑2 (日立化成工 業（株）製S P A I )作爲絕緣基材，將突出物3以層壓 埋入粘著劑2中。 其次在銅膜3 3的表面層壓感光性抗蝕乾膜（日立化 成工業（株）製FOTEX RY — 3025)經曝光、 顯像、形成配線4的蝕刻圖案後，在銅膜3 3的露出位置 ，以鹼性浸蝕劑鈾刻銅箔3 3，形成第一層的配線4，露 出的鎳層3 2以鎳選擇鈾刻除去（圖1 7 a )。 接著，配線4以R C C (樹脂塗覆銅箔）4 6覆蓋層 壓形成樹脂層39及銅層45 (圖17b)，在銅膜45 的表面層壓感光性抗蝕乾膜（日立化成工業（株）製 FOTEX RY— 3025)經曝光、顯像形成貫通孔 4 8用貫通孔4 8的蝕刻圖案。 接著露出的銅膜4 5以酸蝕刻劑加以蝕刻，樹脂層 本紙張尺度適用中國國家標準（CNS ) A4規格(210X 297公釐） ~ ' &quot; -56 - &gt;裝-- (請先閱讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消費合作社印製 552694 A7 B7 五、發明説明（Μ 3 9以C〇2雷射開孔，在銅層4 5及樹脂層3 9形成達到 第一層的配線4直徑〇 · 1 5 m m的貫通孔4 7後，貫通 孔內以平常的方法進行淸除’貫通孔內壁以電鍍形成 0 . 0 1 5mm厚的銅膜形成貫通孔48 (圖1 7 d)。 其次在銅膜4 9的表面層壓感光性抗蝕乾膜（日立化 成工業（株）製FOTEX RY— 3025)經曝光、 顯像、形成配線4的蝕刻圖案後，在銅膜4 9，4 5的露 出位置，以鹼性浸鈾劑鈾刻，形成由銅層4 9，4 5所成 的第二層的配線4。其次在第二層的配線4的表面依序以 電鍍層壓厚度0 . 0 0 3 mm以上的鎳膜及厚度爲 0 . 0 0 0 3 m m以上純度爲9 9 · 9 %以上的金膜。依 此得到如圖1 7 e所示的配線基板1 7 0。 &lt;實施例1 8 &gt; 本實施例如圖1 8 a〜圖1 8 g所示製作成樹脂封裝 型半導體裝置。 首先，在0 · 0 3 5mm厚的電解銅箔3 1的一面鍍 上0 · 0 0 1mm厚的鎳層3 2，在此鎳層3 2表面鍍上 0.009mm的銅膜33 (圖18a)，其次在銅膜3 3表面層壓感光性抗蝕乾膜（日立化成工業（株）製 F〇T E X . R Y - 3 0 2 5 )經曝光、顯像、形成配線 4鈾刻圖案，以鈾刻除去銅膜3 3，形成第一層的配線4 ，將抗蝕膜剝離（圖1 8 b )。 其次所得的附有配線4的銅膜3 1的表面以R c C ( 本紙張尺度適用中國國家標準（CNS ) A4規格（210 '〆297公釐） 裝-- (請先閲讀背面之注意事項再填寫本頁) 訂 -.9 經濟部智慧財產局員工消費合作社印製 -57- 552694 經濟部智慧財產局員工消費合作社印製 A7 B7五、發明説明（55 樹脂塗覆銅箔）46覆蓋層壓形成樹脂層39及銅層45 (圖1 8 c )，接著在銅膜4 5的表面層壓感光性抗蝕乾 膜（日立化成工業（株）製FOTEX RY— 3025 )經曝光、顯像形成貫通孔4 8用貫通孔4 8的蝕刻圖案 。接著露出的銅膜4 5以酸蝕刻劑加以蝕刻，樹脂層3 9 以C〇2雷射開孔，在銅層4 5及樹脂層3 9形成達到第一 層的配線4直徑0 · 1 5 m m的貫通孔4 7後（圖1 8 d )，貫通孔內以平常的方法進行淸除，貫通孔內壁以電鍍 形成0 · 0 1 5mm厚的銅膜形成貫通孔48 (圖1 8 e )° 其次在銅電解膜4 9表面及銅箔3 1表面層壓感光性 抗蝕乾膜（日立化成工業（株）製F Ο T E X R Y -3 0 2 5 )經曝光、顯像 '形成配線4的蝕刻圖案及突出 物3形成用蝕刻圖案。 續之，在銅層49、4 5及銅箔3 1的露出位置，以 鹼性浸蝕劑蝕刻，形成由銅層4 9，4 5所成的第二層的 配線4同時形成突出物3。露出的鎳層以鎳選擇蝕刻除去 ，將抗蝕膜剝離（圖1 8 f )。 其次在所得的附有突出物3的銅膜與厚度0 . 0 5 0 mm的金屬片1 (不繡鋼SUS304)的支撐構件，介 以厚度0 · 0 5 m m的粘著劑2 (日立化成工業（株）製 S P A I )作爲絕緣基材，將突出物3以層壓埋入粘著劑 2中。接著第二層的配線4的表面依序以電鍍層壓厚度 0 · 0 0 3 m m以上的鎳膜（圖上未顯示）及厚度爲 I紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐） _ &quot;~~ I-- (請先閱讀背面之注意事項再填寫本頁)552694 A7 __ _B7 ____ 5. Description of the invention (邛 -type semiconductor device. First, a 0. 001mm thick nickel layer 32 is plated on one side of a 0_0 3 5mm thick electrolytic copper foil 31, and the surface of this nickel layer 32 is plated A copper film 33 having a thickness of 0.09 mm is next, and a photosensitive resist dry film (FTETE x R γ 3 2 05 2 manufactured by Hitachi Chemical Industries, Ltd.) is laminated on the surface of the copper film 31. After exposure, development, and formation The protrusion 3 is etched to remove the exposed position of the copper film 31 by etching to form a protrusion 3 having a height of 0.5 mm, and then the uranium-resistant film is peeled off. Next, the obtained copper film 3 with the protrusion 3 is obtained. 3 and a supporting member with a metal sheet 1 (stainless steel SUS304) having a thickness of 0.050 mm, and an adhesive 2 (SPAI, manufactured by Hitachi Chemical Co., Ltd.) as an insulating base material with a thickness of 0.05 mm, and the protrusions 3 is laminated in the adhesive 2. Next, a photosensitive resist dry film (FOTEX RY-3025 manufactured by Hitachi Chemical Industries, Ltd.) is laminated on the surface of the copper film 3 3, and exposed, developed, and formed wiring 4 After the pattern is etched, the copper foil 33 is etched with an alkaline etchant uranium at the exposed position of the copper film 33 to form a first layer of Line 4, the exposed nickel layer 32 is removed by nickel selective uranium etching (Fig. 17a). Next, the wiring 4 is covered with RCC (resin coated copper foil) 4 6 to form a resin layer 39 and a copper layer 45 (Fig. 17b), a photoresist dry film (FOTEX RY-3025 manufactured by Hitachi Chemical Co., Ltd.) is laminated on the surface of the copper film 45, and an etching pattern of through holes 48 is formed through exposure and development. The exposed copper film 45 is etched with an acid etchant. The resin layer is sized according to the Chinese National Standard (CNS) A4 (210X 297 mm) ~ '&quot; -56-&gt; installed-(Please read the back first Please pay attention to this page and fill in this page) Order printed by the Intellectual Property Bureau of the Ministry of Economic Affairs's Consumer Cooperatives 552694 A7 B7 V. Description of the invention (M 3 9 is perforated with C02 laser, formed on the copper layer 4 5 and the resin layer 3 9 After reaching the first-layer wiring 4 with a diameter of 1.5 mm through-holes 47, the through-holes are removed in the usual way. The inner wall of the through-holes is electroplated to form a copper film with a thickness of 0. 1 5 mm to form the through-holes. 48 (Fig. 17 d). Next, a photosensitive resist dry film (FOT manufactured by Hitachi Chemical Industries, Ltd.) was laminated on the surface of the copper film 49. EX RY-3025) After exposure, development, and formation of an etching pattern of the wiring 4, the copper film 49, 45 is exposed with an alkaline leaching agent uranium to form a copper layer 49, 45. The second layer of wiring 4 is formed. Secondly, a nickel film having a thickness of 0.03 mm or more and a thickness of 0.03 to 3.0 mm are sequentially deposited on the surface of the wiring 4 of the second layer in order. 9 · 9% or more gold film. As a result, a wiring substrate 170 as shown in FIG. 17e is obtained. &lt; Example 1 8 &gt; In this example, a resin-encapsulated semiconductor device is fabricated as shown in Figs. 18a to 18g. First, a 0. 0 3 5 mm thick electrolytic copper foil 3 1 is plated with a 0. 0 0 1 mm thick nickel layer 3 2, and a 0.009 mm copper film 33 is plated on the surface of the nickel layer 3 2 (FIG. 18 a). Next, a photosensitive resist dry film (FOTEX .RY-3 0 2 5 manufactured by Hitachi Chemical Co., Ltd.) was laminated on the surface of the copper film 3 3. After exposure, development, a wiring pattern of uranium was formed, and uranium was formed. The copper film 3 3 is removed by etching to form the first-layer wiring 4, and the resist film is peeled off (FIG. 18 b). Secondly, the surface of the copper film 3 1 with wiring 4 is R c C (This paper size applies Chinese National Standard (CNS) A4 specifications (210 '〆297 mm))-(Please read the precautions on the back first Refill this page) Order-.9 Printed by the Employees 'Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs-57- 552694 Printed by the Employees' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the Invention (55 Resin Coated Copper Foil) 46 Cover A resin layer 39 and a copper layer 45 were formed by pressing (FIG. 18c), and then a photosensitive resist dry film (FOTEX RY-3025 manufactured by Hitachi Chemical Industries, Ltd.) was laminated on the surface of the copper film 45, and exposed and developed. An etching pattern is formed for the through-holes 48 and 48. The exposed copper film 45 is etched with an acid etchant, and the resin layer 39 is opened with a C02 laser, and the copper layer 45 and the resin layer 3 are opened. 9 After forming the first layer of wiring 4 through-holes with a diameter of 0 · 15 mm 4 7 (Fig. 1 8 d), the through-holes are removed by ordinary methods, and the inner walls of the through-holes are electroplated to form 0 · 0 1 5mm-thick copper film formed through-holes 48 (Fig. 18e) ° Secondly, a photosensitive layer was laminated on the surface of the copper electrolytic film 4 9 and the surface of the copper foil 3 1 A dry resist film (F Ο TEXRY -3 0 2 5 manufactured by Hitachi Chemical Co., Ltd.) is exposed and developed to form an etching pattern for wiring 4 and an etching pattern for forming protrusions 3. Continued, copper layers 49, 4 5 and the exposed position of copper foil 31 were etched with an alkaline etchant to form a second layer of wiring 4 made of copper layers 4 9 and 4 5 to simultaneously form protrusions 3. The exposed nickel layer was selectively etched with nickel. Then, the resist film is peeled off (Fig. 18f). Next, the support member of the obtained copper film with the protrusions 3 and the metal sheet 1 (stainless steel SUS304) with a thickness of 0.05 mm is interposed between Adhesive 2 (SPAI, manufactured by Hitachi Chemical Co., Ltd.) with a thickness of 0.5 mm was used as an insulating base material, and the protrusions 3 were laminated in the adhesive 2. The surface of the wiring 4 on the second layer was next The nickel film with a thickness of more than 0 · 0 0 3 mm (not shown in the figure) and a thickness of I paper are applied in order in accordance with the Chinese National Standard (CNS) A4 specification (210X297 mm) _ &quot; ~~ I- -(Please read the notes on the back before filling this page)

、1T * 經濟部智慧財產局員工消費合作社印製 552694 A7 _B7_ 五、發明説明（％ 0 . 0 0 0 3 m m以上純度爲9 9 · 9 %以上的金膜（圖 上未顯示）。依此得到如圖1 8 g的配線基板1 8 0。 商業上之利用領域 如上述，依本發明，可靈活的對應小型化，高集成度 化，可安定製造生產性良好的半導體裝置。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁), 1T * Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 552694 A7 _B7_ V. Description of the invention (% 0. 0 0 0 3 mm gold film with a purity of 99. 9% or more (not shown in the figure). A wiring substrate 180 as shown in Fig. 18g is obtained. As described above, in the field of commercial use, according to the present invention, it can flexibly correspond to miniaturization, high integration, and stable manufacture of semiconductor devices with good productivity. Applicable Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page)

-59 --59-

Claims (1)

552694 A8 B8 C8 D8 六、申請專利範圍1 (請先閲·«背面之注意事項再填寫本頁) 1 . 一種配線基板，其特徵爲具備：絕緣基材；具有 設置於上述絕緣基材之表裏之一面之配線的配線構件；被 埋入於上述絕緣基材內的導體構件，其中上述導體構件的 一端露出於上述絕緣基材表面，連接上述配線，另一端被 埋入於上述絕緣基材內。 2 .如申請專利範圍第1項之配線基板，其中上述絕 緣基材含環氧樹脂或聚醯胺醯亞胺樹脂硬化物。 3 · —種配線基板，其特徵爲具備：絕緣基材；具有 被設置於上述絕緣基材之表裏之一面之配線的配線構件； 被放置於上述絕緣基材之另一面的支撐構件；被埋入於上 述絕緣基材內，與上述配線連接的導體構件。 4 .如申請專利範圍第3項之配線基板，其中上述支 撐構件至少含金屬、樹脂及陶瓷之中的任一項。 5 ·如申請專利範圍第1〜4項中任一項之配線基板 ，其中預置之上述配線構件爲複數的配線層，及上述配線 層間作爲絕緣的層間絕緣層，及設置於上述層間絕緣層內 ，連接上述配線層間的貫通孔。 經濟部智慧財產局員工消費合作社印製 6 ·如申請專利範圍第1項之配線基板，其中上述導 體構件的厚度爲0 · 0 1mm〜0 · 1 5mm，上述絕緣 基材的厚度與上述導體構件的厚度的差數在0·1mm以 下。 .7 · —種如申請專利範圍第1〜6項中任一項之配線 基板的製造方法，其特徵係具備：將在第一之面±設置突 起狀之導體構件之配線構件與絕緣基材，使該導體構件爲 本紙張尺度適用中國國家標準（CNS ) a4規格（210 X 297公釐） 552694 A8 B8 C8 D8 經濟部智慧財產局員工消費合作社印製 六、申請專利範圍2 內側，並對向層壓之層壓步驟。 8 .如申請專利範圍第7項之配線基板之製造方法.， 其中上述層壓步驟爲上述絕緣基材的表裏的一面設置支撐 構件’上述配線構件設置上述導體構件之一面與上述絕緣 基材的無設置支撐構件的一面相對層壓的方法。 9 ·如申請專利範圍第7項之配線基板之製造方法， 其中上述配線構件的第二面設置臨時支撐板，上述層壓步 驟之後’更具備除去上述臨時支撐板的方法。 1 0 .如申請專利範圍第7項之配線基板之製造方法 ，其中更具備由上述配線構件的上述面由電鍍形成上述導 體構件的步驟。 1 1 ·如申請專利範圍第7項之配線基板之製造方法 ，其中更具備由上述配線構件的上述第一面除去設置的導 體膜的一部份而形成的上述導體構件的步驟。 1 2 ·如申請專利範圍第7項之配線基板之製造方法 ，其中更具備由除去導體板的一部份形成上述配線構件及 導體構件的蝕刻步驟。 1 3 ·如申請專利範圍第1 2項之配線基板之製造方 法，其中上述導體板爲由依序層壓之第一導體層、第二導 體層及第三導體層所構成，上述蝕刻步驟具備：鈾刻上述 第一導體層的一部份形成上述配線構件的配線構件形成步 驟；蝕刻上述第三導體層的一部份形成上述導體構件的導 體構件形成步驟；及蝕刻除去上述第二導體層露出處之阻 蝕層除去步驟。 -----: ·一 —、「二77:.，:·二二 ~--- ---r--r----- (請先閲·#背面之注意事項再填寫本頁) 、1T552694 A8 B8 C8 D8 6. Scope of patent application 1 (Please read the «Notes on the back side before filling out this page） 1. A wiring substrate characterized by: an insulating base material; a surface provided on the surface of the above-mentioned insulating base material A wiring member for one side of the wiring; a conductor member buried in the insulating base material, wherein one end of the conductor member is exposed on the surface of the insulating base material to connect the wiring, and the other end is buried in the insulating base material . 2. The wiring board according to item 1 of the scope of patent application, wherein the insulating base material contains an epoxy resin or a polyamide-imide resin hardened material. 3. A wiring board, comprising: an insulating substrate; a wiring member having wiring provided on one surface of the insulating substrate; a supporting member disposed on the other surface of the insulating substrate; buried A conductive member that is inserted into the insulating base material and connected to the wiring. 4. The wiring board according to item 3 of the scope of patent application, wherein the supporting member contains at least any one of metal, resin and ceramic. 5. The wiring board according to any one of claims 1 to 4, wherein the preset wiring members are a plurality of wiring layers, and the above-mentioned wiring layers serve as insulation interlayer insulation layers, and are provided on the above-mentioned interlayer insulation layers. Inside, the through holes between the wiring layers are connected. Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 6 · If the wiring board of the first patent application scope, the thickness of the conductor member is 0 · 0 1mm ~ 0 · 15mm, the thickness of the insulating substrate and the conductor member The difference in thickness is less than or equal to 0.1 mm. .7 · A method for manufacturing a wiring board according to any one of claims 1 to 6 in the scope of patent application, which is characterized in that: a wiring member and an insulating base material are provided on the first surface ± with a protruding conductive member. , Make the conductor member to the Chinese paper standard (CNS) a4 specification (210 X 297 mm) 552694 A8 B8 C8 D8 printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs Lamination step to lamination. 8. The method for manufacturing a wiring board according to item 7 of the scope of patent application, wherein the above-mentioned laminating step is to provide a supporting member on one side of the front and back sides of the insulating substrate, and the wiring member is provided on one side of the conductive member and the insulating substrate. A method of laminating a side without a supporting member. 9 · The method for manufacturing a wiring board according to item 7 of the patent application scope, wherein the second side of the wiring member is provided with a temporary support plate, and after the above lamination step ', a method for removing the temporary support plate is further provided. 10. The method for manufacturing a wiring board according to item 7 of the scope of patent application, further comprising the step of forming the conductive member from the surface of the wiring member by electroplating. 1 1 · The method for manufacturing a wiring board according to item 7 of the scope of patent application, further comprising a step of removing the conductive member formed by disposing a part of the conductive film on the first surface of the wiring member. 1 2 · The method for manufacturing a wiring board according to item 7 of the scope of patent application, which further includes an etching step of forming the wiring member and the conductor member by removing a part of the conductor plate. 1 3 · According to the method for manufacturing a wiring board according to item 12 of the scope of patent application, wherein the above-mentioned conductor plate is composed of a first conductor layer, a second conductor layer, and a third conductor layer that are sequentially laminated, and the etching step includes: A step of forming a wiring member forming a part of the first conductor layer by the uranium etching; a step of forming a conductor member forming a portion of the third conductor layer by forming the conductor member; and removing the second conductor layer by etching to expose Step of removing the resist. -----: · 一 — 、 「二 77:.,: · 二 二 ~ --- --- r--r ----- (Please read the note on the back of # before filling out this page ), 1T 赚 準 家 國 國 中 用 適 * 公 yv IN 552694 A8 B8 C8 D8 申請專利範圍 3 經濟部智慧財產局員工消費合作社印製 1 4 ·如申請專利範圍第1 3項之配線基板之製造方 法，其中上述配線構件的形成步驟爲於上述第一導體層表 面形成鍍金圖案，以該電鍍圖案作爲抗蝕劑，由蝕刻上述 導體層形成上述配線構件的步驟。 1 5 · —種如申請專利範圍第1〜6項中任一項之配 線基板之製造方法，其特徵係具備：將突起狀之導體構件 構件設置於表裏其中之一面的導體層與絕緣基材，該導體 構件爲內側，並相對層壓的層壓步驟；及除去該導體構件 之不需要之處形成配線構件的配線構件形成步驟。 1 6 ·如申請專利範圍第1 5項之配線基板之製造方 法，其中上述配線構件.形成步驟爲上述導體層表面形成鍍 金圖案，以該電鍍圖案作爲抗蝕劑，以蝕刻上述導體層， 除去上述不需要之處，形成上述配線構件的步驟。 1 7 ·如申請專利範圍第1 5項之配線基板之製造方 法，其中上述絕緣基材的表裏的一面設置支撐構件，上述 層壓步驟爲上述導體層設置上述導體構件之面與上述絕緣 基材的無設置支撐構件的一面相對層壓的步驟。 1 8 .如申請專利範圍第1 5〜1 7項中任一項之配 線基板之製造方法，其中上述導體層的另一面設置臨時支 撐板，上述層壓步驟之後，具備除去上述臨時支撐板的步 驟。 1 9 .如申請專利範圍第1 5項之配線基板之製造方 法，其中更進一步具備：在上述導體層之上述面，.藉由電 鍍形成上述導體構件的步驟。 (請先閲嗦背面之注意事項再填寫本頁) 表紙張尺度適用中國國家標準（CNS ) A4g ( 210Χ297公釐） -62- 552694 A8 B8 C8 D8 經濟部智慧財產局員工消費合作社印製 六、申請專利範圍4 2 〇 .如申請專利範圍第1 5項之配線基板之製造方 法，其中更具備由除去上述導體層的上述面設置的導體部 的一部份形成導體構件的導體構件形成步驟。 2 1 .如申請專利範圍第2 0項之配線基板之製造方 法，其中上述導體構件形成步驟具備：將依順序層壓之第 一導體層、第二導體層及第三導體層所構成之導體板之該 第三導體層的一部份進行蝕刻形成上述導體構件的步驟； 及蝕刻除去上述第二導體層之露出處的步驟。 2 2 . —種如申請專利範圍第3項之配線基板之製造 方法，其特徵係具備：依配線構件、絕緣基材、支撐構件 的順序予以層壓之層壓步驟。 23·—種半導體裝置的製造方法，其特徵爲具備： 在申請專利範圍第1、2、5及6項之任一配線基板之上 述配線構件表面搭載半導體元件的搭載步驟；上述半導體 元件與上述配線材表面的配線以電連接的連接步驟；及除 去上述絕緣基材之一部份使上述導體構件之至少一部份露 出的絕緣基材除去步驟。 2 4 · —種半導體裝置的製造方法，其特徵爲具備申 請專利範圍第3或4項之配線基板之上述配線構件表面搭 載半導體元件的搭載步驟；及上述半導體元件與上述配線 材表面的配線連接電路的連接步驟；除去上述支持構件之 至少一部份使上述絕緣基板之至少一部份露出之支持構件 除去步驟；及除去上述絕緣基材的一部份使上述導體構件 之至少一部份露出之絕緣基材除去步驟。 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS ) A4規格（210 X 297公釐） 552694 經濟部智慧財產局員工消費合作社印製 A8 B8 C8 __ . D8六、申請專利範圍5 2 5 . —種半導體裝置的製造方法，其特徵爲具備·· 在申請專利範圍第3項之配線基板的配線構件側表面搭載 半導體元件的搭載步驟；上述半導體元件與上述配線構件 表面之配線以電連接的連接步驟；除去上述支持構件之至 少一部份使上述絕緣基材之至少一部份露出之支持構件除 去步驟；除去上述絕緣基材的一部份至少露出一部份的絕 緣基材除去步驟；及充塡上述貫通孔連接上述配線形成導 體構件的導體構件形成步驟。 2 6 ·如申請專利範圍第2 3〜2 5項中任一項之半 導體裝置的製造方法，其中上述搭載步驟以粘著劑爲媒介 進行搭載的方法。 2 7 ·如申請專利範圍第2 4或2 5項之半導體裝置 的製造方法，其中上述支撐構件除去步驟至少爲硏磨、化 學蝕刻及機械加工之中任一項進行除去上述支撐構件的方 法。 2 8 ·如申請專利範圍第2 3〜2 5項中任一項之半 導體裝置的製造方法，其中上述絕緣基材除去步驟至少依 硏磨、雷射照射及蝕刻之中之任一項進行除去上述絕緣基 材。 2 9 ·如申請專利範圍第2 3〜2 5項中任一項之半 導體裝置的製造方法，其中更具備上述絕緣基材除去後， 於上.述導體構件的露出部位置形成鍍金層的步驟。 3 〇 ·如申請專利範圍第2 3〜2 5項中任一項之半 導體裝置的製造方法，其中更具備上述絕緣基材除去後， (請先聞讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS ) A4規格（210 X 297公釐） -64 - 552694 A8 B8 C8 D8 六、申請專利範圍6 於上述導體構件的露出部位置形成焊點的步驟。 3 1 ·如申請專利範圍第2 3〜2 5項中任一項之半 導體裝置的製造方法，其中上述搭載步驟爲於一個上述配 線基板上搭載複數半導體元件的步驟。 3 2 ·如申請專利範圍第2 3〜2 5項中任一項之半 導體裝置的製造方法，其中上述搭載步驟爲於一個上述配 線基板上搭載半導體元件外，更搭載其他被動零件的步驟 〇 3 3 .如申請專利範圍第2 3〜2 5項中任一項之半 導體裝置的製造方法，其中更具備以封裝構件覆蓋封裝上 述半導體元件的封裝步驟。 3 4 ·如申請專利範圍第3 3項之半導體裝置的製造 方法，其中具備硏磨上述封裝構件至少露出一部份半導體 晶的步驟。 ---r--r----- (請先閲讀背面之注意事項再填寫本頁) 訂Appropriate use of public funds * yv IN 552694 A8 B8 C8 D8 Patent application scope 3 Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and printed by the Consumer Cooperatives of the Intellectual Property Bureau 1 4 · For the method of manufacturing wiring substrates in the scope of patent application No. 13 in which the above The step of forming the wiring member is a step of forming a gold plating pattern on the surface of the first conductor layer, using the plating pattern as a resist, and forming the wiring member by etching the conductor layer. 1 5 · —A method for manufacturing a wiring board according to any one of claims 1 to 6 in the scope of patent application, characterized in that it includes a conductive layer and an insulating base material in which protruding conductor members are provided on one of the front and back surfaces. A step of laminating the conductor member inside, and relatively laminating it; and a step of forming a wiring member that removes unnecessary portions of the conductor member to form a wiring member. 1 6 · The method for manufacturing a wiring board according to item 15 of the patent application scope, wherein the wiring member. Forming step is to form a gold plating pattern on the surface of the conductor layer, use the plating pattern as a resist, and etch the conductor layer to remove The unnecessary part is a step of forming the wiring member. 1 7 · The method for manufacturing a wiring board according to item 15 of the scope of patent application, wherein a support member is provided on the front and back surfaces of the above-mentioned insulating substrate, and the above-mentioned lamination step is to provide the above-mentioned conductor layer with the surface of the above-mentioned conductive member and the above-mentioned insulating substrate. The step of laminating the side without supporting members. 1 8. The method for manufacturing a wiring board according to any one of items 15 to 17 in the scope of patent application, wherein the other side of the conductor layer is provided with a temporary support plate, and after the laminating step, a method for removing the temporary support plate is provided. step. 19. The method for manufacturing a wiring board according to item 15 of the scope of patent application, further comprising: a step of forming the above-mentioned conductive member by electroplating on the above-mentioned surface of the above-mentioned conductive layer. (Please read the precautions on the back of the page before filling out this page) The paper size of the table is applicable to Chinese National Standards (CNS) A4g (210 × 297 mm) -62- 552694 A8 B8 C8 D8 Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs The scope of patent application 4 2 0. The method for manufacturing a wiring board according to item 15 of the scope of patent application, further comprising a conductor member forming step of forming a conductor member from a part of the conductor portion provided on the surface of the conductor layer excluding the conductor layer. 2 1. The method for manufacturing a wiring board according to item 20 of the scope of patent application, wherein the step of forming the conductor member includes: a conductor composed of a first conductor layer, a second conductor layer, and a third conductor layer that are sequentially laminated. A step of etching a part of the third conductive layer of the board to form the conductive member; and a step of removing the exposed portion of the second conductive layer by etching. 2 2. A method for manufacturing a wiring board such as the scope of patent application No. 3, which is characterized by: a laminating step of laminating in the order of a wiring member, an insulating substrate, and a supporting member. 23 · A method for manufacturing a semiconductor device, comprising: a mounting step of mounting a semiconductor element on a surface of the wiring member of any of the wiring substrates of claims 1, 2, 5, and 6; A connecting step of electrically connecting the wiring on the surface of the wiring material; and an insulating base material removing step of removing a part of the insulating base material and exposing at least a part of the conductive member. 2 4 · A method for manufacturing a semiconductor device, comprising a step of mounting a semiconductor element on a surface of the wiring member of a wiring board having a patent application scope of 3 or 4; and a wiring connection between the semiconductor element and the surface of the wiring material A circuit connecting step; a supporting member removing step of removing at least a portion of the supporting member to expose at least a portion of the insulating substrate; and removing a portion of the insulating substrate to expose at least a portion of the conductor member Step of removing the insulating substrate. (Please read the precautions on the back before filling this page) This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 552694 Printed by A8 B8 C8 __. Cooperative Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Patent application range 5 2 5. — A method for manufacturing a semiconductor device, characterized in that it includes a mounting step of mounting a semiconductor element on a wiring member side surface of a wiring substrate of a patent application range 3; the semiconductor element and the wiring described above. A step of electrically connecting the wiring on the surface of the member; a step of removing the supporting member that removes at least a part of the supporting member to expose at least a part of the insulating base material; removing at least a part of the insulating base material A step of removing the insulating base material; and a step of forming a conductive member that is filled with the through-hole to connect the wiring to form a conductive member. 2 6 · The method for manufacturing a semiconductor device according to any one of claims 2 3 to 25, wherein the mounting step is a method of mounting using an adhesive as a medium. 27. The method for manufacturing a semiconductor device according to claim 24 or 25, wherein the step of removing the supporting member is a method of removing the supporting member by at least one of honing, chemical etching, and machining. 2 8 · The method for manufacturing a semiconductor device according to any one of claims 2 3 to 25, wherein the step of removing the insulating substrate is performed by at least one of honing, laser irradiation, and etching. The aforementioned insulating substrate. 2 9 · The method for manufacturing a semiconductor device according to any one of claims 2 3 to 25, further comprising the step of forming a gold-plated layer on the exposed portion of the conductive member after removing the insulating base material. . 3 〇 · If the method of manufacturing a semiconductor device according to any one of the scope of patent application Nos. 2 3 to 25, which further includes the above-mentioned insulating substrate is removed, (please read the precautions on the back before filling out this page) The paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -64-552694 A8 B8 C8 D8 6. Application for patent scope 6 The step of forming a solder joint at the position of the exposed part of the above-mentioned conductor member. 3 1 · The method for manufacturing a semiconductor device according to any one of claims 2 3 to 25, wherein the mounting step is a step of mounting a plurality of semiconductor elements on one of the wiring substrates. 3 2 · The method for manufacturing a semiconductor device according to any one of the items 2 3 to 25 in the scope of patent application, wherein the mounting step is a step of mounting a semiconductor element on one of the wiring substrates and further mounting other passive components. 3. The method for manufacturing a semiconductor device according to any one of the claims 2 to 3 to 25, further comprising a packaging step of covering the semiconductor element with a packaging member. 34. The method for manufacturing a semiconductor device according to item 33 of the scope of the patent application, which includes the step of honing the package member to expose at least a part of the semiconductor crystal. --- r--r ----- (Please read the notes on the back before filling this page) Order 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐）Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper is sized for China National Standard (CNS) A4 (210X297 mm)
TW090121689A 2001-08-31 2001-08-31 Wiring substrate, semiconductor device and the manufacturing method thereof TW552694B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7365440B2 (en) 2004-10-04 2008-04-29 Sharp Kabushiki Kaisha Semiconductor device and fabrication method thereof
US8742567B2 (en) 2010-04-26 2014-06-03 Advance Materials Corporation Circuit board structure and packaging structure comprising the circuit board structure
US8766463B2 (en) 2012-04-26 2014-07-01 Subtron Technology Co., Ltd. Package carrier

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7365440B2 (en) 2004-10-04 2008-04-29 Sharp Kabushiki Kaisha Semiconductor device and fabrication method thereof
US8742567B2 (en) 2010-04-26 2014-06-03 Advance Materials Corporation Circuit board structure and packaging structure comprising the circuit board structure
US8748234B2 (en) 2010-04-26 2014-06-10 Advance Materials Corporation Method for making circuit board
US8836108B2 (en) 2010-04-26 2014-09-16 Advance Materials Corporation Circuit board structure and package structure
US8987060B2 (en) 2010-04-26 2015-03-24 Advance Materials Corporation Method for making circuit board
US8766463B2 (en) 2012-04-26 2014-07-01 Subtron Technology Co., Ltd. Package carrier

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