WO2017038713A1 - Method for manufacturing printed wiring board, and method for manufacturing semiconductor device - Google Patents
Method for manufacturing printed wiring board, and method for manufacturing semiconductor device Download PDFInfo
- Publication number
- WO2017038713A1 WO2017038713A1 PCT/JP2016/075059 JP2016075059W WO2017038713A1 WO 2017038713 A1 WO2017038713 A1 WO 2017038713A1 JP 2016075059 W JP2016075059 W JP 2016075059W WO 2017038713 A1 WO2017038713 A1 WO 2017038713A1
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- WIPO (PCT)
- Prior art keywords
- solder resist
- film
- wiring board
- printed wiring
- resist film
- Prior art date
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/281—Applying non-metallic protective coatings by means of a preformed insulating foil
Definitions
- the present invention relates to a method for manufacturing a printed wiring board and a method for manufacturing a semiconductor device.
- the printed wiring board is composed of a laminated body in which a copper-clad laminated board serving as a core, an interlayer insulating material, and a solder resist are laminated in this order.
- a wiring pattern is provided on the surface of the printed wiring board. After the solder resist is formed, the solder resist is removed from the portion requiring electrical connection with the outside corresponding to the wiring pattern. A pattern is formed.
- the following exposure and development method As a method for forming such a predetermined pattern, for example, the following exposure and development method is known.
- the exposure and development method first, a photomask having a pattern formed on the opening of a solder resist is laminated and exposed by a photographic method. Then, it develops with developing solutions, such as sodium carbonate, sodium hydroxide, and tetramethylammonium hydride (TMAH), and forms an opening part in a soldering resist.
- developing solutions such as sodium carbonate, sodium hydroxide, and tetramethylammonium hydride (TMAH)
- thermosetting resin used as a material constituting the solder resist and an opening is formed in the solder resist by a laser (for example, Patent Document 1). reference.).
- a step of preparing a structure in which a circuit board, a solder resist film, and a metal film are laminated in this order, and the first opening is formed by selectively removing the metal film.
- a method for manufacturing a semiconductor device is provided.
- FIG. 1 is a schematic cross-sectional view showing an example of a method for manufacturing a printed wiring board according to the present embodiment.
- FIG. 2 is a schematic cross-sectional view showing an example of a method for manufacturing a printed wiring board according to the present embodiment.
- FIG. 3 is a schematic diagram showing an example of the structure of the semiconductor package in the present embodiment.
- FIG. 4 is a schematic cross-sectional view showing an example of a modification of the method for manufacturing a printed wiring board according to the present embodiment.
- the method for manufacturing a printed wiring board of the present embodiment includes a step of preparing a structure including a metal film and a solder resist film, a step of forming an opening (first opening) in the metal film, and the metal film. And a step of forming an opening (second opening) in the solder resist film using the mask as a mask, and a step of removing the metal film to expose the surface of the solder resist film.
- a metal film such as a copper foil as a mask
- laser burning around the laser irradiation portion of the solder resist film, which may occur when a pattern is directly formed by a laser, etc. Can be prevented.
- a fine and precise opening (pattern) can be formed on the solder resist film rather than directly forming a pattern with a laser.
- FIGS. 1 and 2 are schematic cross-sectional views illustrating an example of a method for manufacturing a printed wiring board according to the present embodiment.
- the method for manufacturing the printed wiring board 20 includes a structure in which a circuit board (core board 22), a solder resist film (insulating resin film 10), and a metal film (metal film 12) are laminated in this order.
- the step of preparing (FIG. 1B), the step of forming the opening (first opening 21) by selectively removing the metal film 12, and the opening 21 (FIG. 1C).
- FIG. 1 (d) the step of removing the metal film to expose the surface (surface 11, surface 13) of the solder resist film (FIG. 2 (a)), and exposing to the bottom of the opening 28.
- Forming a metal layer (plating film 246) on the circuit (FIG. 2 ( )), Including.
- one surface (surface 11, surface 13) of the solder resist film may be disposed opposite to one surface (surface 15) of the metal film 12.
- the other surface of the solder resist film is arranged to be opposed to the circuit surface on which the circuit (conductor pattern 24) of the circuit substrate (core substrate 22) is formed. be able to.
- the step of preparing the structure includes the metal film so that one surface (surface 15) of the metal film 12 faces the one surface (surface 11, surface 13) of the solder resist film (insulating resin film 10). 12 is prepared, and the other surface of the solder resist film (opposite surfaces of the surface 11 and the surface 13) and the circuit surface of the circuit board (core substrate 22) are opposed to each other. And a step of preparing the structure by bonding.
- a core substrate 22 having a conductor pattern 24 provided on at least one outermost surface on the front and back sides is prepared.
- the core substrate 22 can constitute, for example, a core layer of a printed wiring board.
- a resin substrate obtained by curing a prepreg impregnated with a fiber base material can be used.
- a plurality of buildup layers may be formed on the core layer, but the core layer may be formed alone.
- the metal film 12 is disposed so that one surface (surface 15) of the insulating resin film 10 faces one surface (surface 11, surface 13).
- An insulating resin film 10 is prepared.
- This insulating resin film 10 becomes a solder resist film of the structure.
- a resin film with a metal film in which the metal film 12 is provided on the insulating resin film 10 can be used.
- a resin film protected with a cover film can be used. That is, a laminate in which a cover film, a resin film (insulating resin film 10), and a metal film 12 are laminated in this order can be used.
- the cover film include polymer films such as polyethylene and polypropylene.
- the said resin film with a metal film is obtained by peeling a cover film from a laminated body, for example. Thereby, the insulating resin film 10 with the metal film 12 can be prepared.
- one surface (surface 15) opposed to one surface (surface 11, surface 13) of the solder resist film (insulating resin film 10) is a smooth surface.
- a relatively rough surface is formed on the bonding surface of the copper foil for the purpose of improving the peel strength after lamination.
- the smooth surface of a metal film means that there are few surface irregularities.
- the surface roughness Rz of the smooth surface is preferably 3.0 ⁇ m or less, more preferably 2.0 ⁇ m or less, and further preferably 0.1 ⁇ m or more and 1.8 ⁇ m or less.
- the surface roughness (Rz) can be calculated by the 10-point average roughness shown in JIS B0601. In the case of the metal film 12 having a rough surface (surface 15) (surface roughness Rz is greater than 3.0 ⁇ m), the surface roughness Rz of the surface (surface 15) is within the above range. A smoothing process may be performed on the one surface 15 of the metal film 12 to make it smooth.
- the surface of the solder resist film can be made smooth by using a metal film mask having a smooth surface.
- stability of a manufacturing process of a printed wiring board or a semiconductor device can be improved.
- the manufactured printed wiring board is ultrasonically inspected, bubbles are hardly formed on the surface of the outermost solder resist film, so that the accuracy of the ultrasonic inspection can be improved.
- it can suppress that a damage
- the yield can be improved.
- the solder flux can be easily cleaned.
- a printed wiring board and a semiconductor package obtained by such a printed wiring board manufacturing method can have a structure with excellent product reliability.
- a metal foil having a smooth surface on at least one surface can be used.
- a peelable metal foil having an extremely thin metal foil having a smooth surface, a release layer, and a carrier foil may be used. That is, the peelable metal foil is thermocompression bonded to the insulating resin film 10, and then the carrier foil is peeled off together with the peeling layer, whereby the insulating resin film 10 with an ultrathin metal foil (metal film 12) is obtained.
- the ultrathin metal foil (metal film 12) has a smooth surface formed on the adhesive surface with the insulating resin film 10.
- the insulating resin film 10 can be in a B-stage state.
- the smooth surface of the metal film 12 is in contact with the surface (surface 11, surface 13) of the insulating resin film 10.
- the surface shape of the smooth surface of the metal film 12 is also transferred to the surface (surface 11, surface 13) of the insulating resin film 10 to form a smooth surface.
- non-roughened copper foil for example, a non-roughened copper foil with a primer resin layer (MT18DMT, manufactured by Mitsui Mining & Smelting Co., Ltd.) can be used.
- a metal which comprises the said metal film 12 for example, ultra-thin metal foil
- a metal which comprises the said metal film 12 for example, ultra-thin metal foil
- copper and ⁇ or a copper-type alloy, aluminum and ⁇ or an aluminum-type alloy, iron and ⁇ or an iron-type alloy examples thereof include silver and / or silver-based alloys, gold and gold-based alloys, zinc and zinc-based alloys, nickel and nickel-based alloys, tin and tin-based alloys, and the like.
- the cost can be reduced compared to other materials.
- a highly versatile process can be performed.
- the lower limit value of the thickness of the metal film 12 is not particularly limited, but may be, for example, 1 ⁇ m or more, and may be 10 ⁇ m or more.
- the upper limit value of the film thickness of the metal film 12 is not particularly limited, but may be, for example, 30 ⁇ m or less, or 25 ⁇ m or less.
- the thickness of the insulating resin film 10 is not particularly limited, but may be, for example, 10 ⁇ m or more and 50 ⁇ m or less. Thereby, the balance of mechanical strength and opening characteristic can be aimed at.
- the insulating resin film 10 with the metal film 12 is laminated on the conductor pattern 24 of the core substrate 22 as shown in FIG.
- the insulating resin film 10 with the metal film 12 can be attached to the surface of the core substrate 22 on which the conductor pattern 24 is provided so that the insulating resin film 10 faces the core substrate 22.
- the attaching step can be performed, for example, by laminating the insulating resin film 10 with the metal film 12 on the conductor pattern 24 and then vacuum-pressing these laminated bodies.
- the structure can be prepared.
- the metal film 12 is selectively removed.
- the opening 21 can be formed in a predetermined region of the metal film 12 on the conductor pattern 24.
- a method for forming the opening 21 is not particularly limited, and for example, a method such as exposure and development can be used.
- an opening 28 is formed in a predetermined region of the insulating resin film 10 using the metal film 12 with the opening formed as a mask.
- the opening 28 is formed so as to mainly expose the land 244 of the conductor pattern 24.
- a method for forming the opening 28 is not particularly limited, and for example, a laser processing method, a chemical etching processing method, a blast processing method, or the like can be used.
- the process can be simplified by using a laser processing method. Since the insulating resin film 10 in the B-stage state can be used, the workability of the insulating resin film 10 can be improved as compared with the case of the cured product.
- a method of obtaining the insulating resin film 10 in the B stage state for example, a method of heating at a temperature of 100 ° C. or more and 170 ° C. or less can be cited.
- the lower limit of the heating temperature is preferably 120 ° C. or higher, and the upper limit is preferably 150 ° C. or lower.
- the insulating resin film 10 can be thermally cured as shown in FIG. Thereby, the solder resist film 14 is formed.
- the lower limit of the curing temperature is not particularly limited, but is preferably 200 ° C. or higher, more preferably 210 ° C. or higher, and further preferably 220 ° C. or higher. Although it does not specifically limit as an upper limit of hardening temperature, For example, it can be 250 degrees C or less.
- a desmear process can be performed as needed. In the desmear process, smear generated due to the formation of the opening 28 is removed.
- the metal film 12 on the surface (surface 11, surface 13) of the solder resist film 14 is removed.
- the method for removing the metal film 12 is not particularly limited, but for example, flash etching can be used. Thereby, the surface of the solder resist film 14 can be exposed. Further, the surface of the solder resist film 14 after the removal of the metal film 12 can be made smooth. In the present embodiment, it is preferable that at least the surface of the solder resist film 14 positioned at the outermost layer (for example, the surface 11 shown in FIG. 3) is a smooth surface.
- the plating film 246 can be, for example, a plating film having a two-layer structure in which a gold plating film is laminated on a solder plating film, a tin plating film, or a nickel plating film.
- the plating film 246 is formed so as to cover the conductive portion of the conductor pattern 24 exposed in the opening 28.
- the film thickness of the plating film 246 is not particularly limited, but may be, for example, 2 ⁇ m or more and 10 ⁇ m or less.
- the land 244 portion can be a connection portion suitable for wire bonding or soldering in a mounting process using the printed wiring board 20.
- the method for the plating treatment is not particularly limited, and a known method can be used.
- an electrolytic plating method or an electroless plating method can be used.
- the plating film 246 can be formed as follows.
- an example of forming the plating film 246 having a two-layer structure of nickel and gold will be described, but the present invention is not limited to this.
- a nickel plating film is formed.
- the core substrate 22 in which the conductor pattern 24 and the insulating resin film 10 are laminated is immersed in a plating solution. Thereby, a nickel plating film can be formed on the conductive portion of the conductor pattern 24 exposed in the opening 28.
- the plating solution a mixed solution containing nickel lead and, for example, hypophosphite as a reducing agent can be used.
- electroless gold plating is performed on the nickel plating film.
- the method of electroless gold plating is not particularly limited, for example, it can be performed by substitution gold plating performed by substitution of gold ions and ions of a base metal.
- the printed wiring board 20 according to the present embodiment shown in FIG. 2B is obtained.
- FIG. 4 is a schematic cross-sectional view showing an example of a modification of the method for manufacturing a printed wiring board according to the present embodiment.
- the step of preparing the structure includes a solder resist film (insulating resin film 10) in which the main surface of the carrier base material (carrier base material 8) is disposed on one side.
- the step of preparing the step of bonding the other surface of the solder resist film (insulating resin film 10) and the circuit surface of the circuit board, and bonding the carrier base material from the solder resist film (insulating resin film 10) Peeling and forming a metal film (metal film 12) on the peeled surface of the solder resist film (insulating resin film 10) to prepare a structure.
- the insulating resin film 10 with the carrier base material 8 is prepared.
- the insulating resin film 10 with the carrier substrate 8 may be protected by a cover film.
- the insulating resin film 10 with the carrier substrate 8 is obtained by peeling the cover film from the laminate composed of the cover film, the resin film (insulating resin film 10), and the carrier substrate 8.
- the carrier substrate 8 for example, a polymer film such as polyethylene terephthalate can be used.
- the insulating resin film 10 can be a B-stage resin film.
- the insulating resin film 10 of the insulating resin film 10 with the carrier base material 8 is bonded onto the conductor pattern 24 of the core substrate 22.
- the carrier base material 8 is peeled from the insulating resin film 10. Thereby, the surface (surface 11, surface 13) of the insulating resin film 10 is exposed.
- a metal film 12 is pasted on the surface of the insulating resin film 10. It is preferable that a smooth surface is formed on the attachment surface (surface 15) of the metal film 12.
- the metal film 12 can be formed using a peelable metal foil. That is, the peelable metal foil is attached to the insulating resin film 10, and then the carrier metal foil and the release layer are peeled from the peelable metal foil, whereby the ultrathin metal foil (metal film 12) is attached to the surface of the insulating resin film 10 ( Surface 11 and surface 13).
- the structure of the present embodiment can be prepared.
- the steps shown in FIGS. 1C to 2B can be performed. Thereby, the printed wiring board 20 of this embodiment shown in FIG.2 (b) is obtained.
- the manufacturing method of the electronic device includes a step of mounting the semiconductor element 60 (electronic element) on the printed wiring board 20 obtained by the above-described printed wiring board manufacturing method. More specifically, a step of preparing the printed wiring board 20, a step of disposing the semiconductor element 60 on the printed wiring board 20, and a step of sealing the semiconductor element 60 are included in this order.
- the manufacturing method of the semiconductor package 102 includes a step of preparing a substrate (core substrate 22) on which a conductive circuit (conductive pattern 24) is formed on one surface, and a step of disposing a resin film (the insulating resin film) on the substrate.
- the step of electrically connecting the electronic element to the conductive circuit exposed in the opening and the step of sealing the electronic element (semiconductor element 60) can be included.
- the resin film is preferably formed using a solder resist resin composition described later.
- this resin film may be constituted by a coating film of the solder resist resin composition or a resin sheet described later.
- the resin film is formed on both surfaces of the substrate (core substrate 22), and at least the resin film disposed on the surface opposite to the surface on which the electronic element is mounted is It is preferable to use a resin composition for a solder resist described later.
- the manufactured printed wiring board 20 is inspected for cracks and peeling by ultrasonic inspection or the like after manufacturing the electronic device (semiconductor package 102).
- the surface of the solder resist film 14 is a smooth surface, since no bubbles are formed on the surface of the solder resist film 14 during the inspection, cracks and peeling can be found more reliably. That is, a more accurate inspection can be performed.
- the productivity of the electronic device can be improved.
- the opening 28 (pattern) formed in the solder resist film 14 is fine, it tends to be difficult to find defects such as cracks, but the surface of the solder resist film 14 is a smooth surface. A highly accurate inspection can be easily performed.
- the printed wiring board 20 with the insulating resin film 10 (resin film made of a resin composition for solder resist) exposed on the surface is prepared.
- the semiconductor element 60 is disposed on the insulating resin film 10.
- the exposed insulating resin film 10 and the semiconductor element 60 are sealed so as to be covered with a sealing resin.
- the printed wiring board 20 includes a core substrate 22, a conductor pattern 24, and the insulating resin film 10.
- the conductor pattern 24 is provided on at least one outermost surface of the core substrate 22.
- the insulating resin film 10 is the outermost layer of the printed wiring board 20 and is provided on the conductor pattern 24.
- the insulating resin film 10 is provided with a plurality of openings 28. A part of the conductive portion of the conductor pattern 24 is located in the at least one opening 28.
- the above-described printed wiring board 20 is prepared (step of preparing a printed wiring board), and a semiconductor element 60 is disposed on the printed wiring board 20 (step of disposing a semiconductor element).
- the semiconductor element 60 is mounted on the printed wiring board 20 via a die attach material 62, for example.
- the bonding wire 50 that connects the semiconductor element 60 and the printed wiring board 20 is bonded to, for example, the conductor pattern 24 exposed in the opening 28 on the upper surface of the printed wiring board 20.
- the upper surface of the printed wiring board 20, the semiconductor element 60, and the bonding wire 50 are sealed with the sealing resin layer 40 (step of sealing).
- an epoxy resin composition can be used as the sealing resin.
- a transfer molding method As a method of molding with a sealing resin, a transfer molding method, an injection molding method, a transfer method, a coating method, or the like can be used.
- the sealing resin layer 40 is cured by heating at 150 ° C. or higher and 200 ° C. or lower, for example.
- solder balls 30 as the external connection terminals are provided on the printed wiring board 20
- the solder balls 30 are formed on the conductor pattern 24 exposed at the opening 28 on the lower surface side, for example.
- the semiconductor package 102 is not limited to this, The package connected by wire bonding or TAB may be sufficient.
- FIG. 2B is a schematic diagram illustrating an example of the structure of the printed wiring board 20 in the embodiment.
- the printed wiring board of the present embodiment includes a substrate (core substrate 22), a conductive circuit (conductor pattern 24) formed on the substrate, and a solder resist film 14 formed on the outermost layer of the substrate. Can do.
- the solder resist film 14 is obtained by curing a solder resist resin composition described later.
- the solder resist film 14 can be composed of a cured product of a resin sheet formed of a resin composition for solder resist described later.
- a printed wiring board 20 shown in FIG. 2B includes a core substrate 22, a conductor pattern 24, and a solder resist film 14.
- the conductor pattern 24 is provided on at least one outermost surface of the core substrate 22.
- the solder resist film 14 constitutes the outermost layer of the printed wiring board 20.
- the solder resist film 14 is provided around the conductor pattern 24.
- the solder resist film 14 is provided with a plurality of openings 28. A part of the conductive portion of the conductor pattern 24 is located in the at least one opening 28. Further, the surface (surface 11, surface 13) of the solder resist film 14 is formed with a smooth surface.
- the core substrate 22 is a substrate including at least one insulating layer.
- the insulating layer provided in the core substrate 22 is, for example, a resin base material obtained by impregnating a fiber base material with a resin composition.
- the core substrate 22 can be a substrate made of a thermosetting resin.
- the core substrate 22 may be a rigid substrate or a flexible substrate.
- the thickness of the core substrate 22 is not particularly limited, but can be, for example, 10 ⁇ m or more and 300 ⁇ m or less.
- the core substrate 22 may be a single-sided plate having only one insulating layer and having a conductor pattern 24 formed on only one side thereof, or having only one insulating layer on both the front and back surfaces.
- a double-sided board provided with the conductor pattern 24 or a multilayer board having two or more insulating layers may be used.
- the core substrate 22 is a multilayer board, one or more wiring layers sandwiched between two insulating layers are formed in the core substrate 22.
- the conductor pattern 24 provided on one surface (outermost surface) of the core substrate 22 is a conductor provided on the opposite surface (outermost surface).
- the wiring layer provided inside the pattern 24 and the core substrate 22 is electrically connected to each other through a through hole (not shown) penetrating at least a part of the insulating layer.
- the conductor pattern 24 is provided on at least one surface (outermost surface) of the front surface and the back surface of the core substrate 22.
- the conductor pattern 24 is, for example, a pattern formed by selectively etching a copper film laminated on the core substrate 22.
- the conductor pattern 24 includes at least a land 244 and a line 242 as a conductive portion.
- the land 244 is mainly a connection part that electrically connects an element or component mounted on the printed wiring board 20 and the conductor pattern 24, for example, another part of the conductor pattern 24 or a wiring in the core substrate 22.
- the line 242 is mainly a linear portion that electrically connects the lands 244 to each other.
- the solder resist film 14 is laminated on the conductor pattern 24. Since the solder resist film 14 can maintain insulation, a highly reliable printed wiring board can be obtained. Moreover, since the said soldering resist film
- the solder resist film 14 is provided with an opening mainly corresponding to a region where the land 244 of the core substrate 22 is provided, and the land 244 is not covered with the solder resist film 14. That is, the solder resist film 14 is not provided on the land 244, and the land 244 is exposed.
- a conductive film such as a nickel and gold plating film or a solder plating film may be laminated on the land 244.
- a plating film 246 is further provided on the land 244 located in the opening.
- the solder resist film 14 may be further provided with an opening in a portion other than the land 244, or may have an opening that exposes a part of the line 242. Further, it is not necessary for all of the lands 244 to be located in the openings, and there may be lands 244 covered with the solder resist film 14.
- the printed wiring board 20 can be used as an interposer or a mother board, for example.
- the package refers to a package in which various parts are mounted on a printed wiring board and sealed together.
- the semiconductor package is an example of a package, and the package includes a batch sealed ECU (Electric Control Unit) and the like.
- FIG. 3 is a schematic cross-sectional view showing an example of the structure of the semiconductor package 102 according to the present embodiment.
- the electronic device (semiconductor package 102) of this embodiment can include the printed wiring board (printed wiring board 20) and an electronic element (semiconductor element 60) mounted on the printed wiring board. That is, the electronic device can be used as a semiconductor device.
- the solder resist film constituting the outermost layer of this printed wiring board, the solder resist film (the solder resist film 14 on the lower layer side) disposed on the surface opposite to the surface on which the electronic elements are mounted will be described later. It is obtained by curing a resin composition for solder resist.
- the semiconductor package 102 shown in FIG. 3 includes a printed wiring board 20, a semiconductor element 60, and a sealing resin layer 40.
- the semiconductor element 60 is disposed on the printed wiring board 20.
- the sealing resin layer 40 covers at least one surface of the printed wiring board 20 and the semiconductor element 60.
- the printed wiring board 20 includes a core substrate 22, a conductor pattern 24, and a solder resist film 14.
- the conductor pattern 24 is provided on at least one outermost surface of the core substrate 22.
- the solder resist film 14 is the outermost layer of the printed wiring board 20 and is provided around the conductor pattern 24.
- the semiconductor package 102 at least one semiconductor element 60 is disposed on the insulating resin film 10 on one surface (hereinafter referred to as “upper surface”) of the printed wiring board 20 described above.
- the printed wiring board 20 is, for example, an interposer
- the semiconductor element 60 is, for example, an LSI chip cut out from a semiconductor wafer.
- an electronic component that functions as a resistor or a capacitor may be further disposed on the upper surface of the printed wiring board 20.
- the semiconductor element 60 is fixed on the insulating resin film 10 via a die attach material 62.
- the semiconductor element 60 is provided with an electrical connection pad (not shown) on its surface, and the connection pad is connected to a circuit built in the semiconductor element 60, for example.
- a land 244 which is a part of the conductor pattern 24 provided on the printed wiring board 20 is provided in the opening 28 of the solder resist film 14.
- the land 244 and the connection pad of the semiconductor element 60 are connected by a bonding wire 50.
- the plating film 246 is further provided on the land 244, and the land 244 is connected to the bonding wire 50 through the plating film 246.
- the present invention is not limited to this. . Further, instead of being connected by the bonding wire 50, it may be connected by a lead wire or solder.
- the sealing resin layer 40 includes a solder resist film 14 exposed on the upper surface of the printed wiring board 20, the core substrate 22, a plating film 246 (a land 244 if no plating film 246 is provided), and a semiconductor element 60. Of these, the surface other than the surface bonded to the printed wiring board 20 by the die attach material 62 and the bonding wire 50 are covered.
- the sealing resin layer 40 may cover the entire surface of the printed wiring board 20 on which the semiconductor element 60 is provided, or may cover a part of the surface exposed.
- the printed wiring board 20 of the semiconductor package 102 is further provided with a plurality of openings 28 and lands 244 inside the openings 28 on the surface opposite to the upper surface (hereinafter referred to as “lower surface”). Each land 244 is covered with a plating film 246, and further solder balls 30 are provided to cover the plating film 246.
- a flip chip connection package has been described as the semiconductor package 102 according to the present embodiment, but the present invention is not limited to this, and a package that is connected by wire bonding or TAB (Tape Automated Bonding) may be used.
- a mark is printed on the upper surface of the solder ball 30 or the lower surface of the solder resist film 14 by a laser such as a YAG laser, for example.
- This mark is made up of, for example, at least one of letters, numbers, or symbols consisting of straight lines or curves.
- the mark indicates, for example, the product name, product number, lot number, or manufacturer name of the semiconductor package.
- the mark may be stamped by, for example, a YVO 4 laser, a carbonic acid laser, or the like.
- the semiconductor device is not particularly limited.
- QFP Quad Flat Package
- SOP Small Outline Package
- BGA Bit Grid Array
- CSP Chip Size Package
- QFN Quad Flat Flat
- lead Package SON (Small Outline Non-leaded Package), LF-BGA (Lead Frame BGA), and the like.
- examples of the semiconductor element include, but are not limited to, an integrated circuit, a large-scale integrated circuit, a transistor, a thyristor, a diode, and a solid-state imaging element.
- the resin composition for solder resist used in the method for producing a printed wiring board of this embodiment will be described in detail below.
- the solder resist resin composition is a varnish-like resin composition.
- a resin sheet can be obtained by forming the solder resist resin composition into a film.
- the solder resist film 14 is obtained by curing the resin sheet. Moreover, you may obtain the soldering resist film 14 by hardening the coating film of the resin composition for soldering resists.
- thermosetting resin composition containing a thermosetting resin can be used as the resin composition for solder resist.
- the thermosetting resin is not particularly limited.
- the thermosetting resin may be a liquid resin that is liquid at room temperature (25 ° C.). These can be used alone or in combination of two or more.
- the thermosetting resin preferably includes an epoxy resin.
- Epoxy resin (A) includes, for example, bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol E type epoxy resin, bisphenol S type epoxy resin, bisphenol M type epoxy resin (4,4 ′-(1,3-phenylenedioxide).
- Isopropylene) bisphenol type epoxy resin bisphenol P type epoxy resin (4,4 ′-(1,4-phenylenediisopridiene) bisphenol type epoxy resin), bisphenol Z type epoxy resin (4,4′-cyclohexene) Bisphenol type epoxy resins such as sidiene bisphenol type epoxy resins; phenol novolak type epoxy resins, cresol novolak type epoxy resins, tetraphenol group ethane type novolak type epoxy resins, novola having a condensed ring aromatic hydrocarbon structure Novolak type epoxy resins such as epoxy resins; biphenyl type epoxy resins; aralkyl type epoxy resins such as xylylene type epoxy resins and biphenyl aralkyl type epoxy resins; naphthylene ether type epoxy resins, naphthol type epoxy resins, naphthalenediol type epoxy resins Epoxy resins having a naphthalene skeleton such as bifunctional to tetrafunctional epoxy type
- an epoxy resin having a naphthalene skeleton from the viewpoint of improving the embedding property of the solder resist film and the surface smoothness.
- the low linear expansion and high elastic modulus of the solder resist film can be achieved.
- n is an integer of 0 to 10
- R 1 and R 2 are each independently a hydrogen atom, an alkyl group having 1 to 6 carbon atoms, or an alkoxy group having 1 to 6 carbon atoms.
- the content of the epoxy resin (A) is, for example, preferably 3% by weight or more and more preferably 5% by weight or more with respect to the total solid content of the thermosetting resin composition.
- content of an epoxy resin (A) is preferably 40% by weight or less, and more preferably 35% by weight or less, for example, based on the total solid content of the thermosetting resin composition.
- content of an epoxy resin (A) below the said upper limit, the heat resistance and moisture resistance of a soldering resist film formed using a thermosetting resin composition can be improved.
- the total solid content of a thermosetting resin composition refers to the whole component except the solvent contained in a thermosetting resin composition. The same applies hereinafter.
- the thermosetting resin may further include a filler (B).
- An inorganic filler can be used as the filler (B).
- the inorganic filler include, but are not limited to, silicates such as talc, calcined clay, unfired clay, mica, and glass; oxides such as titanium oxide, alumina, boehmite, silica, and fused silica; calcium carbonate Carbonates such as magnesium carbonate and hydrotalcite; hydroxides such as aluminum hydroxide, magnesium hydroxide and calcium hydroxide; sulfates or sulfites such as barium sulfate, calcium sulfate and calcium sulfite; zinc borate and metaborates Borates such as barium oxide, aluminum borate, calcium borate and sodium borate; nitrides such as aluminum nitride, boron nitride, silicon nitride and carbon nitride; titanates such as strontium titanate and barium titanate Can
- the silica is not particularly limited, but may include, for example, at least one of spherical silica and crushed silica. From the viewpoint of improving the embedding property and surface smoothness of the solder resist film, it is more preferable to include spherical silica.
- the silica may be, for example, fused spherical silica.
- the lower limit of the average particle diameter D 50 of the filler (B) is not particularly limited, is preferably at least 0.01 [mu] m, more preferably not less than 0.05 .mu.m.
- the upper limit of the average particle diameter D 50 of the filler (B) is not particularly limited, is preferably from 5.0 .mu.m, more preferably 2.0 ⁇ m or less, more preferably 1.0 ⁇ m or less.
- an average particle diameter D 50 may be used fine particles of silica is 2nm or 100nm or less.
- the embedding property and surface smoothness of a solder resist film can be improved more effectively.
- the particulate silica having an average particle diameter D 50 is 2nm or 100nm or less, that the average particle diameter D 50 comprises a 100nm excess of silica, in both the thermosetting resin composition, filling properties And an example of a preferred embodiment for improving surface smoothness.
- the average particle diameter D 50 of the filler (B), for example a laser diffraction particle size distribution analyzer (HORIBA Ltd., LA-500) can be measured using a.
- the filler may include one kind or two or more kinds.
- thermosetting resin composition it is more preferable to use, for example, a silica raw material having a silica concentration of 10 wt% or more and 90 wt% or less as silica. From the viewpoint of improving the mechanical strength of the printed wiring board, it is particularly preferable to use a silica raw material having a silica concentration of 50% by weight to 90% by weight. Further, from the viewpoint of suppressing the deflection of the printed wiring board and improving the moisture absorption reliability of the semiconductor device, for example, a silica raw material having a silica concentration of 50% by weight to 90% by weight and a silica concentration of 10% by weight to 50%. It is particularly preferable to use a silica raw material of not more than% by weight in combination.
- the content of the filler (B) is, for example, preferably 30% by weight or more and more preferably 50% by weight or more with respect to the total solid content of the thermosetting resin composition.
- content of a filler (B) is, for example, preferably 90% by weight or less, and more preferably 85% by weight or less, based on the total solid content of the thermosetting resin composition.
- thermosetting resin composition may further contain a cyanate resin (C).
- C Cyclone resin
- the solder resist film can be reduced in linear expansion and improved in elastic modulus and rigidity. It is also possible to contribute to improvement of heat resistance and moisture resistance of the obtained semiconductor device.
- the cyanate resin (C) is a resin having a cyanate group (—O—CN) in the molecule, and a resin having two or more cyanate groups in the molecule can be used.
- a resin having two or more cyanate groups in the molecule can be used.
- said cyanate resin (C) For example, dicyclopentadiene type cyanate ester resin, phenol novolak type cyanate ester resin, novolak type cyanate resin, bisphenol A type cyanate resin, bisphenol E type cyanate resin, tetramethyl Examples thereof include bisphenol type cyanate resins such as bisphenol F type cyanate resins, and naphthol aralkyl type cyanate resins.
- the said cyanate resin (C) is not specifically limited, For example, it can obtain by making a halogenated cyanide compound, phenols, or naphthol react.
- a cyanate resin include a cyanate resin obtained by a reaction of a phenol novolac type polyhydric phenol and a cyanogen halide, and a reaction of a cresol novolac type polyhydric phenol and a cyanogen halide.
- Examples include cyanate resins and cyanate resins obtained by reaction of naphthol aralkyl polyvalent naphthols with cyanogen halides.
- the cyanate resin (C) may be used alone or in combination of two or more.
- a phenol novolak type cyanate resin dicyclopentadiene type cyanate ester resin, or naphthol aralkyl type cyanate resin. It is particularly preferable to include a phenol novolac-type cyanate resin.
- the content of the cyanate resin (C) is, for example, preferably 3% by weight or more and more preferably 5% by weight or more with respect to the total solid content of the thermosetting resin composition.
- content of cyanate resin (C) is, for example, preferably 40% by weight or less, and more preferably 35% by weight or less, based on the total solid content of the thermosetting resin composition.
- thermosetting resin composition further contains, for example, a curing accelerator (D).
- a curing accelerator (D) a curing accelerator
- the curing accelerator (D) one that accelerates the curing reaction of the epoxy resin (A) can be used, and the type thereof is not particularly limited.
- a hardening accelerator (D) For example, a zinc naphthenate, cobalt naphthenate, tin octylate, cobalt octylate, zinc octylate, bisacetylacetonate cobalt (II), trisacetylacetonate cobalt Organometallic salts such as (III), tertiary amines such as triethylamine, tributylamine, diazabicyclo [2,2,2] octane, tetraphenylphosphonium tetraphenylborate (TPP-K), tetraphenylphosphonium tetrakis (4 Quaternary phosphonium compounds such as 2-methylphenyl) borate (TPP-MK), 2-phenyl-4-methyl
- the onium salt compound used as the curing accelerator (D) is not particularly limited, for example, a compound represented by the following general formula (2) can be used.
- R 3 , R 4 , R 5 and R 6 are each an organic group having a substituted or unsubstituted aromatic ring or heterocyclic ring, or a substituted or unsubstituted aliphatic group. Each of which may be the same as or different from each other, and A ⁇ represents an anion of an n-valent proton donor having at least one proton that can be released to the outside of the molecule in the molecule, or Indicates the complex anion)
- the content of the curing accelerator (D) is, for example, preferably 0.1% by weight or more, and more preferably 0.3% by weight or more with respect to the total solid content of the thermosetting resin composition. .
- content of a hardening accelerator (D) is, for example, preferably 10% by weight or less, and more preferably 5% by weight or less, based on the total solid content of the thermosetting resin composition.
- the thermosetting resin composition can further contain, for example, a colorant (E).
- the colorant (E) includes, for example, one or more selected from dyes such as green, red, blue, yellow, and black, pigments such as black pigments, and dyes. Among these, from the viewpoint of improving the visibility of the opening and the like, a green colorant can be used, but a green dye may be used.
- the green colorant may include one or more known colorants such as anthraquinone, phthalocyanine, and perylene.
- black dye examples include azo-based metal complex black dyes and organic black dyes such as anthraquinone compounds. Although it does not specifically limit as said black dye, For example, Kayase Black AN (made by Nippon Kayaku Co., Ltd.), Kayase Black G (made by Nippon Kayaku Co., Ltd.), etc. are mentioned. In this embodiment, you may use 1 type, or 2 or more types of black pigments.
- the lower limit of the content of the black dye is preferably 0.01% by weight or more, more preferably 0.05% by weight or more, based on the total solid content of the thermosetting resin composition. It is particularly preferably 0.07% by weight or more.
- the marking performance of a laser such as a YAG laser for the solder resist film can be improved.
- the upper limit of the content of the black dye is preferably 1.0% by weight or less, more preferably 0.9% by weight or less, based on the total solid content of the thermosetting resin composition. More preferably, it is 0.8 wt% or less. This makes it possible to realize a solder resist film colored other than black.
- the content of the colorant (E) is, for example, preferably 0.05% by weight or more, and more preferably 0.1% by weight or more based on the total solid content of the thermosetting resin composition.
- content of a coloring agent (E) is, for example, preferably 5% by weight or less, and more preferably 3% by weight or less based on the total solid content of the thermosetting resin composition.
- thermosetting resin composition includes a coupling agent, a leveling agent, a curing agent, a photosensitizer, an antifoaming agent, an ultraviolet absorber, a foaming agent, an antioxidant, a flame retardant, One or two or more additives selected from ion trapping agents and the like may be added.
- the coupling agent examples include silane coupling agents such as epoxy silane coupling agents, cationic silane coupling agents, and amino silane coupling agents, titanate coupling agents, and silicone oil type coupling agents.
- the leveling agent examples include acrylic copolymers.
- the content of the coupling agent is not particularly limited. For example, it may be 0.05 to 5% by weight, further 0.2 to 3% by weight, based on the total solid content of the thermosetting resin composition. Also good.
- the curing agent examples include phenol resins such as phenol novolak resin, cresol novolak resin, arylalkylene type novolak resin, and the like.
- the content of the curing agent is not particularly limited.
- the content of the curing agent is preferably 0.05 to 10% by weight, and preferably 0.2 to 5% by weight with respect to the total solid content of the thermosetting resin composition. More preferably.
- the photosensitive agent include photosensitive diazoquinone compounds.
- the thermosetting resin is a varnish-like resin composition.
- a resin sheet is obtained by forming a varnish-like thermosetting resin into a film.
- Such a resin sheet can be obtained, for example, by subjecting a coating film (resin film) obtained by coating a varnish-like thermosetting resin composition to a solvent removal treatment.
- the resin sheet can be defined as having a solvent content of 5% by weight or less with respect to the entire thermosetting resin composition.
- the solvent removal treatment can be performed, for example, under conditions of 100 ° C. to 150 ° C. and 1 minute to 5 minutes. This makes it possible to sufficiently remove the solvent while suppressing the curing of the thermosetting resin film.
- the method for forming the thermosetting resin on the carrier substrate is not particularly limited.
- the resin varnish is prepared by dissolving and dispersing the thermosetting resin in a solvent or the like, and various coater apparatuses are used. Examples thereof include a method in which a resin varnish is applied to a carrier substrate and then dried, and a method in which the resin varnish is spray-coated on a carrier substrate using a spray device and then dried.
- the method of drying the resin varnish after applying the resin varnish to the carrier substrate using various coaters such as a comma coater and a die coater is preferable. Thereby, the resin sheet with a carrier base material which has no void and has a uniform resin sheet thickness can be efficiently produced.
- the varnish-like thermosetting resin composition can contain a solvent, for example.
- the solvent include acetone, methyl ethyl ketone, methyl isobutyl ketone, toluene, ethyl acetate, cyclohexane, heptane, cyclohexane, cyclohexanone, tetrahydrofuran, dimethylformamide, dimethylacetamide, dimethyl sulfoxide, ethylene glycol, cellosolve, carbitol, anisole, And one or more selected from organic solvents such as N-methylpyrrolidone.
- the solid content of the thermosetting resin composition is preferably, for example, 30% by weight to 80% by weight, and preferably 40% by weight to 70% by weight. It is more preferable that Thereby, the thermosetting resin composition excellent in workability
- the varnish-like thermosetting resin composition includes, for example, the above-described components, an ultrasonic dispersion method, a high-pressure collision dispersion method, a high-speed rotation dispersion method, a bead mill method, a high-speed shear dispersion method, and a rotation and revolution dispersion method. It can prepare by melt
- thermosetting resin composition according to the present embodiment may not include a fiber substrate such as a glass fiber substrate or a paper substrate. Thereby, it is possible to realize a thermosetting resin composition particularly suitable for forming a solder resist film.
- the resin sheet can include a film obtained from the thermosetting resin composition.
- the resin sheet may have a sheet shape or a roll shape that can be wound.
- a solder resist film can be obtained by curing the resin sheet.
- the storage elastic modulus at 25 ° C. of the cured product of the thermosetting resin composition is 7 GPa.
- the above is preferable.
- the storage elastic modulus is more preferably 10 GPa or more.
- the upper limit value of the storage elastic modulus is not particularly limited, but may be, for example, 50 GPa or less.
- the glass transition temperature of the cured product of the thermosetting resin composition is 160 ° C. or higher. Preferably there is. Thereby, it becomes possible to improve the heat resistance and reflow resistance of the resin sheet obtained using the thermosetting resin composition.
- the glass transition temperature is more preferably 200 ° C. or higher.
- the upper limit value of the glass transition temperature is not particularly limited, but can be, for example, 350 ° C. or lower.
- the storage elastic modulus and the glass transition temperature are determined based on the dynamic viscosity of the cured product, for example, using a dynamic viscoelasticity measuring device at a frequency of 1 Hz and a heating rate of 5 ° C./min. It can be calculated from a measurement result obtained by performing an elasticity test.
- a dynamic viscoelasticity measuring apparatus For example, the Seiko Instruments make and DMS6100 can be used.
- the linear expansion coefficient of the cured product of the thermosetting resin composition below the glass transition temperature is It is preferably 30 ppm / ° C. or less. Thereby, it becomes possible to suppress warpage of a semiconductor package including a resin sheet obtained using the thermosetting resin composition.
- the linear expansion coefficient is more preferably 28 ppm / ° C. or less.
- the lower limit value of the linear expansion coefficient is not particularly limited, but can be, for example, 3 ppm / ° C. or more. Thereby, the printed wiring board 20 which can manufacture the package excellent in durability can be implement
- TMA thermo analyzer
- thermosetting resin composition for example, by appropriately selecting the type and blending amount of each component contained in the thermosetting resin composition, the preparation method of the thermosetting resin composition, etc., the storage elastic modulus, the above It is possible to control the glass transition temperature and the linear expansion coefficient.
- a resin sheet with a carrier substrate can be configured. Thereby, the handleability of the resin sheet can be improved.
- a polymer film or a metal foil can be used as the carrier substrate.
- the polymer film is not particularly limited.
- polyolefin such as polyethylene and polypropylene
- polyester such as polyethylene terephthalate and polybutylene terephthalate
- release paper such as polycarbonate and silicone sheet
- heat resistance such as fluorine resin and polyimide resin.
- a thermoplastic resin sheet having The metal foil is not particularly limited.
- the thickness of the carrier base material is not particularly limited, but may be, for example, 10 to 100 ⁇ m or 10 to 70 ⁇ m. Thereby, the handleability at the time of manufacturing a resin sheet is favorable and preferable.
- the above resin sheet may be a single layer or multiple layers, and may contain one or more of the above films.
- the said resin sheet may be a multilayer, it may be comprised by the same kind and may be comprised by different types.
- the method of forming the resin sheet having two or more layers is not particularly limited.
- a two-layer resin sheet is obtained by bonding the layers together and then drying them.
- a 1st resin sheet is obtained by apply
- coating a thermosetting resin composition on a 1st resin sheet, and even drying is mentioned.
- the method of obtaining the resin sheet of 2 layers can also be used by apply
- thermosetting resin composition 14.5% by mass of a naphthalene-modified cresol novolac type epoxy resin (manufactured by DIC Corporation, HP-5000) as an epoxy resin, and a phenol novolac type cyanate ester resin (manufactured by LONZA) as a cyanate resin PT-30) 14.5% by mass, spherical silica particles (manufactured by Admatechs Co., Ltd., SO-C4, average particle size 1.0 ⁇ m, phenylaminosilane treatment) 70% by mass, tetraphenylphosphonium Tetrakis (4-methylphenyl) borate (TPP-MK) 0.5 mass% and epoxysilane (KBE-403, manufactured by Shin-Etsu Chemical Co., Ltd.) 0.5 mass% as a coupling agent were dissolved and dispersed in methyl ethyl ketone. Then, it stirred for 1 hour using the high-speed stirring
- This peelable metal foil was placed on a resin sheet with a carrier substrate so that the copper foil faced the insulating resin film. Thereafter, the metal foil is thermocompression bonded to the resin sheet, the release layer and the carrier foil are peeled off, and the insulating resin with a metal film comprising a copper foil (metal film) and an insulating resin film is formed on the carrier substrate. A membrane was obtained. The surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 3.0 ⁇ m.
- the insulating resin film is etched by a laser processing method using the metal film having the opening as a mask, and the land on the core substrate is formed. An opening was formed in the insulating resin film so as to be exposed. Thereafter, the structure was heated with a drying apparatus at 220 ° C. for 60 minutes to cure the B-stage insulating resin film to form a solder resist film. Next, the structure was immersed in a swelling solution at 60 ° C. (Atotech Co., Swelling Dip Securigant P) for 5 minutes, and further added to an aqueous potassium permanganate solution (Atotech Co., Concentrate Compact CP) at 80 ° C. After the minute immersion, the desmear treatment was performed by neutralization.
- a swelling solution at 60 ° C. (Atotech Co., Swelling Dip Securigant P) for 5 minutes, and further added to an aqueous potassium permanganate solution (Atotech Co., Concentrate Compact CP) at 80 ° C. After the
- Plating treatment Next, a plating layer was formed on the conductor pattern (land) exposed in the opening of the solder resist film. Specifically, an electroless nickel plating layer of 3 ⁇ m was formed, and an electroless gold plating layer of 0.1 ⁇ m was further formed thereon. Thereby, a printed wiring board was obtained.
- Example 2 Example 3 was used except that a 3 ⁇ m thick copper foil (Mitsui Metals Co., Ltd., MT18Ex) was used instead of a 3 ⁇ m thick copper foil (Mitsui Metals Co., Ltd., MT18SD-H). A wiring board was obtained. The surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 2.0 ⁇ m.
- Example 3 Example except that 3 ⁇ m thick copper foil (Mitsui Metal Mining Co., Ltd., MT18SD-H-T3B) was used instead of 3 ⁇ m thick copper foil (Mitsui Metal Mining Co., Ltd., MT18SD-H) In the same manner as in No. 1, a wiring board was obtained. The surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 1.8 ⁇ m.
- Example 4 Example 1 was used except that a 3 ⁇ m thick copper foil (Furukawa Electric Co., Ltd., F-HP) was used instead of the 3 ⁇ m thick copper foil (Mitsui Metal Mining Co., Ltd., MT18SD-H). A wiring board was obtained in the same manner. The surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 1.5 ⁇ m.
- Example 5 Example 3 was used except that a 3 ⁇ m thick copper foil (Mitsui Metal Mining Co., Ltd., MT18FL) was used instead of a 3 ⁇ m thick copper foil (Mitsui Metal Mining Co., Ltd., MT18SD-H). A wiring board was obtained. The surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 1.3 ⁇ m.
- Example 6 Example 1 except that a 18 ⁇ m thick copper foil (HS-GHY5, manufactured by JX Metals, Inc.) was used instead of a 3 ⁇ m thick copper foil (Mitsui Metals, Ltd., MT18SD-H). Thus, a wiring board was obtained.
- the surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 0.3 ⁇ m.
- a resin sheet with a carrier substrate prepared in the same manner as in Example 1 was prepared. Thereafter, a structure was produced in the same manner as [3] in Example 1. Thereafter, the insulating resin film was directly etched by laser irradiation to form openings in the insulating resin film so that the lands on the core substrate were exposed. Thereafter, the structure was heated with a drying apparatus at 220 ° C. for 60 minutes to cure the B-stage insulating resin film to form a solder resist film. Thereafter, in the same manner as in [7] of Example 1, a plating layer was formed on the conductor pattern (land) exposed at the opening of the solder resist film to obtain a printed wiring board.
- the surface roughness (10-point average roughness Rz) of the solder resist film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). Evaluated according to. The results are shown in Table 1.
- D The 10-point average roughness Rz is larger than 3.0 ⁇ m.
- the surface smoothness of the solder resist film was particularly excellent.
- the printed wiring boards of Examples 2 to 6 were inspected with an ultrasonic microscope, it was found that bubbles were difficult to adhere to the solder resist film of each printed wiring board, so that the accuracy of inspection for peeling and cracking was improved. .
- a fine and precise opening is formed in a solder resist layer by using a metal film as a mask instead of a resist film formed of a thermosetting resin.
- a printed wiring board can be provided. By using such a printed wiring board, the productivity of the semiconductor device can be improved. Therefore, the present invention has industrial applicability.
Abstract
Description
そこで、剛性、耐熱性、絶縁信頼性向上のため、ソルダーレジストを構成する材料として熱硬化性樹脂を用い、レーザーによりソルダーレジストに開口部を形成する方法が用いられている(例えば、特許文献1参照。)。 However, the photosensitive resin used in the photographic method does not have sufficient rigidity, heat resistance, and insulation reliability required as the multilayer printed wiring board becomes thinner and denser than the thermosetting resin.
Therefore, in order to improve rigidity, heat resistance, and insulation reliability, a method is used in which a thermosetting resin is used as a material constituting the solder resist and an opening is formed in the solder resist by a laser (for example, Patent Document 1). reference.).
前記プリント配線板上に半導体素子を実装する工程と、を含む、半導体装置の製造方法が提供される。 According to the present invention, a step of preparing a printed wiring board obtained by the method for manufacturing a printed wiring board,
Mounting a semiconductor element on the printed wiring board. A method for manufacturing a semiconductor device is provided.
以下、本実施形態のプリント配線板の製造方法について図1、2を用いて詳述する。
図1、2は、本実施形態に係るプリント配線板の製造方法の一例を示す断面模式図である。 [Method of manufacturing printed wiring board]
Hereinafter, the method for manufacturing the printed wiring board of the present embodiment will be described in detail with reference to FIGS.
1 and 2 are schematic cross-sectional views illustrating an example of a method for manufacturing a printed wiring board according to the present embodiment.
まず、上記構造体を準備する。本実施形態において、構造体を準備する工程は、ソルダーレジスト膜(絶縁性樹脂膜10)の一面(面11、面13)に金属膜12の一面(面15)が対向するように、金属膜12が配置されたソルダーレジスト膜を準備する工程と、ソルダーレジスト膜の他面(面11、面13のぞれぞれの対向面)と回路基板(コア基板22)の回路面とを対向させ、貼り合わせることにより構造体を準備する工程と、を含むことができる。 Hereinafter, each step will be described.
First, the structure is prepared. In the present embodiment, the step of preparing the structure includes the metal film so that one surface (surface 15) of the
一般的に、銅箔の貼り合わせ面には、積層後の剥離強度の向上を目的として、比較的粗い表面が形成される。本実施形態において、金属膜(例えば、銅箔等の金属箔)の平滑面とは、表面の凹凸が少ないことを意味する。この場合、例えば、平滑面の表面粗さRzは3.0μm以下であることが好ましく、2.0μm以下であることがより好ましく、0.1μm以上1.8μm以下であることがさらに好ましい。表面粗さ(Rz)は、JIS B0601に示す10点平均粗さによって算出できる。なお、一面(面15)の表面が粗い(表面粗さRzが3.0μmより大きい)金属膜12の場合には、一面(面15)の表面粗さRzが上記範囲内になるように、金属膜12の一面15に平滑化処理を施して平滑面にすればよい。 In addition, it is preferable that one surface (surface 15) opposed to one surface (
Generally, a relatively rough surface is formed on the bonding surface of the copper foil for the purpose of improving the peel strength after lamination. In the present embodiment, the smooth surface of a metal film (for example, a metal foil such as a copper foil) means that there are few surface irregularities. In this case, for example, the surface roughness Rz of the smooth surface is preferably 3.0 μm or less, more preferably 2.0 μm or less, and further preferably 0.1 μm or more and 1.8 μm or less. The surface roughness (Rz) can be calculated by the 10-point average roughness shown in JIS B0601. In the case of the
尚、Bステージ状態の絶縁性樹脂膜10を得る方法としては、例えば、100℃以上、170℃以下の温度で加熱する方法などが挙げられる。加熱温度の下限値は、120℃以上であることが好ましく、上限値としては150℃以下であることが好ましい。 In particular, in this embodiment, the process can be simplified by using a laser processing method. Since the insulating
In addition, as a method of obtaining the insulating
尚、開口部28を形成した後に、必要に応じて、デスミア処理を行うことができる。デスミア処理では、開口部28の形成などで生じたスミアを除去する。 After the
In addition, after forming the
なお、めっき処理の前に、必要に応じて、露出した導電体パターン24の導電部を洗浄する工程や、粗化する工程を行っても良い。 The method for the plating treatment is not particularly limited, and a known method can be used. For example, an electrolytic plating method or an electroless plating method can be used. For example, when the electroless plating method is used, the
In addition, you may perform the process of wash | cleaning the conductive part of the exposed
以下、絶縁性樹脂膜10の変形例について図4を用いて説明する。図4は、本実施形態のプリント配線板の製造方法の変形例の一例を示す断面模式図である。 In this embodiment, although the example using the insulating
Hereinafter, a modification of the insulating
まず、キャリア基材8付き絶縁性樹脂膜10を準備する。たとえば、キャリア基材8付き絶縁性樹脂膜10は、カバーフィルムで保護されていてもよい。カバーフィルム、樹脂膜(絶縁性樹脂膜10)、およびキャリア基材8で構成された積層体から、当該カバーフィルムを剥離することにより、キャリア基材8付き絶縁性樹脂膜10が得られる。キャリア基材8としては、例えば、ポリエチレンテレフタレート等の高分子フィルムを用いることができる。また、絶縁性樹脂膜10は、Bステージ状態の樹脂膜を用いることができる。 Each process of the manufacturing method of the printed wiring board concerning the modification of this embodiment is explained.
First, the insulating
図4(c)以後の工程は、前述の図1(c)から図2(b)の工程を実施することができる。これにより、図2(b)に示す本実施形態のプリント配線板20が得られる。 Subsequently, as shown in FIG. 4C, a
In the steps after FIG. 4C, the steps shown in FIGS. 1C to 2B can be performed. Thereby, the printed
次に、半導体パッケージ102の製造方法について説明する。
本実施形態に係る電子装置(半導体パッケージ102)の製造方法は、上述したプリント配線板の製造方法で得られたプリント配線板20上に、半導体素子60(電子素子)を実装する工程を含む。より具体的には、プリント配線板20を準備する工程、半導体素子60をプリント配線板20上に配設する工程、および半導体素子60を封止する工程をこの順に含む。 [Method for Manufacturing Electronic Device]
Next, a method for manufacturing the
The manufacturing method of the electronic device (semiconductor package 102) according to the present embodiment includes a step of mounting the semiconductor element 60 (electronic element) on the printed
本実施形態に係るプリント配線板について説明する。
図2(b)は、実施形態におけるプリント配線板20の構造の例を示す模式図である。
本実施形態のプリント配線板は、基板(コア基板22)と、基板上に形成された導電回路(導電体パターン24)と、基板の最外層に形成されたソルダーレジスト膜14と、を含むことができる。当該ソルダーレジスト膜14は、後述するソルダーレジスト用樹脂組成物を硬化させることにより得られる。例えば、ソルダーレジスト膜14は、後述するソルダーレジスト用樹脂組成物で形成された樹脂シートの硬化物で構成することができる。 [Printed wiring board]
The printed wiring board according to the present embodiment will be described.
FIG. 2B is a schematic diagram illustrating an example of the structure of the printed
The printed wiring board of the present embodiment includes a substrate (core substrate 22), a conductive circuit (conductor pattern 24) formed on the substrate, and a solder resist
上記コア基板22は、熱硬化性樹脂からなる基板を用いることができる。コア基板22はリジッドな基板でも良いし、フレキシブルな基板でも良い。コア基板22の厚さは、とくに限定されないが、たとえば10μm以上300μm以下とすることができる。 In the printed
The
また、コア基板22が両面板もしくは多層板である場合、コア基板22の1つの表面(最外面)に設けられた導電体パターン24は、反対側の表面(最外面)に設けられた導電体パターン24やコア基板22の内部に設けられた配線層と、少なくとも一部の絶縁層を貫通するスルーホール(不図示)を介して互いに電気的に接続されている。 Further, the
When the
次に、本実施形態に係る半導体パッケージ102について説明する。
図3は本実施形態に係る半導体パッケージ102の構造の一例を示す断面模式図である。
本実施形態の電子装置(半導体パッケージ102)は、上記プリント配線板(プリント配線板20)と、プリント配線板上に実装された電子素子(半導体素子60)と、を含むことができる。すなわち、当該電子装置は半導体装置として利用できる。このプリント配線板の最外層を構成するソルダーレジスト膜のうち、電子素子が実装された面とは反対側の面上に配置されたソルダーレジスト膜(下層側のソルダーレジスト膜14)は、後述するソルダーレジスト用樹脂組成物を硬化して得られる。 [Electronic device]
Next, the
FIG. 3 is a schematic cross-sectional view showing an example of the structure of the
The electronic device (semiconductor package 102) of this embodiment can include the printed wiring board (printed wiring board 20) and an electronic element (semiconductor element 60) mounted on the printed wiring board. That is, the electronic device can be used as a semiconductor device. Of the solder resist film constituting the outermost layer of this printed wiring board, the solder resist film (the solder resist
ここでは、本実施形態に係る半導体パッケージ102としてフリップチップ接続のパッケージの例について説明したが、これに限定されず、ワイヤボンディングやTAB(Tape Automated Bonding)接続されるパッケージでもよい。 The printed
Here, an example of a flip chip connection package has been described as the
本実施形態のプリント配線板の製造方法に用いられるソルダーレジスト用樹脂組成物について、以下詳述する。
ソルダーレジスト用樹脂組成物は、ワニス状の樹脂組成物である。当該ソルダーレジスト用樹脂組成物をフィルム状とすることにより、樹脂シートを得ることができる。かかる樹脂シートを硬化させることにより、上記ソルダーレジスト膜14が得られる。また、ソルダーレジスト用樹脂組成物の塗布膜を硬化させることにより、ソルダーレジスト膜14を得てもよい。 [Resin composition for solder resist]
The resin composition for solder resist used in the method for producing a printed wiring board of this embodiment will be described in detail below.
The solder resist resin composition is a varnish-like resin composition. A resin sheet can be obtained by forming the solder resist resin composition into a film. The solder resist
エポキシ樹脂(A)は、たとえばビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂、ビスフェノールE型エポキシ樹脂、ビスフェノールS型エポキシ樹脂、ビスフェノールM型エポキシ樹脂(4,4’-(1,3-フェニレンジイソプリジエン)ビスフェノール型エポキシ樹脂)、ビスフェノールP型エポキシ樹脂(4,4’-(1,4-フェニレンジイソプリジエン)ビスフェノール型エポキシ樹脂)、ビスフェノールZ型エポキシ樹脂(4,4’-シクロヘキシジエンビスフェノール型エポキシ樹脂)などのビスフェノール型エポキシ樹脂;フェノールノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂、テトラフェノール基エタン型ノボラック型エポキシ樹脂、縮合環芳香族炭化水素構造を有するノボラック型エポキシ樹脂などのノボラック型エポキシ樹脂;ビフェニル型エポキシ樹脂;キシリレン型エポキシ樹脂、ビフェニルアラルキル型エポキシ樹脂などのアラルキル型エポキシ樹脂;ナフチレンエーテル型エポキシ樹脂、ナフトール型エポキシ樹脂、ナフタレンジオール型エポキシ樹脂、2官能ないし4官能エポキシ型ナフタレン樹脂、ビナフチル型エポキシ樹脂、ナフタレンアラルキル型エポキシ樹脂、ナフタレン変性クレゾールノボラックエポキシ樹脂などのナフタレン骨格を有するエポキシ樹脂;アントラセン型エポキシ樹脂;フェノキシ型エポキシ樹脂;ジシクロペンタジエン型エポキシ樹脂;ノルボルネン型エポキシ樹脂;アダマンタン型エポキシ樹脂;フルオレン型エポキシ樹脂から選択される一種または二種以上を含むことができる。これらの中でも、ソルダーレジスト膜の埋め込み性や、表面平滑性を向上させる観点からは、ナフタレン骨格を有するエポキシ樹脂を含むことがより好ましい。これにより、ソルダーレジスト膜の低線膨張化および高弾性率化を図ることもできる。また、プリント配線板の剛性を向上させて作業性の向上に寄与することや、半導体パッケージにおける耐リフロー性の向上および反りの抑制を実現することも可能である。なお、ソルダーレジスト膜の埋め込み性を向上させる観点からは、3官能以上のナフタレン骨格を有するエポキシ樹脂を含むことがとくに好ましい。 (Epoxy resin (A))
The epoxy resin (A) includes, for example, bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol E type epoxy resin, bisphenol S type epoxy resin, bisphenol M type epoxy resin (4,4 ′-(1,3-phenylenedioxide). Isopropylene) bisphenol type epoxy resin), bisphenol P type epoxy resin (4,4 ′-(1,4-phenylenediisopridiene) bisphenol type epoxy resin), bisphenol Z type epoxy resin (4,4′-cyclohexene) Bisphenol type epoxy resins such as sidiene bisphenol type epoxy resins; phenol novolak type epoxy resins, cresol novolak type epoxy resins, tetraphenol group ethane type novolak type epoxy resins, novola having a condensed ring aromatic hydrocarbon structure Novolak type epoxy resins such as epoxy resins; biphenyl type epoxy resins; aralkyl type epoxy resins such as xylylene type epoxy resins and biphenyl aralkyl type epoxy resins; naphthylene ether type epoxy resins, naphthol type epoxy resins, naphthalenediol type epoxy resins Epoxy resins having a naphthalene skeleton such as bifunctional to tetrafunctional epoxy type naphthalene resins, binaphthyl type epoxy resins, naphthalene aralkyl type epoxy resins, naphthalene modified cresol novolac epoxy resins; anthracene type epoxy resins; phenoxy type epoxy resins; dicyclopentadiene Type epoxy resin; norbornene type epoxy resin; adamantane type epoxy resin; containing one or more selected from fluorene type epoxy resin Can. Among these, it is more preferable to include an epoxy resin having a naphthalene skeleton from the viewpoint of improving the embedding property of the solder resist film and the surface smoothness. Thereby, the low linear expansion and high elastic modulus of the solder resist film can be achieved. It is also possible to improve the workability by improving the rigidity of the printed wiring board, and to improve the reflow resistance and suppress the warpage in the semiconductor package. From the viewpoint of improving the embedding property of the solder resist film, it is particularly preferable to include an epoxy resin having a tri- or higher functional naphthalene skeleton.
熱硬化性樹脂は、充填材(B)をさらに含んでもよい。
充填材(B)としては、無機充填材を用いることができる。上記無機充填剤としては、特に限定されないが、例えば、タルク、焼成クレー、未焼成クレー、マイカ、ガラスなどのケイ酸塩;酸化チタン、アルミナ、ベーマイト、シリカ、溶融シリカなどの酸化物;炭酸カルシウム、炭酸マグネシウム、ハイドロタルサイトなどの炭酸塩;水酸化アルミニウム、水酸化マグネシウム、水酸化カルシウムなどの水酸化物;硫酸バリウム、硫酸カルシウム、亜硫酸カルシウムなどの硫酸塩または亜硫酸塩;ホウ酸亜鉛、メタホウ酸バリウム、ホウ酸アルミニウム、ホウ酸カルシウム、ホウ酸ナトリウムなどのホウ酸塩;窒化アルミニウム、窒化ホウ素、窒化ケイ素、窒化炭素などの窒化物;チタン酸ストロンチウム、チタン酸バリウムなどのチタン酸塩などを挙げることができる。これらの中でも、タルク、アルミナ、ガラス、シリカ、マイカ、水酸化アルミニウム、水酸化マグネシウムが好ましい。 (Filler (B))
The thermosetting resin may further include a filler (B).
An inorganic filler can be used as the filler (B). Examples of the inorganic filler include, but are not limited to, silicates such as talc, calcined clay, unfired clay, mica, and glass; oxides such as titanium oxide, alumina, boehmite, silica, and fused silica; calcium carbonate Carbonates such as magnesium carbonate and hydrotalcite; hydroxides such as aluminum hydroxide, magnesium hydroxide and calcium hydroxide; sulfates or sulfites such as barium sulfate, calcium sulfate and calcium sulfite; zinc borate and metaborates Borates such as barium oxide, aluminum borate, calcium borate and sodium borate; nitrides such as aluminum nitride, boron nitride, silicon nitride and carbon nitride; titanates such as strontium titanate and barium titanate Can be mentioned. Among these, talc, alumina, glass, silica, mica, aluminum hydroxide, and magnesium hydroxide are preferable.
熱硬化性樹脂組成物は、シアネート樹脂(C)をさらに含んでもよい。これにより、ソルダーレジスト膜について、低線膨張化や、弾性率および剛性の向上を図ることができる。また、得られる半導体装置の耐熱性や耐湿性の向上に寄与することも可能である。 (Cyanate resin (C))
The thermosetting resin composition may further contain a cyanate resin (C). As a result, the solder resist film can be reduced in linear expansion and improved in elastic modulus and rigidity. It is also possible to contribute to improvement of heat resistance and moisture resistance of the obtained semiconductor device.
また、上記シアネート樹脂(C)は、特に限定されるものではないが、例えば、ハロゲン化シアン化合物と、フェノール類またはナフトール類と、を反応させて得ることができる。このような前記シアネート樹脂としては、例えば、フェノールノボラック型の多価フェノール類とハロゲン化シアンとの反応で得られるシアネート樹脂、クレゾールノボラック型の多価フェノール類とハロゲン化シアンとの反応で得られるシアネート樹脂、ナフトールアラルキル型の多価ナフトール類とハロゲン化シアンとの反応で得られるシアネート樹脂などが挙げられる。上記シアネート樹脂(C)は、一種または二種以上を組み合わせて用いてもよい。
これらの中でも、ソルダーレジスト膜の低線膨張化や、弾性率および剛性を向上させる観点からは、フェノールノボラック型シアネート樹脂、ジシクロペンタジエン型シアネートエステル樹脂、またはナフトールアラルキル型シアネート樹脂を含むことがより好ましく、フェノールノボラック型シアネート樹脂を含むことがとくに好ましい。 The cyanate resin (C) is a resin having a cyanate group (—O—CN) in the molecule, and a resin having two or more cyanate groups in the molecule can be used. Although it does not specifically limit as said cyanate resin (C), For example, dicyclopentadiene type cyanate ester resin, phenol novolak type cyanate ester resin, novolak type cyanate resin, bisphenol A type cyanate resin, bisphenol E type cyanate resin, tetramethyl Examples thereof include bisphenol type cyanate resins such as bisphenol F type cyanate resins, and naphthol aralkyl type cyanate resins.
Moreover, although the said cyanate resin (C) is not specifically limited, For example, it can obtain by making a halogenated cyanide compound, phenols, or naphthol react. Examples of such a cyanate resin include a cyanate resin obtained by a reaction of a phenol novolac type polyhydric phenol and a cyanogen halide, and a reaction of a cresol novolac type polyhydric phenol and a cyanogen halide. Examples include cyanate resins and cyanate resins obtained by reaction of naphthol aralkyl polyvalent naphthols with cyanogen halides. The cyanate resin (C) may be used alone or in combination of two or more.
Among these, from the viewpoint of lowering the linear expansion of the solder resist film and improving the modulus of elasticity and rigidity, it is more likely to contain a phenol novolak type cyanate resin, dicyclopentadiene type cyanate ester resin, or naphthol aralkyl type cyanate resin. It is particularly preferable to include a phenol novolac-type cyanate resin.
熱硬化性樹脂組成物は、たとえば硬化促進剤(D)をさらに含んでいることが好ましい。これにより、熱硬化性樹脂組成物の硬化性を向上させることができる。 (Curing accelerator (D))
It is preferable that the thermosetting resin composition further contains, for example, a curing accelerator (D). Thereby, the sclerosis | hardenability of a thermosetting resin composition can be improved.
熱硬化性樹脂組成物は、たとえば、着色剤(E)をさらに含むことができる。着色剤(E)は、たとえば緑、赤、青、黄、および黒等の染料、黒色顔料な等の顔料、および色素から選択される一種または二種以上を含む。これらの中でも、開口部の視認性等を向上させる観点から、緑色の着色剤を用いることができるが、緑色染料を用いてもよい。当該緑色の着色剤としては、たとえばアントラキノン系、フタロシアニン系、およびペリレン系等の公知の着色剤を一種または二種以上含むことができる。 (Colorant (E))
The thermosetting resin composition can further contain, for example, a colorant (E). The colorant (E) includes, for example, one or more selected from dyes such as green, red, blue, yellow, and black, pigments such as black pigments, and dyes. Among these, from the viewpoint of improving the visibility of the opening and the like, a green colorant can be used, but a green dye may be used. The green colorant may include one or more known colorants such as anthraquinone, phthalocyanine, and perylene.
熱硬化性樹脂組成物には、上記各成分以外に、必要に応じてカップリング剤、レベリング剤、硬化剤、感光剤、消泡剤、紫外線吸収剤、発泡剤、酸化防止剤、難燃剤、およびイオン捕捉剤等から選択される一種または二種以上の添加物を添加してもよい。 (Other ingredients (F))
In addition to the above components, the thermosetting resin composition includes a coupling agent, a leveling agent, a curing agent, a photosensitizer, an antifoaming agent, an ultraviolet absorber, a foaming agent, an antioxidant, a flame retardant, One or two or more additives selected from ion trapping agents and the like may be added.
かかる樹脂シートは、たとえばワニス状の熱硬化性樹脂組成物を塗布して得られた塗布膜(樹脂膜)に対して、溶剤除去処理を行うことにより得ることができる。上記樹脂シートは、溶剤含有率が熱硬化性樹脂組成物全体に対して5重量%以下と定義することができる。本実施形態においては、たとえば100℃~150℃、1分~5分の条件で溶剤除去処理を行うことができる。これにより、熱硬化性樹脂膜の硬化が進行することを抑制しつつ、十分に溶剤を除去することが可能となる。 In the present embodiment, the thermosetting resin is a varnish-like resin composition. A resin sheet is obtained by forming a varnish-like thermosetting resin into a film.
Such a resin sheet can be obtained, for example, by subjecting a coating film (resin film) obtained by coating a varnish-like thermosetting resin composition to a solvent removal treatment. The resin sheet can be defined as having a solvent content of 5% by weight or less with respect to the entire thermosetting resin composition. In the present embodiment, the solvent removal treatment can be performed, for example, under conditions of 100 ° C. to 150 ° C. and 1 minute to 5 minutes. This makes it possible to sufficiently remove the solvent while suppressing the curing of the thermosetting resin film.
本実施形態において、ワニス状の熱硬化性樹脂組成物は、たとえば溶剤を含むことができる。
上記溶剤としては、たとえばアセトン、メチルエチルケトン、メチルイソブチルケトン、トルエン、酢酸エチル、シクロヘキサン、ヘプタン、シクロヘキサン、シクロヘキサノン、テトラヒドロフラン、ジメチルホルムアミド、ジメチルアセトアミド、ジメチルスルホキシド、エチレングリコール、セルソルブ系、カルビトール系、アニソール、およびN-メチルピロリドン等の有機溶剤から選択される一種または二種以上を含むことができる。 (solvent)
In this embodiment, the varnish-like thermosetting resin composition can contain a solvent, for example.
Examples of the solvent include acetone, methyl ethyl ketone, methyl isobutyl ketone, toluene, ethyl acetate, cyclohexane, heptane, cyclohexane, cyclohexanone, tetrahydrofuran, dimethylformamide, dimethylacetamide, dimethyl sulfoxide, ethylene glycol, cellosolve, carbitol, anisole, And one or more selected from organic solvents such as N-methylpyrrolidone.
樹脂シートは、上記熱硬化性樹脂組成物から得られたフィルムを含むことができる。本実施形態において、樹脂シートは、シート形状でもよく、巻き取り可能なロール形状でもよい。かかる樹脂シートを硬化することによりソルダーレジスト膜を得ることができる。また、上記熱硬化性樹脂組成物の塗布膜を硬化させることにより、ソルダーレジスト膜を得てもよい。 [Resin sheet]
The resin sheet can include a film obtained from the thermosetting resin composition. In this embodiment, the resin sheet may have a sheet shape or a roll shape that can be wound. A solder resist film can be obtained by curing the resin sheet. Moreover, you may obtain a soldering resist film by hardening the coating film of the said thermosetting resin composition.
本実施形態においては、たとえば、上記硬化物に対して、TMA(熱分析装置)を用いて昇温速度10℃/分の条件で測定することにより得られる線膨張係数の、25~50℃における平均を算出し、これをガラス転移温度未満における上記線膨張係数とすることができる。 In this embodiment, when the thermosetting resin is heat treated at 200 ° C. for 1 hour to obtain a cured product, the linear expansion coefficient of the cured product of the thermosetting resin composition below the glass transition temperature is It is preferably 30 ppm / ° C. or less. Thereby, it becomes possible to suppress warpage of a semiconductor package including a resin sheet obtained using the thermosetting resin composition. The linear expansion coefficient is more preferably 28 ppm / ° C. or less. On the other hand, the lower limit value of the linear expansion coefficient is not particularly limited, but can be, for example, 3 ppm / ° C. or more. Thereby, the printed
In the present embodiment, for example, the linear expansion coefficient obtained by measuring the cured product using a TMA (thermal analyzer) at a temperature increase rate of 10 ° C./min at 25 to 50 ° C. An average can be calculated and used as the linear expansion coefficient below the glass transition temperature.
上記キャリア基材の厚みは、特に限定されないが、例えば、10~100μmとしてもよく、10~70μmとしてもよい。これにより、樹脂シートを製造する際の取り扱い性が良好であり好ましい。 In the present embodiment, for example, a polymer film or a metal foil can be used as the carrier substrate. The polymer film is not particularly limited. For example, polyolefin such as polyethylene and polypropylene, polyester such as polyethylene terephthalate and polybutylene terephthalate, release paper such as polycarbonate and silicone sheet, heat resistance such as fluorine resin and polyimide resin. A thermoplastic resin sheet having The metal foil is not particularly limited. For example, copper and / or a copper-based alloy, aluminum and / or an aluminum-based alloy, iron and / or an iron-based alloy, silver and / or a silver-based alloy, gold and a gold-based alloy, for example. Zinc and zinc-based alloys, nickel and nickel-based alloys, tin and tin-based alloys, and the like. Among these, a sheet made of polyethylene terephthalate is most preferable because it is inexpensive and easy to adjust the peel strength. Thereby, it becomes easy to peel from the said resin sheet with moderate intensity | strength.
The thickness of the carrier base material is not particularly limited, but may be, for example, 10 to 100 μm or 10 to 70 μm. Thereby, the handleability at the time of manufacturing a resin sheet is favorable and preferable.
[1]熱硬化性樹脂組成物の調製
エポキシ樹脂としてナフタレン変性クレゾールノボラック型エポキシ樹脂(DIC株式会社製、HP-5000)14.5質量%、シアネート樹脂としてフェノールノボラック型シアネートエステル樹脂(LONZA社製、PT-30)14.5質量%、フィラーとして球状シリカ粒子(株式会社アドマテックス製、SO-C4、平均粒径1.0μm、フェニルアミノシラン処理)70質量%、硬化促進剤としてテトラフェニルホスホニウム・テトラキス(4-メチルフェニル)ボレート(TPP-MK)0.5質量%、カップリング剤としてエポキシシラン(信越化学工業社製、KBM-403)0.5質量%を、メチルエチルケトンに溶解、分散させた後、高速撹拌装置を用いて1時間撹拌した。これにより、ワニス状の熱硬化性樹脂組成物を得た。 Example 1
[1] Preparation of thermosetting resin composition 14.5% by mass of a naphthalene-modified cresol novolac type epoxy resin (manufactured by DIC Corporation, HP-5000) as an epoxy resin, and a phenol novolac type cyanate ester resin (manufactured by LONZA) as a cyanate resin PT-30) 14.5% by mass, spherical silica particles (manufactured by Admatechs Co., Ltd., SO-C4, average particle size 1.0 μm, phenylaminosilane treatment) 70% by mass, tetraphenylphosphonium Tetrakis (4-methylphenyl) borate (TPP-MK) 0.5 mass% and epoxysilane (KBE-403, manufactured by Shin-Etsu Chemical Co., Ltd.) 0.5 mass% as a coupling agent were dissolved and dispersed in methyl ethyl ketone. Then, it stirred for 1 hour using the high-speed stirring apparatus. Thereby, a varnish-like thermosetting resin composition was obtained.
上記[1]で調整した樹脂ワニスを、キャリア基材であるPETフィルム上に塗布した。その後、PETフィルム上の樹脂ワニスを、140℃において2分間乾燥して、溶剤を除去し、樹脂シートの厚さが30μmのキャリア基材付き樹脂シート(絶縁性樹脂膜)を得た。
次に、厚さ3μmの銅箔(三井金属鉱業株式会社製、MT18SD-H)と剥離層とキャリア箔とがこの順に積層されたピーラブル金属箔を準備した。このピーラブル金属箔を、銅箔が絶縁性樹脂膜と対向するようにして、キャリア基材付き樹脂シート上に配置した。その後、金属箔を樹脂シートに熱圧着させた後、剥離層およびキャリア箔を剥離して、キャリア基材上に、銅箔(金属膜)と絶縁性樹脂膜とからなる金属膜付き絶縁性樹脂膜を得た。なお、上記銅箔の絶縁性樹脂膜と対向する面の表面粗さを、レーザー顕微鏡(株式会社キーエンス製、VK-X100)を用いて測定した。その結果、10点平均粗さRzは3.0μmであった。 [2] Production of Insulating Resin Film with Metal Film The resin varnish prepared in the above [1] was applied on a PET film as a carrier substrate. Thereafter, the resin varnish on the PET film was dried at 140 ° C. for 2 minutes to remove the solvent, and a resin sheet with a carrier base material (insulating resin film) having a resin sheet thickness of 30 μm was obtained.
Next, a peelable metal foil in which a copper foil having a thickness of 3 μm (manufactured by Mitsui Mining & Smelting Co., Ltd., MT18SD-H), a release layer, and a carrier foil were laminated in this order was prepared. This peelable metal foil was placed on a resin sheet with a carrier substrate so that the copper foil faced the insulating resin film. Thereafter, the metal foil is thermocompression bonded to the resin sheet, the release layer and the carrier foil are peeled off, and the insulating resin with a metal film comprising a copper foil (metal film) and an insulating resin film is formed on the carrier substrate. A membrane was obtained. The surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 3.0 μm.
コア基板の両面に銅箔が積層された銅張積層板(住友ベークライト株式会社製、LαZ4785GS-B)を準備した。この銅張積層板の一方の表面の銅箔をエッチングによりパターニングして、導電体パターンを形成するとともに、銅張積層板の他方の表面の銅箔をエッチングにより全て除去した。これにより、一方の表面に導電体パターンが設けられたコア基板を作製した。
次に、上記[2]で作製した金属膜付き絶縁性樹脂膜の絶縁性樹脂膜を、コア基板の導電体パターンが設けられた面に対向させて、真空加圧式ラミネーター装置を用いて、温度100℃、圧力1MPaにて真空加熱加圧成形させた後、180℃の乾燥装置で60分間乾燥した。その後、キャリア基材を除去することにより、コア基板、絶縁性樹脂膜、および金属膜がこの順番で積層された構造体を作製した。 [3] Fabrication of structure A copper-clad laminate (manufactured by Sumitomo Bakelite Co., Ltd., LαZ4785GS-B) in which copper foil was laminated on both surfaces of the core substrate was prepared. The copper foil on one surface of the copper clad laminate was patterned by etching to form a conductor pattern, and the copper foil on the other surface of the copper clad laminate was all removed by etching. This produced the core substrate by which the conductor pattern was provided in one surface.
Next, the insulating resin film of the insulating resin film with a metal film produced in the above [2] is opposed to the surface on which the conductor pattern of the core substrate is provided, and a temperature is measured using a vacuum pressure laminator device. After vacuum heating and pressure molding at 100 ° C. and a pressure of 1 MPa, drying was performed for 60 minutes with a drying apparatus at 180 ° C. Thereafter, by removing the carrier base material, a structure in which the core substrate, the insulating resin film, and the metal film were laminated in this order was produced.
次に、構造体の金属膜に対して、エッチング処理を行い、金属膜の所定の領域(コア基板の導電体パターンのランドに対応する領域)に開口部を形成した。 [4] Formation of Opening in Metal Film Next, etching is performed on the metal film of the structure to open a predetermined area of the metal film (area corresponding to the land of the conductor pattern on the core substrate). Part was formed.
次に、開口部が形成された金属膜をマスクとして、絶縁性樹脂膜に対してレーザー加工法によりエッチング処理を行い、コア基板上のランドが露出するように、絶縁性樹脂膜に開口部を形成した。その後、構造体を220℃の乾燥装置で60分間加熱することにより、Bステージ状態の絶縁性樹脂膜を硬化させて、ソルダーレジスト膜を形成した。
次に、構造体を60℃の膨潤液(アトテック社製、スウェリングディップ セキュリガント P)に5分間浸漬し、さらに80℃の過マンガン酸カリウム水溶液(アトテック社製、コンセントレート コンパクト CP)に5分浸漬後、中和することで、デスミア処理を行った。 [5] Formation of opening in insulating resin film Next, the insulating resin film is etched by a laser processing method using the metal film having the opening as a mask, and the land on the core substrate is formed. An opening was formed in the insulating resin film so as to be exposed. Thereafter, the structure was heated with a drying apparatus at 220 ° C. for 60 minutes to cure the B-stage insulating resin film to form a solder resist film.
Next, the structure was immersed in a swelling solution at 60 ° C. (Atotech Co., Swelling Dip Securigant P) for 5 minutes, and further added to an aqueous potassium permanganate solution (Atotech Co., Concentrate Compact CP) at 80 ° C. After the minute immersion, the desmear treatment was performed by neutralization.
次に、構造体の金属膜に対して、フラッシュエッチングを行い、ソルダーレジスト膜の表面上の金属膜を除去した。 [6] Removal of Metal Film Next, flash etching was performed on the metal film of the structure to remove the metal film on the surface of the solder resist film.
次に、ソルダーレジスト膜の開口部に露出した導電体パターン(ランド)上にめっき層を形成した。具体的には、無電解ニッケルめっき層3μmを形成し、さらにその上に無電解金めっき層0.1μmを形成した。これにより、プリント配線板を得た。 [7] Plating treatment Next, a plating layer was formed on the conductor pattern (land) exposed in the opening of the solder resist film. Specifically, an electroless nickel plating layer of 3 μm was formed, and an electroless gold plating layer of 0.1 μm was further formed thereon. Thereby, a printed wiring board was obtained.
厚さ3μmの銅箔(三井金属鉱業株式会社製、MT18SD-H)の代わりに、厚さ3μmの銅箔(三井金属株式会社製、MT18Ex)を使用した以外は、実施例1と同様にして配線基板を得た。
なお、上記銅箔の絶縁性樹脂膜と対向する面の表面粗さを、レーザー顕微鏡(株式会社キーエンス製、VK-X100)を用いて測定した。その結果、10点平均粗さRzは2.0μmであった。 (Example 2)
Example 3 was used except that a 3 μm thick copper foil (Mitsui Metals Co., Ltd., MT18Ex) was used instead of a 3 μm thick copper foil (Mitsui Metals Co., Ltd., MT18SD-H). A wiring board was obtained.
The surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 2.0 μm.
厚さ3μmの銅箔(三井金属鉱業株式会社製、MT18SD-H)の代わりに、厚さ3μmの銅箔(三井金属鉱業株式会社製、MT18SD-H-T3B)を使用した以外は、実施例1と同様にして配線基板を得た。
なお、上記銅箔の絶縁性樹脂膜と対向する面の表面粗さを、レーザー顕微鏡(株式会社キーエンス製、VK-X100)を用いて測定した。その結果、10点平均粗さRzは1.8μmであった。 (Example 3)
Example except that 3 μm thick copper foil (Mitsui Metal Mining Co., Ltd., MT18SD-H-T3B) was used instead of 3 μm thick copper foil (Mitsui Metal Mining Co., Ltd., MT18SD-H) In the same manner as in No. 1, a wiring board was obtained.
The surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 1.8 μm.
厚さ3μmの銅箔(三井金属鉱業株式会社製、MT18SD-H)の代わりに、厚さ3μmの銅箔(古川電気工業株式会社製、F-HP)を使用した以外は、実施例1と同様にして配線基板を得た。
なお、上記銅箔の絶縁性樹脂膜と対向する面の表面粗さを、レーザー顕微鏡(株式会社キーエンス製、VK-X100)を用いて測定した。その結果、10点平均粗さRzは1.5μmであった。 Example 4
Example 1 was used except that a 3 μm thick copper foil (Furukawa Electric Co., Ltd., F-HP) was used instead of the 3 μm thick copper foil (Mitsui Metal Mining Co., Ltd., MT18SD-H). A wiring board was obtained in the same manner.
The surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 1.5 μm.
厚さ3μmの銅箔(三井金属鉱業株式会社製、MT18SD-H)の代わりに、厚さ3μmの銅箔(三井金属鉱業株式会社製、MT18FL)を使用した以外は、実施例1と同様にして配線基板を得た。
なお、上記銅箔の絶縁性樹脂膜と対向する面の表面粗さを、レーザー顕微鏡(株式会社キーエンス製、VK-X100)を用いて測定した。その結果、10点平均粗さRzは1.3μmであった。 (Example 5)
Example 3 was used except that a 3 μm thick copper foil (Mitsui Metal Mining Co., Ltd., MT18FL) was used instead of a 3 μm thick copper foil (Mitsui Metal Mining Co., Ltd., MT18SD-H). A wiring board was obtained.
The surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 1.3 μm.
厚さ3μmの銅箔(三井金属鉱業株式会社製、MT18SD-H)の代わりに、厚さ18μmの銅箔(JX金属株式会社製、HS-GHY5)を使用した以外は、実施例1と同様にして配線基板を得た。
なお、上記銅箔の絶縁性樹脂膜と対向する面の表面粗さを、レーザー顕微鏡(株式会社キーエンス製、VK-X100)を用いて測定した。その結果、10点平均粗さRzは0.3μmであった。 (Example 6)
Example 1 except that a 18 μm thick copper foil (HS-GHY5, manufactured by JX Metals, Inc.) was used instead of a 3 μm thick copper foil (Mitsui Metals, Ltd., MT18SD-H). Thus, a wiring board was obtained.
The surface roughness of the surface of the copper foil facing the insulating resin film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). As a result, the 10-point average roughness Rz was 0.3 μm.
金属膜付き絶縁性樹脂膜の代わりに、上記実施例1と同様にして作製したキャリア基材付き樹脂シートを準備した。
その後、実施例1の上記[3]と同様にして、構造体を作製した。その後、絶縁性樹脂膜に対して直接レーザー照射によるエッチングを行い、コア基板上のランドが露出するように、絶縁性樹脂膜に開口部を形成した。その後、構造体を220℃の乾燥装置で60分間加熱することにより、Bステージ状態の絶縁性樹脂膜を硬化させて、ソルダーレジスト膜を形成した。
その後、実施例1の上記[7]と同様にして、ソルダーレジスト膜の開口部に露出した導電体パターン(ランド)上にめっき層を形成して、プリント配線板を得た。 (Comparative example)
Instead of the insulating resin film with a metal film, a resin sheet with a carrier substrate prepared in the same manner as in Example 1 was prepared.
Thereafter, a structure was produced in the same manner as [3] in Example 1. Thereafter, the insulating resin film was directly etched by laser irradiation to form openings in the insulating resin film so that the lands on the core substrate were exposed. Thereafter, the structure was heated with a drying apparatus at 220 ° C. for 60 minutes to cure the B-stage insulating resin film to form a solder resist film.
Thereafter, in the same manner as in [7] of Example 1, a plating layer was formed on the conductor pattern (land) exposed at the opening of the solder resist film to obtain a printed wiring board.
各実施例および比較例のプリント配線板について、ソルダーレジスト膜の表面粗さ(10点平均粗さRz)を、レーザー顕微鏡(株式会社キーエンス製、VK-X100)を用いて測定し、以下の基準に従って評価した。その結果を表1に示す。
A:10点平均粗さRzが、0.2μm以上1.8μm以下。
B:10点平均粗さRzが、1.8μmより大きく、かつ、2.0μm以下。
C:10点平均粗さRzが、2.0μmより大きく、かつ、3.0μm以下。
D:10点平均粗さRzが、3.0μmより大きい。 (Evaluation of surface smoothness of solder resist film)
For the printed wiring boards of the examples and comparative examples, the surface roughness (10-point average roughness Rz) of the solder resist film was measured using a laser microscope (manufactured by Keyence Corporation, VK-X100). Evaluated according to. The results are shown in Table 1.
A: 10-point average roughness Rz is 0.2 μm or more and 1.8 μm or less.
B: The 10-point average roughness Rz is larger than 1.8 μm and 2.0 μm or less.
C: The 10-point average roughness Rz is larger than 2.0 μm and not larger than 3.0 μm.
D: The 10-point average roughness Rz is larger than 3.0 μm.
各実施例および比較例の配線基板について、レーザー照射により形成された開口部周辺をレーザー顕微鏡で観察し、以下の基準に従って評価した。その結果を表1に示す。
A:開口部周辺のソルダーレジスト膜にレーザー焼けが全く観察されなかった。
B:開口部周辺のソルダーレジスト膜にレーザー焼けが観察された。 (State observation around the opening of the solder resist film)
About the wiring board of each Example and a comparative example, the opening part periphery formed by laser irradiation was observed with the laser microscope, and it evaluated according to the following references | standards. The results are shown in Table 1.
A: No laser burn was observed in the solder resist film around the opening.
B: Laser burn was observed in the solder resist film around the opening.
Claims (13)
- 回路が設けられた回路面を備える回路基板、ソルダーレジスト膜、および金属膜がこの順番で積層された構造体を準備する工程と、
前記金属膜を選択的に除去することにより、前記金属膜に第1の開口部を形成する工程と、
前記第1の開口部が形成された領域の前記ソルダーレジスト膜を除去することにより、前記回路の一部を露出させる第2の開口部を前記ソルダーレジスト層に形成する工程と、
前記金属膜を除去して、前記ソルダーレジスト膜の表面を露出させる工程と、
を含む、プリント配線板の製造方法。 Preparing a structure in which a circuit board having a circuit surface provided with a circuit, a solder resist film, and a metal film are laminated in this order;
Forming a first opening in the metal film by selectively removing the metal film;
Removing the solder resist film in the region where the first opening is formed to form a second opening in the solder resist layer to expose a part of the circuit;
Removing the metal film to expose the surface of the solder resist film;
A method for producing a printed wiring board, comprising: - 前記金属膜は、表面粗さRzが0.1μm以上3.0μm以下の平滑面を有しており、
前記ソルダーレジスト膜の一面が前記金属膜の前記平滑面に対向配置されており、前記ソルダーレジスト膜の他面が前記回路基板の前記回路面に対向配置されている請求項1に記載の配線基板の製造方法。 The metal film has a smooth surface with a surface roughness Rz of 0.1 μm to 3.0 μm,
2. The wiring board according to claim 1, wherein one surface of the solder resist film is disposed to face the smooth surface of the metal film, and the other surface of the solder resist film is disposed to face the circuit surface of the circuit board. Manufacturing method. - 前記構造体を準備する工程は、
前記ソルダーレジスト膜の前記一面に前記金属膜の前記平滑面が対向するように、前記金属膜が配置された前記ソルダーレジスト膜を準備する工程と、
前記ソルダーレジスト膜の前記他面と前記回路基板の前記回路面とを対向させ、貼り合わせることにより前記構造体を準備する工程と、を含む、請求項2に記載のプリント配線板の製造方法。 The step of preparing the structure includes
Preparing the solder resist film in which the metal film is disposed so that the smooth surface of the metal film faces the one surface of the solder resist film;
The manufacturing method of the printed wiring board of Claim 2 including the process of preparing the said structure by making the said other surface of the said soldering resist film and the said circuit surface of the said circuit board oppose and bonding together. - 前記構造体を準備する工程は、
前記ソルダーレジスト膜の前記一面にキャリア基材の主面が対向するように、前記キャリア基材が配置された前記ソルダーレジスト膜を準備する工程と、
前記ソルダーレジスト膜の前記他面と前記回路基板の前記回路面とを対向させ、貼り合わせる工程と、
前記キャリア基材を前記ソルダーレジスト膜から剥離し、前記ソルダーレジスト膜の前記一面上に、前記平滑面を有する前記金属膜を形成する工程と、を含む、請求項2に記載のプリント配線板の製造方法。 The step of preparing the structure includes
Preparing the solder resist film in which the carrier base material is arranged so that the main surface of the carrier base material faces the one surface of the solder resist film;
The other surface of the solder resist film and the circuit surface of the circuit board are opposed to each other and bonded together;
The carrier substrate is peeled from the solder resist film, and the metal film having the smooth surface is formed on the one surface of the solder resist film. Production method. - 前記ソルダーレジスト膜の厚さが、10μm以上50μm以下である、請求項1ないし4のいずれか1項に記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to any one of claims 1 to 4, wherein a thickness of the solder resist film is 10 µm or more and 50 µm or less.
- 前記構造体を準備する工程において、前記ソルダーレジスト膜が、Bステージ状態であり、
前記第2の開口部を形成した後、前記ソルダーレジスト膜を硬化する工程を含む、請求項1ないし5のいずれか1項に記載のプリント配線板の製造方法。 In the step of preparing the structure, the solder resist film is in a B stage state,
The method for manufacturing a printed wiring board according to claim 1, further comprising a step of curing the solder resist film after forming the second opening. - 前記金属膜の厚さが、1μm以上30μm以下である、請求項1ないし6のいずれか1項に記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to any one of claims 1 to 6, wherein a thickness of the metal film is 1 µm or more and 30 µm or less.
- 前記金属膜が、無粗化銅箔を含む、請求項2ないし7のいずれか1項に記載のプリント配線板の製造方法。 The method for manufacturing a printed wiring board according to any one of claims 2 to 7, wherein the metal film includes a non-roughened copper foil.
- 前記ソルダーレジスト膜が、シート状である、請求項1ないし8のいずれか1項に記載のプリント配線板の製造方法。 The method for producing a printed wiring board according to any one of claims 1 to 8, wherein the solder resist film is in a sheet form.
- 前記ソルダーレジスト膜が、ソルダーレジスト用樹脂組成物を用いて形成されており、
前記ソルダーレジスト用樹脂組成物が、熱硬化性樹脂と無機充填材とを含む、請求項1ないし9のいずれか1項に記載のプリント配線板の製造方法。 The solder resist film is formed using a resin composition for solder resist,
The method for manufacturing a printed wiring board according to any one of claims 1 to 9, wherein the solder resist resin composition includes a thermosetting resin and an inorganic filler. - 前記熱硬化性樹脂が、ナフタレン骨格を有するエポキシ樹脂を含む、請求項10に記載のプリント配線板の製造方法。 The method for producing a printed wiring board according to claim 10, wherein the thermosetting resin includes an epoxy resin having a naphthalene skeleton.
- 前記ソルダーレジスト用樹脂組成物が、着色剤を含む、請求項10または11に記載のプリント配線板の製造方法。 The method for producing a printed wiring board according to claim 10 or 11, wherein the solder resist resin composition contains a colorant.
- 請求項1ないし12のいずれか1項に記載のプリント配線板の製造方法で得られたプリント配線板を準備する工程と、
前記プリント配線板上に半導体素子を実装する工程と、を含む、半導体装置の製造方法。 A step of preparing a printed wiring board obtained by the method for manufacturing a printed wiring board according to any one of claims 1 to 12,
Mounting a semiconductor element on the printed wiring board.
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JP2017537861A JPWO2017038713A1 (en) | 2015-08-31 | 2016-08-26 | Printed wiring board manufacturing method and semiconductor device manufacturing method |
KR1020187001748A KR102582537B1 (en) | 2015-08-31 | 2016-08-26 | Manufacturing method of printed wiring board, manufacturing method of semiconductor device |
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Cited By (6)
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JP2019033205A (en) * | 2017-08-09 | 2019-02-28 | 住友ベークライト株式会社 | Wiring board manufacturing method and semiconductor device manufacturing method |
JP2019179844A (en) * | 2018-03-30 | 2019-10-17 | 住友ベークライト株式会社 | Resin sheet for forming solder resist, circuit board, and semiconductor package |
KR20190120771A (en) | 2017-04-06 | 2019-10-24 | 미쓰비시 세이시 가부시키가이샤 | Etching liquid and etching method for resin compositions |
KR20210068134A (en) | 2018-10-24 | 2021-06-08 | 미쓰비시 세이시 가부시키가이샤 | Etching liquid and etching method of resin composition |
KR20210097219A (en) | 2019-01-28 | 2021-08-06 | 미쓰비시 세이시 가부시키가이샤 | Etching liquid and etching method of resin composition |
CN113787241A (en) * | 2021-08-25 | 2021-12-14 | 北京无线电测量研究所 | Welding tool for microstrip device and welding method based on welding tool |
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TWI742297B (en) * | 2018-07-05 | 2021-10-11 | 同泰電子科技股份有限公司 | Circuit board structure having gap filling layer |
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- 2016-08-26 KR KR1020187001748A patent/KR102582537B1/en active IP Right Grant
- 2016-08-26 JP JP2017537861A patent/JPWO2017038713A1/en active Pending
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JPH1087960A (en) * | 1996-09-20 | 1998-04-07 | Kanegafuchi Chem Ind Co Ltd | Resin composition for solder resist |
JP2004221135A (en) * | 2003-01-09 | 2004-08-05 | Ibiden Co Ltd | Multilayer printed circuit board |
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KR20190120771A (en) | 2017-04-06 | 2019-10-24 | 미쓰비시 세이시 가부시키가이샤 | Etching liquid and etching method for resin compositions |
JP2019033205A (en) * | 2017-08-09 | 2019-02-28 | 住友ベークライト株式会社 | Wiring board manufacturing method and semiconductor device manufacturing method |
JP2019179844A (en) * | 2018-03-30 | 2019-10-17 | 住友ベークライト株式会社 | Resin sheet for forming solder resist, circuit board, and semiconductor package |
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KR20210068134A (en) | 2018-10-24 | 2021-06-08 | 미쓰비시 세이시 가부시키가이샤 | Etching liquid and etching method of resin composition |
KR20210097219A (en) | 2019-01-28 | 2021-08-06 | 미쓰비시 세이시 가부시키가이샤 | Etching liquid and etching method of resin composition |
CN113787241A (en) * | 2021-08-25 | 2021-12-14 | 北京无线电测量研究所 | Welding tool for microstrip device and welding method based on welding tool |
CN113787241B (en) * | 2021-08-25 | 2023-06-20 | 北京无线电测量研究所 | Welding tool for microstrip device and welding method based on welding tool |
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KR102582537B1 (en) | 2023-09-26 |
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JPWO2017038713A1 (en) | 2018-06-14 |
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