TW546808B - Arrangement with a chip having an integrated circuit and a carrier, and a carrier element - Google Patents

Arrangement with a chip having an integrated circuit and a carrier, and a carrier element Download PDF

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Publication number
TW546808B
TW546808B TW091103583A TW91103583A TW546808B TW 546808 B TW546808 B TW 546808B TW 091103583 A TW091103583 A TW 091103583A TW 91103583 A TW91103583 A TW 91103583A TW 546808 B TW546808 B TW 546808B
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TW
Taiwan
Prior art keywords
carrier
contact area
opening
internal contact
wafer
Prior art date
Application number
TW091103583A
Other languages
Chinese (zh)
Inventor
Bernd Barchmann
Frank Pueschner
Original Assignee
Infineon Technologies Ag
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Publication date
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Publication of TW546808B publication Critical patent/TW546808B/en

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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

A carrier element is provided which has inner contact areas for the contact-connection to a chip. In this case, what is essential, to the invention is to be seen in the fact that the inner contact areas have depressions for accommodating a conductive adhesive.

Description

546808 五、 發明説明（i 發明背景 申本關於一種如申請專利範圍第1項之配置及-種如 "粑圍弟5項之載體元件，該配置具有一裁^^人 -積體電路之晶片。 、有自體和-含 發明概沭 2體元：之製造及其進—步處理係承受著高成本 盆主動加L所5胃具積體電路之晶片（半導體晶片）^固定使 ”主動木構朝一載體上部而置， Η焯雜广y 僚者向離載體而置的晶 =觸區係藉由連結技術與載體之接觸區連接。已知好長 一段時間’為了避免產生導線連結性連接之過程，故使晶 片之接觸區經由接觸元件直接與配置在載體上的接觸區接 觸’在後面的說明中係稱為内部接觸區。為了達到這個目 的，一導電性黏著劑係塗敷於内部接觸區上，一方面使載 體之内部接觸區與接觸元件之間產生導電性連接，另一方 面使晶片機械性固定於載體上。為了能夠產生作用，有必 要塗敷最.少量的導電性黏著劑。因此當晶片與載體放在一 起晗，辱電性黏著劑朝側邊擠壓，從而常常引起短路或至 少對其它接觸元件或内部接觸區造成不希望得到的接觸。 為了避免此等負面作用，同樣已知藉由例如焊接阻質塗敷 限制物，致使朝側邊擠壓導電性黏著劑未，超出不希望的範 圍。然而，此種配置僅能用一種非常複雜且耗成本的方式 予以產生。 aa 所以，本發明的目的在於提供一種具有含一積體電路之 一片與載體之配置及一種載體元件，其中此種配置可用載 -4 - 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公赞） 546808546808 V. Description of the invention (i. BACKGROUND OF THE INVENTION The present application is about a configuration such as item 1 of the scope of patent application and a carrier element such as " 粑 粑 5, which has a tailored circuit of a human-integrated circuit. Wafers, self-contained and -including invention outline 2 elements: the manufacturing and further processing of the wafers (semiconductor wafers) that bear the high cost of the pot actively add the 5 integrated circuit of the L Institute ^ fixed use " The active wooden structure is placed toward the upper part of a carrier, and it is mixed with a wide area. The clerk is connected to the contact area of the carrier by the connection technology. It is known for a long time to prevent the connection of wires. The process of sexual connection, so that the contact area of the wafer directly contacts the contact area arranged on the carrier via the contact element is called an internal contact area in the following description. In order to achieve this purpose, a conductive adhesive is applied On the internal contact area, on the one hand, a conductive connection is formed between the internal contact area of the carrier and the contact element, and on the other hand, the wafer is mechanically fixed on the carrier. In order to have an effect, it is necessary to apply the most. The amount of conductive adhesive. Therefore, when the wafer and the carrier are put together, the adhesive is squeezed towards the side, often causing short circuits or at least undesired contact with other contact elements or internal contact areas. To avoid these negative effects, it is also known that the conductive adhesive is squeezed toward the side by, for example, solder resist coating restrictions, beyond the undesirable range. However, this configuration can only be used with a very complicated and It is cost-intensive to produce. Aa Therefore, the object of the present invention is to provide a configuration including a chip and a carrier with an integrated circuit, and a carrier element, wherein such a configuration can be used -4-This paper size applies to Chinese national standards (CNS) A4 specifications (210X 297 praise) 546808

五、發明説明（2 體兀件以簡單、低成本且可靠的方式予以產生。 此目的純據本發明藉由分财現在⑼專利範圍第w )項之手段予以達成。 由於在内部接觸區中提供一開，，導電性黏著劑 與載體放在一起時會擴散’但不會在過程中產生 到的接觸。 ^ 附屬項申請專利範圍中詳述具更進_步優點之架構 於開口係由内部接觸區予以完全圍繞，故導電性黏著劑係 在接合處理之後予以完全包住。 ” *j供一經由内部接觸區切成開口之溝槽使得開口能以非 裝 常簡單的方式^以產生並使得導電性黏著劑能依一預定 未干擾之方向流出。 、、 由於内部接觸區中的開口不需要儘可能地靠近载體，故 可進一步以簡單的方式架構開口。 訂 於載體與晶片之間的空隙中提供填充材料會得到機 特穩配置。 本發明係引用圖式以舉例性具體實施例於底下作說明。 圖示簡述 圖示中： 圖1表示一根據本發明之載體元件，其寸與一晶片放在一 ， 圖2表示一根據本發明之配置，其包含一載體和一配置於 遠載體上之晶片，以及 圖3表示一具有兩架構A和B之載體元件之平面圖。 本紙張尺度適用中國國家標準(CNS) A4規格（210 X 297公釐） 546808 A7 B7 五、發明説明（3 ) 詳細發明說明 圖1表示一上方配置一積體電路（未示出）之晶片1。提供接 觸區3 ’在接觸區3上配置接觸元件4，其中接觸元件$亦已 知為呈圖式形式之所謂凸塊。另外，一保護層2係塗敷於晶 片1之表面上’該層係希望用來至少機械性保護積體電路。 此一保護層係已知為氮化物或氧化物層。保護層2通過接觸 區3之區域中的開口或接觸元件4。 另外，圖1描述一載體5，在面對晶片之側邊上，内部接 觸區7係形成於該載體5上，其形成方式使得晶片〗之接觸區 /或接觸兀件4可接觸連接至該等内部接觸區7。該等内部接 觸區7中的每一個皆具有一開口 u，一導電性黏著劑8係引 入该開口 Π内。再者，一填充材料10係塗敷在面對晶片Ϊ之 載體5之表面上。接著準備使晶片與載體5結合，致使接觸 元件4與導電性黏著劑8接觸。 此係描述於圖2中。在此實例中，接觸元件4穿過填充材 料10，该填充材料10係朝側邊擠壓並完全填充載體元件盘 晶片之間的空隙。在此處所述的具體實施例中，填充材料 ίο已同時朝側邊擠壓，其擠壓方式使得晶片i之橫向邊緣亦 受到覆蓋。 圖」及圖2兩者皆另外描述外部接觸區6，，其中外部接觸區 6係错由通過載體5之接通電錄法咖㈣呵）連接至内 部接觸區。外部接觸區6係用於所示之配置之接觸連接。块 而’外部接觸區並非唯一 非隹的角午決方案，而僅為其中一實施 例° -6 - 546808 A7V. Description of the invention (2 The physical components are produced in a simple, low-cost and reliable way. This object is achieved purely according to the present invention by means of dividing the wealth into current patent scope w). Due to the opening provided in the internal contact area, the conductive adhesive will diffuse when placed with the carrier 'but will not make contact during the process. ^ The structure with further advantages is detailed in the scope of the attached patent application. The opening is completely surrounded by the internal contact area, so the conductive adhesive is completely enclosed after the bonding process. ”* J A groove cut into the opening through the internal contact area allows the opening to be created in a non-trivial and simple manner ^ to generate and allow the conductive adhesive to flow out in a predetermined undisturbed direction. Because of the internal contact area The opening in the center does not need to be as close to the carrier as possible, so the opening can be further structured in a simple manner. Providing a filling material in the gap between the carrier and the wafer will result in a machine-stable configuration. The present invention refers to the drawings to give examples The specific embodiments are described below. In the diagram, the diagram is as follows: FIG. 1 shows a carrier element according to the present invention, the size of which is placed with a wafer, and FIG. 2 shows a configuration according to the present invention, which includes a The carrier and a wafer arranged on a distant carrier, and FIG. 3 shows a plan view of a carrier element having two architectures A and B. This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 546808 A7 B7 V. Description of the invention (3) Detailed description of the invention Fig. 1 shows a wafer 1 with an integrated circuit (not shown) arranged thereon. A contact area 3 is provided. A contact element 4 is arranged on the contact area 3, and The middle contact element $ is also known as a so-called bump in the form of a diagram. In addition, a protective layer 2 is coated on the surface of the wafer 1 'this layer is intended to at least mechanically protect the integrated circuit. This protection The layer system is known as a nitride or oxide layer. The protective layer 2 passes through the opening in the area of the contact area 3 or the contact element 4. In addition, FIG. 1 depicts a carrier 5, on the side facing the wafer, the internal contact area 7 is formed on the carrier 5 in a manner such that the contact area of the wafer and / or the contact element 4 can be connected to the internal contact areas 7. Each of the internal contact areas 7 has an opening u. A conductive adhesive 8 is introduced into the opening Π. Furthermore, a filler material 10 is coated on the surface of the carrier 5 facing the wafer stack. Then, the wafer and the carrier 5 are to be combined, so that the contact element 4 and The conductive adhesive 8 is in contact. This system is described in Figure 2. In this example, the contact element 4 passes through a filler material 10 which is pressed towards the sides and completely fills the gap between the wafers of the carrier element disks. In the specific embodiment described here, The filling material ίο has been extruded towards the side at the same time, and the extruding method makes the lateral edge of the wafer i also covered. Both "Figure 2" and "2" describe the external contact area 6, where the external contact area 6 is passed by mistake. Carrier 5 is connected to the internal contact area. The external contact area 6 is used for the contact connection of the configuration shown. The ‘external contact area’ is not the only non-positive corner solution, but only one of the examples ° -6-546808 A7

圖3表示-根據本發明之載體元件之平面圖。在此實例中 ，描述兩藉由波線予以隔開的具體實施例Α、β。具體實施 1表丁主圓形之開口"。然而’本發明並不局限於圓形之 具體實施例。所有具體實施例Α中的重點在於開口η係由内 部接觸區7予以完全圍繞。 相對地’在具體實施例时，開口 u係作成一經由内部接 觸區7而抑之溝槽。此種形式可予以非常簡單地形成並能 使黏著劑依一預定方向流出。 亦必須指出的是，即使圖示中並未明確描述，兩具體實 施例A及B中的開π U仍不需儘可能地靠近載體6。本發明 的重點在於一凹部確實係形成於内部接觸元件7中。 本紙張尺度適用中國國家標準(CNS) A4規格（210X 297公I) 546808 A7 B7 五、發明説明（5 ) 引用符號表列： 1 晶片 Ί 表面保護 接觸區 4 接觸元件 5 載體 6 外部接觸區 7 内部接觸區 8 導電性黏著劑 9 電鍍接通洞 10 填充材料 11 開口 12 A第一載體架構 13 β第二載體架構 / -8 - 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)Figure 3 shows a plan view of a carrier element according to the invention. In this example, specific embodiments A, β are described in which the two are separated by a wave line. Detailed implementation 1 The main round opening of the table is "." However, the present invention is not limited to the specific embodiment of a circle. The important point in all the specific embodiments A is that the opening n is completely surrounded by the internal contact area 7. In contrast, in the specific embodiment, the opening u is formed as a groove which is suppressed by the internal contact area 7. This form can be formed very simply and enables the adhesive to flow out in a predetermined direction. It must also be pointed out that even if it is not explicitly described in the figure, the opening π U in the two specific embodiments A and B need not be as close to the carrier 6 as possible. The important point of the present invention is that a recess is indeed formed in the internal contact member 7. This paper size applies Chinese National Standard (CNS) A4 specification (210X 297 male I) 546808 A7 B7 V. Description of the invention (5) List of reference symbols: 1 wafer Ί surface protection contact area 4 contact element 5 carrier 6 external contact area 7 Internal contact area 8 Conductive adhesive 9 Plating through hole 10 Filling material 11 Opening 12 A First carrier structure 13 β Second carrier structure / -8-This paper size applies Chinese National Standard (CNS) A4 (210 X 297) (Mm)

Claims (1)

546808 第091103583號專利申請案 中文申請專利範圍替換本(92年2月) ABCD 六、申請專利範圍 1. 一種具有一含一積體電路之晶片（1)與一載體（5)之配置， 其中該晶片（1)至少具有一接觸區（3)以便能夠藉由一接觸 元件（4)接觸連接至一配置在面對晶片（1)之載體（5)之側 邊上的内部接觸區（7)， 其特徵在於内部接觸區（7)具有一連接至一導電性黏著 劑（8)之開口（11)，用於使内部接觸區（7)電氣連接至接觸 元件（4)。 2. 如申請專利範圍第1項之配置，其特徵在於該開口係藉由 該内部接觸區（7)予以完全圍繞。 3. 如申請專利範圍第1項之配置，其特徵在於該開口（11)係 一經由該内部接觸區（7)切割之溝槽。 4. 如前述申請專利範圍任一項之配置，其特徵在於該晶片 (I) 與該載體（5)之間的空隙係以一填充材料（10)予以填充。 5. —種包含一載體（5)之載體元件，該載體（5)之一表面上至 少有一内部接觸區（7)， 其特徵在於内部接觸區（7)具有一開口（11)。 6. 如申請專利範圍第5項之載體元件，其特徵在於該開口 (II) 係設計地盡可能與載體（5)呈連續性。 7. 如申請專利範圍第5項之載體元件，其特徵在於該開口 (11)並未通過該内部接觸區（7)切割至該載體（5)。 8. 如申請專利範圍第5至7項中任一項之載體元件，其特徵 在於該開口（11)係由該内部接觸區（7)予以完全圍繞。 9. 如申請專利範圍第5至7項中任一項之載體元件，其特徵 在於該開口（11)係通過該内部接觸區（7)切割成一溝槽。 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)546808 Patent Application No. 091103583 Chinese Application for Patent Scope Replacement (February 1992) ABCD VI. Application for Patent Scope 1. A configuration with a chip (1) and a carrier (5) containing an integrated circuit, where The wafer (1) has at least one contact area (3) so as to be able to be connected by an contact element (4) to an internal contact area (7) disposed on a side of the carrier (5) facing the wafer (1). ), Which is characterized in that the internal contact area (7) has an opening (11) connected to a conductive adhesive (8) for electrically connecting the internal contact area (7) to the contact element (4). 2. The configuration of item 1 in the scope of patent application is characterized in that the opening is completely surrounded by the internal contact area (7). 3. The configuration of item 1 in the scope of patent application, characterized in that the opening (11) is a groove cut through the internal contact area (7). 4. The configuration according to any one of the foregoing patent applications, characterized in that the gap between the wafer (I) and the carrier (5) is filled with a filling material (10). 5. A carrier element comprising a carrier (5), at least one surface of which has an internal contact area (7), characterized in that the internal contact area (7) has an opening (11). 6. The carrier element as claimed in claim 5 is characterized in that the opening (II) is designed to be as continuous as possible with the carrier (5). 7. The carrier element according to item 5 of the patent application, characterized in that the opening (11) is not cut to the carrier (5) through the internal contact area (7). 8. The carrier element according to any one of claims 5 to 7, characterized in that the opening (11) is completely surrounded by the internal contact area (7). 9. The carrier element according to any one of claims 5 to 7, characterized in that the opening (11) is cut into a groove through the internal contact area (7). This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)
TW091103583A 2001-02-27 2002-02-27 Arrangement with a chip having an integrated circuit and a carrier, and a carrier element TW546808B (en)

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WO2009026998A2 (en) * 2007-08-27 2009-03-05 Att Technology Gmbh Connection of a chip comprising pads and bumps to a substrate comprising metallic strip conductors
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JPS6249636A (en) * 1985-08-29 1987-03-04 Oki Electric Ind Co Ltd Substrate for mounting flip chip
JPH0521523A (en) * 1991-07-17 1993-01-29 Matsushita Electric Works Ltd Semiconductor device mounting substrate
JP3349361B2 (en) * 1996-09-30 2002-11-25 シャープ株式会社 Semiconductor device and manufacturing method thereof
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