546764 A7 _ B7 五、發明說明（） 發明領域： 本發明係有關於半導體之製造方法，特別是有關於具 有、淺溝渠隔離之半導體的製造方法。 發明背景： 隨著半導體工業的進步，積體電路朝著更微小尺寸及 更快的運算速度發展。當積體電路的尺寸日趨微小化之 際’如何有效的進行元件的隔離，是積體電路發展重要的 關鍵。元件隔離結構一般是用來防止可移動的載子（carriers) 從一個半導體元件經由基底流動到週邊的元件。一般元件 隔離結構是利用矽的區域氧化（LOCOS)技術在半導體基底 上形成一層延伸的厚氧化矽層，以獲得低成本且高度穩定 70件隔離結構。然而，以LOCOS方式形成之隔離結構會造 成δ午多的問題，包括可能產生大的内部應力、在場氧化層 周圍造成鳥嘴（bird’s beak)侵蝕等。特別是，當元件縮小 時’鳥嘴侵蝕區域將相對地變大，使得LOCOS結構產生了 尺寸上的瓶頸。 因此目前淺溝渠隔離（Shallow Trench Isolation; STI) 技術製作主動區域之間的絕緣結構已逐漸被普遍採用。STI 結構的形成通常是先在半導體基底上沉積一層氮化矽層， 然後圖案化此氮化矽層形成硬罩幕。接著蝕刻基底，在相 鄰的元件之間形成陡峭的溝渠。最後，在溝渠中填入氧化 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐) (tr先閲讀背面之注意事項再場寫本頁) 、可. 線-參 經濟部智慧財產局員工消費合作社印製 546764 A7546764 A7 _ B7 V. Description of the invention () Field of the invention: The present invention relates to a method for manufacturing semiconductors, and more particularly to a method for manufacturing semiconductors with shallow trench isolation. Background of the Invention: With the advancement of the semiconductor industry, integrated circuits are moving towards smaller sizes and faster computing speeds. When the size of integrated circuits is becoming smaller, how to effectively isolate the components is an important key for the development of integrated circuits. The device isolation structure is generally used to prevent movable carriers from flowing from a semiconductor device to a peripheral device through a substrate. The general device isolation structure is to form a layer of thick silicon oxide layer on the semiconductor substrate by using silicon area oxide (LOCOS) technology to obtain a low-cost and highly stable 70-piece isolation structure. However, the isolation structure formed by the LOCOS method will cause many problems such as the possibility of large internal stress and the erosion of the bird ’s beak around the field oxide layer. In particular, as the component shrinks, the area of the 'bird's beak erosion will become relatively large, causing a size bottleneck in the LOCOS structure. Therefore, Shallow Trench Isolation (STI) technology is currently used to make insulation structures between active areas. The STI structure is usually formed by depositing a silicon nitride layer on a semiconductor substrate, and then patterning the silicon nitride layer to form a hard mask. The substrate is then etched to form steep trenches between adjacent components. Finally, fill the trench with the oxide paper size applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) (tr read the precautions on the back before writing this page), can. Line-Participate in the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by Employee Consumer Cooperatives 546764 A7
物形成兀仵隔離〜α π 〃、 h、、、衣狂m LUC：〇S製程擁有車六 0C先閱讀背面之注意事項再填寫本頁j 佳的隔離特性，然而由於電毁破壞，可產生大量的蝕刻： 陷，且具·#尖銳角落的陡崎溝渠也會導致角SS漏電产 (C〇rner parasitic leakage),因而降低 STI 的隔離特性。 因此如何在簡化STI製程中，仍能維持淺溝渠的隔離 的特性’為積體電路廠商所努力的方向。其料導體的製 造及進步，無可置疑的提供了重要的貢獻。 發明目的及概述 鑒於 渠會導致 降低，如 性，為積 本發 法，使淺 本發 法，且維 根據 之製造方 材中形成 溝渠形成 基材之表 利用第一 經濟部智慧財產局員工消費合作社印製 落的陡峭溝 離特性因而 的隔離的特 離之製造方 離之製造方 渠隔離結構 材，並在基 之方法，使 ，在溝渠及 氧化矽層。 方形成一第 上述之發明背景中，因為具有尖銳角 角落寄生漏電流等現象，使STI的隔 何能簡化STI製程，且能維持淺溝渠 體電路廠商所努力的方向。 明的目的之一，係利用簡化淺溝渠隔 溝渠隔離之製造更為簡易而有效。 明的再一目的，係利用簡化淺溝渠隔 持淺溝渠良好的隔離的特性。 以上所述之目的，本發明係一種淺溝 法，包含下列步驟：首先，提供一基 一溝渠，且利用控制蝕刻氣體之成分 圓滑的底部角落。再利用熱氧化製程 面形成一具有圓滑的頂部角落之第一 離子植入製程，在第一氧化矽層之下 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公楚) 546764 A7Isolation of material formation ~ α π 〃, h ,,, and 狂 m LUC: 〇S process has a car 60C Read the precautions on the back before filling in this page j Good isolation characteristics, but due to electrical damage, it can produce A large number of etchings: subsidence, and steep corner trenches with sharp corners will also lead to corner SS leakage (Corner parasitic leakage), thereby reducing the isolation characteristics of STI. Therefore, how to maintain the isolation characteristics of shallow trenches in the simplified STI process is the direction that integrated circuit manufacturers strive. The manufacture and progress of its material conductors undoubtedly provide important contributions. The purpose and summary of the invention In view of the fact that the channel will lead to a reduction, such as the method of accumulating capital, making the method of shallow capital, and maintaining the table of channels and substrates in the manufacturing square material, use the employees of the Intellectual Property Bureau of the First Ministry of Economy to consume The cooperative prints the characteristics of the steep trench separation and thus isolates the manufacturing of the special trenches. The manufacturing methods of the trench isolation structures are based on the methods used in the trenches and silicon oxide layers. In the background of the invention described above, because of the phenomenon of parasitic leakage current at sharp corners and corners, the isolation of the STI can simplify the STI process and maintain the direction of the shallow trench body circuit manufacturers. One of the goals of the Ming Dynasty was to make the manufacture of shallow trenches more simple and effective. Another purpose of the Ming Dynasty is to make use of simplified shallow trenches to maintain good isolation of shallow trenches. For the purposes described above, the present invention is a shallow trench method, which includes the following steps: First, a trench is provided, and the bottom corner of the etched gas is controlled to be smooth. The thermal oxidation process is used to form a first ion implantation process with a smooth top corner, under the first silicon oxide layer. The paper size applies the Chinese National Standard (CNS) A4 specification (210x297). 546764 A7
五、發明説明（） 一離子植入區。沈積一第二氧化矽層於第一氧化矽層上方 及溝渠之中。化學機械研磨第二氧化石夕層及第一氧化石义 層，至第一離子植入區上方之第二氧化矽層及第一氧化矽 層達到一預定的總厚度時停止。再利用第二離子植入製 程’將第一離子植入區局部形成一第二離子植入區。最後， 再清洗第一氧化矽層及第二氧化矽層至第二離子植入區， 使露出第二離子植入區。其中上述之形成溝渠的方法係使 用在基材上形成一圖案化光阻層後，再以圖案化光卩且層為 罩幕，非等向性蝕刻基材，以形成上述之溝渠。而第一# 子植入製程一般使用P型離子植入製程；而第二離子植入 製程一般使用N型離子植入製程。 因此，本發明之淺溝渠隔離結構的製造方法，形成具 有圓滑角落之淺溝渠隔離結構，降低因為角落效應所造成 的漏電流。更不需要使用到氮化石夕（S i Π c ο η N i 11* i d e)，可"避 免庫依效應（Kooi Effect)，而導致的氮氧化矽再沉積的問 題。且更可省略傳統STI製程中之犧牲氧化層（Sacrificial Oxide ; SAC Oxide) ’因此，對STI製程的簡化提供了重要 的貢獻。 ϋ I ϋ 線.· 經濟部智慧財產局員工消費合作社印製 列 之 下 例 以 施 輔 實 中 佳 字 較 文 一 明 之 說 明 之 發 後 本 往 示 於：繪 將中係 例其圖 施，Ε 實述一 佳闡第 : 較的至 明 的細圖 說 明詳 A 單 發更一 簡 本做第 式 形 圖 圖 本紙張尺度適用中國國家標準(CNS)A4規格(210X 297公釐) 546764 A7 B7 五、發明説明（） 製程剖面示意圖。 圖號對照說明： 100 基材 1 10 光阻 1 15 溝渠 120 圓滑角落 130 圓滑角落 140 氧化層 150 P型離子植入區 170 P型離子植入 180 氧化矽層 190 N型離子植入區 200 氧化^夕層 210 P型離子植入區 220 N型離子植入 (_請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 發明詳細說明： 由發明背景說明中可知，雖然STI製程比LOCOS製程 擁有較佳的隔離特性，但由於蝕刻缺陷及具尖銳角落的溝 渠，都會造成STI隔離性能的降低。因此如何在簡化STI 製程中，仍能維持淺溝渠的隔離特性，為積體電路廠商所 努力的方向。 本發明提供一種淺溝渠隔離之製造方法，不僅簡化淺 溝渠隔離製程之步驟，更具有圓滑的淺溝渠剖面輪廓，使 淺溝渠有效的隔離元件及電路，更使積體電路的生產更為 有效及穩定。 以下將以圖示及本發明之較佳實施例，詳細說明本發 本紙張尺度適用中國國家標準(CNS)A4規格(210X 297公釐) 546764 A7 B7 五、發明説明（） 「請先閱讀背面之注意事項再填寫本頁) 明之精神’如熟悉此技術之人員在瞭解本發明之較佳實施 例後’當可由本發明所教示之技術，加以改變及修飾，其 並不脫離本發明之精神與範圍。第—A至一G圖為本發明 之—較佳實施例之製程剖面示意圖，其說明利用本發明之 淺溝渠隔離的製造流程。 如第一 A圖中所示，首先提供一半導體基材1〇〇，然 後在基材1〇〇上形成圖案化光卩且層11〇。接著再以圖案化 光阻層為罩幕，進行非等向性乾钱刻製程，例如是反應性 離子蝕刻（RIE)，對基材1〇〇進行蝕刻，以形成-溝渠115, 並利用蝕刻氣體成分的改變，使溝渠115之底部具有圓滑 角落120之剖面輪廓。 線丨· 經濟部智慧財產局員工；消費合作社印製 請參照第- B圖，去除光阻層|，利用熱氧化技術， 在溝渠115的側壁與底部形成出一氧化層14〇。由於光阻 ho去除後所留下的具有銳角形狀的溝渠115頂部，也因 為銳角所造成之能量集中，而在内側形成圓滑角落13〇。 因此，此時溝渠H5之周圍均形成内部平滑的氧化層14〇。 再請參照第一 c圖，如圖中所示，利用p型離子植入17〇 於半導體基材1〇〇中進行離子植入，用以形成位於上述熱 氧化技術所形成之氧化層140之下方的一 p型離子植入區 150。而上述之p型離子植入區15〇在内部平滑的氧化層 140下方，形成具有平滑剖面輪廓的p型離子植入區“ο。 請參照第一 D圖，以高密度電漿化學氣相沉積 (HDP-CVD)在溝渠及氧化層14〇的上方形成HDp氧化矽 層1 80，以作為淺溝渠隔離結構。然後使用化學機械研磨 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公楚) 546764 A7 B7 五、發明説明（） (CMP)或回钱刻（Etch Back)製程，去除P型離子植入區15〇 上方之氧化層140及氧化矽層丨80至約2〇〇埃至3〇〇埃， 形成一平坦之表面。 (_請先閲讀背面之注意事項再場寫本頁} 請參照第一 E圖，接著再以N型離子植入22〇，在p 型離子植入區150中形成N型離子植入區ι9〇。因此，原 先之P型離子植入區150被分為N型離子植入區19〇及p 型離子植入區2 1 0兩種離子植入區。再利用清洗製程，將 主動區’例如N型離子植入區190，上方之殘留的氧化石夕 加以去除，使主動區露出。其中清洗製程一般可使用濕式 及/或乾式蝕刻進行。而溝渠中形成之氧化矽層i 8 〇與氧化 層1 4 0則共同形成氧化矽層2 0 0，以形成淺溝渠隔離結構。 綜上所述，利用本發明之淺溝渠隔離結構的製造方 法’可以形成具有圓滑角落之淺溝渠隔離結構，減少因為 角落效應所造成的漏電流。且並不需要使用到氮化石夕，可 避免庫依效應導致的氮氧化矽再沉積的問題。且本發明之 方法更可省略傳統STI製程中之犧牲氧化層，因此，對sti 製程的簡化提供了重要的貢獻。 經濟部智慧財產局員工消費合作社印製 如熟悉此技術之人員所瞭解的，以上所述僅為本發明 之較佳實施例而已，並非用以限定本發明之申請專利範 圍；凡其它未脫離本發明所揭示之精神下所完成之等效改 變或修飾，均應包含在下述之申請專利範圍内。 7 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐)5. Description of the invention () An ion implantation area. A second silicon oxide layer is deposited over the first silicon oxide layer and in the trench. The chemical mechanical grinding of the second oxide layer and the first oxide layer stops when the second silicon oxide layer and the first silicon oxide layer above the first ion implantation region reach a predetermined total thickness. Then, a second ion implantation process is used to locally form a second ion implantation region in the first ion implantation region. Finally, the first silicon oxide layer and the second silicon oxide layer are cleaned to the second ion implantation region, so that the second ion implantation region is exposed. The method for forming a trench described above is to form a patterned photoresist layer on a substrate, and then pattern the photoresist with the layer as a mask. The substrate is anisotropically etched to form the trench. The first # sub-implantation process generally uses a P-type ion implantation process; the second ion-implantation process generally uses an N-type ion implantation process. Therefore, the manufacturing method of the shallow trench isolation structure of the present invention forms a shallow trench isolation structure with smooth corners to reduce the leakage current caused by the corner effect. Moreover, it is not necessary to use nitride nitride (S i Π c ο η N i 11 * i d e), and the problem of redox deposition of silicon oxynitride caused by the Kooi effect can be avoided. Moreover, the sacrificial oxide (SAC Oxide) in the traditional STI process can be omitted ′. Therefore, it provides an important contribution to the simplification of the STI process. ϋ I ϋ Line. · The following example is printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. The example of Shi Fushi ’s Zhongjia word and the plain text is published in the following: A good explanation: a more detailed detailed picture description A single issued a more simplified version to make a figure-shaped figure This paper size applies to China National Standard (CNS) A4 specifications (210X 297 mm) 546764 A7 B7 V. Description of the invention () Process cross-section schematic diagram. Comparative description of drawing numbers: 100 substrate 1 10 photoresist 1 15 trench 120 smooth corner 130 smooth corner 140 oxide layer 150 P-type ion implantation zone 170 P-type ion implantation 180 silicon oxide layer 190 N-type ion implantation zone 200 oxidation ^ Xi layer 210 P-type ion implantation area 220 N-type ion implantation (_Please read the notes on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economics Detailed description of the invention: It can be known from the background description of the invention Although the STI process has better isolation characteristics than the LOCOS process, the STI isolation performance will be reduced due to etching defects and trenches with sharp corners. Therefore, how to maintain the isolation characteristics of shallow trenches in the simplified STI process is the direction that integrated circuit manufacturers work hard. The invention provides a manufacturing method for shallow trench isolation, which not only simplifies the steps of the shallow trench isolation manufacturing process, but also has a smooth shallow trench section profile, which enables the shallow trench to effectively isolate components and circuits, and makes integrated circuit production more efficient and stable. The following will illustrate the paper and the preferred embodiment of the present invention in detail to explain the paper size of this publication to the Chinese National Standard (CNS) A4 specifications (210X 297 mm) 546764 A7 B7 V. Description of the invention () "Please read the back (Please note that this page is to be completed on this page) The spirit of "if a person familiar with this technology understands the preferred embodiment of the present invention" should be changed and modified by the technology taught by the present invention without departing from the spirit of the present invention And ranges. Figures A through G are schematic cross-sectional views of the manufacturing process of the preferred embodiment of the present invention, which illustrate the manufacturing process using the shallow trench isolation of the present invention. As shown in the first A figure, a semiconductor is first provided. The substrate 100, and then a patterned photoresist and a layer 11 are formed on the substrate 100. Then, the patterned photoresist layer is used as a mask to perform an anisotropic dry money engraving process, such as reactive Ion etching (RIE) etches the substrate 100 to form -ditch 115, and uses a change in the composition of the etching gas to make the bottom of the trench 115 have a cross-sectional profile of a rounded corner 120. Line 丨 · Member of Intellectual Property, Ministry of Economic Affairs Printed by the consumer cooperative, please refer to Figure-B, remove the photoresist layer |. Using thermal oxidation technology, an oxide layer 14 is formed on the side wall and the bottom of the trench 115. Due to the At the top of the acute-angled trench 115, a smooth corner 13 is formed on the inside due to the energy concentration caused by the acute angle. Therefore, at this time, an internal smooth oxide layer 14 is formed around the trench H5. Please refer to FIG. As shown in the figure, p-type ion implantation 17 is used to perform ion implantation in a semiconductor substrate 100 to form a p-type ion implantation under the oxide layer 140 formed by the thermal oxidation technology. The implantation region 150. The p-type ion implantation region 150 described above forms a p-type ion implantation region "o with a smooth cross-sectional profile under the smooth inner oxide layer 140. Referring to FIG. 1D, a high-density plasma chemical vapor deposition (HDP-CVD) is used to form a HDp silicon oxide layer 1 80 over the trench and the oxide layer 14 as a shallow trench isolation structure. Then use chemical mechanical grinding to apply this paper to Chinese National Standard (CNS) A4 specifications (210X297). 546764 A7 B7 V. Description of Invention (CMP) or Etch Back process to remove P-type ion implantation The oxide layer 140 and the silicon oxide layer over the region 150, from 80 to about 200 angstroms to 300 angstroms, form a flat surface. (_Please read the precautions on the back before writing this page} Please refer to the first E diagram, and then use N-type ion implantation 22 to form an N-type ion implantation region 150 in the p-type ion implantation region 150. 〇. Therefore, the original P-type ion implantation region 150 is divided into two types of ion-implantation region 19 and p-type ion implantation region 210. The active region is reused by the cleaning process. For example, in the N-type ion implantation region 190, the remaining oxide stone above is removed to expose the active region. The cleaning process can generally be performed by wet and / or dry etching. The silicon oxide layer i 8 formed in the trenches. A silicon oxide layer 200 is formed together with the oxide layer 140 to form a shallow trench isolation structure. In summary, the manufacturing method of the shallow trench isolation structure of the present invention can form a shallow trench isolation structure with rounded corners. , Reduce the leakage current caused by the corner effect, and do not need to use nitride stone, can avoid the problem of redox deposition of silicon oxynitride caused by the Courier effect, and the method of the present invention can also omit the sacrifices in the traditional STI process Oxide layer, so, right The sti simplification of the process provides an important contribution. The printing by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, as understood by those skilled in the art, the above is only a preferred embodiment of the present invention and is not intended to limit the invention The scope of the patent application; all other equivalent changes or modifications made without departing from the spirit disclosed in the present invention shall be included in the scope of the patent application described below. 7 This paper size applies to China National Standard (CNS) A4 specifications ( 210X297 mm)