TW536738B - Multi-layer photoresist lithography and method for forming dual damascene openings by the same - Google Patents

Abstract

There is provided a method for forming dual damascene openings by multi-layer photoresist lithography, which includes: depositing a dielectric layer on a semiconductor substrate; forming a plurality of via holes on the dielectric layer; forming a first photoresist layer covering on the semiconductor substrate to fill up the plurality of via holes thereby forming a planar surface; forming a second photoresist layer on the first photoresist layer, wherein the second photoresist layer is formed by Si-containing material; forming a third photoresist layer on the second photoresist layer; irradiating the third photoresist layer by high-energy light beam to define a trench pattern above the plurality of via holes; developing the third photoresist layer to form a mask with a trench pattern; using the trench pattern of the third photoresist layer as a mask to etch the second photoresist layer; using the third and the second photoresist layer as a mask to etch the second photoresist layer; using the third and the second photoresist layer as a mask to etch the first photoresist layer; using the first photoresist layer as a mask to etch the dielectric layer to form a trench; and removing the first photoresist layer to form an dual damascene opening with via hole and trench.

Description

536738 /

FIELD OF THE INVENTION The present invention relates to a semiconductor resistive system, and more particularly to a method of using dual damascene to open π. BACKGROUND OF THE INVENTION Process' is particularly related to the photolithography process of multiple photoresist layer lithography to form a dual damascene method.

In the development of semiconductor technology, optical lithography (1) (110th ratio (Hthography)) mainly affects the critical dimension (criucai Dimension, CD) of semiconductor elements. With the increase of the degree of integration of semiconductor elements, the line width requirements of semiconductor elements are becoming smaller and smaller, and the control of key dimension (CD) is becoming increasingly important. In the lithography process, because there is a step difference in the pattern on the wafer surface, when the photoresist is covered on the wafer surface, the thickness of the photoresist layer will vary with the photoplanarization characteristics .

In U.S. Patent Publication No. 4481 049, the superiority of the dual-layer (1) 1_1acr ”) photoresist system for dual damascene process applications is proposed. The dual-damascene structure is mainly on the dielectric layer of the substrate. Trench openings with via holes and interconnecting patterns are first made, and then the vias and interconnecting pattern trenches are filled with a conductive material to complete the metal plugs at the same time (Plug) and metal interconnect structure, to achieve the effect of the process steps. The advantages of the double-layer photoresist system, mainly to solve the problem of planarization of the via hole and the resistance to etching encountered by the double-drilled opening. 1A to 1D illustrate a conventional process for forming a dual trench etch using a double-layer photoresist system. Referring to FIG. A, a dielectric layer 102 is deposited on a semiconductor substrate 100. , And the dielectric layer 102 has

536738 V. Description of the invention (2) 2 layers to expose the semiconductor substrate underneath. The double-layer photoresist system ^ 3 is a large bottom photoresistor 104, which is used to fill the dielectric layer 102's interposer hole 'shape ^-to planarize the surface. On the bottom photoresist 104, a top thickness photoresist 1G6 is formed, which serves as the main image iayer for lithography exposure and development. Such a top-layer photoresist 106 is generally a Si-containing Phresist. Then, a lithography process is performed on the resist 106, and the pattern of the grooves formed by exposure and development is used as a mask to remove the undeveloped parts by wet etch (Uwet etch), and then see the figure 1B. The top photoresistor 10 of the predetermined pattern is a curtain cover, and then the bottom photoresistor 104 is etched by dry etch to obtain the same trench pattern. j Next, referring to FIG. ic, the bottom photoresist 10 is used as a screen cover, and the trench of the power-in layer 102 is etched. During the etching process, the top photoresist and the bottom photoresist 1 0 4 may be Also removed. Finally, referring to FIG. 1D, after the underlying photoresist layer is removed, an opening structure coexisting with a trench and a via hole is formed between the electrical layers 102, and the subsequent filling of the metal conductive material can be continued. Although the double-layer photoresist has many advantages, its development is limited by the development progress of the top photoresist layer 106. Because the top layer of the double-layer photoresist must be made of Si-containing Phresist as the image layer for exposure and development. Therefore, with the lithography technology ^ step, the line width is becoming smaller and smaller, this image layer also needs to be selected to match the lithography wavelength with stone-containing photoresist. Due to the special f limit of Shixi containing photoresist materials,

0503-7576TWF (N); TSMC2001-1127; Paggy.ptd 5. Description of the invention (3) The length of 248 / zm, i9g is not necessarily synchronized with the advancement of #m, and the generation resistance system containing silicon photoresistive materials lacks suitable: In the silicon lithography process, the double-layer light is limited. 3 The silicon pre-resistance material can be selected, so its application is also briefly described in the invention. In order to solve the photolithography of the multi-photoresist layer, a purpose of the present invention is to provide a good photolithography. The product f can retain the advantages of the double-layer photoresist system, and another object of the same month is to provide a method of forming a double mosaic opening by using multiple light and shadow modes. According to the present invention, a substrate surface is formed according to the present invention: a method; a method for covering a semiconductor substrate on a semiconductor substrate, and forming a first photoresist layer to form a second photoresist layer surface. On the first photoresist layer) material; opened on the second photoresist layer; the resist layer is silicon-containing (Si-containing second photoresist U) a photoresist layer; a high-energy light beam shines on Hedingle The first layer II is formed to form a mask with a predetermined pattern; the resist layer is developed to use a first photoresistor; the first photoresist layer is used to etch the first photoresist. The layer is a curtain, and the semiconductor HA f * u is engraved into the predetermined pattern; and the semiconductor substrate that is opened by the conductor pattern is removed; the resist layer is removed to form the substrate having the In addition, the present invention also provides a method for forming dual damascene openings. The bank layer is used on the semiconductor substrate 22: the dielectric of the product factory; the formation of a plurality of interlayer holes (Via) on the power increase page 6 0503-7576TWF ( N) * TSMC2001-1127; Paggy.ptd 536738 5. Description of the invention (4) The first photoresist layer is filled with a plurality of interlayer holes on the bottom. , Its ng) material; forming a third light to irradiate a third photoresist layer to develop the third photoresist layer; the groove pattern of the photoresist layer is the second photoresist layer as a curtain cover, and the etching cover is an etching medium The electrical layer is formed to form a hole and a trench with a dielectric layer. A third photoresistive reflective layer (bottom is better for lithography. In general, it is 1000A, and the thickness of the first and second photoresist layers is large.) Roughly 3000 to 5000′-th formation of 4-> n and the formation of a layer covering the second photoresist layer in the semiconductor substrate: 20% of the second photoresist layer on the second photo ^: --Conntaini Determined above the number of interlayer holes; t, a groove pattern is defined by A ++ since the surface energy beam; /, a curtain cover with a groove pattern; in the first column 箆: the second photoresist layer is engraved; Three and ί :: Photoresistive layer; the first photoresistive layer is used as the curtain / two and two, and the first photoresistive layer is removed, and the openings are double embedded. In the above method, one step can be included] A bottom anti-reflection iayer is formed on the second photoresistive layer to obtain a better case. The thickness of the bottom anti-reflective layer is about 3000. A body is 1000 to 6000 2〇〇〇A between A third photoresist layers. In the first method, the development of the third photoresist layer may be wet development, and the etching of the first photoresist layer and the first photoresist layer may be performed by dry etching. In a preferred case, the first photoresist layer may be an organic polymer material, and the second photoresist layer is a silicon resin (Si 1 icone resin) or a silicon oxide resin. The third photoresist layer may be an organic polymer material. Embodiment 1 The following is a description of Figs. 2A to 2G.

〇503-7576TWF (N) * TSMC2001-1127; Paggy.ptd Page 7 536738 t V. Description of the invention (5) The interlayer hole (v 丨 a) is formed by the layer photoresist lithography method. First, referring to FIG. 2A, a semiconductor substrate 200, such as a silicon substrate, is provided with components and interconnects formed thereon. For simplicity, only a flat substrate is shown here. On the substrate 200, a dielectric layer 202 is deposited. Referring next to FIG. 2B, a first photoresist layer 204 is first filled on the dielectric layer 202. The first photoresist layer 204 is a flat surface formed on the dielectric layer 202. The material may be general organic materials, such as non-lac resin, polyimide resin ( polyimide resin) and so on. The covering thickness may be generally between 3000 and 6000a to form a sufficiently flat surface. Next, a second photoresist layer 206 is formed on the first photoresist layer 204, and the thickness of the beans is significantly smaller than that of the first photoresist layer 204, which is between about 1000 and 2000A. The material of the photoresist layer 20 6 is mainly a silicon-containing material (such as _ materiai), such as sihocone resin or stone oxide resin. Then, a second photoresist layer 206 is formed with a The third photoresist layer 208 has a straight thickness of about 3000 to 5000 A. Since the third photoresist layer is a photoresist layer mainly illuminated by two lithographic beams, the wavelength of the third photoresist layer is matched 'Select resolution (resolitino) can be equipped with: micro: beam ^ photoresist material. For example, if the lithographic beam is deep ultraviolet light (⑽ p, then the material of the third photoresist layer 208 can be selected to correspond to deep ultraviolet light The analytic strength of novolac resin, azide (〇_kynUdiazid based acrylic methyl vinegar (PMMA), etc.) does not need to be limited to the conventional photoresist. The top photoresist needs to be a silicon-containing photoresist.糸 System M 0503-7576TWF (N); TSMC2001-1127; Paggy.ptd page 8 536738 r 5. Description of the invention (6) f In the best case, Before the three photoresist layer 208 is formed, a bottom anti-reflection layer (bottom soil = iiectlon coating, BARC) can be formed on the first resist layer 206 (not shown to provide better lithographic quality. Gί Poria see Figure 2C, lithography with high-energy beams, and-light Jiang Yanji & irradiate the third photoresist layer 208 to define the interstitial hole area. Then the mask, > Resist layer 2 〇8 Wet development is performed to form a mask with a via hole pattern, as shown in FIG. 2D, and a predetermined pattern of the third photoresist layer 208 is used as the curtain 21 photoresist layer 20 6 to form a via hole pattern. The photoresist layer can be etched using a dry etch method. For the cover, see 2ΕΚΙ 'Using the third and second photoresist layers 208 and 206 as the curtain layer, "form a via hole pattern. The first-photoresist The noise of the layer 204 is corrected, such as plasma etching. After completing the first photoresist, m, an etching composed of the first, second and third photoresist layers (204, 20 6 and 208) is formed. Dielectric ^ 2 See also 幵 2V uses the above-mentioned multilayer photoresistor as the drape, ㈣ etched into 4 ΛΛ Λ Dielectric layer 2 02 can be etched using dry type The first sun is 9ny | a. First, the younger-the first resistance layer (208 and 206) and the knife, / the first resistance layer 204 will be etched away. Finally, see Figure 2G, in the dielectric layer 2 The second photoresist layer 204 is removed after the formation of SiO2, and the formation of the second photoresist layer is generally characterized in that the third photoresist layer 208 is used instead of the conventional Shixi top photoresist as the imaging layer of the optical lithography. I ··, page 9 503-75767W (N); TSMC20〇M127; paggyptd 536738 V. Description of the invention (7) = This photoresistor can choose any photoresistor that can match the wavelength of the lithographic beam = 丄 No need Limited by the development of silicon-containing photoresist materials, it still achieves the advantages of another layer of photoresist systems. Embodiment 2 The following describes the flow of a method for forming a dual damascene opening by fA photoresist lithography in one embodiment according to the present invention with reference to FIGS. 3A to 3F. First, the second figure i provides a semiconductor substrate 300, such as a silicon substrate, on which = components and interconnections are formed. To simplify the illustration, only a flat M substrate 300 is drawn here. A dielectric layer 302 is used to form a plurality of “vla” 30 in the dielectric layer (refer to the method described in the first embodiment). The dielectric layer 302 is first filled with a first photoresist layer 304. The first photoresist layer can completely fill the undulated dielectric layer 3002 'to form a flat surface. The material of the photoresist layer 304 can be a general organic material, such as a phenolic resin (noon). lac resin), polyurethane resin = ylmide resin), etc., and its covering thickness can be generally between 3000 and 6000 A to form a sufficiently flat surface. Then in the first photoresist layer 3G4 The second photoresist layer 3Q6 is formed on the top, and the thickness of the pot is significantly smaller than that of the first photoresist layer 304, which is between about 1000 and 2000A. The material of the second photoresist layer 306 is mainly Silicon-containing materials (Si_containi materiaU 'such as silicone resin or silicon oxide resin, etc.) followed by the second photoresist layer 3 A third photoresist layer 3008 is formed on 6 with a thickness of about 300 to 5000 A. Since the third photoresist layer is irradiated by two lithographic beams, the third Photoresist

536738 V. Description of the invention (8) The wavelength of the shirt beam is matched, and the media is prepared to fix the soil, and the resolution can be matched with the material. "Resistance…… if the lithographic beam is deep ultraviolet light" knee The material of the Dan ^ layer 308 can be selected to correspond to the resolution of deep ultraviolet light.

=; (_01 one in), azide (.-kyniadiazide), or J # ^ s I Special 4, which does not need to be limited to the conventional double photoresist system. The top photoresist needs to be a silicon-containing photoresist material. Flute-i "if in the case, 'Before the third photoresist layer 308 is formed, a bottom anti-reflection layer (BARC) (not shown) can be formed on the second photoresist layer 06 to provide better lithographic quality. I see the high-energy light beam for the lithography process in FIG. 36, and the third photoresist layer 308 is irradiated with -light 1 screen to define the trench above the via 30, and then the third photoresist layer 308 is performed. Wet development to form a curtain cover with a groove pattern. 着 L Seeing the first figure, the groove pattern of the third photoresist layer 308 is used as a curtain cover 'Qiankedi photoresist layer 30 6' to form a groove. Groove pattern. The second photoresist layer can be etched using a dry etch method. = Writing ^ 3D, with the third and third photoresist layers 3 08 and 3 06 as the curtain: : Photoresist layer 304 to define the trench-first resist layer 304 in the first photoresist layer 304. The etching of the dry layer 304 can be performed by using a dry etching method, such as "^^^ 成 成 一 photoresist layer 3 0 4 After the etching, an etch mask composed of the first and second photoresist layers (304, 306, and 30) is formed. 0 ^ t ^ 30 2 .1 mo1? /

536738 V. Insect engraving of invention description (9) can use dry type I insect resistance layer (308 and 306) and its removal. Finally, referring to FIG. 3F, the groove 32 of the interconnecting line has an interlayer hole 30 opening. In the above method, the content of a general double photoresist system is therefore optional for the third photoresist. Advantages of Shixi double-layer photoresist system According to the above description, the conventional double-layer photoresistance system is retained, but because the lithography technology is improved in the double-layer photoresistance system, the photoresist-containing top layer photoresist is selected. The present invention uses any layer that can be placed in the double-layer photoresist system. Time, the development timeline of the photoresist material of the double-layer photoresist system. Although the present invention is based on the present invention, within any familiarity and scope, when it can be done = 2, and when etching, 'the third and second light knife brother light The resist layer 304 will be etched to the top of the dielectric hole 30 of the j dielectric layer 30 2 in the inside :: Then the -photoresist layer 30 will be removed to form a double damascene structure with an opening of the line trench 32 . It is characterized by the use of the stem-earth phase resist layer 308 instead of the vertical θ photoresist as the imaging layer of the photomask lithography. The development of photoresistance materials that can match the wavelength of lithography beams :: 2, but at the same time Still reached. … For semiconductor substrates with unevenness: the advantages of multi-layer photoresist lithography in January are the advantages of wire 1 layer Phot (resistance), pendulum: photoresist layer for layer image, so / 2 is smaller In the lithographic beam, even if the double-layer symbol ϊ is used as the resolution material, it can still be supplied according to the second T, the resolution required by the shadow beam. Hunting this, the same in the advancement of lithography technology. · It can be applied immediately, without being limited to the above-mentioned silicon. However, it is not used to limit it. ☆, it can be moved and retouched without departing from the spirit of the invention. Therefore, the protection scope of the invention is 536738. 2. Description of the invention (ίο) The definition of the scope of the patent application attached shall prevail

IBB Page 13 0503-7576TWF (N); TSMC2001-1127; Paggy.ptd 536738 The diagram is briefly explained. In order to make the above-mentioned objects, features, and advantages of the present invention more obvious and easy to understand, the following details are given in conjunction with the accompanying drawings. The description is as follows: Figures 1A to 1D show the process of forming a double-damascene trench opening using a conventional double-layer photoresist system. Figures 2A to 2G show a method flow for forming a via hole in a multi-layer photoresist lithography according to an embodiment of the present invention. Figures 3A to 3F show a method for forming a dual damascene opening by multilayer photoresist lithography according to one embodiment of the present invention. Symbols 100 ~ semiconductor substrate; 102 ~ dielectric layer; 104 ~ Bottom photoresist; 106 to top photoresist; 200 to semiconductor substrate; 202 to dielectric layer; 204 to first photoresist layer; 206 to second photoresist layer; 208 to third photoresist layer 300 ~ semiconductor substrate; 302 ~ dielectric layer; 304 ~ first photoresist layer; 306 ~ second photoresist layer; 308 ~ third photoresist layer; 30 ~ via hole;

0503-7576TWF (N); TSMC2001-1127; Paggy.ptd Page 14 536738 The diagram briefly explains 32 to the groove. inn page 15 0503-7576TWF (N); TSMC2001-1127; Paggy.ptd

Claims (1)

536738 6. Scope of patent application 1. A multilayer photoresist lithography method, which is applicable to the surface of a semiconductor substrate to form a predetermined pattern, the method includes: forming a first photoresist layer to cover the semiconductor substrate to form a flat surface Forming a second photoresist layer on the first photoresist layer, wherein the second photoresist layer is a Si-containing material; forming a third photoresist layer having the predetermined pattern on The second photoresist layer is engraved with a cover # 幕 #, so that the cover layer is a layer of light, a layer of light, a layer of light, a light block, a light block, and a light block. With this and this, the layer is in a resistive shape, and the light is layered with a mass to block the base light. The body is engraved to guide the #half body to guide the case. • In this case, in addition to the above description of the basic base square shadow micro-light-blocking layer, the first case of the first case, Fan Dingli, should be applied for in accordance with the application form. The plan of the third layer of light blocking should be both • The upper layer forms a blocking layer: the second step of the photoresist is the third column, the second row of the lower layer blocks the more light beam in the layered package, and the first step of the three light steps can be formed into a layer and a curtain. The plan is to have a shape to shadow the travelling layer of light blocking. The third layer should cover.] The shadow layer of the fan layer is specifically designed to block the light. Please apply for three applications according to the root. Explicit wet behavior 0503-7576TWF (N); TSMC2001-1127; Paggy.ptd page 16 patent application scope ______ 4: · root cause ▲ main reason, of which Qian Kewei multilayer photoresist lithography party described in item 1 5 According to application 2: ί! Is carried out by dry narrative. Among them, the etching of the multilayer photoresist lithography party described in item No. 1 of Sect. 6. According to Shen Er—The photoresist layer is dry-etched. Among them, the number: light :: multilayer photoresist lithography party described in item 1. 7. The specificity according to the application is generally 3_ to _Α. , Wherein the second photoresist is the multilayer photoresist lithography described in item 1. 8. According to the application: ^ 1 degree is generally 10 °° to 2 °°° A. Wherein, the multilayer photoresist lithography method described in the #-# Liweidixiang item q " Xi i by two photoresist layer thickness is generally 30 0 to 5 0 0 0 A 0, where χ ΐ! Ϊ ^ The multi-layered photoresist lithography method described in item 1 of the scope of interest ^ I #Step: before the formation of the third photoresist, 'before the ninth: wide-formed-bottom anti-reflection layer. Li: According to item 9 of the scope of patent application, as much as κ% resistance to lithography party ’, ^ bottom. The thickness of the anti-reflection layer is approximately 1000A. 11 · The multilayer photoresist lithography according to item 1 of the scope of the patent application, wherein the -photoresist layer is an organic polymer material. 1 2 · The photoresist layer in the multi-layer photoresist lithography party described in item 1 of the scope of the patent application is a silicon resin. 1 3 · Roots > According to claim 1 of the patent scope In the multilayer photoresist lithography method, the third photoresist layer is an organic polymer material. 14. A method for forming a double mosaic opening, which is suitable for a semiconductor substrate, includes: Depositing a dielectric layer on the semiconductor substrate 536738 6. The scope of the application for a patent forms a plurality of dielectrics on the dielectric layer, ', ask C v 1 a); forming a first photoresist layer to cover the vitality of Basheng η comes from a witch like a child ... + The conductor substrate is filled with the plurality of via holes to rise / planarize the surface; a second photoresist layer is formed on the photoresist layer. A ^ ^ a photoresist layer, wherein the second photoresist layer It is a Si-containing material. A second photoresist layer is formed on the second photoresist layer; a layer; and a groove pattern of the third photoresist layer is formed. As the curtain, #etch the second photoresist with the third and second photoresist layers as the curtain, and etch the first photoresist layer; with the first photoresist layer as the curtain, etch the dielectric layer to Forming a trench; removing the first photoresist layer to form a double damascene opening with the via hole and the trench. ', 15. According to the method for forming a dual damascene opening according to item 14 of the scope of the patent application, wherein the step of forming a third photoresist layer with a groove pattern on the first photoresist layer further includes The following steps: forming a third photoresist layer on the second photoresist layer; irradiating the third photoresist layer with a high-energy beam on the eight holes to define a trench pattern in the plurality of; The curtain of light develops the third photoresist layer to form the groove pattern. 16. The method for forming an upper mosaic opening according to item 14 of the scope of the patent application, wherein the developing system of the third photoresist layer is Wet ",, member π 0503-7576TWF (N); TSMC20〇i] 127; paggy.ptd cover of page 18 0536738 6. Application for patent scope 1 7 · According to the method of patent application scope No. 14 for the method of forming double inlay openings' where The second photoresist layer is engraved with dry money. 18 · The method for forming a dual damascene opening according to item 4 of the scope of the patent application, wherein etching the first photoresist layer is performed by dry etching. 19. The method for forming a dual damascene opening according to item 4 of the scope of the patent application, wherein the thickness of the first photoresist layer is generally 3000 to 6000A. 2 0. The method for forming a dual damascene opening according to item 4 of the scope of the patent application, wherein the thickness of the second photoresist layer is generally 1000 to 2000A. 2 1 According to the method for forming a dual damascene opening described in item 4 of the patent application scope, wherein the thickness of the third photoresist layer is generally 3000 to 5000A. 22. The method for forming a dual damascene opening according to item 14 of the scope of the patent application, which further includes a step of forming a bottom anti-reflection layer on the second photoresist layer before forming the third photoresist. 2 3 · The method for forming a dual damascene opening according to item 22 of the scope of patent application ', wherein the thickness of the bottom anti-reflection layer is approximately 1000A. 24. The method of forming a double-silver-embedded opening according to item 14 of the scope of the patent application, wherein the first photoresist layer is an organic polymer material. 2 5. The method for forming a dual damascene opening according to item 4 of the scope of the patent application, wherein the second photoresist layer is a silicon resin (s i 1 i cone res i η). 26. The method of forming a dual damascene opening according to item 4 of the scope of the patent application, wherein the third photoresist layer is an organic polymer material. 0503-7576TWF (N); TSMC200M127; Paggy.ptd page 19