TW535269B - Electrical device with elastic bumps and method for making the same - Google Patents

Electrical device with elastic bumps and method for making the same Download PDF

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Publication number
TW535269B
TW535269B TW91109981A TW91109981A TW535269B TW 535269 B TW535269 B TW 535269B TW 91109981 A TW91109981 A TW 91109981A TW 91109981 A TW91109981 A TW 91109981A TW 535269 B TW535269 B TW 535269B
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Taiwan
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elastic
substrate
scope
conductive
electronic device
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TW91109981A
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Chinese (zh)
Inventor
John Liu
Yau-Rung Li
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Chipmos Technologies Inc
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Abstract

An electrical device with elastic bumps is disclosed. The electrical device includes a plurality of elastic bumps form on contact pads of a substrate. Each elastic bump has an elastic body forms a through hole. The through hole connects the corresponding contact pad from the upper surface of elastic body. The conductive paste is filled in the through hole for electrically connecting the corresponding contact pads. Thus, the elastic bumps of electrical device are no collapsing at surface mounting to improve electrical connection and absorb thermal stress on mounting interface.

Description

535269 五、發明說明(l) 【發明領域】 本發明係有關於一種具彈性凸塊之電子裝置及其製造 方法,特別係有關於在彈性凸塊之彈性塊通孔内填充形成 有導電膠,以增進電子裝置之電性連接及熱應力吸收。 【先前技術】 習知電子裝置之電性連接方式係有打線接合(wire bonding)及覆日日接 a (flip chip mounting)等等,其 中覆晶接合方式係將晶片以凸塊(bumps )結合至基板,535269 V. Description of the Invention (l) [Field of the Invention] The present invention relates to an electronic device with elastic bumps and a method for manufacturing the same, and particularly relates to a conductive adhesive filled in the through-holes of the elastic blocks of the elastic bumps. To improve the electrical connection and thermal stress absorption of electronic devices. [Prior art] The conventional electrical connection methods of electronic devices include wire bonding, flip chip mounting, and the like. The flip chip bonding method is to combine the chip with bumps. To the substrate,

由於晶片與基板之熱膨脹係數(CTE )不匹配,導致結合 界面產生熱應力,故習知係在晶片與基板間形成填充°材口 (underfilling material )以吸收熱應力,然而隨著封 $晶片的微小化與高密度化,晶片焊點之間距減小,凸塊 回度也降低,增加了填充材形成之難度,且因習知凸塊之 材料夕採用錫鉛、金等金屬,凸塊本體並不具有彈性,常 使結合界面產生之熱應力無法有效地被吸收。Because the thermal expansion coefficient (CTE) of the wafer and the substrate does not match, thermal stress is generated at the bonding interface. Therefore, it is known to form an underfilling material between the wafer and the substrate to absorb the thermal stress. Miniaturization and high density, the distance between the solder joints of the wafer is reduced, and the bump return is also reduced, which increases the difficulty of filling material formation. Because of the known bump material, tin, lead, gold and other metals are used. Without elasticity, the thermal stress generated at the bonding interface cannot be effectively absorbed.

如第7圖所示,在美國專利第6, 〇28, 357號「焊料凸塊 包覆有柱體之半導體裝置」中,揭示一種半導體裝置,其 ,路基板1之表面係形成有導電薄膜2,導電薄膜2上係覆 ^一防焊層3,該防焊層3係具有開口 ,以使導電薄膜2之 :極4露出,在電極4上以印刷方式形成柱狀導電膠5,該 =狀導電膠5係含有銅金屬粉末,加熱固化該柱狀導電膠5 \ :在防焊層3之開口上形成一焊料凸塊7A,該焊料凸塊 =以迴焊(re f 1 ow )方式形成半球狀,以包覆該柱狀導 “ ^ 5,因焊料凸塊7A之材料係為錫鉛合金等,並不具有As shown in FIG. 7, in US Patent No. 6, 028, 357, "Semiconductor Device in which Solder Bumps are Covered with Cylinders," a semiconductor device is disclosed in which a conductive film is formed on the surface of the circuit substrate 1. 2. The conductive film 2 is covered with a solder resist layer 3, which has an opening so that the electrode 4 of the conductive film 2: is exposed, and a columnar conductive adhesive 5 is formed on the electrode 4 by printing. = Conductive conductive paste 5 contains copper metal powder, and the columnar conductive paste 5 is heated to cure. \: A solder bump 7A is formed on the opening of the solder resist layer 3, and the solder bump = reflow 1 (re f 1 ow) Form a hemispherical shape to cover the columnar guide "^ 5, because the material of the solder bump 7A is a tin-lead alloy, etc., does not have

535269 五、發明說明(2) 生在晶片、電路基板 具彈性凸塊之電子裳 性塊,以吸收結合界 有通孔,且導電膠形 連接,因此彈性凸塊 產生崩裂,確保電子 具彈性凸塊之電子裝 性塊,以吸收結合界 有通孔,且導電膠形 連接,因此彈性凸塊 (underf i11i ng )之 具彈性凸塊之電子裝 具有彈性塊,每一彈 導電膠於通孔内時, 電膠能輕易填充於彈 接合時不易產生崩 吸收結合界面產生之535269 V. Description of the invention (2) Electronic skirts with elastic bumps on wafers and circuit substrates, which have through-holes in the absorption bond, and are conductively glued together, so the elastic bumps are cracked to ensure that the electronics have elastic bumps. The electronic assembly of the block has a through hole in the absorption bonding boundary and the conductive glue is connected in a shape, so the electronic package with the elastic bump of the elastic bump (underf i11i ng) has an elastic block, and each elastic conductive glue is in the through hole. When it is inside, the electro-adhesive can be easily filled in the elastic bonding, and it is not easy to produce the collapse interface.

極佳之彈性,因此, 1 β P袓几^ 此 無法有效吸收產 1及知科凸塊7Α間之熱應力。 【發明目的及概要】 本發明之主|〇 #,H i $目的在於提供一種 置 為屢子裝置 ;吝座少為t 味性凸塊係具有彈 成於通孔内,以作c塊係形成 係具有良好彈性f生凸塊之電性 壯審夕& i 在表面接合時不易 裝置之外部電性連接。 置,一!的在於提供-種 ^ ^之彈性凸塊係具有彈 & 0: W力,每一彈性塊係形成 成;k孔内,以作為彈性 係具有良好彈性,以銪儿γ兄 < 也庄 步驟。生以間化形成填充材 著再一目的在於提供-種 置^電子裝置之複數個彈性凸塊係 性塊係形成有通孔與排氣孔,當形成 排氣孔係可排出通孔内之氣體,使導 性塊之通孔内,因此彈性凸塊在表面 裂,不僅能增進電性連接,亦能有效 熱應力。 此,双 本發明之另一目的在於提供一 法,其係先在基板上形成犧子裝置之製造方 战犧牲層與電性絕緣之彈性層,再Excellent elasticity, therefore, 1 β P 袓 ^^ This cannot effectively absorb the thermal stress between the production 1 and Zhike bump 7A. [Objective and Summary of the Invention] The main purpose of the present invention is to provide a sub-device; the pedestal is less t. The odor bumps are spring-shaped into the through holes for the c-block system. The formation of electrical bumps with good elasticity of bumps & i makes it difficult to install external electrical connections during surface bonding. Set, one! It is to provide-a kind of ^ ^ elastic bump system with elastic & 0: W force, each elastic block system is formed; in the k-hole, as the elastic system has good elasticity, 铕 er brother < Ye Zhuang step. The purpose of forming filling materials is to provide a variety of elastic bumps. Electronic blocks are formed with through holes and exhaust holes. When the exhaust holes are formed, they can be discharged from the through holes. The gas makes the through hole of the conductive block, so the elastic bump is cracked on the surface, which can not only improve the electrical connection, but also effectively thermal stress. Therefore, another object of the present invention is to provide a method for forming a sacrificial device on a substrate, a sacrificial layer and an electrically insulating elastic layer, and then

535269 五、發明說明(3) " ---- 蝕刻形成多個具有通孔之彈性塊,之後再移除犧牲層使彈 f生塊具有排氣孔,並於通孔内填充導電膠,因此,可在一 基板上大量製作彈性凸塊。 f本發明之具彈性凸塊之電子裝置,其係包含有一基 板及後數個彈性凸塊,其中該基板係可為晶片、晶圓、印 刷電路板、陶瓷基板或薄膜,複數個彈性凸塊係形成於該 基板之導接墊上,每一彈性凸塊係包含有彈性塊,彈性塊 係為電性絕緣且具有高彈性之高分子有機物,其係具有一 通孔,該通孔係由彈性塊之頂面連通至對應之導接墊,較 佳地,彈性塊另形成至少一連通至通孔之排氣孔,當在彈 性塊之頂面塗施導電膠,導電膠係因毛細作用流佈於通孔 内而通孔内之氣體係經由排氣孔排出,使導電膠填充於 通孔内,以電性連接至對應之導接墊。 、、 田丘依本發明之電子裝置之製造方法,其步驟係包含有: 提^ ,板,如晶片、晶圓、印刷電路板、陶瓷基板或薄 膜等,該基板之表面係具有複數個導接墊;較佳地,可在 基板之‘接墊上形成犧牲層,該些犧牲層係不完全覆蓋導 接墊,再以印刷、旋塗或膠膜黏貼等技術在基板之表面形 成>一電性絕緣之彈性層,並覆蓋該些導接墊及犧牲層;蝕 刻该彈性層,以形成複數個對應導接墊之彈性塊,該些彈 性塊係形成有通孔,其係由彈性塊之頂面連通至對應之導 接^,之後再移除犧牲層,使彈性塊形成有連通至通孔之 排氣孔;塗佈導電膠於彈性塊之頂面,該些導電膠係因毛 細現象流佈於通孔,通孔内之氣體經由排氣孔排出,使導535269 V. Description of the invention (3) " ---- Etching to form a plurality of elastic blocks with through holes, and then remove the sacrificial layer to make the elastic blocks have vent holes, and fill the through holes with conductive glue. Therefore, a large number of elastic bumps can be fabricated on a substrate. f The electronic device with elastic bumps of the present invention includes a substrate and a plurality of elastic bumps, wherein the substrate may be a wafer, a wafer, a printed circuit board, a ceramic substrate or a film, and a plurality of elastic bumps. It is formed on the conductive pad of the substrate. Each elastic bump is composed of an elastic block. The elastic block is an electrically insulating and highly elastic polymer organic substance. The elastic block has a through hole. The through hole is formed by the elastic block. The top surface of the elastic block is connected to the corresponding conductive pad. Preferably, the elastic block further forms at least one vent hole connected to the through hole. When a conductive adhesive is applied to the top surface of the elastic block, the conductive adhesive is distributed on the top surface of the elastic block due to capillary action. The gas system in the through-hole and the through-hole is discharged through the exhaust hole, so that the conductive glue is filled in the through-hole and is electrically connected to the corresponding conductive pad. Tian Qiu, according to the method for manufacturing an electronic device according to the present invention, includes the steps of: lifting, a board, such as a wafer, a wafer, a printed circuit board, a ceramic substrate, or a thin film. The surface of the substrate has a plurality of guides. Pads; preferably, sacrificial layers can be formed on the pads of the substrate, these sacrificial layers do not completely cover the conductive pads, and then are formed on the surface of the substrate by printing, spin-coating or adhesive film bonding techniques An electrically insulating elastic layer covering the conductive pads and the sacrificial layer; the elastic layer is etched to form a plurality of elastic blocks corresponding to the conductive pads, and the elastic blocks are formed with through holes, which are formed by the elastic blocks. The top surface is connected to the corresponding lead ^, and then the sacrificial layer is removed, so that the elastic block is formed with an exhaust hole that communicates with the through hole; a conductive adhesive is applied to the top surface of the elastic block. Phenomenon flows in the through hole, and the gas in the through hole is discharged through the exhaust hole, so that the guide

535269535269

電膠填充於通孔内,以電性結合至對應之導接墊 【發明詳細說明】 請參閱所附圖式,本發明將列舉以下之實施例說明·· 依本發明之一具體實施例,如第6圖所示,具彈性凸 塊之電子裝置係包含有一基板10及複數個彈性凸塊2〇,其 中該基板10係可為晶片(chip )、晶圓(wafer )、印刷 電路板(printed circuit board,PCB)、陶甍基板 (ceramic substrate)或薄膜(thin film),在本實施The electric glue is filled in the through hole, and is electrically coupled to the corresponding lead pad. [Detailed description of the invention] Please refer to the attached drawings. The present invention will enumerate the following embodiment descriptions ... According to a specific embodiment of the present invention, As shown in FIG. 6, the electronic device with elastic bumps includes a substrate 10 and a plurality of elastic bumps 20. The substrate 10 may be a chip, a wafer, or a printed circuit board ( printed circuit board (PCB), ceramic substrate, or thin film

例中,該基板1 〇係為記憶體、微處裡器或微控制器之晶 片’其表面11上係形成有複數個導接墊12 (contact pads )’如鋁墊(A1 pad)或銅墊(Cu pad)等等。 複數個彈性凸塊20係形成於基板l 〇之導接墊丨2上,其 係包含有彈形塊21及導電膠24,該些彈性塊21係形成於基 板10之導接墊12上,並覆蓋對應之導接墊12,彈性塊21係 為一種電性絕緣並具有高彈性之高分子有機物(organic polymer) ’如聚亞醯胺(p〇iyimide)、苯環丁浠 (benezo cyclobutene)、聚丙烯酸脂(polyacrylates )、橡膠(rubber )或矽膠(si 1 i cone )等等,每一彈性 塊21係具有一通孔22,該通孔22係由彈性塊21之頂面連通 至對應之導接墊1 2,較佳地,彈性塊2 1另形成有至少一排〇 氣孔23,排氣孔23係連通至通孔22,並呈放射狀延伸至彈 性塊21外部,使通孔22與排氣孔23形成一導氣通道,以供 排出通孔2 2内之氣體,在每一彈性塊2 1之頂面及通孔2 2形 成有導電膠2 4,該導電膠24之材質係為含有金(Au)、銀In the example, the substrate 10 is a wafer of a memory, a micro processor or a microcontroller. 'A plurality of contact pads 12 (contact pads)' such as an aluminum pad (A1 pad) or copper are formed on the surface 11 thereof. Cu pad and so on. A plurality of elastic bumps 20 are formed on the conductive pads 2 of the substrate 10, which include elastic blocks 21 and conductive adhesive 24. The elastic blocks 21 are formed on the conductive pads 12 of the substrate 10. And cover the corresponding conductive pads 12, and the elastic block 21 is a kind of organic polymer with electrical insulation and high elasticity, such as polyimide, benezo cyclobutene , Polyacrylates, rubber or si 1 i cone, etc., each elastic block 21 has a through hole 22, the through hole 22 is connected from the top surface of the elastic block 21 to the corresponding The contact pad 12 is preferably formed with at least one row of air holes 23 in the elastic block 21, and the exhaust hole 23 is connected to the through hole 22 and extends radially to the outside of the elastic block 21 so that the through hole 22 An air-conducting channel is formed with the exhaust hole 23 for discharging the gas in the through-hole 22, and a conductive glue 24 is formed on the top surface of each elastic block 21 and the through-hole 22, and the material of the conductive glue 24 Contains gold (Au), silver

第8頁 535269 五、發明說明(5) (Ag )、銅(Cu )等導電金屬粉末之熱固性導電膠 (conductive paste),而形成於通孔22内之導電膠24係 電性連接至對應之導接墊1 2,當電子裝置必須表面接合至 一外部電路板時,彈性塊2 1頂面之導電膠2 4係可增進電性 接合面積’而通孔22内之導電膠24係被彈性塊2 1環繞包 覆’故彈性凸塊20不易產生崩裂,使電子裝置具有良好的 電性連接’且彈性凸塊2 0之彈性塊2 1係具有極佳之彈性, 在電子裝置表面接合於外部電路板後,結合界面因熱膨脹 係數(CTE )不匹配所產生之熱應力,係可由該些彈性凸 塊2 0之彈性塊2 1吸收,以防止位於結合界面之彈性凸塊2 〇 產生機械性熱疲勞(thermal fatigue)。 關於本發明之具彈性凸塊之電子裝置之製造方法詳述 如下:Page 8 535269 V. Description of the invention (5) (Ag), copper (Cu) and other conductive metal powders of the thermosetting conductive paste (conductive paste), and the conductive paste 24 formed in the through hole 22 is electrically connected to the corresponding Conductive pads 12, when the electronic device must be surface bonded to an external circuit board, the conductive adhesive 2 on the top surface of the elastic block 2 1 can improve the electrical bonding area, and the conductive adhesive 24 in the through hole 22 is elastic. Block 2 1 is wrapped around 'so the elastic bump 20 is not easy to crack, so that the electronic device has a good electrical connection' and the elastic block 2 1 of the elastic bump 20 has excellent elasticity, which is bonded to the surface of the electronic device. After the external circuit board, the thermal stress caused by the thermal expansion coefficient (CTE) mismatch of the bonding interface can be absorbed by the elastic bumps 21 of the elastic bumps 20 to prevent the mechanical formation of the elastic bumps 2 at the bonding interface. Sexual thermal fatigue. The manufacturing method of the electronic device with elastic bumps of the present invention is described in detail as follows:

首先’如第1圖所示,提供一基板丨〇,如晶圓、晶 片、印刷電路板、陶瓷基板或薄膜…等,基板丨〇之表面i j 係形成有複數個導接墊1 2,該些導接墊1 2係可呈格狀陣 列、中央或周邊排列,在基板1 〇之表面丨丨覆蓋一層光阻 劑’利用微影成像(photolithography)技術,使基板10 之導接墊12上形成光阻劑之犧牲層26 ( sacrif丨cia][ layer ),該犧牲層26係不完全覆蓋導接墊12,而為一種 易於移除之材料,較佳地,犧牲層2 6係由對應之導接墊1 2 中〜延伸至導接墊1 2外,之後,再以印刷(p r ^ η η n g )、 旋塗(spin coating)或膠膜黏貼(fum adhering)等 技術在基板1 0之表面11形成一電性絕緣之彈性層25,該彈First, as shown in FIG. 1, a substrate is provided, such as a wafer, a wafer, a printed circuit board, a ceramic substrate, or a thin film. The surface ij of the substrate is formed with a plurality of conductive pads 12. These lead pads 12 and 2 can be arranged in a grid array, center or peripherally, and a surface of the substrate 10 is covered with a layer of photoresist. The photolithography technology is used to make the lead pads 12 on the substrate 10 A sacrifice layer 26 (sacrifécia) is formed to form a photoresist. The sacrifice layer 26 does not completely cover the conductive pad 12 and is an easily removable material. The lead pad 12 is extended to the outside of the lead pad 12, and then printed (pr ^ η η ng), spin coating, or fum adhering is applied to the substrate 1 0. The surface 11 forms an electrically insulating elastic layer 25, and the elastic

第9頁 535269 五、發明說明(6) 性層2 5係覆蓋該些導接墊1 2及犧牲層2 6。 之後,如第2圖所示,利用微影成像與乾/溼蝕刻技 術,蝕刻該彈性層2 5,而形成複數個對應於導接墊1 2之彈 性塊21,該些彈性塊21係覆蓋對應之導接墊12,並形成有 通孔2 2,較佳地,該些通孔2 2係在蝕刻過程中同時形成, 或是在钱刻完成後於彈性塊2 1上雷射鑽孔而形成,通孔2 2 係由彈性塊2 1之頂面連通至對應之導接墊1 2。 然後’如弟3圖所不’移除犧牲層2 6,使彈性塊2 1形 成有複數個排氣孔23,該些由犧牲層26形成之排氣孔2 3係 連通至通孔22,使通孔22與排氣孔23形成一導氣通道,較 佳地,排氣孔2 3係緊貼於彈性 導接墊1 2,以利於排出通孔2 2 該些排氣孔2 3係連通通孔2 2並 部。 塊21 之底部並連通 至對 應之 内之氣體,如第4圖所示,-呈放射狀延伸至彈性塊2 1外 再如第5圖所示,以網版印刷(screen pririting)或 點注等技術在每一彈性塊2 1之頂面塗佈一熱固性導電膠 2 4 ’導電膠2 4係具有液態流動性,因毛細現象 (capillarity)流佈至通孔22内,且在導電膠24流佈之 同時’通孔22内之氣體會經由排氣孔23排出,而使導電膠 24能夠填充於通孔22内,較佳地,導電膠24亦部份流 ^ 充於排氣孔2 3内。 ;,L 具 最後,如第6圖所示,熱固化該導電膠24,爷 24係形成於每一彈性塊21之頂面、通孔22及排氣夕 以電性連接至對應之導接墊12,由於彈性凸塊2〇係以彈Page 9 535269 V. Description of the invention (6) The sexual layer 2 5 covers the conductive pads 12 and the sacrificial layer 26. Then, as shown in FIG. 2, the elastic layer 25 is etched by using lithography imaging and dry / wet etching techniques to form a plurality of elastic blocks 21 corresponding to the conductive pads 12, and these elastic blocks 21 are covered. Corresponding to the contact pads 12, and through-holes 22 are formed. Preferably, these through-holes 22 are formed at the same time during the etching process, or laser holes are drilled on the elastic block 21 after the money carving is completed. The through hole 2 2 is formed from the top surface of the elastic block 21 to the corresponding lead pad 12. Then, as shown in FIG. 3, the sacrificial layer 26 is removed, so that the elastic block 21 is formed with a plurality of exhaust holes 23. The exhaust holes 23 formed by the sacrificial layer 26 are connected to the through hole 22, The through hole 22 and the exhaust hole 23 form an air guide channel. Preferably, the exhaust hole 2 3 is closely attached to the elastic conductive pad 12 to facilitate the exhaust of the through hole 2 2. These exhaust holes 2 3 are The communication through holes 22 are connected in parallel. The bottom of block 21 is connected to the corresponding gas, as shown in Figure 4, which extends radially to the elastic block 2 1 and then as shown in Figure 5, screen printing (screen pririting) or note injection A technique such as applying a thermosetting conductive glue 2 4 on the top surface of each elastic block 2 1 'The conductive glue 2 4 has liquid fluidity, flows into the through-hole 22 due to capillarity, and flows on the conductive glue 24 At the same time, the gas in the through hole 22 will be exhausted through the exhaust hole 23, so that the conductive glue 24 can be filled in the through hole 22. Preferably, the conductive glue 24 is also partially filled in the exhaust hole 2 3 . ; L Finally, as shown in FIG. 6, the conductive adhesive 24 is thermally cured. The main 24 is formed on the top surface of each elastic block 21, the through hole 22 and the exhaust gas are electrically connected to the corresponding lead. Pad 12, because the elastic bump 20 is elastic

535269 五、發明說明(7) 塊21作為本體,及導電膠24填充於彈性塊21之通孔22内, 即使基板1 0 (如晶片)之導接墊1 2間距較小或結合界面高 度較低,只需預先決定彈性塊2 1之高度即可有效控制彈性 凸塊20之形成高度,因此對於高密度或微小化封裝,如曰 片尺寸封裝(Chip Scale Package, CSP),該彈性凸塊 2 0亦能提供良好的電性接觸,當電子裝置進行表面結合 時,導電膠2 4係可增進電性接合面積,且通孔2 2内之導電 膠24係被彈性塊21環繞包覆,使彈性凸塊2〇在表面接合時 不易產生崩裂,不僅能增進電性連接,亦能有效吸收結^ 界面產生之熱應力。 故本發明之保護範圍當視後附之申請專利範圍所界定 者為準,任何熟知此項技藝者,在不脫離本發明之精神^ 範圍内所作之任何變化與修改,均屬於本發明之保護範535269 V. Description of the invention (7) Block 21 is used as the main body, and conductive glue 24 is filled in the through hole 22 of the elastic block 21, even though the lead pads 12 of the substrate 10 (such as a wafer) have a smaller pitch or a higher bonding interface height. Low, only the height of the elastic block 21 can be determined in advance to effectively control the formation height of the elastic bump 20, so for high-density or miniaturized packages, such as Chip Scale Package (CSP), the elastic bump 20 can also provide good electrical contact. When the electronic device is surface bonded, the conductive adhesive 24 can improve the electrical bonding area, and the conductive adhesive 24 in the through hole 22 is surrounded by the elastic block 21, Making the elastic bump 20 not easy to crack when the surfaces are bonded, not only can improve the electrical connection, but also can effectively absorb the thermal stress generated at the junction interface. Therefore, the scope of protection of the present invention shall be determined by the scope of the appended patent application. Any changes and modifications made by those skilled in the art without departing from the spirit of the present invention ^ belong to the protection of the present invention. Fan

535269 圖式簡單說明 【圖 式說明 ] 第1 圖· 依 本 第2 圖_ :依 本 面 圖 第3 圖 依 本 第4 圖 依 本 第5 圖 依 本 第6 圖 依 本 第7 圖 美 國 之半 導體裝 置 【圖 號說明 ] ,形成彈性層及犧牲層之基板截面圖; ,形成複數個具通孔之彈性塊之基板截 ,移除犧牲層之基板截面圖 ’移除犧牲層之基板上視圖 ^塗施導電朦之基板截面圖 ,具彈性凸塊之電子裝置之截面圖;及 第6, 028, 357號「焊料凸塊包覆有柱體 截面圖。 1 電路基板 4 電極 10基板 11 表面 2 0 彈性凸塊 21 彈性塊 24 導電膠 2 導電薄膜 5 導電膠 12導接墊 22 通孔 2 5 彈性層 3 防焊層 7A焊料凸塊 2 3排氣孔 2 6犧牲層535269 Simple illustration of the drawings [Illustration of the drawings] Picture 1 · According to the book Picture 2: According to the plan view Picture 3 According to the book Picture 4 According to the book Picture 5 According to the book Picture 6 According to the book Picture 7 Semiconductor device [Illustration of drawing number], a sectional view of a substrate forming an elastic layer and a sacrificial layer; a sectional view of a substrate forming a plurality of elastic blocks with through holes, and a sectional view of a substrate with the sacrificial layer removed ' ^ Sectional view of a substrate coated with an electrically conductive layer, a sectional view of an electronic device with elastic bumps; and No. 6, 028, 357 "Cross section view of a solder bump covered with a cylinder. 1 Circuit board 4 Electrode 10 Substrate 11 surface 2 0 elastic bump 21 elastic block 24 conductive adhesive 2 conductive film 5 conductive adhesive 12 lead pad 22 through hole 2 5 elastic layer 3 solder mask 7A solder bump 2 3 exhaust hole 2 6 sacrificial layer

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第12頁Page 12

Claims (1)

535269 六、申請專利範圍 【申請專利範圍】 1、 一種具彈性凸塊之電子裝置’係包含有: 基板,該基板之表面係具有複數個導接墊; 彈性塊,係形成於該基板之導接墊上,該彈性塊係具 有一通孔及至少一排氣孔,其中該通孔係由彈性塊頂面 連通至對應之導接墊,而排氣孔係連通至通孔,以供通 孔之氣體排出;及 導電膠,係形成於對應之彈性塊之通孔内,以電性連 接至對應之導接墊。 2、 如申請專利範圍第1項所述之具彈性凸塊之電子裝 置,其中該些彈性塊之排氣孔係呈放射狀延伸至彈性塊 外部。 3、 如申請專利範圍第1項所述之具彈性凸塊之電子裝 置,其中該些排氣孔係緊貼於彈性塊之底部並連通至對 應之導接墊,以利於排出通孔内之氣體。 4、 如申請專利範圍第1項所述之具彈性凸塊之電子裝 置,其中該導電膠係形成於對應之彈性塊之排氣孔内。 5、 如申請專利範圍第1項所述之具彈性凸塊之電子裝 置,其中該導電膠係為含金、銀、銅導電金屬粉末之熱 固性導電膠。 6、 如申請專利範圍第1項所述之具彈性凸塊之電子裝 置,其中該些彈性塊係覆蓋基板之導接墊。 7、 如申請專利範圍第1項所述之具彈性凸塊之電子裝 置’其中該些彈性塊係為電性絕緣之高分子有機物。535269 6. Scope of patent application [Scope of patent application] 1. An electronic device with elastic bumps includes: a substrate, and the surface of the substrate has a plurality of conductive pads; the elastic block is formed on the substrate. On the pad, the elastic block has a through hole and at least one exhaust hole, wherein the through hole is communicated from the top surface of the elastic block to the corresponding conductive pad, and the exhaust hole is connected to the through hole for the through hole. The gas is exhausted; and the conductive adhesive is formed in the through hole of the corresponding elastic block and is electrically connected to the corresponding conductive pad. 2. The electronic device with elastic bumps as described in item 1 of the scope of patent application, wherein the exhaust holes of the elastic blocks extend radially to the outside of the elastic blocks. 3. The electronic device with elastic bumps as described in item 1 of the scope of the patent application, wherein the exhaust holes are closely attached to the bottom of the elastic block and communicate with the corresponding conductive pads, so as to facilitate the discharge of the holes in the through holes. gas. 4. The electronic device with elastic bumps as described in item 1 of the scope of patent application, wherein the conductive adhesive is formed in the exhaust hole of the corresponding elastic block. 5. The electronic device with elastic bumps as described in item 1 of the scope of the patent application, wherein the conductive adhesive is a thermosetting conductive adhesive containing gold, silver, and copper conductive metal powder. 6. The electronic device with elastic bumps as described in item 1 of the scope of patent application, wherein the elastic blocks are conductive pads covering the substrate. 7. The electronic device with elastic bumps as described in item 1 of the scope of the patent application, wherein the elastic blocks are high-molecular organic materials which are electrically insulated. 535269 六、申請專利範圍 8、 如申請專利範圍第7項所述之具彈性凸塊之電子裝 置,其中該些彈性塊係為聚亞醯胺、苯環丁烯、聚丙稀 酸脂、橡膠或矽膠。 9、 如申請專利範圍第7項所述之具彈性凸塊之電子裝 置,其中該基板係為晶片、晶圓、印刷電路板、陶瓷基 板或薄膜。 1 0、一種具彈性凸塊之電子裝置,係包含有: 基板,該基板之表面係具有複數個導接塾; 彈性塊’係形成於該基板之導接墊上,該彈性塊係 具有一通孔,其中該通孔係由彈性塊頂面連通至對應 之導接墊;及 導電膠,係形成於對應之彈性塊之通孔内,以電性 連接至對應之導接墊。 U、如申請專利範圍第10項所述之具彈性凸塊之電子j =,其中該導電膠係為含金、銀、銅導電金屬粉末之 熱固性導電膠L。 12里如申請專利範圍第1〇項所述之具彈性凸塊之電子』 八中1 2 3 4 5亥些彈性塊係為聚亞醯胺、苯環丁烯、聚丙 烯酸脂、橡膠或矽膠。535269 6. Scope of patent application 8. Electronic devices with elastic bumps as described in item 7 of the scope of patent applications, wherein the elastic blocks are polyimide, phenylcyclobutene, polypropylene, rubber or Silicone. 9. The electronic device with elastic bumps as described in item 7 of the scope of patent application, wherein the substrate is a wafer, a wafer, a printed circuit board, a ceramic substrate or a thin film. 10. An electronic device with elastic bumps, comprising: a substrate, a surface of the substrate having a plurality of contact pads; an elastic block is formed on a conductive pad of the substrate, and the elastic block has a through hole The through hole is connected to the corresponding conductive pad from the top surface of the elastic block; and the conductive adhesive is formed in the through hole of the corresponding elastic block and is electrically connected to the corresponding conductive pad. U. The electronic j = with elastic bumps as described in item 10 of the scope of the patent application, wherein the conductive adhesive is a thermosetting conductive adhesive L containing gold, silver, and copper conductive metal powder. 12 Miles as described in the scope of the patent application No. 10 "Electronics with elastic bumps" Eight middle 1 2 3 4 5 5 These elastic blocks are polyimide, phenylcyclobutene, polyacrylate, rubber or silicone . 1 3署如ί ί專利範圍第1 0 J員所述之具彈性凸塊之電子裝 2 其舡^售該基板係為晶片、晶圓、印刷電路板、陶瓷 3 卷板或薄膜。 4 14、^種電子裝置之製造方法,其步驟係包含有: 5 9供一基板,該基板之表面係具有複數個導接墊; 5352691 3 The electronic device with elastic bumps as described in the 10th member of the patent scope 2 The substrates are sold as wafers, wafers, printed circuit boards, ceramics 3 rolls or films. 4 14. A method for manufacturing an electronic device, the steps of which include: 5 9 for a substrate, the surface of the substrate has a plurality of conductive pads; 535269 層:ίίίίΐί之彈性層於該基板之“ ’該彈性 曰1糸覆盍该些導接墊; 蝕刻該彈性層,以形成複數個對應導接墊之彈性 遠、s且該些彈性塊係形成有通孔,其係由彈性塊頂面 逆通至對應之導接墊;及 形成導電膠於彈性塊之通孔,以電性連接至對應之 導接墊。 〜 15、 如申請專利範圍第14項所述之電子裝置之製造方 法’其另包含之步驟係在提供一基板後,形成犧牲層 於該基板之導接墊上,該犧牲層係由對應之導接墊延 伸至導接墊外。 16、 如申請專利範圍第15項所述之電子裝置之製造方 法’其另包含之步驟係在#刻彈性層後,移除該犧牲 層’使彈性塊形成至少一排氣孔,該由犧牲層形成之 排氣孔係連通至通孔。 17、 如申請專利範圍第14項所述之電子裝置之製造方 法’其中形成該彈性層之方式係為印刷、旋塗或膠膜 黏貼。 / 、 18、 如申請專利範圍第14項所述之電子裝置之製造方 法,其中形成導電膠之方式係為網版印刷或點注。 1 9、如申請專利範圍第1 4項所述之電子裝置之製造方 法,其另包含之步驟係為加熱固化導電膠。 2 0、如申請專利範圍第1 4項所述之電子裝置之製造方 法’其中在提供一基板之步驟中,該基板係為晶片、Layer: The elastic layer of ίίίίΐ is covered with the conductive pads on the substrate. The elastic layer covers the conductive pads; the elastic layer is etched to form a plurality of elastic pads corresponding to the conductive pads, and the elastic blocks are formed. There are through holes, which are reversely connected from the top surface of the elastic block to the corresponding conductive pads; and through holes formed with conductive glue on the elastic blocks are electrically connected to the corresponding conductive pads. The method for manufacturing an electronic device according to item 14, which further includes the step of forming a sacrificial layer on the conductive pad of the substrate after providing a substrate, and the sacrificial layer extends from the corresponding conductive pad to the outside of the conductive pad. 16. According to the method for manufacturing an electronic device described in item 15 of the scope of the patent application, which further includes the step of #etching the elastic layer, removing the sacrificial layer, so that the elastic block forms at least one vent hole. The exhaust hole formed by the sacrificial layer is connected to the through hole. 17. The manufacturing method of the electronic device described in item 14 of the scope of the patent application, wherein the method of forming the elastic layer is printing, spin coating or adhesive film sticking. 18, if applying for special The method for manufacturing an electronic device described in item 14 of the scope, wherein the method for forming the conductive adhesive is screen printing or injecting. 1 9. The method for manufacturing the electronic device described in item 14 of the scope of patent application, the other The steps included are heat-curing conductive adhesives. 20. The method for manufacturing an electronic device as described in item 14 of the scope of the patent application, wherein in the step of providing a substrate, the substrate is a wafer, 535269 六、申請專利範圍 晶圓、印刷電路板、陶瓷基板或薄膜 0535269 6. Scope of patent application Wafer, printed circuit board, ceramic substrate or film 0 第16頁Page 16
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