525181 經濟部智慧財產局員工消費合作社印製 五、發明說明（/ ) 本發明是有關於一種隔離記憶體故障之方法及其應用 系統，且特別是有關於一種自動偵測並隔離記憶體故障之 方法及其應用系統。 現今科技發展迅速，各種電腦或電子領域相關的應用 系統不斷地推出，在這些應用系統中，雖然會應用各種不 同的硬體裝置來達成，但記憶體卻幾乎是其不可或缺之儲 存媒體，可見得記憶體在應用系統中之重要性。不幸的是 記憶體並非永久不故障，當發生記憶體故障時，往往系統 即無法使用，尤其當故障發生在啓動區時爲甚。在過去， 雖然也有可偵測記憶體故障之應用系統，但卻只能在故障 發生時發出警報，系統依然無法使用。 有鑑於此，本發明提供一種自動偵測並隔離記憶體故 障之方法及其應用系統，不但可以解決現今系統記憶體故 障即無法使用之問題，更可以依據其故障分佈情形，選擇 一最佳之故障隔離方式，維持系統於最接近正常時之效能。 本發明所提供之一種自動偵測並隔離記憶體故障之應 用系統包括：控制晶片、記憶晶片、選擇設定儲存裝置、 解碼轉換裝置及韌體裝置。其中，記憶晶片係用以儲存資 料或程式。控制晶片輸出一位址及晶片選擇訊號，用以控 制記憶晶片。選擇設定儲存裝置用以設定並儲存隔離記憶 晶片之故障的選擇設定値。解碼轉換裝置耦接至控制晶片、 選擇設定儲存裝置及記憶晶片，用以接收控制晶片輸出之 位址及晶片選擇訊號，並根據選擇設定値，將其轉換爲輸 出位址及晶片選擇訊號，來控制記憶晶片。韌體裝置耦接 -------r---!----裝—— (請先閱讀背面之注意事填寫本頁) 訂-· --線- 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 525181 五、發明說明（>) 至控制晶片，用以自動掃描偵測記憶晶片之故障，並依據 記憶晶片之故障分佈情形，選擇解碼轉換裝置之一解碼功 能，並將所選擇之解碼功能的選擇設定値存入選擇設定儲 存裝置中。而其位址及晶片選擇訊號包括：第一組位址訊 號、第二組位址訊號、行位址訊號、列位址訊號、第一晶 片選擇訊號及第二晶片選擇訊號。輸出位址及晶片選擇訊 號包括：輸出組位址訊號、輸出行位址訊號、輸出列位址 訊號、第一輸出晶片選擇訊號及第二輸出晶片選擇訊號。 本發明所提供之一種自動偵測並隔離記憶體故障之應 用系統中，其解碼轉換裝置包括：直通功能及反相功能。 其中，直通功能係用以直接將位址及晶片選擇訊號導通至 輸出位址及晶片選擇訊號。反相功能則用以將列位址訊號 反相爲輸出列位址訊號，以便將上半部之記憶晶片故障對 調至下半部。 本發明之較佳實施例中，其解碼轉換裝置更包括：晶 片切割功能、損壞晶片切割功能、晶片合倂功能、損壞晶 片組位址切割功能、組晶片合倂功能及晶片組位址切割功 能。晶片切割功能係用以將記憶晶片切割模擬爲複數個次 容量之記憶晶片。損壞晶片切割功能用以將部分損壞之記 憶晶片以列位址方式切割並隔離其損壞之部分，以獲得與 原來相同組（Bank)數但容量只有一半之記憶晶片。晶片合 倂功能用以將已切割並隔離之複數個部分損壞之記憶晶片 合倂模擬爲完整之記憶晶片。損壞晶片組位址切割功能用 以將部分損壞之記憶晶片以分組（Bank)方式切割並隔離其 4 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事d —裝—— :填寫本頁) LT· 經濟部智慧財產局員工消費合作社印製 525181 A7525181 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the Invention (/) The present invention relates to a method for isolating memory failure and its application system, and in particular, to a method for automatically detecting and isolating memory failure Method and its application system. Nowadays, science and technology are developing rapidly, and various computer or electronics related application systems are continuously introduced. In these application systems, although various hardware devices are used to achieve it, memory is almost an indispensable storage medium. The importance of memory in application systems can be seen. Unfortunately, memory is not permanent. When a memory failure occurs, the system is often unusable, especially when the failure occurs in the boot area. In the past, although there are application systems that can detect memory failures, they can only issue an alarm when a failure occurs, and the system is still unusable. In view of this, the present invention provides a method for automatically detecting and isolating memory failure and an application system thereof, which can not only solve the problem that the memory failure of the current system is unavailable, but also select an optimal one according to the failure distribution situation. Fault isolation mode to maintain the performance of the system when it is closest to normal. An application system for automatically detecting and isolating a memory failure provided by the present invention includes a control chip, a memory chip, a selection setting storage device, a decoding conversion device, and a firmware device. Among them, the memory chip is used to store data or programs. The control chip outputs a bit address and a chip selection signal to control the memory chip. The selection setting storage device is used to set and store the selection setting of the failure of the isolated memory chip. The decoding conversion device is coupled to the control chip, the selection setting storage device and the memory chip, and is used for receiving the address and chip selection signal output by the control chip, and converting it to the output address and chip selection signal according to the selection setting 値. Control memory chip. Firmware device coupling ------- r ---! ---- install—— (Please read the note on the back first and fill in this page) Order --- --- Line-This paper size applies to Chinese national standards (CNS) A4 specification (210 X 297 mm) 525181 5. Description of the invention (>) to the control chip to automatically scan and detect the failure of the memory chip, and select the decoding conversion device according to the fault distribution of the memory chip A decoding function, and storing the selection setting of the selected decoding function in the selection setting storage device. The address and chip selection signals include: the first set of address signals, the second set of address signals, the row address signals, the column address signals, the first chip selection signals, and the second chip selection signals. The output address and chip selection signal include: output group address signal, output row address signal, output column address signal, first output chip selection signal and second output chip selection signal. In an application system for automatically detecting and isolating memory failures provided by the present invention, the decoding conversion device includes a pass-through function and an inversion function. Among them, the pass-through function is used to directly connect the address and the chip selection signal to the output address and the chip selection signal. The invert function is used to invert the column address signal into the output column address signal, so as to reverse the fault of the memory chip in the upper half to the lower half. In a preferred embodiment of the present invention, the decoding conversion device further includes a wafer cutting function, a damaged wafer cutting function, a wafer combining function, a damaged wafer group address cutting function, a wafer combining function and a wafer group address cutting function. . The chip cutting function is used to simulate the cutting of a memory chip into a plurality of sub-capacity memory chips. The damaged wafer cutting function is used to cut a partially damaged memory chip by column address and isolate the damaged part to obtain the same number of banks (banks) but only half the capacity. The chip combining function is used to simulate the cut and isolated multiple partially damaged memory chips into a complete memory chip. The damaged chip group address cutting function is used to cut and isolate some of the damaged memory chips into banks. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (please read the back first) Notes d —Installation——: Fill in this page) LT · Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 525181 A7
經濟部智慧財產局員工消費合作社印製 五、發明說明（1 ) 損壞之部分，以獲得組數爲原來一半之記憶晶片。組晶片 合倂功能用以將已以分組方式切割並隔離之複數個部分損 壞之記憶晶片合倂模擬爲完整之記憶晶片。晶片組位址切 割功能用以將已以分組方式切割並隔離之部分損壞之記憶 晶片以分組方式再切割模擬爲完整組數之次容量記憶晶 片。 本發明另提供一種自動偵測並隔離記憶體故障之方 法，用以自動偵測記憶晶片之故障，再經由選擇設定解碼 轉換裝置之選擇設定値，並將其存入選擇設定儲存裝置中’ 以隔離記憶晶片之故障，其步驟爲:首先，選擇是否進入自 動偵測功能；當選擇進入自動偵測功能時’選擇設定解碼 轉換裝置之直通功能並設定測試範圍爲記憶晶片全部；再 依據測試範圍，掃描測試記憶晶片，並判斷是否有故障； 當有故障時，分析故障之故障點分佈情形，並依據故障點 分佈情形，選擇設定解碼轉換裝置之選擇設定値，此選擇 設定値爲隔離故障之最佳設定値；其次將選擇設定値存入 選擇設定儲存裝置；當選擇不進入自動偵測功能時，從選 擇设定儲存裝置中讚取選擇設定値；並依據選擇設定値’ 回報可用之記憶體容量。 本發明之較佳實施例中，爲了將記憶晶片之故障運用 列位址轉換功能下推至最高位址，以便依據控制晶片可隔 離之最小範圍小容量刪除此故障部分並回報正確之記憶晶 片容量，因此，更包括下列步驟:當有故障時，判斷故障是 否位於測試範圍之上半部；如故障位於測試範圍之上半部 5 本紙張尺度適用中國國家標準（CNS)A4規格（210x 297公釐） ----------------- (請先閱讀背面之注意填寫本頁) 訂. 線- 525181 〇55twf.doc/0〇; A7 B7 ^___ 經濟部智慧財產局員工消費合作社印製 發明說明（今"） 時，进擇δ又疋解碼轉換裝置之反相功能，以便將位於測試 亀Β圍1上半部之故障gg周至下半部·’其次判斷測試範圍是否 已達控制晶片可隔離之最小範圍；當_試範圍未達控制晶 片可隔離之最小範圍時，將測試範圍縮小至本次測試範圍 的下半部；並依據縮小之測試範圍，重新掃描測試記憶晶 片。 由上述說明可知，本發明係運用一可彈性規劃之記憶 體解碼轉換裝置作爲控制晶片與記憶晶片間之橋樑，使用 韌體裝置自動掃描偵測記憶體故障分佈情形，並依據其故 障分佈情形’選擇設定解碼轉換裝置之最佳選擇設定値， 並將其存入選擇設定儲存裝置中，以隔離記憶晶片之故障， 保持系統之可用性，並維持系統於最接近正常狀態之效能。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉一較佳實施例，並配合所附圖式，作詳 細說明如下： 第1圖係顯示一種自動偵測並隔離記憶體故障之應用 系統圖；以及 第2圖係顯示根據本發明較佳實施例之一種自動偵測 並隔離記憶體故障之施行步驟。 no韌體裝置 120控制晶片 130選擇設定儲存裝置 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 525181 經濟部智慧財產局員工消費合作社印製 五、發明說明（<) 140解碼轉換裝置 1 5 0記憶晶片 200〜255本發明之一實施例步驟 實施例 第1圖爲本發明一較佳實施例之一種自動偵測並隔離 記憶體故障之應用系統圖，如第1圖所示’此應用系統包括: 控制晶片120、記憶晶片150、選擇設定儲存裝置130、解碼 轉換裝置140及韌體裝置11〇。其中，記憶晶片15〇是用來儲 存資料或程式的，而控制晶片120則用來控制記憶晶片150， 其應用輸出一位址及晶片選擇訊號’來讀取或寫入資料。 選擇設定儲存裝置130用來設定並儲存隔離記憶晶片之故障 的最佳選擇設定値，本實施例中係使用一電性可抹除可規 劃僅讀記憶體（EEPROM)來完成。解碼轉換裝置140耦接至 控制晶片120、選擇設定儲存裝置130及記憶晶片150，用以 接收控制晶片輸出之位址及晶片選擇訊號，並根據選擇設 定儲存裝置130之選擇設定値，將其轉換爲輸出位址及晶片 選擇訊號，來控制記憶晶片1 5 0。朝體裝置Π 0耦接至控制 晶片120，用以自動掃描偵測記憶晶片150之故障，並依據 記憶晶片150之故障分佈情形，選擇解碼轉換裝置14〇中可 隔離此故障之一解碼功能，並將所選擇之解碼功能的選擇 設疋値存入選擇设疋儲存裝置1 3 0。其中，位址及晶片選擇 訊號包括··第一組位址訊號、第二組位址訊號、行位址訊 號、列位址訊號、第一晶片選擇訊號及第二晶片選擇訊號。 輸出位址及晶片選擇訊號包括··輸出組位址訊號、輸出行 7 本紙張尺度適用中國國家標準（CNS)A4規格（2.10 X 297公爱） (請先閱讀背面之注咅？· 事填寫 本頁) 裝Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (1) The damaged part to obtain a memory chip with half the number of the original. The chip combination function is used to simulate the combination of a plurality of partially damaged memory chips that have been cut and isolated in groups into a complete memory chip. The chipset address cutting function is used to divide the partially damaged memory chips that have been cut and isolated in groups, and then cut them into groups to simulate secondary capacity memory chips. The present invention also provides a method for automatically detecting and isolating memory failure, which is used to automatically detect the failure of the memory chip, and then select the selection setting of the conversion device through the selection setting 设定, and store it in the selection setting storage device. To isolate the failure of the memory chip, the steps are: first, choose whether to enter the automatic detection function; when you choose to enter the automatic detection function, 'select the pass-through function of the decoding conversion device and set the test range to the entire memory chip; and then according to the test range Scan the test memory chip and determine whether there is a fault. When there is a fault, analyze the fault point distribution of the fault, and select the setting of the decoding conversion device according to the fault point distribution. This selection setting is the isolation fault. Best settings 値; Secondly, save the selection settings 値 into the selection settings storage device; when you choose not to enter the automatic detection function, like the selection settings from the selection settings storage device 値; and according to the selection settings 値 'report the available memory Body capacity. In the preferred embodiment of the present invention, in order to use the column address conversion function to push down the fault of the memory chip to the highest address, in order to delete the faulty part according to the smallest range of the control chip that can be isolated and report the correct memory chip capacity Therefore, it also includes the following steps: when there is a fault, determine whether the fault is located in the upper half of the test range; if the fault is located in the upper half of the test range 5 This paper size applies the Chinese National Standard (CNS) A4 specification (210x 297 mm) (%) ----------------- (Please read the note on the back and fill in this page first) Order. Line-525181 〇55twf.doc / 0〇; A7 B7 ^ ___ Ministry of Economy Wisdom When the property bureau employee consumer cooperative printed the invention description (today "), the δ function was decoded to decode the inversion function of the conversion device, so that the fault gg located in the upper half of the test block 1 was cycled to the lower half. Determine whether the test range has reached the minimum range that the control chip can isolate; When the test range does not reach the minimum range that the control chip can isolate, reduce the test range to the lower half of the test range; and based on the reduced test range, weight Memory scan test wafer. From the above description, it can be known that the present invention uses a flexible programming memory decoding conversion device as a bridge between the control chip and the memory chip, and uses a firmware device to automatically scan and detect the fault distribution of the memory, and based on the fault distribution ' Select the best selection setting of the setting decoding conversion device, and store it in the selection setting storage device to isolate the failure of the memory chip, maintain the availability of the system, and maintain the performance of the system in the closest normal state. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below and described in detail with the accompanying drawings as follows: Figure 1 shows an automatic detection And an application system diagram for isolating a memory fault; and FIG. 2 is a diagram illustrating an implementation step of automatically detecting and isolating a memory fault according to a preferred embodiment of the present invention. no firmware device 120 control chip 130 selection setting storage device This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) 525181 Printed by the Consumers ’Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (<) 140 Decoding conversion device 150 Memory chip 200 ~ 255 One embodiment of the present invention The steps and embodiments The first diagram is an application system diagram for automatically detecting and isolating memory faults according to a preferred embodiment of the present invention, as shown in the first diagram As shown in the figure, 'this application system includes: a control chip 120, a memory chip 150, a selection setting storage device 130, a decoding conversion device 140, and a firmware device 110. Among them, the memory chip 150 is used to store data or programs, and the control chip 120 is used to control the memory chip 150, which should output a bit address and a chip selection signal 'to read or write data. The selection setting storage device 130 is used to set and store the best selection setting for isolating the failure of the memory chip. In this embodiment, an electrically erasable and programmable read-only memory (EEPROM) is used to complete. The decoding conversion device 140 is coupled to the control chip 120, the selection setting storage device 130, and the memory chip 150, and is used for receiving the address and chip selection signal output by the control chip, and converting it according to the selection setting of the selection setting storage device 130, and converting it. Select signals for output address and chip to control memory chip 150. The body device Π 0 is coupled to the control chip 120 to automatically scan and detect the failure of the memory chip 150. According to the fault distribution of the memory chip 150, a decoding function is selected in the decoding conversion device 14 to isolate this fault. The selection setting of the selected decoding function is stored in the selection setting storage device 130. Among them, the address and chip selection signals include the first group of address signals, the second group of address signals, the row address signals, the column address signals, the first chip selection signals, and the second chip selection signals. Output address and chip selection signal include: Output group address signal, output line 7 This paper size is applicable to China National Standard (CNS) A4 specifications (2.10 X 297 public love) (Please read the note on the back first? • Fill in (This page)
Hd· 525181 經濟部智慧財產局員工消費合作社印製 五、發明說明（b ) 位址訊號、輸出列位址訊號、第一輸出晶片選擇訊號及第 二輸出晶片選擇訊號。 請再參考第1圖，其中之解碼轉換裝置包括直通功能 及反相功能。直通功能係爲直接將位址及晶片選擇訊號導 通至輸出位址及晶片選擇訊號。反相功能則爲將列位址訊 號反相爲輸出列位址訊號。 此外，解碼轉換裝置還包括以下功能：晶片切割功 能、損壞晶片切割功能、晶片合倂功能、損壞晶片組位址 切割功能、組晶片合倂功能及晶片組位址切割功能。晶片 切割功能用來將記憶晶片切割模擬爲複數個次容量之記憶 晶片，其中當第一晶片選擇訊號或第二晶片選擇訊號致能 時，使第一輸出晶片選擇訊號致能，當第一晶片選擇訊號 致能且第二晶片選擇訊號禁能時，使輸出列位址訊號的最 高位元爲低準位，當第一晶片選擇訊號禁能且第二晶片選 擇訊號致能時，使輸出列位址訊號的最高位元爲高準f立。 損壞晶片切割功能用來將部分損壞之記憶晶片切割並隔離 其損壞之部分，其中將輸出列位址訊號的最高位元固定爲 高準位或低準位。晶片合倂功能，用來將已切割並隔离隹之 複數個部分損壞之記憶晶片合倂模擬爲完整之記憶晶片， 其中當第一晶片選擇訊號致能，且列位址訊號的最高位元 爲低準位時，使第一輸出晶片選擇訊號致能，當第一晶片 選擇訊號致能，且列位址訊號的最高位元爲高準位時，使 第二輸出晶片選擇訊號致能。損壞晶片組位址切割功能_ 來將部分損壞之記憶晶片以分組方式切割並隔離其損壞之 8 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事一 .•裝—— :填寫本頁) Ί-Τ -· 525181 8〇55twf.doc/009 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（η ) 部分，其中將輸出組位址訊號的最高位元固定爲高準位或 低準位。組晶片合倂功能用來將已以分組方式切割並隔離 之複數個部分損壞之記憶晶片合倂模擬爲完整之記憶晶 片，其中當第一晶片選擇訊號致能，且第一組位址訊號以 及第二組位址訊號均爲低準位時，使第一輸出晶片選擇訊 號致能及輸出組位址訊號爲低準位，當第一晶片選擇訊號 致能，且第一組位址訊號爲低準位及第二組位址訊號爲高 準位時，使第一輸出晶片選擇訊號致能及輸出組位址訊號 爲高準位，當第一晶片選擇訊號致能，且第一組位址訊號 爲高準位及第二組位址訊號爲低準位時，使第二輸出晶片 選擇訊號致能及輸出組位址訊號爲低準位，以及當第一晶 片選擇訊號致能，且第一組位址訊號爲高準位及第二組位 址訊號爲高準位時，使第二輸出晶片選擇訊號致能及輸出 組位址訊號爲高準位。晶片組位址切割功能用來將已以分 組方式切割並隔離之部分損壞之記憶晶片以分組方式再切 割模擬爲完整組數之次容量記憶晶片，其中當第一組位址 訊號及第二組位址訊號均爲低準位時，使輸出組位址訊號 爲低準位及輸出列位址訊號的最高位元爲低準位，當第一 組位址訊號爲低準位及第二組位址訊號爲高準位時，使輸 出組位址訊號爲低準位及輸出列位址訊號的最高位元爲高 準位，當第一組位址訊號爲高準位及第二組位址訊號爲低 準位時，使輸出組位址訊號爲高準位及輸出列位址訊號的 最高位元爲低準位，以及當第--組位址訊號爲高準位及第 二組位址訊號爲局準位時，使輸出組位址訊號爲高準位及 請 先 閱 讀 背 意 業裝 頁 訂 蠊 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 525181 8055twf.doc/009 A7 B7 五、發明說明（飞） 輸出列位址訊號的最高位元爲高準位。 第2圖爲根據本發明較佳實施例之一種自動偵測並隔 離記憶體故障之施行步驟。首先，選擇是否進入自動偵測 功能205 ;當選擇進入自動偵測功能時，選擇設定解碼轉換 裝置之直通功能並設定測試範圍爲記憶晶片全部210 ;再依 據測試範圍，掃描測試記憶晶片215，並判斷是否有故障 220 ;當有故障時，分析故障之故障點分佈情形，並依據故 障點分佈情形，選擇設定解碼轉換裝置之選擇設定値，此 選擇設定値爲隔離故障之最佳設定値200 ;其次將選擇設定 値存入選擇設定儲存裝置245 ;當選擇不進入自動偵測功能 時，從選擇設定儲存裝置中讀取選擇設定値255 ;並依據選 擇設定値，回報可用之記憶體容量250。 其中，爲了將記憶晶片之故障運用列位址轉換功能下 推至最高位址，以便依據控制晶片可隔離之最小範圍小容 量刪除此故障部分’並回報正確之記憶晶片容量，故當有 故障時，先判斷故障是否位於測試範圍之上半部225 ;如古夂 障位於測試範圍之上半部時，選擇設定解碼轉換裝置之反 相功能，以便將位於測試範圍上半部之故障對調至下半部 230 ;其次判斷測試範圍是否已達控制晶片可隔離之最小範 圍2 3 5，當測g式軺因未達控制晶片可隔離之最小範圍時，將 測試範圍縮小至本次測試範圍的下半部240 ;並依據縮小之 測試範圍，重新掃描測試記憶晶片215。 假設此系統使用具有R0〜R12列位址、C0〜C9行位 址、容量爲8M bytes之記憶晶片，其故障發生於所有位址 10 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事 1 --褒—— :填寫本頁) 訂-· 經濟部智慧財產局員工消費合作社印製 525181 經濟部智慧財產局員工消費合作社印製 五、發明說明（°^ ) 訊號均爲〇之位址，亦即記憶晶片之第一個byte位置，而此 系統之控制晶片可隔離之最小記憶體範圍爲bytes，則 本發明自動偵測並隔離此故障之步驟爲：首先’選擇進入 自動偵測功能；並選擇設定解碼轉換裝置之直通功能及設 定測試範圍爲8M bytes ;然後掃描測試記憶晶片，發現其 故障在記憶晶片之第一個byte位置，於是選擇設定解碼轉 換裝置之反相功能將R12予以反相，以便將位於第一個byte 之故障對調至後4M bytes之第一個byte ;其次判斷發現4M bytes > 1M bytes ;於是重新掃描記憶晶片之後4 M bytes並 發現其故障在記憶晶片後4M bytes之第一個byte位置；乃選 擇設定解碼轉換裝置之反相功能將R12及R11予以反相，以 便將位於後4M bytes之第一個byte之故障對調至後2M bytes 之弟一'個byte，再判斷發現2M bytes > 1M bytes ;於是重新 掃描記憶晶片之後2M bytes並發現其故障在記憶晶片後2M bytes之第一個byte位置；乃選擇設定解碼轉換裝置之反相 功能將R12、R11及R10予以反相，以便將位於後2M bytes 之第一個byte之故障對調至後1M bytes之第一個byte ;並發 現1M bytes已達控制晶片可隔離之最小範圍；乃將此選擇 設定値存入選擇設定儲存裝置，並回報可用之記憶體容量 爲7M bytes ’以避免控制晶片使用此故障位置，並達僅小 容量刪除bytes之目的。 由上述說明可知，本實施例是運用一可彈性規劃之記 憶體解碼轉換裝置作爲控制晶片與記憶晶片間之橋樑，使 用韋刃體裝置自動掃描偵測記憶體故障分佈情形，當其故障 (請先閱讀背面之注意事 一 -·裝— :填寫本頁) 訂·. ;齡· 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱） 525181 8055twf.doc/009 五、發明說明（v〇 ) 爲僅有一故障點時，運用列位址反相功能將此故障點下推 至最高位址，以便依據控制晶片可隔離之最小範圍小容量 刪除此故障部分，並回報正確之記憶體容量，以達保有最 高容量之記憶體，並維持系統於最接近正常狀態效能之目 的。 雖然本發明已以一較佳實施例揭露如上，然其並非用 以限定本發明，任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作各種之更動與潤飾，因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 (請先閱讀背面之注意事一 -·裝— :填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）Hd · 525181 Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the Invention (b) Address signal, output column address signal, first output chip selection signal and second output chip selection signal. Please refer to Figure 1 again, where the decoding conversion device includes a pass-through function and an inverting function. The pass-through function is to directly connect the address and chip selection signals to the output address and chip selection signals. The inversion function is to invert the column address signal to the output column address signal. In addition, the decoding conversion device also includes the following functions: wafer cutting function, damaged wafer cutting function, wafer combining function, damaged wafer group address cutting function, wafer combining function, and wafer group address cutting function. The chip cutting function is used to simulate the cutting of a memory chip into a plurality of sub-capacity memory chips. When the first chip selection signal or the second chip selection signal is enabled, the first output chip selection signal is enabled. When the selection signal is enabled and the second chip selection signal is disabled, the highest bit of the output column address signal is a low level. When the first chip selection signal is disabled and the second chip selection signal is enabled, the output column is enabled. The highest bit of the address signal is Micro Motion. The damaged wafer cutting function is used to cut a partially damaged memory wafer and isolate the damaged part, wherein the highest bit of the output column address signal is fixed to a high level or a low level. The chip combining function is used to simulate the cut and isolated multiple damaged memory chips into a complete memory chip. When the first chip select signal is enabled and the highest bit of the column address signal is When the level is low, the first output chip selection signal is enabled. When the first chip selection signal is enabled and the highest bit of the column address signal is high level, the second output chip selection signal is enabled. Damaged chipset address cutting function_ to cut partially damaged memory chips in groups and isolate their damages 8 This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) (Please read the back Note one. • Install ———— Fill in this page) Ί-Τ-· 525181 8〇55twf.doc / 009 A7 B7 Printed by the Consumers' Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 5. The description of the invention (η), which will be output The highest bit of the group address signal is fixed at the high or low level. The chip combination function is used to simulate a plurality of partially damaged memory chips that have been cut and isolated in groups into a complete memory chip. When the first chip select signal is enabled, and the first set of address signals and When the second set of address signals are all low level, the first output chip selection signal is enabled and the output set address signal is low level. When the first chip selection signal is enabled and the first set of address signals is When the low level and the second set of address signals are high, the first output chip select signal is enabled and the output set address signals are high level. When the first chip select signal is enabled and the first set of bits is enabled When the address signal is high level and the second group of address signals is low level, enable the second output chip selection signal to be enabled and the output group address signal to be low level, and when the first chip selection signal is enabled, and When the first group of address signals is a high level and the second group of address signals is a high level, the second output chip selects a signal to be enabled and the output group address signal is a high level. The chip group address cutting function is used to group the partially damaged memory chips that have been cut and isolated in groups to re-cut to simulate a complete set of sub-capacity memory chips, where the first group of address signals and the second group of memory chips When the address signals are all low level, the output group address signal is the low level and the highest bit of the output column address signal is the low level. When the first group of address signals is the low level and the second group When the address signal is a high level, the output group address signal is a low level and the highest bit of the output column address signal is a high level. When the first group of address signals is a high level and the second group of bits When the address signal is a low level, the output group address signal is a high level and the highest bit of the output column address signal is a low level, and when the first-group address signal is a high level and the second group When the address signal is a local level, make the output group address signal a high level. Please read the back page binding first. This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 525181 8055twf.doc / 009 A7 B7 V. Description of the invention (flying) Output column address information The highest bit at the high level. FIG. 2 is a step for automatically detecting and isolating a memory failure according to a preferred embodiment of the present invention. First, choose whether to enter the automatic detection function 205; when you choose to enter the automatic detection function, choose to set the pass-through function of the decoding conversion device and set the test range to all 210 memory chips; then according to the test range, scan the test memory chip 215, and Determine whether there is a fault 220; when there is a fault, analyze the fault point distribution of the fault, and select the setting of the decoding conversion device according to the fault point distribution. This selection setting is the best setting for isolating the fault: 200; Secondly, the selection setting is stored in the selection setting storage device 245; when the selection does not enter the automatic detection function, the selection setting is read from the selection setting storage device 255; and according to the selection setting, the available memory capacity 250 is reported. Among them, in order to use the column address conversion function to push down the failure of the memory chip to the highest address, in order to delete the faulty part according to the minimum range of the control chip that can be isolated and report the correct memory chip capacity, so when there is a fault , First determine whether the fault is located in the upper half of the test range 225; if the ancient obstacle is located in the upper half of the test range, choose to set the inversion function of the decoding conversion device in order to reverse the fault located in the upper half of the test range Half 230; Secondly, determine whether the test range has reached the minimum range that the control chip can isolate. 2 3 5 When the g-type measurement is not within the minimum range that the control chip can isolate, the test range is reduced to the lower range of this test range. Half 240; and re-scan the test memory chip 215 according to the reduced test range. Assume that this system uses a memory chip with R0 ~ R12 column addresses, C0 ~ C9 row addresses, and a capacity of 8M bytes. The failure occurs at all addresses. 10 This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 mm) (Please read the note on the back 1-褒 ——: Fill out this page) Order- · Printed by the Employees 'Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 525181 Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Explanation (° ^) The signals are all addresses of 0, that is, the first byte position of the memory chip, and the minimum memory range that the control chip of this system can isolate is bytes. The present invention automatically detects and isolates this fault. The steps are as follows: first, choose to enter the automatic detection function; and then choose to set the pass-through function of the decoding conversion device and set the test range to 8M bytes; then scan and test the memory chip and find that the fault is in the first byte position of the memory chip, so Choose to set the inversion function of the decoding conversion device to invert R12, so as to reverse the fault located in the first byte to the first byte of the next 4M bytes; the second judgment is found 4M bytes > 1M bytes; So after rescanning the memory chip 4M bytes and found its fault is the first byte position of 4M bytes behind the memory chip; it is to set the inversion function of the decoding conversion device to invert R12 and R11 In order to reverse the fault of the first byte located in the last 4M bytes to the brother of the last 2M bytes, and judge and find 2M bytes > 1M bytes; then rescan the memory chip after 2M bytes and find that the fault is in the memory The first byte position of 2M bytes behind the chip; it is chosen to set the inversion function of the decoding conversion device to invert R12, R11 and R10, so as to reverse the fault of the first byte located in the last 2M bytes to the last 1M bytes. The first byte; and found that 1M bytes has reached the minimum range that the control chip can isolate; this selection setting is stored in the selection setting storage device, and the available memory capacity is 7M bytes' to avoid the failure of the control chip. Position, and achieve the purpose of deleting bytes only in small capacity. As can be seen from the above description, this embodiment uses a flexible planning memory decoding conversion device as a bridge between the control chip and the memory chip, and uses a Wei blade device to automatically scan and detect the memory fault distribution. When it fails (please First read the note on the back of the first one-· install —: fill in this page) order ·.; Age · This paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 public love) 525181 8055twf.doc / 009 V. Invention Explanation (v〇) When there is only one fault point, use the column address inversion function to push down the fault point to the highest address, so as to delete the fault part according to the smallest range and small capacity that the control chip can isolate, and report the correct one. Memory capacity in order to maintain the highest capacity of memory and maintain the system's performance closest to normal performance. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and decorations without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application. (Please read the first note on the back-· 装 —: Fill out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)