CN106463179A - Method, apparatus and system for handling data error events with memory controller - Google Patents

Method, apparatus and system for handling data error events with memory controller Download PDF

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Publication number
CN106463179A
CN106463179A CN201480077247.1A CN201480077247A CN106463179A CN 106463179 A CN106463179 A CN 106463179A CN 201480077247 A CN201480077247 A CN 201480077247A CN 106463179 A CN106463179 A CN 106463179A
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processing routine
cleaning
processing
error event
memory
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CN106463179B (en
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A·阿格拉瓦尔
S·姆蒂亚卢
陈英文
M·加内桑
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Intel Corp
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Intel Corp
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/079—Root cause analysis, i.e. error or fault diagnosis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G06F11/106—Correcting systematically all correctable errors, i.e. scrubbing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/52—Protection of memory contents; Detection of errors in memory contents
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
    • G06F11/2094—Redundant storage or storage space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81—Threshold
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0409—Online test

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Human Computer Interaction (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Hardware Redundancy (AREA)

Abstract

Techniques and mechanisms for providing error detection and correction for a platform comprising a memory including one or more spare memory segments. In an embodiment, a memory controller performs first scrubbing operations including detection for errors in a plurality of currently active memory segments. Additional patrol scrubbing is performed for one or more memory segments while the memory segments are each available for activation as a replacement memory segment. In another embodiment, a first handler process (but not a second handler process) is signaled if an uncorrectable error event is detected based on the active segment scrubbing, whereas the second handler process (but not the first handler process) is signaled if an uncorrectable error event is detected based on the spare segment scrubbing. Of the first handler process and the second handler process, only signaling of the first handler process results in a crash event of the platform.

Description

Methods, devices and systems using Memory Controller processing data error event
Technical field
Embodiments of the invention relate generally to field of computer memories, and are particularly, but not exclusively related to locate Mistake in memory devices for the reason.
Background technology
In the calculating world now, the computer system security having maintained and working time are typically important even It is enforceable.In order to maintain the great computer operation time, system designer establishes reliability, availability, can service Property, manageability (RASM) feature, to improve total system reliabilty and availability.Therefore, common is to find in this germline The various degree of redundancy, error correction, error detection and the erroneous packets that adopt at different stage in system contain technology.
One of most common type of computer system fault is owing to system storage mistake.Memory devices are easily subject to for example The impact of the mistake of transient state (or soft) mistake etc.If these mistakes are not correctly processed, they may cause calculating The system failure.Therefore, memory sub-system (especially dual inline memory modules or DIMM) is particularly noted to this Meaning.For example, the redundancy of error correcting code (ECC) form or other this error correction information can be used for memorizer cleaning operation, with Improve overall system reliability.The cleaning of demand memorizer is a kind of error detection/correction technology, wherein can be in operating process Mistake (either one or more mistakes) in middle detection memory fragmentation, to be accessed with the request of service host operating system Memory fragmentation.By contrast it is known that the mistake that another RASM technology patrolling and examining memorizer cleaning is directed to before is swept proactively Retouch memory fragmentation, or otherwise do not rely on any this host operating system and ask accessing memory fragmentation Scanning memory fragmentation.
Another RAS technology (being known as " memory ready ") (or " activity ") memory fragmentation in use occurs One or more memory fragmentations are distributed, each memory fragmentation can as standby segmentation when actual or expected following wrong For servicing.When this fault of error-detecting or other mechanism instruction memory fragmentation in use, backing storage Segmentation is assigned to serve as failed/follow-up (replacement) of segmentation just broken down.System memory map is updated The address being associated with the memory location of subsequent segment, for example, address realm, wherein previous this address mapped with many The identification of aspect ground is failed/relevant position of active segment just broken down.
Brief description
In figure in accompanying drawing shows each embodiment of the present invention by way of example, and not limitation, wherein：
Fig. 1 is according to the function of implementing the element exemplifying the computer platform for providing the access to memory fragmentation Block diagram.
Fig. 2 is the element exemplifying the Memory Controller for signaling memory error event according to enforcement Functional block diagram.
Fig. 3 is to be exemplified for call operation come the flow process of the element of the method for address memory errors event according to enforcement Figure.
Fig. 4 A, 4B are the flow processs that the element of method for address memory errors event is shown respectively according to embodiment Figure.
Fig. 4 C is the functional block diagram of the element according to the memory fragmentation distribution implementing to exemplify execution.
Fig. 5 A, 5B are the flow processs that the element of method for address memory errors event is shown respectively according to embodiment Figure.
Fig. 5 C is the functional block diagram of the element according to the memory fragmentation distribution implementing to exemplify execution.
Fig. 6 is according to the functional block diagram implementing the element exemplifying the computer system for control memory.
Fig. 7 is according to the functional block diagram implementing the element exemplifying the mobile platform for control memory.
Specific embodiment
Embodiment discussed here provides in many aspects in the platform including one or more backing storage segmentations Error detection.As it is used herein, " memory fragmentation " refer to can be independent of similar at one or more aspects Memory hardware unit and the unit of memory hardware that operates.Memory fragmentation can include arrange (rank), group (bank) or Other memory hardware parts, for example, wherein said part includes the memory location of multiple addressing differents.Memory fragmentation can It is exclusively used in only coupling by the bus of coupling between this segmentation and Memory Controller or other interconnection to include or to be coupled to Interface hardware to this segmentation rather than one or more of the other memory fragmentation.Alternatively or additionally, memory fragmentation Special chip can be included and support input, address decoder or other logic.Various herein in regard to arrange for each memorizer Realize memorizer cleaning and/or memory ready discusses the feature of specific embodiment.However, this discussion can expand to volume Other places or the memory fragmentation being alternately applied to arbitrarily various other types.
For example, it is possible to whether Intrusion Detection based on host operating system (OS) or other agency are currently able to access that given memorizer divides Section, and described memory fragmentation is categorized as activity or standby.Standby segmentation can be used for finally activating with serve as by It is identified as the replacement of another memory fragmentation of failed segmentation or segmentation of just breaking down.For simplicity, this segmentation Herein referred to as " failed/just breaking down ".Cleaning operation can be executed according to different embodiments in many aspects To detect (and in certain embodiments, correcting) mistake in one or more segmentations of memorizer.Specific embodiment is simultaneously It is not limited to calculate in many aspects, store by it and subsequent retrieval ECC or other this checking information are for holding The ad hoc fashion that row individuality error detection calculates.The specific detail of these modes adopt traditional error detection/correction technology and Mechanism, not here discuss with avoid obscure these embodiments feature.
Placeholder data (and corresponding error recovery information) can be based on, to execute the clear of backing storage segmentation Wash, Memory Controller and/or memory devices can for example account for described independent of main frame OS or other requestor agency Position symbol data for example stores in backing storage segmentation.During this cleaning of backing storage segmentation, standby segmentation can Can invisible to this requestor of other agency of main frame OS or the memory fragmentation accessing current active (for example, not step on to it Note).
Although Modern memory to be detected and/or correcting unit and double bit error using error correcting code (ECC), higher order Multi-bit error still creates important problem to system reliability and availability.Error detection mechanism generally includes for by mistake It is categorized as the function of one of correctable error or unrecoverable error.Conventional error handling techniques pass through to initiate to operating system Hardware check operation, and in many aspects in response to the unrecoverable error in memorizer.This operation includes execution system model The shutdown enclosed.
In general, conventional memory cleaning technique is not even supported to clean backing storage, not to mention offer is directed to Active segment and the different various error handling mechanism of standby segmentation.By contrast, specific embodiment provides and is based on and detection The memory fragmentation that the error event going out is associated is currently to be designated active segment or standby segmentation to signal not Same processing routine process.For example, the mistake for active segment detection can lead to hardware check exception or abnormality processing journey Other of sequence is this to be called.By contrast, the error event being associated with standby segmentation can lead to signal inhomogeneity The button.onrelease (for example, interrupt handling routine) of type.In an embodiment, standby segmentation error event leads in processor The event handling operation of execution during SMM, for example, but active segment error event can lead on the contrary at place The operation being executed by main frame OS during the different mode of reason device.Additionally or alternatively, active segment error event can lead to Cause the event handling operation of the replacement, collapse or other this " blue screen " event of flat roof area.Standby segmentation error event can To allow on the contrary to complete event handling operation, and do not rely on and restart or otherwise restart appointing of platform execution software What is the need for will.
Fig. 1 shows the element of the system 100 realized according to embodiment.System 100 represents any number of computing system, For example, including server, desk computer, laptop computer, mobile device, smart phone, game station etc., it can be many Error detection function and memory ready function are supported, as discussed herein in aspect ground.
System 100 can include memory sub-system 120, its via one or more data, order, address and/or its Its holding wire (interconnection 125 expression as shown) is coupled to Memory Controller 110, for example, when Memory Controller 110 at least portion Ground is divided to control the information between requestor and memory sub-system 120 to shift.For example, this requestor can be processor 150 (for example, CPU, graphic process unit, service processor, processor core and/or other), or alternately Can be input-output apparatus (for example, fast peripheral component connection (PCI) equipment), memorizer itself or be system 100 Request access memorizer any other element.In certain embodiments, Memory Controller 110 is in and includes requestor Integrated circuit (IC) tube core identical integrated circuit (IC) tube core on.
Memory sub-system 120 can include any one in polytype memory fragmentation, and for example, it has each Column of memory cells, wherein can access data via wordline or equivalent.In one embodiment, memory sub-system 120 Including dynamic random access memory (DRAM) technology, for example it is according to double data rate (DDR) specification, low electric power DDR (LPDDR) specification or other this memory standards are operated.Memory sub-system 120 can be that the larger of system 100 is deposited Integrated antenna package in storage device (not shown).For example, memory sub-system 120 can be that the DRAM of memory module sets Standby, such as dual inline memory modules (DIMM).
Memory Controller 110 can include logic (for example, including in multiple hardware logics and/or execution software logic Any one), with via interconnection 125 send order, thus in many aspects read, write or otherwise access memorizer One or more segmentations of system 120.One or more this orders can be deposited according to for accessing by Memory Controller 110 One or more routine techniques of reservoir are sending.The specific detail of this routine techniquess is not limited to specific embodiment, and at this It is not described in literary composition to avoid obscuring these embodiments.
By way of example, and not limitation, Memory Controller 110 can be included for providing command/address signaling work( The logic of energy, described function for example meets some or all requirements of double data rate (DDR) specification, and described DDR specification is for example DDR3 Synchronous Dynamic Random Access Memory (SDRAM) joint electron device engineering council (JEDEC) standard in April, 2008 JESD79-3C, the DDR4SDRAM JEDEC standard JESD79-4 of in September, 2012, or other this specification.
In the illustrated embodiment, memory sub-system 120 includes segmentation 130, and it is current " movable " in preset time, It is allocated for representing one or more requestor's storage informations.This distribution is at least in part by Memory Controller 110 Management.In preset time, segmentation 130 can include specific multiple segmentation, as by diagram segmentation 132a ..., 132n represent, its The colony of the segmentation 130 of middle activity can be activated (example with segmentation in the during the operation of memory sub-system 120 in many aspects As changed according to can use as standby segmentation) or disable (for example, disabling) and change.
Memory Controller 110 and memory sub-system 120 operate to realize error detection/correction function.For example, store Device controls 140 can include memorizer washer logic 114, including arbitrary in the multiple combination of hardware and/or execution software Kind, it is used for the current group that execution requires cleaning and/or patrols and examines cleaning active segment 130 in many aspects.By example not The mode limiting, memory sub-system 120, can be in many aspects in segmentation 130 under the control of Memory Controller 110 Respective data bit and corresponding error checking position, for example, error correcting code (ECC) position is stored in different segmentations.Based on this mistake Check position, memorizer washer logic 114 can execute computing to determine the correspondence being previously stored in memory sub-system 120 Whether data is now in damaged condition.
Memory Controller 110 can also include memory ready device logic 112, including hardware and/or execution software Any one in multiple combination, given in active segment 130 for example to identify in response to memorizer washer logic 114 Whether one active segment is classified as the segmentation of failed (and/or just breaking down).For example, clean based on from memorizer One or more instructions of device logic 114, memory ready device logic 112 can be for given one in active segment 130 Individual active segment detects some threshold error events, it may for example comprise reach the mistake of number of thresholds, reaches the mistake of threshold frequency Deng, with indicate need to replace described segmentation with one of one or more standby segmentations 140.
In response to certain threshold error event is detected, memory ready device logic 112 can signal event handling Device process, for example, is executed by processor 150 or the first pending processing routine 152, to realize, to follow the tracks of or with its other party Formula supports memory ready operation, thus from the current group of active segment 130 remove failed/just breaking down point Section, and currently one of one or more standby segmentations 140 are converted in the colony of active segment 130.First process journey Sequence 152 for example can include host operating system (OS) process, for example, be used for executing the OS process of hardware check operation.
In an embodiment, memorizer washer logic 114 includes the logic of additionally (or identical), to execute one further Or the current group of multiple segmentation 140 patrol and examine cleaning, each of described segmentation 140 can be used for by active segment Identification by stages be failed or serve as in the case of just breaking down standby.For example, one or more standby segmentations 140 are cleaned The feature for active segment 130 execution cleaning can be included.
Memory ready device logic 112 may also respond to currently this of standby segmentation 142 and patrols and examines cleaning to execute behaviour Make, with detect standby segmentation 142 whether be classified as failed/just breaking down.For example, wrong in response to threshold value is detected Cause delay part, memory ready device logic 112 can signal some other button.onrelease processes, for example, by place Second processing program 154 that is reason device 150 execution or will executing, to realize, follow the tracks of or otherwise to support from one or many The current group of individual standby segmentation 140 removes failed/segmentation of just breaking down.Second processing program 154 is for example permissible Including the interrupt handler processes of SMM (SMM), for example, when by SMM mode and processor 150 be used for execute During the alternating pattern differentiation of the universal host machine OS realizing the first processing routine 152.
Fig. 2 exemplifies the element of the Memory Controller 200 for executing memory ready and error detection according to enforcement. Memory Controller 200 can include one or more features of Memory Controller 110.For example, Memory Controller 200 wraps Include memory ready device logic 210 and memorizer washer logic 230, it can provide memory ready device logic 112 respectively Some or all functions with memorizer washer logic 114.
In an embodiment, memorizer washer logic 230 is included for calculating the segmentation being stored in memorizer in many aspects Whether the data in (not shown) includes the circuit logic of mistake, and it passes through the error detection logic 232 of diagram and represents.At some In embodiment, memorizer washer logic can also include error recovery logic 234, to correct some or all this in many aspects Plant mistake.The operation of error detection logic 232 and error recovery logic 234 can include execution and adopt conventional error detection/school One or more processes of positive technology.The specific detail of this routine techniquess is not limited in some embodiments, and herein It is not discussed to avoid obscuring the various features of these embodiments.
Memorizer washer logic 210 can include bad segmentation detection logic 212, bad segment lookup and replacement (L/R) and patrol Collect 220 and segmentation remapping logic 222.Bad segmentation detection can be realized in many ways.For example, bad segmentation detection logic 212 can follow the tracks of, based on the exchange with memorizer washer logic 230, the memorizer returning bad data during memory transaction Segmentation.For example, Memory Controller 200 can be reached to the memory requests of address in memorizer.Then this request is sent out Give system storage (not shown), and memorizer can return ECC information.The mistake inspection of memorizer washer logic 230 Survey logic 232 and can assess ECC information, to determine the mistake that whether there is affairs at the memory fragmentation at destination address. If having occurred that mistake, bad segmentation detection logic 212 can follow the tracks of affairs and result.Alternatively or additionally, bad point Section detection logic 212 can follow the tracks of the bad number returning during cleaning memory fragmentation (for example, active segment or standby segmentation) According to.Given wrong identification is being correctable (for example, giving error correction schemes available to Memory Controller), then The error recovery logic 234 of memorizer washer logic 230 can execute computing to generate correction (that is, the school of requested data Just) version.
In an embodiment, bad segmentation detection logic 212 can include or otherwise access errors threshold value 214, for example, Including max-thresholds error number, max-thresholds error number, threshold error type and/or other, it is accessed to determine currently examines Whether the particular fragments considered violate error thresholds 214.When representing this violation error thresholds 214, storage can be executed Device is standby.By way of example, and not limitation, when by movable identification by stages be failed/just break down, then divide Section L/R logic 220 can execute operation, to identify the standby segmentation of the segmentation as an alternative that will be activated for service.At some In embodiment, segmentation remapping logic 222 can determine memorizer map updating, its be implemented with support to disable failed/ Standby segmentation selected by the active segment just breaking down and/or activation.
Detect that segmentation that is failed or just breaking down can also include some logics of Memory Controller (by illustrating Processing routine calling logic 224 represent), signal to processing routine will execute event handling operation.In embodiment In, processing routine calling logic 224 is active segment or standby according to the failed/segmentation just broken down detecting Segmentation and call different processing routines.For example, it is movable based on failed/segmentation of just breaking down, processing routine Calling logic 224 can call the first processing routine, rather than second processing program.By contrast, when failed/just occur When the segmentation of fault is standby segmentation, processing routine calling logic 224 can alternatively call second processing program, rather than the One processing routine.
Fig. 3 is illustrated the element of the method 300 for control memory according to enforcement.For example, when by memorizer control During device 110 execution method 300 processed, method 300 can be performed to manage the segmentation of memorizer, such as memory sub-system 120.
Method 300 can include, at 310, the first cleaning of the memory fragmentation to multiple (only) activity for the execution.? At 310, the first cleaning of execution can include requiring cleaning operation and/or patrol and examine cleaning operation.In an embodiment, at 310 First cleaning includes the mistake that some detect is classified.For example, can include being categorized as mistake can school for the first cleaning Positive or uncorrectable.Alternatively or additionally, the first cleaning at 310 can include determining whether to have occurred that one A little threshold error events, for example, except or be different from any uncorrectable error event.
If it is determined that the first cleaning detects uncorrectable error at 320, then method 300 can be with letter at 330 Number notify the first processing routine process, to execute one or more button.onreleases operations.Although specific embodiment does not limit to In this, but the first processing routine can be executed by main frame OS, for example, during the common-mode of host-processor.First process Program process can include：For example, call or otherwise any one in multiple operations of memory ready is supported in realization. Unrestricted by example, the first processing routine process can include or lead to one or more of following：Signal Hardware error is to call hardware check, reset machine (for example, " blue screen " event), position one or more cache lines, lead to Know that main frame OS will be offline etc. corresponding to failed/one or more locked memory pages of segmentation of just breaking down.
If not indicating uncorrectable error event at 320, method 300 can execute to storage at 340 The one or more standby row of device patrols and examines cleaning.In another embodiment, execute 340 independent of the assessment at 320 Place patrols and examines cleaning, for example, wherein according to predetermined arrange execution at 340 patrol and examine cleaning some or all.Similar to The first cleaning at 310, patrolling and examining cleaning and can include for mistake being categorized as correctable (or uncorrectable) at 340, And/or detect any generation of one or more threshold error events.
If determining that at 350 cleaning of patrolling and examining at 340 detects uncorrectable error, method 300 can be Second processing program process is signaled, to execute one or more button.onrelease operations at 360.In an embodiment In, the first processing routine in the middle of the first processing routine process and second processing program process can be in response to inspection at 350 The unrecoverable error measuring and the unique process signaling.Alternatively or additionally, the first processing routine process and The first processing routine process during two processing routines can be in response to the uncorrectable error detecting at 320 and The unique processing routine process signaling.
Although specific embodiment is not limited thereto, second processing program process can be held in the SMM of processor OK.Second processing program process can include：For example, call or otherwise realize supporting from available standby segmentation pond Remove any one in multiple operations of segmentation.By way of example, and not limitation, second processing program process can include Or lead to update the one or more of segmentation L/R logic 220 (or other this logic), with reflect failed/just occurring therefore The standby segmentation of barrier is disabled and/or no longer available.Alternatively or additionally, can to failed/just breaking down standby With segmentation power down, from subsequently patrol and examine cleaning remove or otherwise with future memory system operatio isolate.When referring at 350 Show that when not having uncorrectable error, method 300 can terminate or may alternatively proceed to extra operation (not shown), example As wherein method 300 returns another execution of the movable rows cleaning at 310.
In an embodiment, any operation executing in response to the mistake detecting at 350 can independent of in response to The mistake that detects at 320 and execute a type of one or more operation.First processing routine process and second processing Program process does not comprise each other, at least with response to dividing for the uncorrectable error event of standby segmentation, relative motion The uncorrectable error event of section, the first processing routine process and second processing program process do not comprise each other.For example, first In the middle of processing routine process and second processing program process, the uncorrectable error recognizing at 320 can lead to only adjust With the first processing routine process.Alternatively or additionally, in the middle of the first processing routine process and second processing program process, The uncorrectable error recognizing at 350 can lead to only call second processing program process.Given failed/just send out The specific active state of the segmentation of raw fault could be at least in the first processing routine process and the relative to resting state Which select between two processing routine processes will to be called (for example, only one) during this two processing routines " except ... in addition to (but for) " condition.
Fig. 4 A is illustrated the element of the method 400 for control memory according to enforcement.For example, method 400 can be wrapped Include some or all in the feature of method 300.In an embodiment, at least partially through the operation of components as hardware platform One or more Memory Controllers 110,200 (or other this controller logic), to execute method 400.
In an embodiment, method 400 includes：At 410, execution is to (or other this point of the movable rows of platform memory Section) operation that is carried out, for example, such as herein in conjunction with first clean 310 discuss.In sequence 480 shown in Fig. 4 C, pin Wherein memorizer is included eight current actives row Rank0 ..., the scene of Rank7, " cleaning 1 " in stage 482 shows this One example of cleaning.Method 400 can subsequently be assessed by whether this cleaning (for example, during it) indicates at 412 Error in data.If not indicating this error in data at 412, carry out another assessment at 422 about whether complete Become the cleaning of movable rows.Without completing cleaning, then method 400 can continue movable rows cleaning operation at 410.Otherwise, Method 400 can be started to change to standby row's cleaning operation, as method 450 with reference to Fig. 4 B is discussed at this.
If passing through assessment instruction error in data at 412, at 414, method 400 can determine the mistake detecting Be (no) be correctable.If being uncorrectable in mistake indicated at 414, method 400 can be led to signal at 416 Know that the main frame OS of platform there occurs hardware error.Signalisation at 416 for example can include signaling hardware check (or other) abnormal, for example, as the signalisation at 330 herein in conjunction with method 300 is discussed.Process this abnormal possible Including or lead to system crash, system to reset or other this event, its ending method 400 in an embodiment.
On the contrary, if determining that at 414 error event indicated at 412 is correctable, method 400 can be At 418, execution error correction computing is to determine the correction versions damaging data.In addition, method 400 can determine at 420 Whether the error event detecting at 412 is constituted reaches (for example, exceeding) particular error threshold value CE_th_A, such as number of threshold values, can The percentage ratio of correction mistake and/or frequency.The occurrence (and/or type) of CE_th_A can be prior-constrained, and it being capable of basis Implement details and be extensively varied, and be not only restricted to specific embodiment.Without reaching CE_th_A, then method 400 can Complete movable rows cleaning to return to assessing whether at 422.
When determine at 420 reached CE_th_A when, method 400 can signal event handling at 424 Program code, to execute the operation supporting memory ready.For example can be (for example, in figure during the follow-up recurrence of method 400 During " cleaning 3 " in the stage 484 shown in 4C (e.g., after cleaning 1)) carry out this determination.In certain embodiments, exist The button.onrelease event signaling at 424 can be with the event that may otherwise signal at 416 Identical.Alternately, another button.onrelease process can be signaled.By way of example, and not limitation, permissible Signal system management interrupt, so that processor is converted to SMM, it may for example comprise change the pattern leaving main frame OS execution. In an embodiment, at 424, the signalisation of execution causes fault processing firmware or other this logic to start from assessment, management Or the operational transition one-tenth otherwise targeting movable rows targets the operation of one or more standby rows on the contrary.
For example, may lead to or otherwise prior to the standby row of the assessment at 426 whether in the signalisation at 424 Currently available.Replaced when all of original one or more standby row has previously been activated and has not added to memory sub-system During for standby row, make this assessment.Standby row is not had to can use if determined at 426, can be to management control station at 428 Or the other software enrolled for service request of computer software, for example provide need to replace during next service call DIMM or its The notice of its memory devices.
On the contrary, if determining that at 426 standby row is available, start to arrange standby operation at 430.At 430 Row is standby can to include activating the standby row that identifies at 426, and disables failed/row of just breaking down, for it The standby of activation will act as substituting.After at 430, execution row is standby, method 400 can be asked with enrolled for service, such as associated methods 450 are being discussed herein.Wash by standby the clearing executing in advance, for example, according to method 450, standby row to be activated prepares It is used on this activation (wherein standby row itself is not failed/row of just breaking down).For example, the storage of sequence 480 Device stand-by phase 486 can activate standby row Spare0 and serve as replacement activity row Rank0, wherein, for this activation execution Cleaning 2 earlier to Spare0 patrols and examines cleaning to confirm the fitness of Spare0.
Fig. 4 B shows for executing this standby element clearing the method 450 washed.Method 400,450 can be basis A kind of different piece of the larger method of one embodiment.Method 450 can include：At 460, execution is to platform memory (only) one or more standby rows patrol and examine cleaning operation, for example, as the cleaning institute of execution at 340 herein in conjunction with method 300 Discuss.This example patrolling and examining cleaning in sequence 480 by the stage 482 " cleaning 2 " (for example, after cleaning 1 and/or Before cleaning 3) represent, wherein memorizer only includes single standby row.Method 450 subsequently can be assessed at 462 and pass through this Plant and patrol and examine whether cleaning indicates error in data.If not indicating this error in data at 462, carry out at 472 with regard to Whether complete another assessment that standby row patrols and examines cleaning.If not yet completing to clean, method 450 can continue 460 Standby row's cleaning operation at place.Otherwise, in one embodiment, method 450 may return to activity and patrols and examines cleaning operation, for example Those operations at 410 of method 400.
If passing through assessment instruction error in data at 462, method 450 can determine the mistake detecting at 464 Be (no) be correctable.If being uncorrectable in mistake indicated at 464, method 450 can disable standby at 474 Row makes standby draining into cannot act as less substituting arbitrarily failed/future of movable rows of just breaking down.Behaviour at 474 Work can also include arranging one or more configurations, by standby row and one or more supply voltage trace decouplings, thus from Standby row patrols and examines and excludes this standby row in cleaning operation in the future, to disable, door or otherwise reduce timing and/or other.
On the contrary, if determining that at 464 error event indicated at 462 is correctable, method 450 can be Error correction computing is executed, to determine the new ECC of the correction versions damaging data or the damage version for data at 468. After the correction at 468 (or even previously or period), method 450 can determine the mistake detecting at 462 at 470 Whether event constitutes arrival (for example, exceeding) certain error thresholds CE_th_B, and it can include this threshold value of CE_th_A or another. Without reaching CE_th_B, then method 350 can return assessing whether at 472 and completed standby clearing and wash.
When at 470, determination has arrived at CE_th_B, it is standby to disable that method 450 can execute operation at 474 Row.In addition, method 500 can call processing routine to ask with enrolled for service at 476, instruction (such as) is in next service call Period needs to replace DIMM or other memory devices.In an embodiment, can be many-sided in different time under various conditions Ground operation at 476 for the execution, for example, the failed/work just broken down including as detected at 420 is replaced in registration Needs of the memory devices of dynamic row, or alternately, registration replace include as 464 or detect at 470 late Barrier/needs of the memory devices of standby row that just breaking down.Subsequently, method 450 can return in one embodiment Movable patrols and examines cleaning operation, such as those operations at the 410 of method 400.
Fig. 5 A shows the element according to embodiment for the other method 500 of control memory.For example, method 500 Some or all features of method 300 can be included.In an embodiment, execution method 500 carrys out control memory subsystem, its bag Include multiple movable rows (or other segmentation) and multiple standby row (segmentation).
In an embodiment, method 500 includes：At 510, the operation of the movable rows of execution cleaning platform memorizer, for example, As herein in conjunction with the first cleaning 310 discussion.The stage 592 of the sequence 590 illustrating in figure 5 c shows the example of this cleaning Son, includes the scene of eight current active rows for memorizer.Method 500 can subsequently be assessed by this cleaning (example at 512 As during cleaning) whether indicate error in data.If not indicating this error in data at 512, method 500 circulates Returning reactivates to clear at 510 washes.Otherwise, method 500 can determine at 514 the mistake detecting be (no) be recoverable 's.If being uncorrectable in mistake indicated at 514, for example method 500 can be communicated with the main frame OS of platform at 516 Hardware error or other signal are to start hardware check.On the contrary, if 514 determine 512 indicated at error event be can Correction, then method 500 can execute error correction computing at 518, to determine the correction versions damaging data.In addition, side Method 500 can determine whether to have reached certain error thresholds CE_th_X (for example, CE_th_A) at 520.If not yet reached CE_th_X, then method 500 can be circulated back to recover at 510 movable rows cleaning.
When determine at 520 reached CE_th_X when, method 500 can signal event handling at 524 Program, it is used for executing memory ready operation or the probability for this memory ready operation is prepared.By example Unrestriced mode, can signal system management interrupt, so that processor is converted to SMM, it may for example comprise change and leave The pattern of main frame OS execution.In an embodiment, at 524 execution signalisation so that fault processing firmware or other this Kind of logic start by processor from assessment, management or otherwise target movable rows operational transition become to target on the contrary one or The operation of multiple standby rows.For example, as shown by the stage method 594 of sequence 590, movable Rank0 can be known by method 500 Wei be not failed/just breaking down, and as response, it is converted to the operation of those operations of the method 550 of such as Fig. 5 B.
Fig. 5 B shows the element for executing the standby method 550 clearing and washing.Method 500,550 can be according to one The different piece of one larger method of embodiment.In an embodiment, method 550 includes：At 560, it is determined whether exist standby Can be used for assessing and may be elected to be the failed/replacement of row that just breaking down identifying with row.Available standby when not having During with row, method 550 can call processing routine or other process to carry out enrolled for service request at 580, substitutes one to indicate Or the needs of multiple DIMM or other memory devices, for example, provide new movable rows, new standby row or both.
When can be used for evaluated in the 560 standby rows of determination, method 500 can be standby by detect at 560 at 562 It is assigned as evaluated currently standby row with row.Then method 500 can execute clear to patrolling and examining of currently standby row at 564 Wash.In sequence 590, this example patrolling and examining cleaning is represented by the stage 594, wherein memorizer include standby row Spare0, Spare1, wherein current movable Rank0 have been previously identified as failed/just breaking down, and be wherein directed to and to patrol and examine Cleaning have selected Spare0.Method 550 subsequently can be assessed at 566 and patrol and examine whether cleaning indicates error in data by this. If not indicating this error in data at 566, carry out whether cleaning with regard to patrolling and examining of currently standby row at 576 Another assessment completing.If not yet completing to clean, method 550 can continue movable rows cleaning operation at 564.Otherwise, In one embodiment, method 550 can at 578 the row of realization standby, with activate currently standby row serve as failed/ The replacement (row detecting at 520 as method 500) of the row just breaking down.The example of one this memory ready is in sequence Illustrated by stage 596a in row 590, wherein, standby row Spare0 is activated to serve as new movable Rank0.
If indicating error in data by the assessment at 566, method 550 can determine the mistake detecting at 568 Be (no) be correctable.If being uncorrectable in mistake indicated at 568, method 550 can disable currently at 574 Standby row makes currently standby draining into cannot act as less substituting arbitrarily failed/future of movable rows of just breaking down.? Operation at 574 can also include arranging one or more configurations, by currently standby row and supply voltage trace decoupling, and/ Or patrol and examine cleaning operation exclusion currently standby row from standby row in the future.Sequence 590 is passed through stage 596b (for example, the stage The replacement of 596a) represent the example of this standby row disabling, wherein Spare0 be identified as on the contrary failed/just break down Row, and subsequently by another standby row Spare1 be assigned as currently standby row for assessment.Subsequently, method 500 can return Assess whether 560 another standby rows can serve as to be assessed next currently standby row.
On the contrary, if determining that at 568 error event indicated at 566 is correctable, method 550 can be Correct mistake at 570, and determination has reached some error thresholds CE_th_Y (for example, CE_th_B) at 572.When reaching During CE_th_Y, method 550 can execute operation to disable standby row at 574.Otherwise, method 500 may proceed to execute Assessment at 576.The stage 598 of sequence 590 illustrates scene, wherein, memory ready after stage 596b, at 578 Standby row Spare1 is activated for use as replacement Rank0.
Fig. 6 is the block diagram of the embodiment of the computing system realizing memory access wherein.System 600 represents according to herein The computing device of any embodiment of description is it is possible to be laptop computer, desk computer, server, game or amusement Control system, scanner, photocopier, printer or other electronic equipment.System 600 can include processor 620, and it is system 600 offer process, operation management and execute instruction.Processor 620 can include any type of microprocessor, central authorities process list First (CPU), processing core or other process hardware, to process for system 600 offer.Processor 620 control system 600 whole Gymnastics make it is possible to be or include one or more general programmables or special microprocessor, digital signal processor (DSP), Programmable Logic Controller, special IC (ASIC), programmable logic device (PLD) etc., or the combination of this equipment.
Memory sub-system 630 represents the main storage of system 600, and provides to the code that will be executed by processor 620 Or for executing the interim storage of the data value of routine.Memory sub-system 630 can include one or more memory devices, Such as one or more of read only memory (ROM), flash memory, various random access memory (RAM), or other deposits Storage device, or the combination of these equipment.Among others, memory sub-system 630 storage trustship operating system (OS) 636 etc., to provide the software platform of execute instruction in system 600.In addition, storing from memory sub-system 630 and executing it It instructs 638, is processed with the logical sum providing system 600.OS 636 and instruction 638 are executed by processor 620.
Memory sub-system 630 can include memory devices 632, wherein data storage, instruction, program or other item Mesh.In one embodiment, memory sub-system includes Memory Controller 634, and it is according to any embodiment described herein Memory Controller, and provide the mechanism for accessing memory devices 632.In one embodiment, memorizer controls Device 634 provides order to access memory devices 632.
Processor 620 and memory sub-system 630 are coupled to bus/bus system 610.Bus 610 is to represent any one Individual or multiple single physical bus, order wire/interface and/or the point being connected by suitable bridge, adapter and/or controller Abstract to a connection.Therefore, bus 610 for example can include one or more of following：System bus, peripheral components are mutual Even (PCI) bus, super transmission or Industry Standard Architecture (ISA) bus, small computer system interface (SCSI) bus, general string Row bus (USB) or Institute of Electrical and Electronics Engineers (IEEE) standard 1394 bus (being referred to as firewire).Bus 610 Bus is also can correspond to the interface in network interface 650.
System 600 can also include one or more input/output (I/O) interface 640, network interface 650, or many Individual internal mass storage device 660 and be coupled to the Peripheral component interface 670 in bus 610.I/O interface 640 can wrap Include one or more interface units, user can be interacted with system 600 by described interface unit (for example, video, audio frequency and/or Alphanumeric interface).Network interface 650 is provided to system 600 and is led to remote equipment (for example, server, other computing device) The ability crossed one or cross network service.It is (logical that network interface 650 can include Ethernet Adaptation Unit, radio interconnected part, USB With universal serial bus) or other based on wired or wireless standard or proprietary interface.
Storage device 660 can be or include Jie of any conventional for storing mass data in a non-volatile manner Matter, for example, one or more disks based on magnetic, solid-state or light or a combination thereof.Storage device 660 with permanent state preserve code or Instruction and data 662 (that is, the retention value regardless of the power breakdown to system 600).Storage device 660 may be generally considered to be and is " memorizer ", although memorizer 630 is execution or the operation memorizer providing instruction to processor 620.But storage device 660 Non-volatile, memorizer 630 can include volatile memory (that is, when the power breakdown to system 600, data Value or state are uncertain).
Peripheral component interface 670 can include the above-mentioned any hardware interface specially not referred to.Peripheral components refer generally to It is the equipment in the system that is independently connected to 600.Independent connection be system 600 provide can execute thereon operation software and/ Or hardware platform being connected using a kind of its with user mutual.
Fig. 7 is the block diagram of the embodiment of mobile device that can realize memory access wherein.Equipment 700 represents movement Computing device, for example, calculate flat board, mobile phone or smart phone, the electronic reader that support is wireless or other movement set Standby.It is understood that generally illustrating some parts, and in equipment 700, not show all of this equipment Part.
Equipment 700 can include processor 710, the main process operation of its execution equipment 700.Processor 710 can wrap Include one or more physical equipments, such as at microprocessor, application processor, microcontroller, programmable logic device or other Reason unit.Process operation performed by processor 710 includes executing operating platform or operating system, in this operating platform or operation Execution application and/or functions of the equipments in system.Process operation include with by the I/O of human user or miscellaneous equipment (input/defeated Go out) the related operation operation relevant with electrical management, and/or equipment 700 is connected to another device-dependent operation.Place Reason operation can also include the operation related to audio frequency I/O and/or display I/O.
In one embodiment, equipment 700 includes audio subsystem 720, and it represents provides audio frequency work(with to computing device Hardware (for example, audio hardware and voicefrequency circuit) that can be associated and software (for example, driver, coding decoder) part.Sound Frequency function can include speaker and/or earphone output and microphone input.Equipment for this function is desirably integrated into In equipment 700, or it is connected on equipment 700.In one embodiment, received by processor 710 by providing and the sound that processes Frequency is ordered, and user is interacted with equipment 700.
Display subsystem 730 represents hardware (for example, display device) and software (for example, driver) part, and it is user There is provided vision and/or tactile display to interact with computing device.Display subsystem 730 can include display interface 732, its The specific screens for providing a user with display or hardware device can be included.In one embodiment, display interface 732 includes Logic detached with processor 710, to execute and to show at least some related process.In one embodiment, show subsystem System 730 includes touch panel device, and it provides a user with both output and input.
I/O controller 740 represent to and the related hardware device of user mutual and software part.I/O controller 740 is permissible Operation is to manage the hardware of the part as audio subsystem 720 and/or display subsystem 730.In addition, I/O controller 740 Show that extras are connected to the junction point of equipment 700, user can be with system interaction by this junction point.For example, it is attached Equipment on equipment 700 can include microphone apparatus, speaker or stero, video system or other display device, Keyboard or keypad equipment or the other I/O equipment being used together with concrete application (for example, card reader or miscellaneous equipment).
As described above, I/O controller 740 can be interacted with audio subsystem 720 and/or display subsystem 730.For example, Can be provided for one or more applications of equipment 700 or the input of function by the input of mike or other audio frequency apparatus Or order.In addition, it is provided that audio output as an alternative or in addition to display output.In another example, if display System includes touch screen, then display device also serves as input equipment, and it can be managed by I/O controller 740 at least in part. Extra button or switch be there is likely to be on equipment 700, to provide the I/O function of being managed by I/O controller 740.
In one embodiment, I/O controller 740 management equipment, such as accelerometer, video camera, optical sensor or its Its environmental sensor, gyroscope, global positioning system (GPS) or the other hardware in equipment 700 can be contained in.Input can To be a part for end user's interaction, and environment input is provided (for example, to cross noise filtering, be directed to affect its operation to system Brightness detection adjusts display, applies flash of light or further feature for video camera).
In one embodiment, equipment 700 includes electrical management 750, its management battery electric quantity use, the charging of battery, And the feature related to power-save operation.Memory sub-system 760 can include memory devices 762, in equipment 700 Storage information.Memory sub-system 760 can include that non-volatile (state does not change when interrupting to the electric power of memory devices Become) and/or volatibility (state does not know when interrupting the electric power to memory devices) memory devices.Memorizer 760 is permissible Storage application data, user data, music, photo, file or other data, and the application with execution system 700 and function Related system data (long-term or interim).In one embodiment, memory sub-system 760 includes Memory Controller 764 (it can also be considered a part for the control of system 700, and may be considered a part for processor 710), to control Memorizer 762.
Connect 770 and can include hardware device (for example, wireless and/or wired connector and communication hardware) and software part (for example, driver, protocol stack), so that equipment 700 can be with external device communication.Equipment can be independent equipment, For example other computing devices, radio access point or base station and peripheral components (as earphone, printer or miscellaneous equipment).
Connect 770 and can include multiple different types of connections.Generally, equipment 700 illustrates with cellular connection 772 Connect 774 with wireless.Cellular connection 772 is generally referred to as connected by the cellular network that wireless carrier provides, such as via GSM (time-division multiplex is multiple for (global system for mobile communications) or modification or derivant, CDMA (CDMA) or modification or derivant, TDM With) or modification or derivant, LTE (Long Term Evolution is also referred to " 4G ") or other cellular service standard provided.Wirelessly connect Connect 774 and refer to not be the wireless connection of honeycomb it is possible to include Personal Area Network (for example, bluetooth), LAN (for example, WiFi) And/or wide area network (for example, WiMAX), or other radio communication.Radio communication refers to by using through non-solid medium The electromagnetic radiation transfer data adjusted.Wire communication is occurred by solid communication media.
Peripheral components connect 780 and include hardware interface and adapter and software part (for example, driver, protocol stack) To carry out peripheral components connection.It is understood that equipment 700 can be to other computing devices ancillary equipment (" to " 782) and make ancillary equipment connected (" from " 784).Equipment 700 generally has and is connected to the " right of other computing devices Connect " adapter, for the purpose of content on equipment 700 for the such as management (e.g., download and/or upload, change, synchronization).Separately Outward, butt connector can allow equipment 700 to be connected to specific peripheral components, and its permission equipment 700 control content exports Such as audiovisual or other system.
In addition to special butt connector or other special connection hardware, equipment 700 is also via common or be based on standard Adapter carry out peripheral components connect 780.General type can include USB (universal serial bus) (USB) adapter, and (it is included very Any hardware interface in many different hardware interface), display port (it includes mini display port (MDP)), the many matchmakers of high-resolution Body interface (HDMI), live wire or other type.
In one implementation, Memory Controller includes washer logic, and it includes such circuit：Its execution is deposited The first of multiple active segment of reservoir patrols and examines cleaning, and execute platform one or more segmentations second patrol and examine cleaning, with When each of one or more segmentations can be used as the standby segmentation of multiple active segment.Memory Controller also includes standby Device logic, it includes such circuit：Patrol and examine the first uncorrectable error thing that cleaning detects for receiving based on first The instruction of part, wherein, in the middle of the first processing routine process and second processing program process, described standby device logical response is in The instruction of one unrecoverable error event only signals the first processing routine process；Described standby device logic is additionally operable to receive Based on the second instruction patrolling and examining the second uncorrectable error event that cleaning detects, wherein, in the first processing routine process In second processing program process, described standby device logical response is only led to signal in the instruction of the second unrecoverable error event Know second processing program process.
In an embodiment, the first processing routine process includes hardware check exception handler.In another embodiment, Two processing routine processes include interrupt handling routine.In another embodiment, second processing program process enrolled for service request with Replace memory devices.In another embodiment, in the host operating system term of execution by computing device first processing routine Process, and execute second processing program process during the SMM of processor.In another embodiment, when being based on First patrols and examines cleaning when threshold value correctable error event is detected, and standby device logic also signals different from the first process Processing routine process, any processing routine wherein signaling in response to threshold value correctable error event is different from first The processing routine process of processing routine process.In another embodiment, standby device logic signals different from the first process Processing routine process include：Standby device logic signals the process journey of execution during the SMM of processor Program process.
In another implementation, what a kind of method included executing multiple active segment of memorizer first patrols and examines cleaning, And patrol and examine cleaning if based on first and uncorrectable error event is detected, then signal the first processing routine mistake Journey, wherein, in the middle of the first processing routine process and second processing program process, in response to patrolling and examining what cleaning detected by first Uncorrectable error event, only signals the first processing routine process.Methods described also includes execution to memorizer The second of one or more segmentations patrols and examines cleaning, and each of one or more segmentations simultaneously can be used as multiple active segment Standby segmentation, and patrol and examine cleaning if based on second and uncorrectable error event is detected, then signal at second Reason program process, wherein, in the middle of the first processing routine process and second processing program process, in response to patrolling and examining cleaning by first Uncorrectable error event is detected, only signal the first processing routine process.
In an embodiment, the first processing routine process includes hardware check exception handler.In another embodiment, Two processing routine processes include interrupt handling routine.In another embodiment, second processing program process enrolled for service request with Replace memory devices.In another embodiment, in the host operating system term of execution by computing device first processing routine Process, and execute second processing program process during the SMM of processor.In another embodiment, described side Method also includes：When patrolling and examining cleaning based on first and threshold value correctable error event is detected, signal different from the first mistake The processing routine process of journey, any processing routine wherein signaling in response to threshold value correctable error event is to be different from The processing routine process of the first processing routine process.In another embodiment, signal the process different from the first process Program process includes：Signal the processing routine process of execution during the SMM of processor.
In another implementation, a kind of system include one or more memory devices, interconnection and via interconnection with The Memory Controller of one or more memory devices couplings, described Memory Controller is used for controlling one or more storages Device equipment.Memory Controller includes washer logic, and it includes such circuit：It executes one or more memory devices Multiple active segment first patrol and examine cleaning, and execute one or more memory devices one or more segmentations second Patrol and examine cleaning, each of one or more segmentations simultaneously can be used as the standby segmentation of multiple active segment.Memorizer controls Device also includes standby device logic, and it includes such circuit：For receive based on first patrol and examine that cleaning detects first can not The instruction of the error event of correction, wherein, in the first processing routine process and second processing program process, described standby device is patrolled Collect the instruction in response to the first unrecoverable error event and only signal the first processing routine process；Described standby device logic It is additionally operable to receive based on the second instruction patrolling and examining the second uncorrectable error event that cleaning detects, wherein, at first In reason program process and second processing program process, described standby device logical response is in the instruction of the second unrecoverable error event Only signal second processing program process.
In an embodiment, the first processing routine process includes hardware check exception handler.In another embodiment, Two processing routine processes include interrupt handling routine.In another embodiment, second processing program process enrolled for service request with Replace memory devices.In another embodiment, in the host operating system term of execution by computing device first processing routine Process, and execute second processing program process during the SMM of processor.In another embodiment, when being based on When first cleaning detects threshold value correctable error event, standby device logic also signals the process different from the first process Program process, any processing routine wherein signaling in response to threshold value correctable error event is different from the first process The processing routine process of program process.
In another implementation, a kind of computer-readable recording medium being stored thereon with instruction, when by one or many During individual processing unit execution, described instruction makes one or more processing units execute a kind of method, and methods described includes executing The first of multiple active segment of memorizer patrols and examines cleaning, and patrols and examines cleaning if based on first and uncorrectable mistake is detected Cause delay part, then signal the first processing routine process, wherein, in the first processing routine process and second processing program process In, uncorrectable error event is detected in response to patrolling and examining cleaning by first, only signal the first processing routine process. What methods described also included executing one or more segmentations of memorizer second patrols and examines cleaning, simultaneously in one or more segmentations Each can be used as the standby segmentation of multiple active segment, and patrol and examine cleaning if based on second and uncorrectable mistake is detected Cause delay part, then signal second processing program process, wherein, in the first processing routine process and second processing program process In, in response to patrolling and examining, by first, the uncorrectable error event that cleaning detects, only signal the first processing routine mistake Journey.
In an embodiment, the first processing routine process includes hardware check exception handler.In another embodiment, Two processing routine processes include interrupt handling routine.In another embodiment, second processing program process enrolled for service request with Replace memory devices.In another embodiment, in the host operating system term of execution by computing device first processing routine Process, and execute second processing program process during the SMM of processor.
It is described herein the technology for control memory and framework.In the foregoing description, for illustrative purposes, Elaborate a large amount of details, to provide the thorough understanding to specific embodiment.However, it will be appreciated by those skilled in the art that Be can to put into practice specific embodiment in the case of not possessing these details.In other examples, show in form of a block diagram Go out structure and equipment, to avoid obscuring described description.
Quote special characteristic, the structure that " embodiment " or " embodiment " expression describes in conjunction with the embodiments in the description Or characteristic is contained at least one embodiment of the present invention.The phrase " in one embodiment " occurring everywhere in the description Same embodiment need not be all referred to.
Represent to represent the concrete reality of this paper according to the algorithm of the operation in data bit in computer storage and symbol Apply some parts of mode.The mode that these arthmetic statements are used with the technical staff that expression is calculating field, with most effective Its work is substantially conveyed to others skilled in the art by ground.Algorithm is contemplated that leads to expected result here and usually Step self-compatibility sequence.Step is the step of the physical manipulation needing physical quantity.Generally but not necessary, this tittle is taken The signal of telecommunication or the form of magnetic signal, it can be stored, is shifted, being combined, being compared and otherwise being manipulated.Mainly for common Use purpose it has been demonstrated that when these signals are referred to as position, value, element, symbol, character, term, numeral etc. the side of being Just.
It should be borne in mind, however, that all these will be associated with suitable physical quantity with similar terms, and it is only to apply Convenient label on this tittle.Unless significantly separately had statement it is to be understood that throughout description from being discussed herein, Using for example " process " or " calculating " or " computing " or the term such as " determination " or " display " discussion refer to computer system or The action of similar electronic computing device and process, it will be expressed as physics (electricity in the RS of computer system Son) data manipulation measured and being converted to similarly in computer system memory or depositor or other this information Store, biography It is expressed as other data of physical quantity in defeated or display device.
Specific embodiment further relates to apparatus for performing the operations herein.This device can be for required purpose Special configuration, or its can include optionally by be stored in computer computer program activation or configuration general meter Calculation machine.This computer program can be stored in computer-readable recording medium, such as but not limited to, any type of disk, Including floppy disk, CD, CD-ROM and magneto-optic disk, read only memory (ROM), random access memory (RAM) such as dynamic ram (DRAM), EPROM, EEPROM, magnetic or optical card or be suitable to store e-command and be coupled on computer system bus appoint The medium of meaning type.
Algorithm presented herein and display are not inherently related to any specific computer or other device.According to this paper's Instruct various general-purpose systems can be used together with program, or may certify that the more general device of construction is required to execute Method and step is convenient.According to description herein, will be apparent from for the structure required by these systems multiple.Separately Outward, and uncombined any specific programming language describes specific embodiment.It is understood that can be come using multiple programming languages Realize the teaching of this embodiment described herein.
Except described herein, various modifications can be made to the disclosed embodiments and its implementation, and not carry on the back From its scope.Therefore, the diagram of this paper and example should be construed to illustrative and not restrictive.Should be solely by reference to Accompanying claims measure the scope of the present invention.

Claims (25)

1. a kind of Memory Controller, including：
Washer logic, it includes such circuit：The first of multiple active segment of its execution memorizer patrols and examines cleaning, and holds The second of one or more segmentations of row platform patrols and examines cleaning, and each of one or more of segmentations simultaneously can act as The standby segmentation of the plurality of active segment；And
Standby device logic, it includes such circuit：Its reception patrols and examines detected by cleaning first based on described first can not The instruction of the error event of correction, wherein, in the middle of the first processing routine process and second processing program process, described standby device Logical response, in the instruction of described first uncorrectable error event, only signals described first processing routine process； Described standby device logic also receives based on the described second finger patrolling and examining the second detected uncorrectable error event of cleaning Show, wherein, in the middle of the first processing routine process and second processing program process, described standby device logical response is in described second The instruction of uncorrectable error event, only signals described second processing program process.
2. Memory Controller according to claim 1, wherein, it is different that described first processing routine process includes hardware check Often processing routine.
3. Memory Controller according to claim 1, wherein, described second processing program process includes interrupt processing journey Sequence.
4. Memory Controller according to claim 1, wherein, memorizer is replaced in described second processing program process registration The service request of equipment.
5. Memory Controller according to claim 1, wherein, described first processing routine process is in host service function system The system term of execution is by computing device, and wherein, described second processing program process is the system pipes in described processor Execution during reason pattern.
6. Memory Controller according to claim 1, described standby device logic is further used for：If based on described One patrols and examines cleaning detects threshold value correctable error event, then signal the processing routine mistake different from described first process Journey, wherein, any process program process signaling in response to described threshold value correctable error event is different from institute State the processing routine process of the first processing routine process.
7. Memory Controller according to claim 6, wherein, described standby device logic signals different from described The processing routine process of the first process includes：Described standby device logic signals during the SMM of processor The processing routine process of execution.
8. a kind of method, including：
The first of multiple active segment of execution memorizer patrols and examines cleaning；
Patrol and examine cleaning if based on described first and uncorrectable error event is detected, then signal the first processing routine Process, wherein, in the middle of described first processing routine process and second processing program process, clear in response to being patrolled and examined by described first Wash the described uncorrectable error event detecting, only signal described first processing routine process；
Execute described memorizer one or more segmentations second patrol and examine cleaning, simultaneously every in one or more of segmentations One standby segmentation that can act as the plurality of active segment；And
Patrol and examine cleaning if based on described second and uncorrectable error event is detected, then signal described second processing Program process, wherein, in the middle of described first processing routine process and second processing program process, in response to being patrolled by described first The described uncorrectable error event that inspection cleaning detects, only signals described first processing routine process.
9. method according to claim 8, wherein, described first processing routine process includes hardware check abnormality processing journey Sequence.
10. method according to claim 8, wherein, described second processing program process includes interrupt handling routine.
11. methods according to claim 8, wherein, memory devices are replaced in described second processing program process registration Service request.
12. methods according to claim 8, wherein, described first processing routine process is in host operating system execution Period is by computing device, and wherein, described second processing program process is the SMM in described processor Period execution.
13. methods according to claim 8, also include：
Patrol and examine cleaning if based on described first and threshold value correctable error event is detected, then signal different from described The processing routine process of one process, wherein, any process of signaling in response to described threshold value correctable error event Program process is the processing routine process different from described first processing routine process.
14. methods according to claim 13, wherein, signal the processing routine mistake different from described first process Journey includes：Signal the processing routine process of execution during the SMM of processor.
A kind of 15. systems, including：
One or more memory devices；
Interconnection；And
The Memory Controller coupling with one or more of memory devices via described interconnection, described Memory Controller For controlling one or more of memory devices, described Memory Controller includes：
Washer logic, it includes such circuit：It executes multiple active segment of one or more of memory devices First patrol and examine cleaning, and execute one or more of memory devices one or more segmentations second patrol and examine cleaning, Each of one or more of segmentations simultaneously can act as the standby segmentation of the plurality of active segment；And
Standby device logic, it includes such circuit：Its receive based on described first patrol and examine that cleaning detects first can not school The instruction of positive error event, wherein, in the middle of the first processing routine process and second processing program process, described standby device is patrolled Collect the instruction in response to described first uncorrectable error event and only signal described first processing routine process；Described Standby device logic also receives based on the described second instruction patrolling and examining the second uncorrectable error event that cleaning detects, its In, in the middle of described first processing routine process and described second processing program process, described standby device logical response is in described The instruction of the second uncorrectable error event only signals described second processing program process.
16. systems according to claim 15, wherein, described first processing routine process includes hardware check abnormality processing Program.
17. systems according to claim 15, wherein, described second processing program process includes interrupt handling routine.
18. systems according to claim 15, wherein, memory devices are replaced in described second processing program process registration Service request.
19. systems according to claim 15, wherein, described first processing routine process is in host operating system execution Period is by computing device, and wherein, described second processing program process is the SMM in described processor Period execution.
20. systems according to claim 15, described standby device logic is further used for：If based on the described first cleaning Threshold value correctable error event is detected, then signal the processing routine process different from described first process, wherein, ring Threshold value correctable error event described in Ying Yu and any process program process of signaling is different from the described first process The processing routine process of program process.
A kind of 21. computer-readable recording mediums being stored thereon with instruction, when being executed by one or more processing units, institute Stating instruction makes one or more of processing units execute a kind of method, and methods described includes：
The first of multiple active segment of execution memorizer patrols and examines cleaning；
Patrol and examine cleaning if based on described first and uncorrectable error event is detected, then signal the first processing routine Process, wherein, in the middle of described first processing routine process and second processing program process, clear in response to being patrolled and examined by described first Wash the described uncorrectable error event detecting, only signal described first processing routine process；
Execute described memorizer one or more segmentations second patrol and examine cleaning, simultaneously every in one or more of segmentations One standby segmentation that can act as the plurality of active segment；And
Patrol and examine cleaning if based on described second and uncorrectable error event is detected, then signal described second processing Program process, wherein, in the middle of described first processing routine process and second processing program process, in response to being patrolled by described first The uncorrectable error event that inspection cleaning detects, only signals described first processing routine process.
22. computer-readable recording mediums according to claim 21, wherein, described first processing routine process includes machine Device checks exception handler.
23. computer-readable recording mediums according to claim 21, wherein, during described second processing program process includes Disconnected processing routine.
24. computer-readable recording mediums according to claim 21, wherein, described second processing program process registration is replaced Change the service request of memory devices.
25. computer-readable recording mediums according to claim 21, wherein, described first processing routine process is to lead The machine operating system term of execution is by computing device, and wherein, described second processing program process is in described processor SMM during execution.
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