TW522544B - Production method for semiconductor crystal and semiconductor element - Google Patents

Abstract

Object of the present invention is to make a semiconductor single crystal free of cracks, polycrystal lumps, etc., on a Si substrate. A reaction-inhibiting layer is formed in order to prevent the reaction of Si and a semiconductor of a gallium nitride (GaN) system and the reaction-inhibiting layer (crystalline material B) consisting of, for example, SiC or AlN, etc., having a melting point or heat resistance higher than that of the semiconductor (semiconductor crystal A) of the gallium nitride system is deposited on the ground surface substrate (Si substrate) in the manner described above, by which the 'reaction section' consisting of GaN polycrystal lumps, etc., near the silicon boundary is no longer formed even in the case the crystal of the semiconductor (semiconductor crystal A) of the gallium nitride system is grown for a long time. Also, many projecting parts are formed, by which the semiconductor (semiconductor crystal A) of the gallium nitride system is grown in a transverse direction as well with the planar apexes of the projecting parts as start points. As a result, the stress between the reaction-inhibiting layer and the semiconductor crystal A is drastically relieved and the through-cracks of the longitudinal direction are not produced in the reaction-inhibiting layer and therefore the Si substrate can be surely shut off and the reaction-inhibiting effect is made sure.

Description

522544 V. Description of the invention (1) The technology to which the invention belongs The present invention relates to the production of semiconductors by growing a crystal composed of a group 11 nitride compound semiconductor on an underlying substrate formed of silicon (S i). Substrate method. The present invention also relates to an I I I group nitride compound semiconductor device manufactured by using the semiconductor substrate as a crystal growth substrate. Known Technology 5 FIG. 5 is a schematic cross-sectional view illustrating a conventional semiconductor crystal for crystal growth on a Shi Xi substrate (base substrate). In this crystal growth step, a MOCVD method is used, as exemplified in FIG. 5, in a semiconductor crystal (gallium nitride crystal, etc.) that is grown at a high temperature on a silicon substrate (base substrate) by a conventional technique. , "Reaction part", displacement, cracks, etc. will occur. The errors and displacements that Wuming wants to solve are based on the effects of the stress caused by the difference in thermal expansion coefficients and lattice constants between dissimilar materials. In this way, the growth substrate In the case where various semiconductor devices are manufactured, the characteristics of the standby device are deteriorated. θ For example, if the underlying substrate made of silicon is removed and only the remaining layer is removed, in order to obtain an independent substrate (crystal), it is necessary to obtain a large area (more than 1 cm2) due to the effects of ^ and cracks described above. Jixi

can. Yigekou J, and the crystal growth temperature of the target semiconductor substrate (100 degrees ° C ~ 1150 ° C near Shi Xi will crystallize thallium nitride ("reverse semiconductor crystal A") Reacting with gallium nitride may form multiple parts "). Therefore,

V. Description of the invention (2) ______ A high-temperature crystallization jig, etc. is% ~ It is not easy to wait for a single-crystal gallium nitride substrate in the process. The present invention was proposed by using a relatively inexpensive solution to solve the above-mentioned problems. The purpose of the present invention is to produce a semiconductor having no cracks and no polycrystalline blocks by using the substrate f of the (reaction part) as an underlying substrate. crystallization. In addition, another object of the present invention is to produce high-quality semiconductor crystals having the above-mentioned high-quality semiconductor crystals, and to manufacture high-quality semiconductor devices. Functions and Developments That is, the problems described below & 1 ' are effective. It is a manufacturing method of semiconductor crystals by using 4 directions in the horizontal direction. The growth is performed by I i growth, and the base substrate crystal A formed of silicon is used to produce a compound semiconductor. The method for forming a semiconductor junction reaction prevention step substrate has the following steps: On the underlying substrate of the conductor crystal A, a melting point or heat resistance higher than a half step is formed, and the reaction prevention layer composed of As material B is formed. Film; protrusion-shaped stop layer film: lateral or physical etching 'to form at least a number of ^ = faces on which formation of the reaction is prevented, at least the crystal growth step from the reaction prevention layer without exposing the underlying substrate ... the protrusion The surface of the surface grows so that the initial connection of the half body to start crystal growth becomes at least a continuous plane. This growth surface is mutually composed of the above-mentioned semi-conductor composed of the semiconductor crystal A, and it is an early layer structure or a multi-layer structure (multilayer structure). Bovine substrate, but also the so-called "丨 丨 nitride σ + conductor"

522544 V. Description of the invention (3) Any formula represented by the general formula "AlxGayln (ixy) N (0 $ 1,0 $ 1, 〇'x + y $ 1)" which usually contains 2 components, 3 components, or 4 components Semiconductors with mixed crystal ratios, and semiconductors with p-type or η-type impurities also fall within the scope of the "I 11 nitride-based compound semiconductors" in this specification. ^ In addition, the above-mentioned I Π group elements (A1, Ga, I η), part of which is replaced by Shi Peng (B) or I (T 1), etc., or part of nitrogen (N) is dish (ρ), Shi Shen (As), 绨Semiconductors such as (Sb) and bismuth (Bi) are also examples of "Group III nitride-based compound semiconductors" in this specification. In addition, as the p-type impurity, for example, magnesium (Mg) and / or (Ca) can be added. In addition, as the n-type impurity, for example, silicon (Si), sulfur (S), hesi (Se), sieve (Te), germanium (Ge), or the like can be added. These impurities may be added with more than two elements at the same time, and may also be added with type 2 (p-type and η-type). FIG. 1 is a schematic cross-section of a semiconductor crystal used to illustrate the basic concept of the present invention. This reaction prevention layer is used to prevent the reaction between the semiconductors of Shi Xiyan and Yu Xi ', so that by using a lower gallium nitride-based semiconductor (semiconductor crystal A) (• say / For example, the reaction prevention layer (Japanese-Japanese shell material B) formed by Sic or A1N, etc., is produced even if gallium nitride system A is required to undergo long-term crystal growth. The above-mentioned "reaction part" ... will not be formed near the Shi Xi interface and 'by forming a large number of p-plate crystals A), the semiconductor of the doped system (semiconducting semiconductor) Thousands of tops also start to grow horizontally.

522544 V. Description of the invention (4) In this way, the stress based on the lattice constant difference between the reaction prevention layer and the gallium nitride-based semiconductor crystal A is not easily generated, and the stress can be greatly relieved. In addition, by forming a plurality of protrusions, the stress acting on the reaction prevention layer can be relaxed. Therefore, it is difficult for these stresses to act on the reaction prevention layer to form a crack in the longitudinal direction. Not easy to produce. For this reason, the underlying substrate (silicon substrate) can be completely isolated from the gallium nitride-based semiconductor (semiconductor crystal A) through the reaction prevention layer having no cracks penetrating in the longitudinal direction, so that the above-mentioned " "Response section". In addition, for example, by forming the protrusions as described above, the contact portion between the reaction prevention layer and the semiconductor substrate (that is, the desired semiconductor crystal A) can be restricted to be narrow, so the difference in the lattice constants is based on the two. The deformation is not easy to be large. "The stress based on the lattice constant difference between the underlying substrate and the semiconductor substrate" can be alleviated. Therefore, during the crystal growth of the semiconductor substrate (the desired semiconductor crystal A), unnecessary stress acting on the semiconductor substrate during growth can be suppressed, and the occurrence of displacement and cracks can be reduced. (Semi-conducting body, the density of occurrence of / =. It produces and can greatly reduce the cracking effect by using the above-mentioned "multiplying effect" so that there is no "reaction // tombs Α You have fully suppressed high-quality semiconductors Α The production of the plate V Λ :) becomes possible or becomes easy. In this case, the buffer layer C 'can be inserted in a form that can be inserted when necessary, which can be applied to the present invention. These buffer layers are not- To determine the necessary structure, please refer to page 8 C: \ 2D-O0DE \ 91-04 \ 91102215.ptd 522544 V. Description of the invention (5) t That is, even if no buffer layer is provided, a certain degree can be obtained The above-mentioned functions and effects of the present invention. "A" and "Λ2 means" are connected to the above-mentioned first means, the above-mentioned semiconductor junction] said, "+ <, and can satisfy the composition formula" AlxGayIn (1- " ) N (0 $ x < 1, 0 < 0 xy = 1) " Means 3 are used in the first or second means as the crystalline material B of how to prevent the formation of the layer, using /, (AW, or spinel (Heart 1204). The fourth means is the crystalline material B of the reaction prevention layer in the j or the second means described above, which uses A1GaN, A1InN, or A1GaInN… J, which is an aluminum composition ratio of at least <乂 Secondary material B is to select a room with a lattice constant of less than 3. 18A ;; a relatively stable material with a high heat resistance (melting point) is I ... said force: 5th means is based on the above No. 1 to No. 4 are to cause the growth to grow in a lateral direction and to form a cavity f in each other because the semiconductor crystals are not laminated; However, if it is too large, there may be cases where it is difficult to pay for a substantially flat growth surface after the connection. =, The sixth means is tied to any of the above means from the above! To the fifth means,% 吏 突 :: 间The film thickness of the valley portion of the reaction prevention layer is formed to be 0. The thickness m may be uneven due to the film thickness, or the above-mentioned crystalline material B forming the stop layer is not sufficient. Stable species, the so > can not be gallium (Ga) or gallium nitride (GaN) and silicon (Si) is completely isolated by:

C: \ 2D-CODE \ 9l-04 \ 91102215.ptd

522544 V. Description of the invention ^ 7 I ... To fully obtain the formation of the "reaction part (multi") mm based on these reactions. If the film thickness of the valley bottom of the reaction prevention layer is too thick, the reaction is prevented. The layer (Si) is prone to cracks, and it is impossible to completely isolate gallium (^ a) or gallium nitride (GaN) from silicon. Therefore, it is not possible to obtain adequately, "and," based on these reactions. (Even crystalline gallium nitride) "formation prevention effect. If the film thickness of the valley part of the layer should be too high, it is expected because the thickness is too thick. The build-up time and build-up material are cost-effective. And so on

Forming + = the protruding part 2 of the hand slave system in any of the above 1 to 6 means more: /: the height of the direction is formed from 0.5 to 4 m, 5 to 4, The height in the longitudinal direction is 1 / Z minutes, which is not desirable. If the build-up time is insufficient due to insufficient stress relaxation and the J part of the second eclipse is too high, the excessively high part must be extra unexpected. In terms of production cost, etc., or layered materials, the eighth means, instrument-forming step, the protrusions; the protrusions of any of the means from the seventh to the seventh means from 0.1 to 10 =. The thickness, width, or diameter of k in the k direction is formed. The better is also dependent on the degree of crystal growth. The thickness, width, or diameter in the K direction is 0.5 to 5. If this thickness is too thick, w is based on the difference in the lattice constant of the semiconductor substrate (C: \ 2D-C0DE \ 91-04 \ 91102215.ptd Section 10 Page 522544

It is easy to increase the use of the object at the same time, and the impact will increase, which will make it difficult to shift the number of semiconductor substrates' or 镅 =: thin in the protrusions, and the formation of the protrusions itself will become difficult. The crystal growth rate b of σ, σ 卩 will be slower, and the following separation steps are unexpected: In any of the methods described in Rashid. 1 to 8, heating is set to make the semiconductor crystal A and the underlying substrate beautiful. When cooling or stress occurs, the thermal expansion coefficient difference between the second conductor crystalline A and the underlying substrate is different. Crystal A and the underlying base fault plate are separated and separated. This stress is used to break the protrusion [and the semiconductor, for example, as shown in Figure 1; The growth is made by ηΪ ;! On a base substrate body substrate having a plurality of protrusions (a semiconducting semiconductor semiconductor compound semiconductor is used to arrange a spacer by adjusting the size of the protrusions and you), /, f aB growth conditions, etc. A cavity in which the semiconductor crystal A is not laminated can be formed between each of the protrusions ("protrusions"). Therefore, if the thickness of the semiconductor substrate (semiconductor crystal A) is increased by one degree compared with the protrusions / thickness, then Internal stress or external stress can easily concentrate on the protrusions μ, v, and y. In particular, these stresses act as shear stresses on the protrusions. When the stress becomes large, the protrusions will break. 'If using this should Force can easily separate (peel) the underlying substrate from the semiconductor substrate. Also, the larger the above-mentioned "void" is formed, the more easily the stress (shear stress) in the protruding portion is concentrated. That is, 'depending on the 9th Means, because the stress described above can be easily generated, the semiconductor crystal A can be easily separated from the underlying substrate. When the underlying substrate is separated (peeled off) from the semiconductor substrate,

C: \ 2D-CODE \ 9l-04 \ 91102215.ptd Page 11 522544 V. Description of the invention (8) It is also possible to leave a part of the semiconductor substrate on the base substrate side, or the substrate on the semiconductor substrate side. A part (for example, a broken wreckage of the protrusion) is also acceptable. That is, the above-mentioned separation step is not based on the premise that no part of the material is completely absent (required condition). The removal of such fractured debris and the like may be performed by a known method such as abrasion or etching, if necessary. Also, the "10th means" is a step of laminating the semiconductor crystal A by 50 or more in the crystal growth step of any of the first to ninth means. The thicker the thickness, the more it can alleviate the tensile stress on the semiconductor substrate (semiconductor crystal A), and it can reduce the displacement of the semiconductor substrate and the density of cracks. The semiconductor substrate can be strengthened on the same day, so the above stress can be easily concentrated. On the above protrusion. In addition, the thinner the thickness of the base substrate, the more stress, which will cause the production of crystals in the thickness of the semiconductive base substrate 50 // m or more, and the relative thickness is preferably made thicker. The thickness of the suppression plate (silicon substrate) can be obtained by tensile stress, and it is preferably 300 or less. This can alleviate the displacement of the semiconductor substrate (semiconductor crystal A) and the reduction in the occurrence density of cracks. However, if the degree is less than 5 0 // m, the absolute strength of the underlying substrate itself is problematic, making it difficult to maintain high productivity. Therefore, to ensure the quality and productivity of long substrates, the thickness of the underlying substrate is preferably // m or less. The semiconductor substrate (semiconductor crystal A) that grows crystals is approximately the same thickness as the underlying substrate (silicon substrate), or is set in a general manner, which can easily ease the displacement of the semiconductor substrate and the occurrence of cracks. Bigger than those who know it. This effect increases when the semiconductor substrate is made thicker.

522544 V. Description of the invention (9) The greater the effect. In addition, the eleventh means is in the above-mentioned crystal growth step, by adjusting the supply amount of the junction raw material q in any of the means, so that the ... region in the bottom semiconductor, λ 糸 compound semiconductor portion: At least-the growth rate a of the valleys of the two protrusions, and the crystal difference (ba) of the semiconductors in the protrusions: two daggers, are controlled to approximately the maximum value. According to this method, the top of the head portion is relatively changed to Λ, and the crystal growth rate near the above-mentioned etched area will be suppressed, which is caused by the company near the top of the head. "=" Is attached to the top of the head. / Crystal A) The growth in the lateral direction becomes a V-body substrate (the stress based on the difference between the lattice constant of the anti-reservoir 11 and the semiconductor substrate during the growth of the V-bile crystal): = should be between the semiconductor substrate There are many crystals and cracks that are difficult to occur. For example, on the side of the protrusion (each protrusion n (^ 0) / becomes significant, an example is a hole.) The valley is easy to form a relatively large space with an appropriate size, In the case of intervals or irregularities, it is usually formed on the surface of the base substrate, and the convex portion (protrusion):: Peripheral portion near the peripheral side wall-square unit time. Unit area = Compared with 'concave (valley)'. This tendency, although also depends on the supply of crystal material is easy to change the degree, direction, etc., only by these :: the flow rate of two gas streams, temperature < Controlled at the most suitable or better 1 C: \ 2D-CODE \ 91-04 \ 91102215.ptd 522544 V. Description of the invention (ίο) -------- ί The monthly conditions can make the above difference (ba) Controlled at the approximate maximum value, ϋ2 lots I, tied to the above-mentioned eleventh means, the raw material supply amount Q 'is set to 1 // mol / min to 100 or less. The lower one is to set the above-mentioned raw material supply q to 5 to 90 # ㈣l / min. As a better value, it depends on the size, shape, and arrangement interval of the underlying substrate of the protrusions. The specifications, the types of raw materials to be supplied, the direction of the supply stream, the crystal growth method, etc. are roughly ideally about 10 to 80 // mol / min. If this value is too large, the above-mentioned difference ( ba) It becomes difficult to control the approximate maximum value, so it is difficult to form large voids between the protrusions (sides of the protrusions). Therefore, in such a case, it is relatively difficult to alleviate the difference based on the difference in lattice constants. The stress in the crystal is likely to cause the crystallinity of the single crystal of the semiconductor substrate to be degraded, which is not desirable. When the underlying substrate is separated from the semiconductor substrate by stress (shear stress), If there is no cavity on the side of the protrusion or the cavity is small, it is difficult to concentrate the stress on the protrusion and the protrusion is not easily broken, which is not desirable. On the other hand, if the amount q of the raw material supply is too small, the crystal grows. It is too time-consuming and unfavorable in terms of productivity, and the 13th means is any one of the above-mentioned means from 1 to 12, and has the following steps after the protrusion forming step: at least less than And a step of forming a buffer layer c made of "AlxGaBNCtKx ^ l)" on the surface of the protrusion. However, the above-mentioned buffer layer C is a semiconductor layer such as A1N or AIGaN grown near 400 ° c ~ li0 (Tc, and can also be further out of this buffer layer C.

522544 V. Description of the invention (η) (the middle layer of the punch layer C below the human body is roughly the same composition (such as A1N or AlGaN), and other layers are also referred to as "buffer layers" when they are interactive.) Or with the substrate (semiconductor junction or crystal t) in a multilayer structure, laminated on the semiconductor buffer layer (or intermediate layer) laminated on the semiconductor substrate (growth layer) stress, etc., and: The role of the sample is to increase the crystallinity. "Zhe ^, this temple action. The effect, especially when the formation of the reaction prevention is silicon carbide (Sic) and so on In the first method described above, the retarded film thickness is formed to be 0.01 pm to τ. By forming the punching layer c by this means, the desired A (for example, a gallium nitride layer) can be formed on the buffer layer alone to make a good texture in the horizontal direction. The thickness of the buffer layer is thick. '~~ is the approximate range of ^, and 0.1, more than 0.5, and ^ is better. ^ Although it is easy to become small, it is not desirable. Moreover, the thickness is too thick, so that it may be difficult to form a uniform buffer film. If Youfa f is too thin, uneven film formation will occur in the buffer layer that is close to you. "The shape attached to the dog's starting part will also cause uneven crystallinity (both 仏 ^ J 'di 15 means , It is tied to any of the first to 14th cars of the fans. In the step of forming the protrusions, the protrusions are formed in a way that the protrusions are arranged in a sudden way. The growth bar that grows in the horizontal direction produces jealousy that affects the unevenness of the crystallinity. It is difficult to become roughly equal. C: \ 2D-C0DE \ 91-04 \ 91102215.ptd 522544 5. Explanation of the invention (12) According to the size of the hand, the above-mentioned cutting, all the protrusions between the semiconductor substrates, and the difference between the protrusions and the cover between the protrusions are not easy to produce. The slow growth rate of the crystal growth method is determined. The grid points of 0.1 corner grids on one side are implemented by this means, whereby, in the 17th means part forming step, the corners, approximately regular six or substantially parallel sides are crystallized by this means. Crystals are the same for any level, can be triangular or parallel four The shore is the better. 5: Each of the hollows described above becomes approximately equal fractures and is distributed to each protrusion. Because of the occurrence of 8 ^, the bottom substrate and the knife can be separated from each other to be surely implemented. Above, it is completely covered by the semiconductor substrate. Therefore, in the self-crystal growth, its change: It is easy to change the day t to a crystal with a fast crystal growth rate. The τ point is clearly, early, or broken. The above-mentioned protrusions are formed on the above-mentioned < 15th hand > protrusion forming step #m above a substantially regular triangle which is the second dimension of the basic tone. First, the above-mentioned 15th means is specifically and accurately reduced. The number of shifts. The protrusions in any of the above-mentioned first to sixth methods have the horizontal cross-sectional shape of the protrusions as a substantially regular triangle, a circle, a rectangle, a rhombus, and a shape. The direction of the axis of the compound semiconductor is easy to be uniform in each part, or because the length of the horizontal portion of the dog can be limited to a large number to suppress displacement. In particular, a regular hexagon or a regular hexagon Shaped, etc., and easily semiconductor crystal phase and crystal structure 'circular and rectangular, is easy to manufacture technical side

522544 V. Description of the invention (13) In terms of formation, it can be compared with the advantages of the current one ^. The current status of Ge's processing technology level is the eighteenth method, which is tied to the ## section forming step, the protrusion # 1 to any of the means # 1 to # 17 below the protrusion #m. Preferably, although the arrangement interval is set to be 0 · 1 // m or more i 〇 the arrangement interval of the protrusions is 0 · the implementation condition of crystal growth existing in j, only the interval refers to each adjacent to each other at 111 degrees In order to determine the so-called arrangement here, the distance between the center points of the raised portions will be raised by this means. While it is possible to form voids in the target semiconductor (valve portion of the protrusion) above the valley portion of the body substrate (semiconductor crystal A), if the value is too small between the protrusions, it becomes possible. To the stress relaxation effect, the effect of "Sex = 0 / cannot be sufficiently small, and the thickness of the semiconductor substrate ^ is too difficult to break if the cavity formed is too large .: If it is more than necessary", the protrusion will change again, this value If it is too large, it is impossible to ensure that the solid substrate is covered, so that homogeneity cannot be obtained and the semiconductor crystal A is above.) Spoon and Liangbei + conductor substrate (semiconductor or, if this value is larger, the valley part is free) s Almost no effect can be obtained, and the cavities cannot be formed at all ...., and again, the 19th means is in any of the above-mentioned 丨 to 18th-the reaction prevention step of the means, the film is formed on both sides of the bottom substrate Reaction prevention layer By this, it is possible to prevent or mitigate the buckling (bending) of the underlying substrate (Ishiba substrate) generated after the reaction prevention step.

C: \ 2D-C0DE \ 91-04 \ 91102215.ptd

522544 V. Description of the invention (14) In addition, the 20th means is based on a π I-nitride-based hafnium compound semiconductor, and has a semiconductor crystal produced by using any of the above means 1 to 19 as a crystal. Growth substrate. According to this method, it is possible or easy to manufacture a Group I nitride compound semiconductor device 'through a semiconductor having good crystallinity and low internal stress. Means 21 is a method of manufacturing a 111-nitride-based compound semiconductor device by using the semiconductor crystal manufactured by any of the above-mentioned methods 1 to 9 as a crystal growth substrate and performing crystal growth thereon. According to this method, it is possible or easy to manufacture the I I Group VIII nitride-based compound semiconductor device through a semiconductor having good crystallinity and low internal stress. With the above-mentioned means of the present invention, the problems described above can be effectively or reasonably solved. Embodiments of the Invention When carrying out the present invention, they can be selected arbitrarily from each manufacturing condition described later. These manufacturing conditions may be combined arbitrarily. First, as a method for forming a group 111 nitride-based compound semiconductor, an organic metal vapor phase (growth method M0CVD4M0VPE) is preferred. However, ′ is also formed by a molecular beam vapor phase growth method (MBE), a halogen vapor phase growth method (Halide VPE), a liquid phase growth method (LPE) #, and each layer may be formed by a different growth method. And for the buffer layer, the reason for correcting the lattice mismatch is to form

C: \ 2D-C0DE \ 91-04 \ 91102215.ptd Page 18 522544 V. Description of the invention (15) It is better to be in a crystal growth substrate, or on the bottom substrate. In particular, when a buffer layer (the above-mentioned intermediate layer) is laminated on a semiconductor substrate (semiconductor crystal A), as the buffer layer, a nitride-based compound semiconductor formed at a low temperature can be used. ^^^ ⑼ ^ X &lt; 1, 〇 $ y <l +, more preferably, use A1xGah (〇 € x $ 1). The buffer layer may be a single layer or multiple layers having different compositions and the like. The formation method of the buffer layer can be formed at a low temperature of 380 to 4200 t: or the MOCVD method at a temperature of 100 to 1 180 ° C. Alternatively, a DC magnetron sputtering device may be used to form a buffer layer composed of A 1 N by using a high-purity metal aluminum and nitrogen as raw materials by a reactive gold mining method. Similarly, a buffer layer having a general formula of AlxGay In (1_x_yJ (0 $ x &lt; 1, 0 '〇 &lt; x + y $ 1, the composition ratio is arbitrary) can be formed. Furthermore, an ion ore method, a mine, Injecting silver method, ECR method. By physical m forging method, punching layer is preferably performed at 2000 ~ 60 ° C. The better is 300 ~ 600C, the more preferable is 3 5 0 ~ 45 (TC. The thickness of the buffer layer used in physical processes such as these sputtering methods is 10 ° ~ 3_A as the thickness. It is preferably 100 ~ 400 A, especially 1 〇〇 ～ ３〇〇a is the best. As a multiple layer, for example, the gallium nitride layer can be interactively formed from the piece of d ', which is used to make the group below 600 ° C and 100.... Other methods ... J and other combinations can also be used, multiple layers can also be composed of more than three kinds of fields ;, this compound + $ 月 豆 Α1 »(卜 &quot;) N (〇 $ χ &lt; 1, 0 to stack. Lit , The buffer layer is amorphous, the middle "two <χ": 1) ^ ^ ^ t ^ ^ ^ ^

522544 V. Description of the invention (16) &quot; The more iterations, the better the crystallinity. Class 11 I-nitride-based compound semiconductors in the upper layer and the upper layer, even if a part of the group I 11 element is replaced by boron (B) or thorium (T i), or nitrogen (N) Part of the substitution of 'with phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), etc. is also substantially applicable to the present invention. Those elements may be doped to such an extent that they cannot be expressed in the composition. For example, in the composition A1x (^ ιN (0 &lt; x $ 1)) of a Group I nitride compound semiconductor having no indium (In) and broken (As) in the composition, it is doped with aluminum (A1) and gallium (Ga). ) With a large atomic radius (In), or arsenic (As) with a larger atomic radius than nitrogen (N), is compensated by the expansion and deformation of crystals caused by the removal of nitrogen atoms to improve crystallinity. In this case, since the acceptor impurity easily enters the position of the HI group atom, a p-type crystal can be obtained in a growth state (as gr0Wn). By doing so, the crystallinity is improved, and it is combined with the present invention. The use can further reduce the penetration displacement to a level of 1/100 to 1/1000. In the case where the buffer layer and the JJJ group nitride compound semiconductor layer are base layers formed in more than 2 cycles, if the The III-nitride-based compound semiconductor layer is preferably doped with an element having a larger atomic radius than its main constituent element. In the case of a light-emitting element structure, a two-component system of an original III-nitride-based compound semiconductor is used. Or 3 components are preferred. To form η-type II In the case of a group I nitride-based compound semiconductor layer, as an n-type impurity, a group IV element such as Si, Ge, Se, and Te can be added. As a P-type impurity, Zn, Mg, Be, Ca, Sr, and other group II elements or group IV elements. Complex doping or n-type impurity

\\ 312 \ 2d-code \ 91-04 \ 91102215.ptd Page 20 522544 V. Description of the invention (17) ---- It is also possible to mix and match the same layer. Orientation of stupid crystal growth to reduce the displacement of the JI nitride compound semiconductor layer can also be performed at will. At this time, it is possible to bury the height difference by using an arbitrary method such as using a mask or by using a #mark. The etching mask can use polycrystalline semiconductors such as polycrystalline silicon, polycrystalline nitride semiconductors, silicon oxide (si0x), silicon nitride (sixN), titanium oxide (TiOJ, lead oxide (ZrOx), etc.). Oxides, nitrides, titanium, tungsten (W) and other high melting point metals, and these multilayer films. These film formation methods can be vapor deposition methods such as hafnium plating, sputtering, CVD, etc. &Quot; &quot; When etching, it is better to use reactive ion beam etching (R 丨 βΕ), but it is also possible to use any etching method. To form a non-vertical side surface on the substrate surface Those with high or low level can also be formed by anisotropic etching. For example, those with no bottom surface at the bottom of the high and low level and have a V-shaped cross section. Μ can form FETs, light-emitting elements, etc. on a group III nitride compound semiconductor. In the case of an element, the light emitting layer can be considered as a multiple quantum well (MQW) structure or a single quantum well structure (SQW), and there are homogeneous structures, f-mass (hetero) structures, and double hetero structures. It may be formed by a pin interface or a pn interface. The specific embodiments are described in the present invention. However, the present invention is not limited to the examples shown below. Example 1 The following is a summary of the manufacturing sequence of a semiconductor crystal (crystal growth substrate) in an example of the present invention. For illustration.

C: \ 2D-CODE \ 91-O4 \ 91102215.ptd Page 21 522544 V. Description of the invention (18) [1] Reaction prevention step This reaction prevention step is tied to Ma Sipen 4c, r / 7 i Ϊ \ you A manufacturing step of laminating a reaction prevention layer on a base substrate (silicon substrate). In this reaction prevention step, 'First, a gas phase = method MOVPE on a wheat substrate is formed into a reaction prevention layer composed of a carbonized dream (Si (:) of about 1.5 m. Also, not It is also possible to prevent the inflection of the circle G ^ on the last day and 0, and also to perform SiC film formation on both sides of the recording. [2] The step of forming the protrusions is on the above-mentioned reaction prevention layer by using photolithography. Dry-type # ，, forming a cylindrical shape of the cylindrical bottom surface of the protruding portion B1 at an approximate interval of arrangement. The center of the cylindrical bottom surface of the protruding portion B1 is arranged at the J side, and the regular triangle is based on a two-dimensional triangular lattice. The protruding portion M is formed. The thickness of the underlying substrate is based on the formula [3] The crystal growth step M is about 200 M. In this crystal growth step, as shown in FIG. 4, the crystal starts to grow from the top (initial state) of the protrusion B1. The 'plane' connection step is a substantially planar growth step, which is performed according to two mutual compound vapor phase growth methods (MOVPE method). Thereafter, the 'this ^ organometallized crystal layer) grows to 2 0 0 // Thick film growth step of m degree = body, plate (HVPE method). Hydrogenated co

Moreover, in this crystal growth step, ammonia (NH body (H2, N2), trifluorenyl gallium (Ga (CH3) 3) gas (hereinafter referred to as "carrier gas and trimethyl I lu (ai (ch3 ) 3) Gas (hereinafter referred to as "TMA °". TMG j

522544 V. Description of the invention (19) (a) First, the bottom substrate (FIG. 2) provided with the above-mentioned protruding portion 61 is cleaned by organic cleaning and acid cleaning, and then mounted on a crystal growth device. On the carrier in the reaction chamber under normal pressure, while &amp; flowing into the reaction chamber, the underlying substrate is baked at a temperature of 1100 ° C. (b) Next, h2, NH3, TMG, and TMA are supplied to the above-mentioned base substrate according to the MOVPE method, and an AlGaN buffer layer (buffer layer C) is formed. This A 1 GaN buffer layer C has a crystal growth temperature of about 1 100 and a film thickness of about 0.2 m (FIG. 3). (c) On this AlGaN buffer layer (buffer layer C), H2, NH3 &amp; TMG is supplied to a part of the semiconductor substrate (ie, a gallium nitride layer with a film thickness of about 5 / zm) at a growth temperature of 1 〇 7 Crystals grow at 5 ° C. Through this step, as shown in FIG. 4, a part of the semiconductor substrate (the gallium nitride layer A) is grown in the lateral direction, and a large cavity can be generated in the valley portion (ie, the side of the protruding portion B1). The supply rate of TMG at this time is approximately 40 // mol / min, and the crystal growth rate of the gallium nitride layer is approximately 1 // m / hour. (d) Thereafter, the above-mentioned gallium nitride layer (semiconductor crystal A) is further crystal-grown to 2 0 0 // m according to a hydrogen compound vapor phase growth method (HVPE method). The crystal growth rate is about 45 // m / hour. [4] The separation step (a) after the above crystal growth step, in a state where ammonia (NH3) is flowed into the reaction chamber of the crystal growth device, will have a bottom layer The wafer of the substrate (Shiyu substrate) is cooled to approximately normal temperature. The cooling rate at this time can be roughly "-50 ° C / min ~ -5 ° C / min". (B) After that, These can be taken out of the reaction chamber of the crystal growth device, then

II _1 delete mill 1

ll C: \ 2D-CODE \ 91-04 \ 91102215.ptd page 23 522544 V. Description of the invention (20) 1 to = gallium nitride crystal (semiconductor crystal A / ν / Λ, The crystal 'is left in the nitrided layer (semiconductor substrate) with a small amount of debris from the friend and the fracture of the protrusion B1. [5] The fracture debris removal step is performed after the separation step. #Breshing treatment 'removes the fractured remains of the protrusion B1 made of silicon remaining on the gallium nitride, ° :, and the surface. 酽 之 ί: The cracked residue removal step can also be performed by adding nitric acid to the hydrofluoric acid. The etching process of the mixed liquid is performed. Non !: The manufacturing method described above can produce a wind 4 gallium crystal (gallium nitride layer) with a film thickness of about 200, a thick crystallinity &amp; That is, the desired semiconductor substrate (semiconductor crystal A) that is separated from the underlying substrate. Also, as the crystalline material B that forms the reaction prevention layer, even mn, AlxGai_xN (0.30SxSl), etc. can be obtained with the above-mentioned The example is roughly equivalent to the effect. Fruit. More commonly, it is used as a reaction prevention layer. λ material B, may be used silicon carbide (Sic, 3c_Sic), aluminum nitride (AIN), spinel (MgAl ^), or the ratio of aluminum to be at least the square 3〇 Ai (jaN,

AlInN or AlGalnN 〇 The semiconductor crystal A used to form the intended semiconductor substrate is not limited to gallium nitride (GaN), and can be arbitrarily selected from the above-mentioned general "丨〗 丨 nitride compound semiconductors". The intended semiconductor substrate (semiconductor crystal A) may have a multilayer structure. In the above-mentioned embodiment, as shown in FIG.

1L

\\ 312 \ 2d-code \ 91-04 \ 91102215.ptd Page 24 522544 V. Description of the invention (21) The starting part and the trough part can be composed of a vertical plane and a horizontal plane, but it can be formed by any inclined surface or curved surface. Therefore, as shown in FIG. 2 (c), the cross-sectional shape of the valley portion formed on the underlying substrate may be formed into a substantially rectangular concave shape, for example, a substantially U-shape or a substantially V-shape. The shape, in general, the shape, size, interval, arrangement, alignment, etc. may be arbitrary. Component number description

Si silicon substrate (bottom substrate) A semiconductor crystal (semiconductor substrate of §) B reaction prevention layer (crystalline material) B1 protruding portion (part of reaction prevention layer) C buffer layer

C: \ 2D-CODE \ 91-04 \ 91102215.ptd Page 25 522544 Brief description of the diagram Conductor FIG. 1 is a schematic cross-sectional view of a semi-crystalline manufacturing process for illustratively illustrating the basic concept of the present invention. Fig. 2 of the τ condensation Fig. 2 is a schematic perspective view (a), a top view (b), and a cross-sectional view (c, 3) of the bottom substrate (silicon substrate) of the embodiment of the present invention. Schematic perspective view (a), top view (b), and cross-section view (c) of the underlying substrate of the buffer layer c (A 1 GaN layer). Figure 4 shows the underlying substrate laminated to a semiconductor substrate (semiconductor crystal A). A schematic perspective view (a), a top view (b), and a cross-sectional view (c). Fig. 5 is a schematic cross-sectional view illustrating a conventional semiconductor crystal for crystal growth on a silicon substrate (base substrate).

C: \ 2D-CODE \ 91-04 \ 91102215.ptd Page 26

Claims (1)

522544 VI. Application scope of patent 1 ^ One kind of ϊ conductor crystal manufacturing method 'It is used in the horizontal direction, said 4 uses, by the formation of H compound semiconductor on the underlying substrate formed by Shi Xi (Si) A method for preparing a U substrate by crystallizing a semiconductor, which is characterized by having the following steps: on the above-mentioned base substrate, a shape: ... the reaction formed by the crystalline material B of the semiconductor crystal A = layer &amp; formation Ϊ Ϊ: a step of forming a plurality of protrusions from the above-mentioned reaction prevention layer by exposing on one side of one side on which the above-mentioned reaction prevention layer film is formed through chemical or physical etching; a substrate crystal growth step Let at least a part of the above-mentioned space 4 and the above-mentioned semiconductor surnames A and 'be used as a semiconductor = growth surface, so that the above is a continuous plane. It is said that until the growth surfaces are connected to each other at least in the middle 2: the manufacturing method of the semiconductor crystal of the first item in the range, whose N (0 ^ x &lt; i, a9BAf ^ ^ ^ rAlxGay In (1_x.y) conductor constitutes ⑴ ' … 1) ”of the group III nitride compound. 3. According to the method for manufacturing a semiconductor crystal in the scope of the application for patent, the above-mentioned crystalline material B that forms the above-mentioned reaction prevention layer is formed by carbonization (slC). , Aluminum nitride (A1N), or spinel (MgAi204). • The method for manufacturing a semiconductor crystal according to item 1 of the patent application scope, wherein the crystalline material B used to form the above-mentioned reaction preventing layer is made of aluminum, A1GaN, A1InN, or A1GaInN, which is at least 0.30 in proportion. Constructed 522544 6. Scope of patent application. = The method of manufacturing a semiconductor crystal according to the item of the patent scope], wherein the growth is grown in a horizontal direction and the cavity of the semiconductor crystal A is not laminated. 6. The semiconductor crystal of item j in the patent scope of the month of application shall be 0.1 _ above 2 _. The film thickness of the valley portion of the layer should be prevented. 7. As in the method for manufacturing a semiconductor crystal according to item 1 of the patent application, in the above process, the protrusions are opened to form a single step.,,, / /, ^ ^ ^ An ryv ^, So that the longitudinal degree $ of the protruding portion is 0.5 #m or more and 20 / zm or less. The method of manufacturing a semiconductor crystal according to the first item of the! Γ range, which includes: a step of forming a crotch, so that the thickness or the diameter of the protrusion in the transverse direction is 0.1 / m or more and 10 / zm or less . 9. According to the method for manufacturing semiconductor crystals in the scope of application for patent i, the separation step of ΐίΓΓΪ: by comparing the above-mentioned semiconductor crystal A with the above-mentioned base substrate; or by heating, so that it is based on the above-mentioned semiconductor crystal a and the above tm. The stress caused by the difference in expansion coefficient is 'separated from the two by using this stress', so that the semiconductor crystal 8 is separated from the underlying substrate. 10. For the semiconductor junction I in the scope of the patent application, the semiconductor "r laminated core m" in the above-mentioned crystal growth step in the above-mentioned crystal growth step 11. If the method for manufacturing the semiconductor crystal in the scope of the patent application item i, the pot crystal growth step In the above adjustment of the group III chemical compound, 522544 VI. Patent application scope of the raw material supply amount Q of compound semiconductors, from the above operations to make the gap between the above-mentioned protrusions of the underlying substrate &gt;, bucket μ _. ..... ^ ° Between the crystal growth rate a of the above-mentioned 11 Group I nitride-based compound semiconductor and the crystal growth rate b at the top of the protrusions, a part of the etched area of the borrow portion i The difference (b-a) is controlled to the approximate maximum value. 2 · As in the method for manufacturing a semiconductor crystal according to item 1 丨 of the patent application scope, wherein the above-mentioned raw material supply amount q is set to 1 or more and emol / min or less. I 3 • In the case of the semiconductor crystal production of the scope of application for patent, the following steps are provided after the above-mentioned protrusion forming step: / At least the surface formation of the large raised portion is formed by "AlxGai N (〇 &lt; x &lt; Constructed X HiUU &lt; x $ 1) 14 • If the semiconductor crystal of the patent application s item 13 is established, the above-mentioned method of slow propagation p ^ w ^ is formed. The thickness of the layer C is 0.01 ⑽ or more. i㈣ In the semiconductor crystal of item i in the scope of patent application item i, in the step of forming the protrusions described above, the method is to form the protrusions at intervals of approximately one cycle at a time. The method of manufacturing a semiconductor crystal according to 15 items, wherein, in the step of forming the protrusions, the protrusions are formed on a side of the two-dimensional triangular lattice with a substantially regular diagonal shape as a base. Into a shirt 522544 6. Scope of patent application The shape is approximately regular triangle, approximately regular hexagon, approximately circular, approximately rectangular, approximately diamond, or approximately parallelogram. 1 8. The method for manufacturing a semiconductor crystal according to item 1 of the scope of patent application, wherein in the step of forming the protrusions, the arrangement interval of the protrusions is set to be 0.1 // m or more and 10 // m or less. 1 9. The method for manufacturing a semiconductor crystal according to item 1 of the scope of patent application, wherein in the reaction prevention step, the reaction prevention layer film is formed on both the front and back surfaces of the underlying substrate. 2 0. A type I I I nitride compound semiconductor device, characterized in that it has a semiconductor crystal manufactured by the method for manufacturing a semiconductor crystal using the first patent application scope as a crystal growth substrate. 2 1. A group III nitride-based compound semiconductor device, characterized in that the semiconductor crystal manufactured by the method for manufacturing a semiconductor crystal according to item 1 of the patent application is used as a crystal growth substrate, and the semiconductor crystal is obtained by Produced by crystal growth thereon. C: \ 2D-C0DE \ 91-04 \ 91102215.ptd Page 30