TW521385B - Method for forming via-first dual damascene interconnect structure - Google Patents

Abstract

In accordance with the present invention, a method for forming a via-first dual damascene interconnect structure by using gap-filling material whose thickness is easily controlled by a developer is provided. The essential part of the present invention is the application of gap-filling materials such as novolak, PHS, acrylate, methacrylate, and COMA to fill vias. Filling vias with these materials can get a greater planar topography for trench patterning due to its excellent gap-filling capability, protect the bottoms of vias from damage during the trench etch, and prevent the fence problem by using a developer to control its thickness in vias.

Description

521385 V. Description of the invention α) 5-1 Field of the invention: The present invention relates to a method for forming multilayer interconnections in integrated circuits, and particularly to a trench filling material whose thickness can be controlled by using a developing solution. Method for double-mosaic interconnecting of mesogenic hole. 5-2 Background of the Invention: As the size of graphics continues to shrink, more components can be constructed on a unit area substrate. When the design rule of component size is reduced to less than 1 micron, in order to match the higher accumulation density, the use of multilayer interconnects has been generated. Through advanced semiconductor process technology, sub-micron or deep sub-micron integrated circuit components have forced the demand for multilayer, interconnects to be accelerated. The size of the interconnect structure must also be reduced to match smaller component sizes. Therefore, as integrated circuit technology enters the sub-micron range, more advanced interconnect structures and applications are required. Mosaic structure design is one of the structures that meets this need. The main advantage of the damascene process is that it removes the etching process of the interconnect metal layer. In addition, a second advantage is that the trench filling process of the dielectric layer is reduced. The third advantage is that it avoids the problems related to the lithographic overlap tolerance and achieves a higher density of interconnect packaging. Mosaic processes can be divided into two categories, single damascene and dual damascene. single

Page 4 521385 V. Description of the invention (2) The damascene process includes forming a wire by plugging the pattern into the dielectric layer, and then transferring the pattern to the second dielectric layer to form the actual The interconnecting circuit metallizes the wiring in this dielectric layer to wire the lower conductive layer. When the technology of integrated circuits reaches 0.18 microns, the technology of dual damascene is widely used. In the dual damascene process, the pattern of both the via and the trench is transferred to the dielectric layer, and then a conductive material such as a metal is used to simultaneously fill the base via and the trench ^ to form an interconnected circuit connection. Line and embolism. The dual damascene process reduces the number of process steps for the formation of vias and trenches in the metallization layer, thereby providing the advantages of simplified processes and reduced manufacturing costs. This is because the openings of the metal layer lines and the vias of the vias connecting the metal layer lines to the lower conductive layer are formed at the same time. The dual mosaic structure needs to face the challenge of the development of the pattern transfer process. Lithography and post-etching techniques have become more difficult due to the more complex layer stacking and surface shapes of the intermediate layers. Therefore, many different stages of dual damascene pattern transfer can achieve similar structures before filling the conductive material. According to the basic etching process sequence, a variety of dual damascene processes are generated, such as self-alignment, forming trenches first, and forming via holes first. Self-aligned dual damascene (SADD) requires a relatively thick intermediate layer as a light retroreflective layer, an etch stop layer, and a hard mask to provide control over the critical size of the vias beneath it. Because self-aligned vias require near-perfect trench-to-via hole alignment, and face the challenge of maintaining a high etch selection ratio of the dielectric layer and the intermediate termination layer when #etching the via hole, so The use of self-aligning dual mosaics is limited. Xiangou

Page 5 521385 5. Description of the invention (3) In trench-first; dual damascene (TFDD), the trench is first subjected to a masking step, and then the dielectric layer is etched to a certain depth. The via hole pattern is aligned with the trench 'and the via hole is etched down to the lower conductive layer. The etching challenge faced by the profiling trench process is to achieve a uniform trench #etched surface and maintain control over the critical size of the vias. Via-first dual damascene (VFDD) towels

First, the lithography of the vias is completed on the entire stack structure. Then I etched the interstitial hole, removed the photoresist, and then performed the lithography process of the trench. In some cases, the bottom of the via is covered with organic material, which protects the bottom of the via during the trench etching. S generally knows the control of reflected light, which is very important in the lithography process. When pattern transfer is performed on a photoresist, the reflected light from the underlying material will cause distortion of the pattern transferred to the photoresist. The use of bottom-anti-reflective coating (BARC) in the dual mosaic structure is not only to prevent the distortion of the pattern transferred to the photoresist, but also to serve as a trench filling material (gap-fi 1 1 ing material). However, when using the bottom retroreflective coating as the trench filling material in the double-damascene process of the preformed via, many problems have arisen. When the bottom anti-reflective coating material is in contact with the low dielectric constant (low k) dielectric layer in the interlayer hole, where it is in contact = a chemical reaction will occur 'and a thin layer of residue will form during trench etching' This results in the incompleteness of the ditch # and a fence problem. For example, as shown in the first figure, a low-k dielectric material i 2 0 is formed on a substrate 1 100 having a conductive structure 110. When a bottom anti-reflection coating material is used,

521385 V. Description of the invention (4) When used as a trench filling material, a fence 130 will be generated. Furthermore, when a trench filling material containing nitrogen atoms is in contact with a low dielectric constant dielectric layer, the diffusion of nitrogen atoms will affect the dielectric constant of the dielectric layer. After the opening of the via is formed, the substrate will have a local reflection change. This is not only caused by local reflection differences, but also due to the difference in pattern density, which results in differences in the thickness of the photoresist. The serious thickness difference of the photoresist is caused by the difference of the pattern density. The better way to solve this problem is to use organic bottom anti-reflective coating, which can make the reflection phenomenon more uniform on the one hand and reduce the step height of the surface on the other. However, when the double-layer damascene process of the preformed via uses the bottom anti-reflection coating as the trench filling material, it will cause distortion of the trench contour due to the uneven surface and reduce the lithographic process space. The traditional method of filling bottom vias with anti-reflection coating is difficult to make the bottom vias in dense areas and the bottom vias have the same results. The surface height of the bottom retroreflective coating is very different, and it varies with the density and size of the pattern. Referring to the second figure, when a dielectric layer 2 2 0 is formed on a substrate 2 0 0 having a conductive structure 2 10 and the bottom reflective coating material 2 3 0 is used as a trench filling material, sometimes the dielectric layer The layer holes 2 3 2 are not completely filled, or there are pore-containing interlayer holes 2 3 4, or a rough and uneven surface is formed. In order to avoid the problem of fences when etching trenches, it is important to control the thickness of trench filling materials. Traditionally, the thickness of the bottom anti-reflective coating is controlled by a complicated etching process. However, it is better to use a trench filling material that does not contain nitrogen atoms and is easy to control the thickness to produce a better trench filling material.

Page 7 521385 V. Description of the invention (5)-The flattened surface, the trench filling effect, and the structure without barriers are very necessary in the dual damascene process. ~ 5 ~ 3 Purpose and summary of the invention:

^ In view of the many shortcomings of the traditional dual damascene method in the above background of the invention, the object of the present invention is to provide a trench filling material that can use a developer to control the thickness of the concrete to avoid the barrier problem, and form a double-mosaic preformed via. ^ How to connect. Such trench filling materials include, as appropriate, brewing resin (η 〇 〇 〇 1a), polyhydroxystyrene (POH hydroxy styrene (PHS), acrylic acid (acrylate) methacrylate) (methacrylate), And cyclic alicyclic cis-butene-anhydride copolymer (cyclalicylic ⑶-pollyme) r with maleic anhydride (COMA). The advantage of using a phenolic resin as a groove filling material is that it can obtain a flat surface required to increase the process space because of its good groove filling ability. Another advantage is that the phenolic resin does not contain nitrogen atoms, which greatly helps the application of low dielectric constant materials in the dual damascene process. The third advantage is that the phenolic resin is easily soluble, such as 2.38% TMAH (tetramethylammonium hydroxide).

The liquid 'can easily control the thickness of the phenolic resin by adjusting the removal time to avoid the problem of blocking. Another object of the present invention is to provide a method for protecting the bottom of a via hole by using a trench filling material.

Page 8 521385 V. Description of the invention (6) Yet another object of the present invention is to provide a method for removing an etching step of the thickness of a trench filling material in a via hole. According to the above-mentioned object, in a preferred embodiment, the present invention provides a method for forming a double-embedded inter-connecting line of a pre-shaped via hole by using a phenolic resin as a groove filling material. The steps of the present invention include at least providing a substrate with a conductive structure, and then forming a dielectric layer on the substrate. A photoresist of a first pattern transfer is formed on the dielectric layer, and the photoresist of the first pattern transfer defines a hole in the dielectric layer. Then, using the photoresist transferred by the first pattern as a mask, the dielectric layer is etched to expose the conductive structure of the substrate. After that, the photoresist of the first pattern transfer is removed. The main point of the present invention is to form a phenolic resin layer on the dielectric layer and fill the via hole. Then, the phenol resin layer was planarized by chemical mechanical polishing to expose the dielectric layer. Then, a bottom anti-reflective coating layer is formed on the dielectric layer. Thereafter, a photoresist of a second pattern transfer is formed on the bottom anti-reflective coating layer, wherein the photoresist of the second pattern transfer defines a trench opening, and the bottom anti-reflective coating layer is etched to form a trench pattern transfer. Then, a portion of the phenolic resin layer is removed to a depth of approximately a trench opening to be formed using a developing solution, which is approximately half the thickness of the dielectric layer. Then, the upper half of the dielectric layer is etched to form a trench opening in the dielectric layer. Remove the second pattern # Photoresist of transfer, bottom anti-reflective coating layer, and phenolic resin layer. Then, the trench opening and the via hole opening are filled with a conductive material to form a conductive layer. .

Page 9 521385 V. Description of the invention (7) 5-4 Detailed description of the invention: Some embodiments of the present invention will be described in detail as follows. However, in addition to the detailed description, the present invention can also be widely implemented in other embodiments, and the scope of the present invention is not limited, which is subject to the scope of subsequent patents. The present invention provides a method for forming a double-mosaic interconnect structure of a preformed via hole. The main point of the present invention is to use, for example, a resin (η 〇 v ο 1 ak), polystyrene (PHS), acrylic acid (acrylate), methacrylic acid ester (methacry 1 ate), And cycloaliphatic maleic anhydride copolymer (C OMA) as a material for filling the via hole, and can transfer the trench pattern to a relatively flat surface, and also protect the via hole when the trench is etched Bottom, and avoid the generation of fence problems. Referring to FIG. 3A, the steps of the present invention at least include providing a substrate 3 0 0 with a conductive structure 3 1 0. The substrate 3 0 0 includes any suitable semiconductor material at any stage of the manufacturing process that requires interconnecting the component. The conductive structure 3 10 is any structure that requires electrical contact, such as a metal wire. Then, a cover layer 32 such as silicon nitride can be selectively formed on the substrate 300 to prevent metal from diffusing into the structure thereon. Next, a first dielectric layer 33 0 and a second dielectric layer 350 are formed, and a two-layered termination layer 3 4 0 may be selectively formed between the two dielectric layers. The material of the two dielectric layers may be a low dielectric constant material, but is not limited thereto. If it is chosen not to form the last-cut layer, it is sufficient to form only one dielectric layer on the substrate 300 to achieve the purpose of forming a dual mosaic structure. Etch stop layer 3 4 0 pair etch

Page 10 521385 V. Description of the invention (8) The etchant of the dielectric layer has a high selection ratio for the purpose of being used as a trench etch stop layer, which can be a nitride stone layer. Then, a first pattern transfer photoresist 36 is formed on the second dielectric layer 350, and the first pattern transfer photoresist 360 defines a first opening 37. The first opening is a via hole. Then, using the photoresist 3 60 of the first pattern transfer as a mask, the second dielectric layer 3 50, the etch stop layer 3 4 0, and the first dielectric layer 3 3 0 are etched to expose the cover layer 3 2 0. If there is no cover layer 3 2 0 in the structure, the purpose of this etching step is to expose the conductive structure 3 1 0 of the substrate 3 0 0. After the opening of the via hole 3700 is completed, the photoresist 36 of the first pattern transfer is removed, as shown in FIG. 3B. The next step is the focus of the present invention. Using a trench filling material such as a phenolic resin, the openings of the interlayer holes 37 are filled to form a phenolic resin layer 3 80 on the second dielectric layer 350. Then, the phenolic resin layer 38 is then chemically and mechanically ground to a height of the second dielectric layer 3 50 as shown in the third C diagram. The grinding step here can not only flatten the acid resin layer 3 0 0, but also prevent the problem of wheel misalignment from occurring when the developer is used later. Next, a bottom anti-reflective coating layer 390 is formed on the second dielectric layer 3 50 containing the interlayer hole 3 800 filled with the phenolic resin, as shown in the third D diagram. The bottom anti-reflective coating layer 390 is not only used as a retro-reflective layer, but also protects the phenolic resin from being mixed with the deep ultraviolet photoresist used in the future, and prevents the acid resin from being cross-linked by deep ultraviolet light exposure. Then, a second pattern-transferred photoresist 400 is formed on the bottom anti-reflective coating layer 390. The photoresist 4 0 of the second pattern transfer defines the trench opening 4 1 0. The photoresist 4 0 0 transferred by the second pattern is used as a mask, and the bottom anti-reflective coating layer 3 9 0 is etched.

Page 11 521385 V. Description of the invention (9) The second dielectric layer 350 is exposed as shown in Figure E. Then, in an embodiment, the part that is not covered by the bottom anti-reflective coating layer 3 9 0 is removed. The thickness of the acid resin layer until the thickness of the acid resin layer is about the same as that of the etching stopper layer 3 40, as shown in the third F diagram. The thickness of the phenolic resin layer is determined by the thickness required to protect the bottom of the vias from being etched by trenches and to avoid fence problems. Because the phenolic resin is soluble in the developing solution, such as a solution containing 2.38% TMAH, the step of removing a part of the phenolic resin can be easily controlled by controlling the removal time. Then, the second dielectric layer 3 50 is etched to expose the etch stop layer 3 4 0 and a trench opening 4 1 0 is formed, as shown in the third G diagram. In addition, in another embodiment, a portion of the aging acid resin layer 3 8 0 is not removed before etching the second dielectric layer to form a trench opening, but the second dielectric layer 3 5 0 and The phenol resin layer 38 was formed to have the same structure as that of the third G pattern. If there is no cover layer 3 2 0, the photoresist of the second pattern transfer 4 0 0, the bottom retroreflective coating layer 3 9 0, and the remaining acid resin layer 3 8 0 b are removed to expose the conductive structure 3 1 0. If the cover layer 3 2 0 is applied, the cover layer 3 2 0 must be etched again to expose the conductive structure 3 1 0. It must be understood here that before the cover layer 3 2 0 is etched, the remaining acid test resin layer 3 8 0 b will be removed first. At the same time, the etch stop layer 3 4 0 exposed to the trench opening 4 1 0 is also removed by etching the cover layer 3 2 0. Then, the photoresist 4 0 of the second pattern transfer and the bottom reflective layer 3 9 0 are removed, as shown in the third figure. The second pattern transfer photoresist 400 can be removed by the traditional oxygen plasma deashing method. and

521385 V. Description of the Invention (ίο) Anti-reflection coating at the bottom

3 9 0 can be removed by isotropic etching or dry-etching and then a double damascene conductive layer is formed, so that the copper conductive barrier layer of Tann metal is diffused at the bottom. The above screen is preferably flat and flat. By displaying any low-dielectric barriers, the interconnects are used. A conductive metal layer is formed to expose the layer. It can also be used as a barrier to prevent the surface of the dielectricized surface of the embodiment from being changed (a dielectric material of a fence material fills the opening of the dielectric hole and the conductive layer of the structure 4 2 0, such as the first layer). The step 420 includes at least that the conductive structure with the substrate is the second dielectric layer of the electrical circuit. This conductive layer is deposited to cover the bottom of the opening and the side wall before forming the conductive layer. The material of the V-stop layer is diffused. To the introduction of the "characteristics of phenolic resins," the subsequent lithographic process has entered into the process space. In addition, the phenolic resins will not be removed due to the removal of the phenolic resins). Furthermore, the nitrogen-free nature of phenolic resins has no effect. The gold shown in Fig. 2I is a metal deposited continuously, and the flat can be steel deposited. A selective barrier layer is made in the electrical layer. Longevity, can reach photoresist, can produce atoms in the process of coating as phenolic resin, will not block

The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the patent application; any other equivalent changes or modifications made without departing from the spirit disclosed by the present invention should be included in the patent Within range. T month

Page 521385 illustrates the purpose, characteristics, and advantages of the present invention briefly from the following detailed description and accompanying drawings: The first diagram is a cross-sectional view of a fence problem generated by using a conventional technique to form a dual mosaic structure; The second figure is a cross-sectional view of the thickness of the bottom anti-reflection coating layer in the vacant area / dense area after the trench filling process of the conventional technology; the third A figure is the first-formed f-layer hole with an etching stop layer and a cover layer of the present invention Double mosaic structure, forming a cross-sectional view of the photoresist of the opening pattern of the interlayer hole; FIG. 3B is a double mosaic structure of the preformed interlayer hole with an etching stop layer and a cover layer according to the present invention, after the opening of the interlayer hole is formed. A cross-sectional view; FIG. 3C is a cross-sectional view of the present invention having a pre-shaped interlayer hole double-embedded structure having an etch stop layer and a cover layer, and flattening the aged resin layer; and FIG. D is a view of the present invention with etching The first layer of the stop layer and the cover layer has a double-layered hole-inlay structure to form a cross-sectional view of the bottom anti-reflective coating layer. The third figure E is the first layer of the present invention with an etching stop layer and the cover layer. Mosaic structure Forming a trench pattern is transferred to the bottom anti-reflective coating layer

Page 14 521385 is a schematic cross-sectional view of the diagram; FIG. 3 F is a cross-sectional view of the present invention having a double-mosaic structure of a pre-shaped interlayer hole with an etch stop layer and a cover layer, after removing a part of the phenolic resin layer; The three-G diagram is a cross-sectional view of a pre-shaped interlayer hole with an etching stop layer and a cover layer according to the present invention to form a trench opening. The layer-dual double-mosaic structure is a cross-sectional view of the cross-section 0 after the completion of the opening of the via hole and the trench; and the third figure I is a cross-sectional view of the dual-mosaic structure of the precursor meso-hole with an etching stop layer and a cover layer of the present invention. Representative symbols of the main parts: 1 0 0 substrate 1 1 0 conductive structure 1 2 0 low dielectric constant dielectric material 1 3 0 fence-like residue 4 2 0 0 substrate 2 1 0 conductive structure-2 2 0 Dielectric layer ^ 2 3 0 bottom reflective coating

Page 15 521385 Brief description of the diagram 232 234 300 310 320 330 340 350 360 370 380 390 390 400 410 420 Unfilled interstitial hole with interstitial hole substrate conductive structure covering layer first dielectric layer etch stop layer Photoresistive trench opening of the second dielectric layer, interlayer hole opening, photoresistive trench opening conductive layer at the bottom of the acid resin layer, retroreflective coating layer, trench opening pattern

Page 16

Claims (1)

521385 6. Scope of patent application 1. A method for forming a dual mosaic structure, the steps at least include: providing a substrate with a conductive structure, a dielectric layer on the substrate, wherein the dielectric layer has a first Opening to expose the conductive structure; filling the first opening with a trench filling material to form a trench filling layer on the dielectric layer, wherein the trench filling material is dissolved in a developing solution; planarizing the trench filling layer to expose The dielectric layer; forming a bottom anti-reflective coating layer on the dielectric layer and the trench filling layer 1 · _ on the position of the coating is leftover shape, the mouth is large and above the opening to the reverse, The first part of the cloth. The second layer of the bottom layer is painted and the second layer of the layer is reversed. The curtain opens at the bottom of the first cover, the first cover is the first, the first block is blocked, the first block is blocked, and the second block is blocked from the light to the first block of the light. Turning material into light; transferring electricity to the trench and transforming the case into the case; The electromigration port map, the layer guide, the open part, the degree should be filled in, the plan should be used, the ditch should be removed, the ditch should be removed, and the shape chart should be used to remove the loss, and the layer should be removed from the layer. Bougainville Page 17 521385 6. Scope of patent application 3. The method according to item 1 of the patent scope, wherein the first opening is a via hole opening. 4. The method of claim 3, wherein the second opening is a trench opening. 5. The method according to item 1 of the scope of patent application, wherein the groove filling material is selected from the following: an acid resin (η ov ο 1 ak), and a poly (hydroxy styrene, PHS) ), An acrylate, a methacrylate, and a cycloalicylic co-polymer with maleic anhydride (COMA) 〇6 · As claimed (1) The method of item 1 of the patent, wherein the step of planarizing the trench filling layer at least includes chemically mechanically polishing the trench filling layer. 7. The method of claim 1, wherein the step of removing a portion of the trench filling layer to the first depth at least includes using the developer to remove a portion of the trench filling layer to the first depth. "8. If the method of the seventh item of the patent application is applied, the beans are cooked in the stomach." Dao Dan Y Mi 5 Hai_ Yingye at least one solution containing at least tetramethylammonium hydroxide (TMAH). Among them, the above-mentioned method of forming the conductive layer 9 Page 18 521385 VI. The patent application steps at least include: depositing a metal layer so that the metal layer and the conductive structure of the substrate are electrically continuous; and planarizing the metal layer to expose the dielectric layer . 1 〇. — A method for forming multilayer interconnections in an integrated circuit, wherein the integrated circuit to the upper layer of the substrate includes a substrate with a conductive structure, a first dielectric layer thereon, a ^ The worm-etched stop layer is on the first dielectric layer and a second dielectric etch stop layer. The steps include at least: a pattern-transferred photoresist on the second dielectric layer, wherein the photoresist is defined. A dielectric hole is opened; a pattern-transferred photoresist is used as a mask, and the second dielectric stop layer and the first dielectric layer are etched to expose the substrate to form a first pattern that is transferred to the first pattern. The first worm cuts the final structure; a layer, the conductive junction is beneficial to the meso-flat shape, wherein the radioactive coating eliminates the first layer of a trench electrical layer to make the bottom into a second, the second layer, A photoresist transferred with the pattern; a filling material is used to fill the opening of the interlayer hole to form a trench filling layer, wherein the trench filling material is dissolved in a developing solution; the trench filling layer is to expose the second dielectric layer; A partial anti-reflection coating layer on the second dielectric layer; The photoresist of the pattern transfer on the bottom anti-reflective coating layer defines a trench opening; the photoresist of the two pattern transfer is a mask, which etches the bottom and exposes the second dielectric layer retrospectively; a shadow solution, removing a part of the Trench filling to a depth; Page 19 521385 6. The scope of the patent application is to etch the second dielectric layer to form the trench opening in the second dielectric layer; remove the photoresist of the second pattern transfer, the bottom anti-reflective coating layer, and The remaining trench filling layer; and a conductive material is used to fill the via hole and the trench opening 'to form a conductive layer. 1 1. The method of claim 10 in the scope of patent application, wherein the first dielectric layer is a low dielectric constant dielectric layer. Spring 1 2. The method according to item 10 of the scope of patent application, wherein the second dielectric layer is a low dielectric constant dielectric layer. 13. The method according to item 10 of the scope of patent application, wherein the groove filling material is selected from the following: an acid resin (η 〇v ο 1 ak), a poly hydroxy styrene (poly hydroxy styrene, PHS), acrylate, methacry 1 ate, and cyclo alicylic co-polymer with maleic anhydride, COMA ). 14. The method of claim 10 in the scope of patent application, wherein the step of planarizing the trench fill layer at least includes chemical mechanical polishing of the trench fill layer. 15. The method of claim 10 in the scope of patent application, wherein the depth is large Page 20 521385 6. The scope of patent application is about to reach the height of the etching stop layer. 16. The method according to item 10 of the scope of patent application, wherein the developing solution mentioned above contains at least a solution containing at least tetramethylammonium hydroxide (TMAH). 17. The method according to item 10 of the scope of patent application, wherein the step of forming the conductive layer includes at least: depositing a metal layer so that the metal layer and the conductive structure of the substrate are electrically continuous; and flat The metal layer is exposed to expose the second dielectric layer. 1 8. A method of forming a dual mosaic structure, the steps of which include at least: providing a substrate with a conductive structure; forming a first dielectric layer with a low dielectric constant on the substrate; forming a engraved termination Layer on the first low dielectric constant dielectric layer; forming a second low dielectric constant dielectric layer on the etch stop layer; forming a first pattern transfer photoresist on the second low dielectric constant On a constant dielectric layer, the photoresist of the first pattern transfer defines a hole in the dielectric layer. The photoresist of the first pattern transfer is used as a mask to etch the second low dielectric constant dielectric layer. A termination layer and the first low-k dielectric layer to expose the conductive structure of the substrate; remove the photoresist of the first pattern transfer; fill the opening of the dielectric layer with a phenolic resin to form a Phenolic Resin 521385 6. Scope of application for patents 2. Electricity on the reverse side; the openings are opened with the inversion of the first interlayer, the upper part of the cloth channel is exposed, and the lower groove is opened to open the normal shooting port; The electrically reversed engraving layer eventually forms an anti-ditch layer. 介 反 槽 #Electrically engraved the lower part of the grease groove, and etched the bottom of the tree and the bottom of the tree. · The meaning is the constant electricity; the hole layer should be the resistance of the large dielectric layer of the internal resistance layer of the electrochemical layer of the photoresistive photoresistor to the photoresistor of the low layer number of the light and the flat coating of the Shifting the two greases often; the plug number mill; the transfer of the transfer of the first tree of the transfer layer filling the regular research layer counter file transfer the transfer of the aldehyde number case fat material electrical and electrical pattern diagram The second part of the intermediary is secondly exposed to the second electric diacid. Low school background, the second and the first phenol guide layer dimerization number, one by one, and the lower one, the first one, often formed into the use of the layer to divide the two, and the electric shape; In the middle, the cloth is etched away, and the first one is coated with the remaining low-level layer, which is shot on the shape 19. The method according to item 18 of the scope of patent application, wherein the developing solution contains at least one containing at least hydrogen Tetramethylammonium oxide (TM A Η) solution. 20. The method of claim 18, wherein the step of forming the conductive layer includes at least: depositing a metal layer so that the metal layer and the conductive structure of the substrate are electrically continuous; and Page 22 521385 6. Scope of patent application Flatten the metal layer to expose the second low-k dielectric layer. 1BB Page 23