TW521190B - Dual-CPU motherboard capable of using single CPU without installing terminal card - Google Patents

Abstract

A dual-CPU motherboard can be operated normally using a single CPU without additionally installing a terminal card, thereby avoiding the troublesome matter of the user, which includes: two CPU slots for arranging CPUs; and associated peripheral devices, which is characterized in further comprising: a terminal device having one end coupled to the GTL+ bus of the two CPU slots corresponding to the CPU; and a switch control device arranged between a power device and another end of the terminal device, wherein when only one CPU is installed in the CPU slots, the switch control device is turned on to activate the terminal device.

Description

521190

V. Description of the invention α) Machine operation The present invention relates to a CPU motherboard, a special board, and can be used without intentionally installing a terminal card. Don't worry about a CPU master-the CPU is operating normally.

In order to meet the requirements of GTL + signal specifications, Intel Pentiumn-level CPUs must be connected to a two-terminal voltage source and connected to a terminal voltage source to ensure normal operation. As far as the Pentium II processor is concerned, the CPU itself has a set of terminal power.

Circuit, so in use, there must be another set of terminal circuits. When used on dual CPU motherboards, an additional set of terminal circuits exists on the "other CPU", so normal operation can be ensured when dual CPUs are used. However, when only one CPU is used on a dual CPU motherboard, another unused CPU socket must be equipped with a terminal card to meet the requirements of the GTL + signal specification to ensure that the CPU operates normally. For users, when using a single CPU on a dual-CPU motherboard, a terminal card needs to be installed, which can be said to cause considerable confusion and inconvenience. If you can use a single CPU on a dual-CPU motherboard, you don't need to use a terminal card, so you can avoid user trouble. Here is the object of the present invention is to provide a dual CPU motherboard,

It is possible to use only one CPU without installing a terminal card, and to ensure that the CPU operates normally to avoid causing user trouble. In order to achieve the above object, the dual-CPU motherboard provided by the present invention includes: two CPU sockets for configuring a CPU; and related peripheral devices; characterized in that it further includes: a terminal device, one end of which is connected to a horse Up to the above two CPU sockets correspond to the CPU's GTL + busbar 'and a switch control

(5) Description of the invention on page 4 (2) The device, which is connected to the power supply device and the other end of the above-mentioned terminal device: When the CPU socket is configured with only one CPU, the above-mentioned switch controls When CPIJ is configured, the specific signal is located at a first h ^ The switch control device is disconnected; when any of the above CPUs are plugged in and not configured with the right "pTT n ^ m if there is PU 蚪, the specific signal is located at a The second level is a brief description of the conduction pattern of the escape switch control device: In order to make the above-mentioned objects, features, and advantages of the present invention more obvious and easier, the following two specific examples are given below to illustrate the following:彳 |, Pei bang elaborate f 1 shows a block diagram of the circuit according to the first embodiment of the present invention; Figure 2 shows a block diagram of the circuit according to the second embodiment of the present invention, the symbol description: the same. 1-2 ~ CPU slot; 3 ~ terminal device; 4 ~ switch control device; team-side voltage source; 6 ~ logic control device. First embodiment: ip Figure 1 shows a circuit block according to the first embodiment of the present invention. Figure. Female first picture shown, this Mingzhi's dual CPU motherboard includes ... two CD ^ slots (1, 2) for configuring CPl]; and related peripheral devices (unsigned). It is characterized by including a terminal device 3, Its one end to the above two CPU sockets corresponds to the GTL + bus of the CPU; and,

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The switching control device 4 is disposed between a terminal voltage source 5 and the other end of the terminal device 3. In addition, the GTL + bus sections of the two CPU sockets are connected in parallel. Wherein, in this embodiment, the above-mentioned terminal device may be constituted by a plurality of resistors R, and each of the above resistors is coupled to the above-mentioned switch control device 4 ′ and the other end is respectively coupled to the above-mentioned GTL + bus. Each signal terminal on the row. In addition, the above-mentioned terminal device may also be a resistor. The above-mentioned switching control device 4 is an NMOS transistor in this embodiment. The above-mentioned voltage source at the cooking terminal is 1 · 5 V. '. When the above CPU slot is configured with only one CPU (for example, only the CPU slot i c ii has a CPU # ι), the above-mentioned switch control device 4 is turned on by a specific signal driver 2 to promote the above-mentioned terminal device 3 Make it work. I played the match. I corresponded to CPU socket 2 with the output of CPU # 2 2SL0T0CC #. Ϋ \ is the above specific signal. When the CPU slot 2 is configured with a CPU switch specific signal (PSLOTOCC #) to a low level, the CPU is turned on. (Reporting μ, +, Electricity, Sun and Sun) open circuit, so that it does not affect the normal dual specific letter F is ° ancient \ Wei Shu⑽ ⑽ Slot 2 is not configured with CpU # 2, the above second embodiment: π decorated earlier CPU operation It's normal. The second embodiment is a circuit block diagram of the second embodiment according to the second embodiment of the present invention, and the first embodiment: :: wear = a logic control device 6, + ,, and r are placed on the clothes. Represented by the same symbol. a, I system device 6, in this embodiment -0R gate circuit

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Its input end is respectively coupled to the first letter " number (SL0T0CC # 1) of the SL0T0CC # signal output end of the two CPU sockets (1, 2) to the two CPU # 1 and CPU # 2. And a second signal (SL0T0CC # 2); and output a signal to the above-mentioned switch control device 4 (also in this embodiment, when the two CPU sockets (1, 2) are configured with a CPU, the above-mentioned first, first The two signals (SL0T0CC # 1, SL0T0CC # 2) are both low level, 0 ", so the above specific signal output by the OR gate circuit is at a low level, and, 0 ,, ^ causes the NMOS transistor to be disconnected. Affects the movement of normal dual cpu.

When CPU # 2 is not configured in the above-mentioned CPU socket 2, the SL0T0cc number 2 is at the high level "1", and the SL0T0CC # 1 signal is at the low level. Therefore, the above-mentioned specific signal outputted by the above-mentioned brake circuit is located at the same level 1 so that the NMOS transistor is turned on, and the above-mentioned terminal device 3 can play a role to ensure the normal operation of a single CPU. The same principle applies when the above-mentioned CPU socket 1 is not configured with (^ 1 |, the SL0T0CC # 1 signal is at the high level "Γ, and the SL〇T〇cc #, the low level. The above-mentioned output of the output is at a high level " 丨 ", so that the above-mentioned cardiac transistor is turned on, and the above-mentioned money set 3 can play a role to ensure the normal operation of a single CPU.

Although the present invention has been disclosed as above with two preferred embodiments, it is useful: to limit the present invention to 'anyone familiar with the art without departing from it; : From the evening of the present invention, only the jar # ml, the modification and refurbishment of Erkai, so JE /, Qianganwei S on the date of issue will be determined by the scope of the attached patent application.

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Claims (1)

521190 _ Case No. 881012Q1_ Scope of patent application 1 · A dual CPU motherboard can use only one CPU without installing a terminal card. The above motherboard includes · Two CPU slots, configured with ^ and related The peripheral device is characterized in that it further comprises: a terminal device, one end of which is coupled to the two CPU sockets for the CPU tGm bus; θ corresponds to the switch control device, and is arranged in a power supply device and the terminal device Between the other two, when the CPU socket is configured with only one cpu day guard, the switch control device will be turned on. 2. The motherboard according to item 1 of the scope of patent application, wherein the above-mentioned three devices receive a specific signal 'When the two CPU sockets are configured, the specific signal is at a first level, so that The above-mentioned opening = control rotary opening; when no CPU is configured on any of the above-mentioned CPU slots, the specific signal is in a second position, so that the above-mentioned switch control device, The motherboard according to item 2, wherein one of the upper slot is selected from the upper slot, which corresponds to the CPU2S10t〇cc # output σ = as the above specific signal, when the CPU slot is configured with the CPU 1j When the specific signal is at a low level and the switch control device is disconnected from your i iCPU slot, no CPU is configured. When the specific signal is high, the switch control device is turned on. 4. ^ The motherboard described in item 2 of the scope of patent application, which also includes a series I control I, whose input terminals are respectively coupled to the above two CPU sockets 2 2 SL0T0CC # output terminals corresponding to two CPUs The first signal and the number of ί_t and the wheel output end is coupled to the above-mentioned switch control device; when the above page 8 521190 amends MM 88101291 VI. Patent scope When two CPU sockets are configured with CPUs, the upper level will make the above logic control device output: the above mentioned C are all low level, and the above-mentioned switch control device will be cut off; stand above r When the CPU is not configured in the slot, any of the CPU control numbers on the logical control device 4 is located in the above-mentioned position, and then the specific letter 5 jir of the ^ is used to turn on the switch control I. 5. The main terminal device described in item 丨 of Shenyan's patent scope is a resistor. 4 4 Wang board, in which the above 6. As described in the main board of the patent application, the i terminal device includes a plurality of resistors, each of the above switch control device, and the other end is connected to the row equally. Each signal terminal. ㈣Connected to the above-mentioned bus 7. The motherboard according to item 1 of the scope of patent application, wherein the GTL + bus signal end portions of the two CPU sockets are connected in parallel.