TW508566B - Decoding system of disk and its method - Google Patents

Decoding system of disk and its method Download PDF

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Publication number
TW508566B
TW508566B TW89124235A TW89124235A TW508566B TW 508566 B TW508566 B TW 508566B TW 89124235 A TW89124235 A TW 89124235A TW 89124235 A TW89124235 A TW 89124235A TW 508566 B TW508566 B TW 508566B
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Taiwan
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data
decoding
ecc
data block
item
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TW89124235A
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Chinese (zh)
Inventor
Jia-Hung Shie
De-Wei Chen
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Acer Labs Inc
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Abstract

The present invention provides a decoding system of disk and its method for receiving message and performing decoding operation. The decoding system includes a demodulation device, a data buffer area, an ECC decoding device, a data registering medium, a de-scrambler and EDC verification device, and an ATAPI interface device. The data buffer area and data registering medium are used to temporarily store ECC data blocks. The decoding method of the decoding system comprises the following steps. At first, the demodulation device receives the message of the disk and performs demodulation operation to generate ECC data block into the data buffer area, wherein the ECC data block includes main data, parity of inter-code and parity of outer-code. Next, the ECC decoding device reads the ECC data in the data buffer area for being written into the data registering medium, and also performs error correction decoding in the PI direction. Then, the ECC decoding device reads the ECC data block in the data registering medium for performing error correction decoding in the PO direction. Next, the EC decoding device writes the corrected part of the ECC data block into the data registering medium, and also writes the corrected part of the main data into the data buffer area. Then, the de-scrambler and EDC verification device reads the corrected main data in the data registering medium for performing de-scrambling and EDC verifying operation. After completing the above operations, the ATAPI interface device will de-scramble the main data in the data buffer area for outputting to the host side.

Description

508566508566

發明領域 本發明提供一種碟片之解碼系統及复方法 由減少資料缓衝區之存取次數以提高碟片解^ 之解碼系統及其方法。 先前技術之背景說明FIELD OF THE INVENTION The present invention provides a decoding system and a method for decoding a disc. A decoding system and a method for reducing the number of accesses to a data buffer to improve the resolution of a disc. Background to prior art

請參考圖一,圖一係習知DVD光碟機之解碼系統 之方塊圖。如圖一所示,資料從光碟片丨〇 〇讀取出來之 後,先傳送至EFM Plus解調變裝置(Eight tQPlease refer to Figure 1. Figure 1 is a block diagram of the decoding system of a conventional DVD player. As shown in Figure 1, after reading the data from the disc, the data is first transferred to the EFM Plus demodulation device (Eight tQ

Modulation Plus demodulator) 102,將 16 個通道位元 (channel bit)之編碼字元(C0(ie word)解調為8位元之 資料符號(data symbol)。然後,EFM Plus解調變裝置 102將解調後產生之錯誤更正碼資料區塊(ErrModulation Plus demodulator) 102, demodulate 16 channel bit code words (C0 (ie word) into 8-bit data symbols.) Then, the EFM Plus demodulation device 102 Error correction code data block (Err

Correction Code data block,簡稱ECC 資料區塊)107 經由匯流排(b u s ) 1 0 4儲存至資料緩衝區1 〇 6,其中E c c 資料區塊1 0 7包括主要資料(m a i n D a t a) 1 0 8、外部配核碼 (Parity of Outer-code,簡稱p〇) n〇 及内部配核碼 (Parity of Inner-code,簡稱pi) i12 。主要資料i〇8 加 上/外部配核碼1 1 〇合起來稱之為M (ed —g〇 1 〇m〇n)外部 碼’而主要資料1 0 8加上外部配核碼丨i o與内部配核碼丨i 2 合起來稱之為RS内部碼。其次,錯誤更正碼解碼裝置 (ECC decoder,簡稱ECC解碼裝置)Π4從資料緩衝區106Correction Code data block (ECC data block for short) 107 is stored in the data buffer 1 0 via the bus (bus) 1 0 4 where E cc data block 1 0 7 includes the main data (main D ata) 1 0 8 , Parity of Outer-code (referred to as p0) n0 and Parity of Inner-code (referred to as pi) i12. The main information i〇8 plus / external matching code 1 1 0 is collectively referred to as M (ed-g00 1 mn) external code 'and the main information 1 08 plus the external matching code 丨 io and The internal verification code i 2 is collectively called the RS internal code. Secondly, the error correction code decoding device (ECC decoder, ECC decoding device for short) Π4 from the data buffer 106

第5頁 508566 五、發明說明(2) 謂取ECC資料區塊1 〇7,依序進行X方向(即pl方向)之解 碼與Y方向(即p〇方向)之解碼,並對ECC資料區塊1〇7中之 錯誤資料進行更正,然後ECC解碼裝置1 1 4再將ECC資料區 塊1 0 7中更正之部份重新寫入資料緩衝區丨〇 6内。接著, 解擾頻器(de-scrambler)及錯誤偵測碼確認裝置(ErrorPage 5 508566 V. Description of the invention (2) Takes ECC data block 1 07, sequentially decodes in the X direction (that is, the pl direction) and the Y direction (that is, in the direction of p0), and the ECC data area The erroneous data in the block 107 is corrected, and then the ECC decoding device 1 14 rewrites the corrected part in the ECC data block 107 into the data buffer 〇0. Then, a de-scrambler and an error detection code confirmation device (Error

Detection Code check,簡稱EDC確認裝置)116讀取資料 緩衝區106中更正過之主要資料1〇8,並進行解擾頻及edc 確認動作。當主機端要讀取資料緩衝區1 〇6中之資料時,Detection Code check (referred to as EDC confirmation device) 116 reads the corrected main data 108 in the data buffer 106, and performs descrambling and edc confirmation operations. When the host wants to read the data in the data buffer 106,

透過ATAPI (Advanced Technology Attachment PacketVia ATAPI (Advanced Technology Attachment Packet

Interface)界面裝置118將主要資料1〇8解擾頻後傳送給 主機端。 ^ 鲕麥考圖二,圖二係習知DVD光碟機之解碼系統 存取資料緩衝區之流程圖。此流程包含下列步驛·首先,Interface) interface device 118 descrambles the main data 108 and transmits it to the host. ^ Figure 2 of the oatmeal. Figure 2 is a flowchart of the data buffer access of the conventional DVD player decoding system. This process includes the following steps. First,

執行步驟201 ’ EFM Plus解調變裝置1 〇2將解調變後之ecC 貝料區塊107寫入資料緩衝區1〇6。其次,進行步驟2〇2, ECC解碼裝置114從資料緩衝區中讀取η方向之資 料區塊1 0 7並進行錯誤更正之解碼動作,接著 料區塊1〇7中更正之部份寫入資料緩衝區丨。:,接= 驟202 ’在步驟203中,ECC解碼裝置114從資料緩衝區 1 06中讀取P’〇方向之ECC資料區塊丨〇 7並進行錯誤更正之解 碼-動作,接著再將ECC資料區塊丨〇 7中更正之部份寫入資 料緩衝區106内。待完成步驟2〇3後’依系統之需求設定 可重複執行步驟202及步驟203,以提高Ecc資料區塊1〇7之 後’進人步驟m ’解擾頻器及E])cStep 201 is performed. The EFM Plus demodulation and conversion device 1 02 writes the demodulated ecC shell material block 107 into the data buffer 106. Next, step 202 is performed. The ECC decoding device 114 reads the data block 107 in the η direction from the data buffer and performs an error correction decoding operation, and then writes the corrected part in the data block 107. Data buffers 丨. :, Then = step 202 'In step 203, the ECC decoding device 114 reads the ECC data block in the direction of P'0 from the data buffer 106 and performs decoding-action of error correction, and then performs ECC The corrected part of the data block 〇07 is written into the data buffer 106. After completing step 203, it ’s set according to the requirements of the system. Repeat step 202 and step 203 to improve the Ecc data block 1007. After entering step m ’, descrambler and E]) c

508566 五、發明說明(3) 確認裝置11 6讀取資料緩衝區} 〇 6内已更正渦 ^ 108以進行解擾頻及EDC確認動作。待完成上之主要資料 當主機端要讀取資料緩衝區i 〇6中之主要^ ^動士作後, 進行步驟20 5,透過ATAPI界面裝置118將主要、次H,則 頻後傳送給主機端。在上述習知技藝中,解碼貝"、解擾 模組需依:執行上述之步驟,方能完成碟片之解碼::個 由此可知,習知之解碼系統在進行 作時,各個模組皆需對資料緩衝區! 〇6進行存 ,動 論上若解碼系統之各個模組可同步存取資料緩衝區,將^ 力口呎解碼糸統之速度,以達高倍速DVD之 統之各個模組均需使用同一資料 二紐外’ f知之解碼系統對整個ECC資料區塊 仃解碼之過程裡,ECC解碼裝置114每次進行ρι盥㈧ 對二^更t之鮮蜗動作時’皆需存取資料緩衝區106 ° 士貝’、、”羡衝區進行多次存取動作將使整個解碼動作十分耗 日::’:限制整體DVD系統之速度。有鑑於此,目前針對上 ί ΐ已有!個解決方&,包含:提高解碼系統之時脈、 曰口匯流排覓度或是減少資料缓衝區之存取次數。 發明概述* 及其本發主要目的在於提供一種碟片之解碼系統 %; ^、,不需提高解碼系統之時脈,亦不需增加匯流排 ,又之情況下,只需對解碼系統之架構稍作改變,以減少 508566 五、發明說明(5 """""""""""" 1 .......................... *〜—— 資料;衝區之存取次數,如此便可提高解二7^^· 理能力,進而加快解碼系統之速度而達高倍速之平行處 果 、0之致 圖示之簡單說明 圖一係習知DVD光碟機之解碼系統之方塊圖。 =二係習知DVD光碟機之解碼系統存取資 圖。 τ £之流程 圖一係本發明之解碼系統較佳實施例之 圖四係本發明之解碼系統之流程圖。4圖。 圖五係本發明之解碼系統存取資料緩衝區之流程圖。 圖示元件之編號說明 100,300光碟片 1 04, 304匯流排 1 07’ 30 7ECC資料區塊 1 1 0,3 1 0外部配核碼Α 114,314ECC 解碼 | 置 11*8’ 320ΑΤΑΡΙ 界面裝置508566 V. Description of the invention (3) The confirmation device 11 6 reads the data buffer} ○ 108 has been corrected within ^ 108 to perform descrambling and EDC confirmation operations. After completing the main data, when the host wants to read the main data in the data buffer i 〇6, proceed to step 20 5 and send the main and secondary H to the host through the ATAPI interface device 118. end. In the above-mentioned conventional technique, the decoding module and the descrambling module need to perform the above steps to complete the decoding of the disc: From this, it can be known that each module of the conventional decoding system is All need to be buffered! 〇6 is stored, if in theory each module of the decoding system can access the data buffer synchronously, the speed of the decoding system can reach ^, in order to reach the high speed DVD system, all the modules need to use the same data In the process of decoding the entire ECC data block by the decoding system, the ECC decoding device 114 needs to access the data buffer 106 every time when it performs a fresh operation on the second ECC. Shibei ',, and "Xianchong area multiple access operations will make the entire decoding operation very time-consuming ::': Limit the speed of the overall DVD system. In view of this, there is already a solution for the above! A solution &, Including: improving the timing of the decoding system, the search for port buses, or reducing the number of accesses to the data buffer. Summary of the invention * and its main purpose is to provide a decoding system for discs; ^, , No need to improve the timing of the decoding system, and no need to increase the bus. In other cases, only a slight change to the architecture of the decoding system is required to reduce 508566. 5. Description of the invention (5 " " " " " " " " " " & qu ot; " 1 .......................... * ~ —— Data; the number of accesses to the red zone, so that the solution can be improved. 7 ^^ · The ability to further accelerate the speed of the decoding system to achieve a high speed of parallel processing, a simple explanation of the figure of 0. Figure 1 is a block diagram of the decoding system of a conventional DVD drive. = Second Series of Knowing Access map of decoding system of DVD optical disc player. The flow chart of τ £ is a flow chart of the preferred embodiment of the decoding system of the present invention. The flow chart of the decoding system of the present invention is. Figure 4 is the decoding of the present invention. The flow chart of the system's access to the data buffer. The number of the components in the illustration indicates the number of 100, 300 discs, 1 04, 304 bus 1 07 '30 7ECC data block 1 1 0, 3 1 0 external allocation code A 114, 314ECC Decoding | Set 11 * 8 '320ΑΤΑΡΙ interface device

102,302EFM Plus解調變裝置 1 0 6,3 0 6資料緩衝區 1 08, 308主要資料 1 1 2,3 1 2内部配核碼 1 16, 318解擾頻器及EDC確認裝置 3 1 6資料暫存媒體 發明之詳細描述102, 302 EFM Plus demodulation device 1 0 6, 3 0 6 data buffer 1 08, 308 main data 1 1 2, 3 1 2 internal allocation code 1 16, 318 descrambler and EDC confirmation device 3 1 6 Detailed description of the invention of the data staging media

第8頁 50S566 五、發明說明(5) 為讓本發明之目的、特徵和優 下文特舉-較佳實施例,並配合所;^更明顯易懂’ 下·· 吓附圖式,作詳細說明如 請參考圖三,圖三係本發明 例之方塊圖。圖三之解碼系統與圖 糸統較佳實施 在於,⑽碼裝置购_辑=二:異資處 i ^ I ^30 7 ^ # ^«3 1 6 円,R %進仃P I方向之錯誤更正解· 置葬由綠敗眘祖蕲六甜麟咖 解馬,之後,ECC解碼裝 置耩由項取貝枓暫存媒體内之ECC資料區塊, 向之錯誤更正解碼;然冑,ECC解碼襄 :: 區塊307中更正之部份寫入資料暫存 再將ECC貝料 將ΐ I次史IMP 士击τ 貝τ ’仔躁體316内,同時亦 :主要貝枓308中更正之部份寫入資料緩衝區3 :更確認裝置318便讀取資料暫存媒體316 、之要貝料308以進行解_頻及ED(:確認動作。 請參考圖四,圖四係本發之解碼系統之流程 i ^6内,二,f :40 0,似解碼裝置31 4讀取資料暫存 ^316内之ECC貢料區塊3〇7。其次,進入步驟4〇2,判斷 Ϊ驟4tf,行EC!資料區塊3〇7PI方向之解碼。若是,則進入 行p /進仃Ρί方向之解碼;若否,則進入步驟406,進 408划,解碼。在執行完步驟4〇4之後,接著進入步驟 1乍彳、’、、斷是否已校正完畢,或是已經進行多次的解碼動 热去杈正完畢。若是,則進入步驟4丨2 ;若否,則進 ,繼續進行ρ〇方向之解碼。在執行完步驟綱之 ,妾著進入步驟41〇,判斷是否已校正完畢,或是已經 第9頁 五、發明說明(6) 4^·夕二的,角午碼、動作仍無法校正完畢。若是,則進入步驟 本_右’則進入步驟404,繼續進行PI方向之解碼。乂 步驟412中,ί隹1 在 p从 退订主要資料308之解擾頻及EDC確認動作。 ,再進入步驟414,判斷主要資料308之EDC確認結果 疋否正確。若是’則解碼成功,表示ECC資料區塊307之φ 料308是正確的,可以透過ATApiS面裝置32〇之主 後直接輸出至主機端;若否,則解碼失敗, 以 區塊307是不正確的。 貝抖 L/從 請參考圖五,圖五係本發明之解碼系統存取資粗 Π之流程圖。此流程包含下列步驟:首先,執行= FM Plus解調變裝置3〇2將解調變後之ECC資料 料緩衝區3〇6 ;其次,執行步驟5 02,ECC解碼 =置314頃取貧料緩衝區3〇6内之Ecc資料區塊3〇7並寫入 1料暫存媒體316,同時對ECc資料區塊3〇7進行η方 解馬,並對E C C資料區塊3 〇 7中之錯誤資料進行更正,·之 2 ’進行步驟5G3,ECC解碼裝置314職cf料區塊3〇 ^之部份寫人f料暫存媒體316内,料亦將主要資料 更正之部份寫入資料緩衝區30 6内;接著,執行步 驟504,ECC解碼裝置314讀取資料暫存媒體316内之 =枓區塊30 7,進行PO方向之解碼,並對ECC資料區塊3〇7 中义錯誤資料進行更正;接續步驟504,在步驟50 5中, 碼裝置314將1^*3貢料區塊307中更正之部份寫入資料 曰^媒體316.内,同時亦將主要資料3〇8中更正之部份寫 入貢料緩衝區3 0 6内·’待完成步驟5〇5後,依系統之需求 50S566Page 8 50S566 V. Description of the invention (5) In order to make the purpose, features and advantages of the present invention-preferred embodiments, and cooperate with; ^ more obvious and easy to understand 'Next · scare the drawings, make details For description, please refer to FIG. 3, which is a block diagram of an example of the present invention. The best implementation of the decoding system and system shown in Figure 3 is that the code device purchase_series = 2: foreign capital office i ^ I ^ 30 7 ^ # ^ «3 1 6 Positive solution and burial: The defeated green ancestor Shenliu Liulinlinca dissolves the horse. After that, the ECC decoding device selects the ECC data block in the temporary storage medium and corrects the decoding error. However, the ECC decoding :: The corrected part of block 307 is written into the data temporarily, and then the ECC material will be stored. The history IMP will be hit τ τ τ ′ in the manic body 316, and also: the main corrected part in 308 Write data buffer 3: The confirmation device 318 reads the data temporary storage medium 316 and the key material 308 to perform decoding and ED (: confirmation operation. Please refer to Figure 4. Figure 4 is the decoding system of the present invention In the process i ^ 6, the second, f: 40 0, like the decoding device 31 4 reads the ECC data block 3007 in the data temporary storage ^ 316. Next, it proceeds to step 402, and judges step 4tf, Go to the EC! Data block 307PI direction decoding. If it is, then go to the line p / into the direction of decoding; if not, go to step 406, go to 408, decode. At the end of execution After 4〇4, then proceed to step 1 to check whether the correction has been completed, or whether the decoding has been performed for many times. If it is, then go to step 4 丨 2; if not, proceed to step 4. , Continue to decode in the direction of ρ〇. After executing the outline of the steps, go to step 41〇 to determine whether it has been corrected, or it has been on page 9. V. Description of the invention (6) 4 ^ · Xuji's angle, The midday code and motion still cannot be corrected. If yes, then go to step _Right 'to go to step 404 to continue decoding in the PI direction. 乂 In step 412, 隹 1 undescrambles the main data 308 from p. And EDC confirm action. Then, proceed to step 414 to determine whether the EDC confirmation result of the main data 308 is correct. If yes, the decoding is successful, indicating that the φ data 308 of the ECC data block 307 is correct, and can be transmitted through the ATapiS device 32. The output is directly outputted to the host; if not, the decoding fails, and the block 307 is incorrect. Please refer to Figure 5 for the L / Slave. Figure 5 is the process of accessing data in the decoding system of the present invention. Figure. This process includes the following steps: First, execute = FM Plus demodulation and conversion device 3202 will demodulate the ECC data buffer zone 3006; second, execute step 502, ECC decoding = set 314 hectares to take the lean material buffer 306 The Ecc data block 3007 is written into a temporary storage medium 316. At the same time, the ECc data block 3007 is decomposed and the erroneous data in the ECC data block 307 is corrected. 2 'Go to step 5G3, the ECC decoding device 314, part cf data block 30, and some writers are temporarily stored in the media 316, and the main data correction part is also written into the data buffer 306; Next, step 504 is executed, the ECC decoding device 314 reads the data block 307 in the temporary storage medium 316, decodes in the PO direction, and corrects the incorrect data in the ECC data block 307. Continued steps 504. In step 505, the coding device 314 writes the corrected portion of the 1 ^ * 3 tribute block 307 into the data medium 316. At the same time, it also writes the corrected portion of the main data 308. In the tributary buffer zone 3 06 · 'To be completed after step 505, according to the needs of the system 50S566

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第12頁 508566 9L ― 1 _案號89124235_年月日 修正 圖式簡單說明 第13頁 2002.05. 23.013Page 12 508566 9L ― 1 _Case No. 89124235_ Year Month Day Amendment Simple Description of the Page 13 2002.05. 23.013

Claims (1)

4^5^ ΟΠ1 OAOOC 修正4 ^ 5 ^ ΟΠ1 OAOOC correction 六、申請專利範圍 1 · 一種碟片之解碼系統, 行解碼動#,該解碼系統包含:該碟片之訊息資料並執 一解調變裝置,用以接收 變動作以產生一ECC資料區塊、,貧料’並進行解調 資料 CC負料區塊包含一主要 二=、一内部配核碼及一外部配核碼; 要 :育料緩衝區,用以暫存該Ecc資料區塊; :貧料暫存媒體’用以暫存該ECC資料區塊; 碼;CC解碼裝置,用以進行該Ecc資料區塊之錯誤更正解 裝置,用以讀取該資刪 又止過之該主要資料, 下to η 及 、 亚進仃解擾頻及EDC確認動作; 料,ΑΡ1界面裝置,用以讀取該資料緩衝區内之該主I Ϊ中;EC上要/料解擾頻後輸出至主機端; 資 、中η亥ECC %碼裝置從該資斜 # 時,同時將該ECC資料區塊錯 > 二:取該ECC貧料區塊 行π方向之錯誤更正解:錯接存,該賢料暫存媒體,並進 資料暫存媒體内之ECC資料(!^者,=C解碼裝置藉由讀取 正解mEcci= 進行P0方向之錯誤更 ^ ^ ^ ^ # ^ w ^, c c ^ t ^ ^ 知寫入該資料暫存媒體。 、x 貝料中更正之部 裝置係將具有16個通道位二二系久,其中該解調變 疋之編碼子兀解調變為8位元6. Scope of patent application1. A decoding system for a disc, which performs a decoding operation. The decoding system includes: the disc's message data and a demodulation conversion device for receiving a change operation to generate an ECC data block. ", Poor material" and demodulation data CC negative material block contains a main two =, an internal verification code and an external verification code; to: breeding buffer to temporarily store the Ecc data block; : Poor material temporary storage medium 'is used to temporarily store the ECC data block; code; CC decoding device is used to correct the error of the Ecc data block. The device is used to read the main data that has been deleted and stopped. Data, the next to η and the sub-synchronization descrambling and EDC confirmation actions; material, AP1 interface device, used to read the main I frame in the data buffer; EC on the / material descramble output To the host side; when the ECC% code device from the resource oblique #, the ECC data block is wrong at the same time. Second: Take the ECC lean block line π direction error correction solution: wrong connection storage , The material is temporarily stored in the media, and the ECC data in the temporary storage medium is merged (! ^ 者, = C The code device reads the positive solution mEcci = to make the error correction in the P0 direction. The 16 channels are two or two lines long, in which the demodulation codec is demodulated into 8 bits 第14頁 2002* 〇5. 23 •014 2·如專利申請範圍第1Page 14 2002 * 〇 5.23 • 014 2 · As the scope of patent application No. 1 year 貝料符號之EFM Plus解調變裝置。 其中該ECC解碼 其中該資料緩 其中該資料暫 其中該資料暫 其中該解調變 3·如專利申請範圍第1項所述之解 裝置係一RSPC之解碼演算架構。 ’、、、’ 4·如專利申請範圍第1項所述之解 衝區可為一DRAM。 糸、统 5·如專利申請範圍第1項所述之解 存媒體可為一SRAM。 馬糸統 6·如專利申請範圍第1項所述之解瑪系統 存媒體之大小相當於〆個ECC資料區塊、、。 7·如專利申請範圍第1項所述之解 ^ ^ ^ ^ ^ 裝置、該ECC解碼裝置及該ATAPI界面、駐 ^ ^ 存取該資料緩衝/ 卩面裝置錢過匯流排來 之解碼方法’用以接收-碟片之訊息資料並執 灯解碼動作,該解碼方法包含: 轨 解調變裝置,該解調變裝 ^產生一ECC資料區塊, 〜内部配核碼及一外部 (1)讀取該碟片之訊息資料至一 置將該訊息資料進行解調變動作 該ECC資料區塊包含一主要資料 配核碼; (2) 寫入該ECC區塊至一資料緩衝區· (3) 讀取該EGC資料區塊至—EGG解碼裝置及_ f料暫存媒 體,並進行該ECC資料區塊?丨方向之錯誤更正解碼; ’、 (4) 讀取該資料暫存媒體内之該ECC資料區塊以進行p〇方 向之錯誤更正解碼; (5) 更正該貧料暫存媒體内之該ECC資料區塊及該資料緩EFM Plus demodulation device of the shell symbol. Among them, the ECC decoding, among which the data is buffered, where the data is temporary, and the data is temporarily, and the demodulation is changed. 3. The solution described in item 1 of the patent application scope is a decoding algorithm structure of an RSPC. &Apos; ,, ' 4. The buffer area described in item 1 of the patent application scope may be a DRAM.统. System 5. The storage medium described in item 1 of the scope of patent application may be an SRAM. Ma Tongtong 6. The size of the storage medium as described in item 1 of the patent application scope is equivalent to one ECC data block. 7 · The solution described in item 1 of the scope of patent application ^ ^ ^ ^ ^ device, the ECC decoding device and the ATAPI interface, and ^ ^ access to the data buffer / face device decoding method through the bus' It is used to receive the message data of the disc and perform the lamp decoding operation. The decoding method includes: a track demodulation device, the demodulation device ^ generates an ECC data block, an internal distribution code and an external (1) Read the message data of the disc to a set to demodulate the message data. The ECC data block contains a main data matching code. (2) Write the ECC block to a data buffer. (3 ) Read the EGC data block to —EGG decoding device and _f temporary storage media, and perform the ECC data block?丨 Error correction decoding in the direction; ', (4) Read the ECC data block in the data temporary storage medium to perform error correction decoding in the direction of p0; (5) Correct the ECC in the lean temporary storage medium Data block and the data buffer 508566 —__素號 89124235 __^Ά-§- 六、申請專利範圍 ---〜 衝區内之該主要資料; (6 )讀取該資料暫存媒體内已更正過之該主要資 擾頻器及EDC裝置以進行解擾頻及EDC確認動作;、1至〜解 (7 )讀取該資料缓衝區内之該主要資料至一 ATΑΡι乂及 置,將該主要資料解擾頻後輸出至主機端。 界面裝 9 ·如專利申請範圍第8項所述之解碼方法,龙也上 裝置係將具有1 6個通道位元之編碼字元解調變為g畔调變 資料符號之EFM Plus解調變裝置。 “、、位元之 1 0 ·如專利申請範圍第8項所述之解碼方法,其中士 碼裝置係一 R S P C之解碼演算架構。 Λ E C C解 11。如專利申請範圍第8項所述之解碼方法,复 衝區可為一dram。 /、肀該貧料緩 其中該資料暫 1 2 ·如專利申請範圍第8項所述之解碼方法 存媒體可為一SRAM。 13.如專利中請範圍第8項所述之解碼方法,其中該資料暫 存媒體之大小相當於一個E(:c資料區塊。 2 :專=二請範圍第8項所述之解碼方法,其中該解調變 ^ 4解碼裝置及該ATAP 1界面裝置係透過匯流排來 存取该育料緩衝區。508566 —__ Prime No. 89124235 __ ^ Ά-§- VI. Scope of patent application --- ~ The main data in the red zone; (6) Read the main data scrambler that has been corrected in the temporary storage media of the data Device and EDC device to perform descrambling and EDC confirming actions; 1 to ~ (7) read the main data in the data buffer to an ATAPI, and descramble the main data and output To the host. Interface installation 9 · As described in the patent application scope item 8 decoding method, Longye also demodulate the encoding characters with 16 channel bits into g-side modulation data symbols. Device. ", Bit number 10 · The decoding method as described in item 8 of the patent application scope, in which the code device is an RSPC decoding algorithm architecture. Λ ECC solution 11. The decoding as described in item 8 of the patent application scope Method, the re-flushing area can be a dram. /, The poor material is delayed, and the data is temporarily 1 2 The decoding method storage medium as described in item 8 of the patent application scope can be a SRAM. The decoding method described in item 8, wherein the size of the data temporary storage medium is equivalent to one E (: c data block. 2: Dedicated = two. The decoding method described in item 8, wherein the demodulation is changed ^ The 4 decoding device and the ATAP 1 interface device access the breeding buffer through a bus. 2002. 05. 23.0162002. 05. 23.016
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