TW508444B - Fast testing method for chip pins of flash memory - Google Patents

Abstract

This invention relates to a fast testing method for chip pins of flash memory, which is applied to the personal digital assistant. The method utilizes the electronic characteristics of the storage bits for one-time erasable flash memory chip and the flash memory chip unable to be written as 1 from 0. The address corresponding to each of one set of pins of the flash memory chip are sequentially proceeded the read/write check with one set of testing values, so as to determine the validity of writing each testing value into one pin, and further check the condition of each pin of the flash memory chip, thereby achieve the object of fast testing.

Description

508444 V. Description of the Invention (l) [Application Field of the Invention] The present invention is a rapid test method for flash memory chip pins, which is applied to personal digital assistants, especially a rapid test method achieved through software. [Background of the Invention] At present, it is a world with rapid development of electronic information. Many high-tech products are developing rapidly. Among them, palm-type electronic consumer products (personal digital assistants are the most popular) are widely used. The use of electronic consumer products is increasingly demanding. In the future, whether handheld electronic consumer products can provide faster, more convenient and reliable services has become an important indicator for evaluating whether high-tech products are leading the technology. The flash memory chips used in various personal digital assistant products have both the electronic characteristics of Read-Only Memory (ROM) and Random Access Memory (RAM). Read and write operations, and save data intact after power off. Compared with hard disk drives, flash memory chips are faster in size than hard disk drives, so It is widely used in on-screen electronic consumer products such as personal digital assistants, so its importance is self-evident

XlAs. N 刖 〇 But 'current palm-type electronic consumer products, especially personal digital Ϊ ^ In the production process, the assembly of the complete machine must be performed in various ways. Memory chip testing is a very important type of process. It is necessary to detect whether each pin of the chip is soldered well, and there is a condition of medium desoldering (open) or short circuit (ShOh). Do more now

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V. Description of the invention (2) The test is performed by the method of repeated read and write verification, but because this method needs to repeatedly flash the flash memory chip during the test, it must take ^ a lot of time, and for the flash There is a large loss of the service life of the memory chip, so it is not conducive to the pipeline operation during production. Even if no = accurately determine which pin is wrong, the pin open cannot be completely detected, so It can be seen that the test process of the traditional test method is tedious and the test accuracy is low. [Objective and Summary of the Invention] A quick test method of flash memory chips is used in the first ^ ~% sentence of the month, erasing the flash memory chip and the flash memory chip only once. Cannot be written from 0 as the electronic characteristics of 丨, each address of a group of pins of the flash memory chip is sequentially read and written a set of test values to determine that each test value is written to a : The correctness of 'and thereby determine the condition of each pin of the flash memory chip-normal, open or short condition, the purpose of rapid testing. The pins of the flash memory chip disclosed in the present invention are mainly used by the flash memory chip's storage bit method.

It is written as the electronic characteristic of i to detect it (that is, the storage order 3 = 々 can only be rewritten from, i, rewritten as,..., But not from the body crystal, so that: gate This Λ needs to be rewritten as "'again, only the flash memory can be rewritten. Each bit (BIT) of the memory chip has become, i ,, and /. The present invention is directed to the flash memory chip This electronic special film is performed at the address corresponding to each pin in the film.

Page 5 508444 V. Description of the invention (3) Recalling miscellaneous information. Check, that is to write 0xff, 0x7f, 0x3f, 0xlf 'xf, 0x7, 0x3 in turn on one pin, in order to determine the correctness of each test value written in one pin In addition, the test values are on the other pins, so you can determine the flash memory, whether every 2 pins of 2 are welded well, that is, determine whether the pins are open or shorted (sh.). rt). The understanding is as follows: The purpose, structural features, and functions of the invention have been improved. The understanding of the “effect cooperation diagram” is explained in detail as follows: [Detailed description of the embodiment] The method is based on the flash memory chip disclosed by i :: Fast test body of the foot ~ Use one erasure of the flash memory chip and the flash memory chip-each pin of the set of pins: the child is born, and the read and write verification of the test value is determined in order at 1J Perform :: Solder: JV * and determine whether each-pin of the flash memory chip is, or is only +, an,, (0 pen) or short circuit (sh 〇rt), in order to achieve the minimum use Generation can be written (_). The measurement of the soldering conditions of the chip pins. °, fast, accurate and low deduction, and each bit (BIT) of the aforementioned flash memory chip can only be changed from ι, changed = in ,, sub: unit is changed from, 0, rewritten into , 丨, to rewrite the text as 〇, but ca n’t be jealous and say ^ Ma Liang 丄 'can only erase the flash: Dagger "After the flash memory is removed, it is turned into 1, and at this time it can be done again. Was rewritten.

* Page 508444 5. Description of the invention (4) The following is a brief description of an embodiment applied to a 2MB flash memory chip: As shown in "Figure 1", it is a test of a 2MB flash memory chip The schematic diagram of the process' 2MB flash memory chip has a total of 21 address lines. After erasing its information and rotating a corresponding address of a group of pins (such as P1 corresponding to 0x 1 0 0 0 0 1, P2 corresponds to 0xl 0 0 0 0 2 etc.), enter a special set of hexadecimal digits (〇 * ff, 〇 * 7 f,, (mf, 〇 * f, 0 * 7, 0 * 3, test, and enter another address corresponding to a group of pins again. At this time, you also need to enter the hexadecimal number of the aforementioned special 2 to add the flash memory chip. Test, and repeat this process until all 21 (one set) pins have completed the test. As shown in Figure 2 ", the state diagram of the test process of the present invention, the following is an introduction to each process: When to start When testing (step 100), 'the flash memory must be erased first (step m), and enter 0 (step position 02, such as The "write 〇" that US $ " aV does not use) is used as a benchmark for subsequent test verification, and then enter ^, (step 3) in a set of pins, and write a ζΓη-number = Pick one out of the number of addresses corresponding to the test pin) (step 104), due to the special hexadecimal M, ... U is a special hexadecimal number converted into a binary system The code is divided into twenty /, and enters' 11111, llll, and U1. Called 1111111, the first-number of a bit is given by ,, and up. That is, it is changed every time to meet the 2 of the flash memory chip. The other bits are not J son characteristics, so they can be in the same

$ 7 pages 508444 V. Description of the invention (5) Write operations have been performed at the address multiple times. From the flash memory chip ::: Using this set of test numbers, whether the entertainment occurs (step 105), if the inspection pin is reported, it is judged that the detection error is from (technical writing) Confession 4 Γ 牛牛 心 (skip to step 1 1 if the pin is open wrong) (= "Because of the previous step" or short circuit), and end the process a: learn about the 5 of each pin The flash memory chip is used to write: 1 1 ΐ! When the full 0 is written as 1, but some flash memory, the original data will not be changed if the original data is not changed. A test After the data, read the data and check back. At this time, every time the written value does not match the data, there is no write time. If the written test is wrong. From this, the error can also be detected if the previously written test value. Sum — whether the completion of the previous set of special hexadecimal digits is equal, it is determined that this pin is skipped to the set of pins after the test is completed = step '1 0 6), if it is completed, skip to step 104, Then write another machine private = step 1 0 7) 'If it is not 103 ~ 106, it will be repeated again and again until the aforementioned special features are ten Steps 0 * 7f, 0 * 3f, 0 * lf, 〇 * f, 〇7, 〇3 0 * specific number (〇 * f ^ u * 3, 0 * 1) have been tested. If all the 107 pins are tested, the result is yes, then a correct detection message is obtained (step 丨 09), and the process is ended (step m). Of course, in order to increase the reliability, as shown in "Figure 3" Step 10: When the test result of all the pins is YES, add step i 08 to check the flash § The memory chip has been tested three times (step 丨 〇8). If yes, you will get a correct test. Message (step 109), and end the process (step 508444 V. invention description (6) 111), if not, skip to step 101, erase the information of the flash memory chip, and re-test again. The following steps will be described below. As shown in "Figure 4", this is the case where the pins are shorted. Because P3 and P8 are shorted, when the address 0x100008 of P3 is written, the actual bits are written. Address 〇xl〇〇〇〇8, and sequentially write Oxff, 0x7f, 0x3f, 0xlf, 0xf, 0x7, 〇3, 0xl, and when the address of P8 is written to 0x1 0 0 1 0 0, it will also write Enter 0x1 0 0 1 0 8 and write the same sequence of Oxff, 0x7f, 0x3f, 0xlf, 0xf, 0x7, 0x3, and 0x1 in the same order, and a write error will occur. When testing P3, all the information at address 0x1 〇〇1 〇8 has been changed to 0 '. Therefore, after writing 0X ff, because 0 cannot be changed to 1, it can be known that this pin 8 has an error; As shown in "Figure 5", the pin is open (PIN open), because P3 is open, the address of p3 is written. 0X 1 0 0 0 0 8 'Test data will be written Address 0 X 1 〇〇〇〇〇〇, but first = 0 has been entered at address 0 in step 1 〇2, so it is impossible to write a non-command value and write errors occur. Wrong, that is to say, in the address 〇χ1〇〇〇 08 hex numbers 0xff, 0x7f, 0x3f, 0xlf, 0xf, when the person writes ##, the binary code is 11111111 If the data read should be a non-zero value, and because ^ is used as the track entry, the data on the second is zero. "If a write error occurs, it can be determined that the connection can be made for both open and short circuits. Under detection, so it can be achieved quickly. According to the foregoing description, it can be known that the present invention correctly detects, and only needs to pass through a

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2. Description of the invention (7) Purpose of speed test. [Achieved effect] According to the rapid test method of the flash test memory chip pins disclosed in the present invention, it can achieve the following effects: 1 · Using the electronic characteristics of the flash memory chip erasable memory (EPROM) to achieve Fast and accurate with minimal cost and only need to erase the flash once, so test loss can be minimized, and the soldering status of the chip pins can be quickly measured, as well as in the production line

Perform test operations to improve the quality, production speed and efficiency of personal digital assistants. 2. Easy to detect open pin problems. 3. Quickly and effectively detect the short circuit or open circuit caused by bad soldering of flash memory chips, to accurately locate the wrong pins, so that the test staff can use a large number of test results to make an analysis and summary. 4. · The number of flash memory chips in the test is reduced to a minimum (only one is needed) 'and the number of flashing BL0CKs is the smallest. A 2MB flash memory chip only needs to erase five BLOCKs. (32〇KB), so that the time required for erasing is greatly reduced, and the production system can be guaranteed.

The process is fast and smooth, and the life loss of the flash memory chip is minimized. The above are only equivalent changes and modifications made by the present invention, not intended to limit the scope of implementation of the present invention, all of which are preferred embodiments, and that: Any application for a patent in accordance with the present invention is a model of the present invention Covered by patents.

Page 10 508444 Brief description of the drawings [Brief description of the drawings] Figure 1 is a schematic diagram of the test process of the present invention; Figure 2 is a test flowchart of the present invention; Figure 3 is another test flowchart of the present invention; FIG. 4 is a schematic diagram when the flash memory chip is short-circuited; and FIG. 5 is a schematic diagram when the flash memory chip is open-circuited.

Claims (1)

508444 6. Scope of patent application [Scope of patent application] It includes the following steps: 1. A quick test method of flash memory chip pins: Erase information of a flash memory chip; In the flash memory chip Enter zero at the address zero; turn one of a set of addresses in the flash memory chip in turn, and write one of a set of test values in each address in turn; and get a test result. 2 · The rapid test method for flash memory chip pins as described in item 1 of the scope of the patent application, wherein one of the set of addresses of the steps in which a set of addresses are sequentially entered in the flash memory chip corresponds to Pin to one of the flash memory chips. 3 · The rapid test method of the flash memory chip pins as described in the first item of the scope of the patent application, wherein the steps of sequentially inputting a set of addresses in the flash memory chip are 0x 1 0 0 0 0 1. 〇80〇〇, 0xl01000, 0xl02000, 0x104000, 0xi0800, 0x110000, 0x120000, 0x140000, 0x80000. 4. The rapid test method for flash memory chip pins as described in item 1 of the scope of patent application, wherein the set of test values for the steps of sequentially inputting a set of addresses in the flash memory chip is hexadecimal Number of systems. 5 · Fast flash memory chip pins as described in item 4 of the patent application Page 12 508444 6. Test method for patent application range, where the hexadecimal numbers are 0 X ff, 0 X 7 f, 0x3 f, Oxlf, Oxf, 0x7, 0x3, 0x1 o 6. The method for quickly testing a pin of a flash memory chip according to item 1, wherein the step of obtaining a test result further includes the following steps: obtaining a data from the address; and determining whether the test value is equal to the data. 7. The rapid test method for a flash memory chip pin as described in item 6 of the scope of the patent application, wherein the step of obtaining a data from the address is to automatically report the data using the flash memory chip. 8. The rapid test method for a flash memory chip pin as described in item 6 of the patent application scope, wherein the step of obtaining a data from the address is read out by the flash memory chip. 9. The rapid test method for flash memory chip pins as described in item 1 of the scope of patent application, further comprising performing three steps before the step of obtaining a test result to increase the detection time of the flash memory chip. Reliability. Page 13