TW505978B - Residue-free bi-layer lithographic process - Google Patents
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505978 , ,ΎΦ 飞 ._" j:Mx90122203_车 月日—修正__ 五、發明說明(1) 發明之領域 本發明提供一種雙層(bi layer)微影方法,尤指一 種無殘留物(residue free)的雙層微影方法。 背景說明505978,, ΎΦ Fei ._ " j: Mx90122203_Car Moon Day—Modification__ V. Description of the Invention (1) Field of the Invention The present invention provides a bi-layer lithography method, especially a residue-free ( residue free). Background note
微影與蝕刻是半導體製程中最重要的步驟,用以形成 接觸窗、金屬内連線以及半導體元件等所需之結構。習知 單層光阻通常使用於線寬約為0. 2 5微米(V m)的次微米 製程中,且矽晶圓基底之表面必須是平坦且不易反射的, 因為當單層光阻塗佈於易反射且局部凹凸不平的基底上 時,厚度不一的光阻便不容易進行微影與蝕刻以得到製程 所需的線寬大小,且可能造成切口 ( notching)效應。Lithography and etching are the most important steps in the semiconductor manufacturing process to form the structures required for contact windows, metal interconnects, and semiconductor components. The conventional single-layer photoresist is usually used in a sub-micron process with a line width of about 0.25 microns (V m), and the surface of the silicon wafer substrate must be flat and not easily reflective, because when a single-layer photoresist is applied, When placed on a substrate that is easily reflective and locally uneven, photoresist with different thicknesses cannot be easily lithographed and etched to obtain the line width required for the process, and may cause notching effects.
在半導體元件製作曰益縮小且積豊j增加的趨勢下, 可使用多層(multilayer)光阻來取代單層 (single-layer)光阻以提高微影之解析度(resolution )。多層光阻目前已使用於光學吸收有機聚合物,例如平 坦的抗反射(antireflective)層之上,於平坦的抗反射 層表面旋塗(spin-coating) —層成像(imaging)層, 利用旋轉塗佈的方法’可以改善成像層厚薄不均的問題, 並良好的控制其臨界尺寸(critical dimension,CD)。 此外’使用較薄的成像層可以改善微影的焦距容忍度In the trend of shrinking semiconductor device manufacturing and increasing the accumulated capacity, multi-layer photoresists can be used instead of single-layer photoresists to improve the resolution of lithography. Multilayer photoresists are currently used on optically absorbing organic polymers, such as a flat antireflective layer, and spin-coating-an imaging layer on the surface of a flat antireflective layer, using spin coating The cloth method can improve the problem of uneven thickness of the imaging layer and control its critical dimension (CD) well. In addition, the use of a thinner imaging layer can improve the focal length tolerance of lithography.
505978 五、發明說明(2) 一 (focu= latitude)。然而,使用多層光阻進行微影製程 的缺點是製程較為複雜,而且容易產生殘留物的問題。 請參照圖一至圖三,圖一至圖三為習知雙層微影方法 之示意圖。首先如圖一所示,於半導體晶片上1〇之一局部 凹凸不平的矽基底1 2上塗佈一平坦化光阻層1 4,並進行軟 烤(soft baking)約數秒鐘。經過軟烤後的光阻層η内 之溶劑含量會降低且光阻層1 4厚度也會減少。然後在光阻 層1 4上塗佈一較薄的含石夕(silicon-containing)光阻層 16’或者其他含有在經過氧氣(〇2)電漿蝕刻後,可形成 具有姓刻阻力之氧化物。其中,平坦化光阻層丨4其厚度約 為5 0 0nm,而含矽光阻層1 6其厚度約為2 3 5nm。平坦化光阻 層1 4具有南吸收度(absorbance),可以抑制石夕基底1 2的 反射。 如圖二所示,接著透過一光罩1 5對含矽光阻層1 6進行 曝光’將光罩1 5上的圖案轉移到含矽光阻層1 6上。此時, 經過曝光後的含矽光阻層1 6中具有一曝光區域1 1以及一未 曝光區域1 3。如圖三所示,再進行一乾式顯影,例如0 2電 漿戧刻(plasma etch),餘刻未曝光區域13,以將含石夕 光阻層1 6圖案移轉至光阻層1 4,形成具有開口 1 8之圖案。505978 V. Description of the invention (2) One (focu = latitude). However, the disadvantages of using a photolithography process with multiple photoresists are that the process is more complicated and it is prone to the problem of residues. Please refer to FIGS. 1 to 3, which are schematic diagrams of a conventional double-layer lithography method. First, as shown in FIG. 1, a flattened photoresist layer 14 is coated on a partially uneven silicon substrate 12 on a semiconductor wafer 10, and soft baking is performed for several seconds. After soft baking, the solvent content in the photoresist layer η will decrease and the thickness of the photoresist layer 14 will also decrease. Then, a thin silicon-containing photoresist layer 16 ′ or other material containing a silicon-containing photoresist layer 16 ′ can be formed on the photoresist layer 14 after being etched by an oxygen (0 2) plasma. Thing. The thickness of the planarized photoresist layer 4 is about 500 nm, and the thickness of the silicon-containing photoresist layer 16 is about 2 3 5 nm. The flattened photoresist layer 14 has an absorption of South, and can suppress the reflection of the Shixi substrate 12. As shown in FIG. 2, the photoresist layer 16 containing silicon is exposed through a photomask 15 ′ to transfer the pattern on the photomask 15 to the photoresist layer 16 containing silicon. At this time, the exposed silicon-containing photoresist layer 16 has an exposed area 11 and an unexposed area 13. As shown in FIG. 3, a dry development is performed, for example, plasma etch, and unexposed area 13 is etched to transfer the pattern of the photoresist-containing layer 16 to the photoresist layer 1 4 To form a pattern with openings 18.
505978 五、發明說明(3) 有可能會造成光阻層的側向(lateral)蝕刻而導致臨界 尺寸損失;(2 )利用0 2電漿蝕刻有可能會造成光阻層的自 發性蝕刻與蝕刻選擇率;(3 ) 0 2電漿蝕刻的離子轟擊(i 〇n bombardment)能量與氧原子漢度有關,不易控制c)習知 為了保護被蝕刻層的側壁’避免過度的側向蝕刻,有以 C S與C S〆Η 2電漿ϋ刻來取代0 2電漿餘刻,但是其缺點為太 多殘留物(r e s i d u a 1) 1 9在側面生成。 發明概述 因此,本發明之主要目的在於提供一種可良好控制臨 界尺寸(CD)且無殘留物(residue free)之雙層 (bi layer)微影方法,以提高半導體製程中微影之 解析度。 為達到上述目的,本發明之較佳實施例中包含有下 步驟:(1 )塗佈一第一光阻層於一基底上,(2 )烘烤第一 阻層丄(3 )塗佈一第二光阻層於第一光阻層表面,(暾 顯影第二光阻層,(5 )利用一非等向性〇 2/S〇 2電渡A 一二 氣體,蝕刻預定區域中之第一光阻層,以及( : 式去殘留物(de-res i dua 1)程序,利用一着山行專 體/〇2電漿,在一預,無線電頻率下電極功反合物| 壓力下,在一預定時間内去除乾式蝕刻過、及—預突 留物。 蕊中所產生的505978 V. Description of the invention (3) It may cause the lateral etching of the photoresist layer and cause a critical dimension loss; (2) Etching with a plasma plasma may cause spontaneous etching and etching of the photoresist layer Selectivity; (3) The ion bombardment energy of plasma etching is related to the oxygen atomic degree, which is difficult to control. C) It is known that in order to protect the side wall of the etched layer from excessive side etching, there are CS and CS〆Η 2 plasma engraving are used to replace the 0 2 plasma remaining etch, but the disadvantage is that too many residues (residua 1) 1 9 are generated on the side. SUMMARY OF THE INVENTION Therefore, the main object of the present invention is to provide a bi-layer lithography method which can well control the critical dimension (CD) and residue free, so as to improve the resolution of the lithography in the semiconductor process. In order to achieve the above purpose, the preferred embodiment of the present invention includes the following steps: (1) coating a first photoresist layer on a substrate, (2) baking the first resist layer (3) coating a The second photoresist layer is on the surface of the first photoresist layer, and (ii) develops the second photoresist layer, (5) uses an anisotropic 〇2 / S02 to cross the A-12 gas, and etches the first in the predetermined area. A photoresist layer, and (: de-res i dua 1) procedure, using a mountain line special / 0 2 plasma, at a pre, radio frequency electrode work compound | under pressure, Removal of dry etch and pre-projections within a predetermined time.
505978 五、發明說明(4) 本發明方法結合#等向性〇2/S〇2電漿乾式顯影步驟, 並且增加一道乾式去殘留物的製程,只需要殽破化合物氣 體與氧氣的混合氣體電漿衝擊開口處殘餘的殘留物數秒” 鐘’便可以去除在雙層光阻微影中所產生的殘留物。本發 明方法可以解決習知乾式顯影過程中的殘留物問韻 且韻 程時間短,完全不會造成半導體製程能i製 低。 發明之詳細說明 4參照圖四至圖六,圖四至圖六為本發明雙層微影方 法不意圖。如圖四所示’本發明方法之雙層光阻結構2 1由 一光阻層24與一含矽負光阻(siHc〇n —c〇ntaining negative resist,SNR)層26所組成。含矽負光阻層26含 有重里百分比約為2 %至1 2 %之石夕元素。形成雙層光阻結構 21的方法首先於一半導體晶片2〇上之局部凹凸不平的石夕基 底22表面塗佈一光阻層(平坦化光阻層)24。接著以溫度^ ^,進行軟烤約6 0秒。經過軟烤後的光阻層2 4内之溶劑含 量會降低且厚度也會減少。然後在光阻層24上塗佈_厚度 、’、勺為0 · 4至0 · 5微米的含石夕(silicon-containing)光阻芦 2 6其中’平坦化光·阻層2 4也可以為一有機平坦化底層 (underlayer),例如一具有高吸收度之抗反射層,^以 抑制矽基底2 2反射。505978 V. Description of the invention (4) The method of the present invention combines the #isotropic 〇2 / S〇2 plasma dry development step, and adds a dry residue removal process, which only needs to obfuscate the mixed gas of compound gas and oxygen. The residue left on the slurry impacting the opening for several seconds can be used to remove the residue generated in the double-layer photoresist lithography. The method of the present invention can solve the problem of the residue in the conventional dry development process and the short rhyme time. It will not cause the semiconductor process to be lowered at all. Detailed description of the invention 4 Refer to FIG. 4 to FIG. 6, which are not intended for the double-layer lithography method of the present invention. As shown in FIG. 4 'the double layer of the method of the present invention The photoresist structure 21 is composed of a photoresist layer 24 and a silicon negative photoresist (siHcon-containing negative resist (SNR)) layer 26. The silicon negative photoresist layer 26 contains a weight percent of about 2% To 12% of the element of the stone eve. The method of forming the double-layered photoresist structure 21 is to first apply a photoresist layer (planarized photoresist layer) 24 on the surface of a partially uneven stone eve substrate 22 on a semiconductor wafer 20 . Then with temperature ^ ^, proceed Bake for about 60 seconds. After soft baking, the solvent content in the photoresist layer 2 4 will decrease and the thickness will also decrease. Then, the photoresist layer 24 will be coated with _thickness, ', spoon from 0 · 4 to 0 · 5 micron silicon-containing photoresist 2 6 where the 'flattened photoresist layer 2 4 may also be an organic planarized underlayer, such as an anti-reflection layer with high absorption, ^ To suppress the silicon substrate 2 2 reflection.
505978505978
含 層 區 於 短 更 如圖五所示,接著透過一光罩Γ 248nm (如KrF雷射)之紫外^ I禾顯不),以波長為 26上。此時,經過曝光後的含阻芦【n: 域29以及一未曝光區域27。然而先 波長為248nm之紫外光,波長為j 广 、’ 义疋 短 ΐί^刀輻射(eXCimer laser radiation)或 短波長之光源亦適用於本發明。The layered region is shorter as shown in Figure 5, and then passes through a photomask Γ 248nm (such as KrF laser) UV ^ I Hexianbu) at a wavelength of 26. At this time, the exposed barrier [n: domain 29] and an unexposed area 27 after exposure. However, an ultraviolet light having a wavelength of 248 nm and a wavelength of j 广,, short, eXCimer laser radiation, or a short-wavelength light source is also suitable for the present invention.
如圖六所示,接著進行一乾式顯影製程,以一非等向 ^ 〇2/s〇2電漿為蝕刻氣體,在室溫下,將含矽光阻層26圖 案移轉至光阻層24中,以形成具有開口 28之圖案。〇2/s〇2 電漿蝕刻具有良好的非等向性,可以抑制含矽光阻層26下 方光阻層24的侧向(iateral)蝕刻。蝕刻氣體中s〇妁組 成約佔5 0%至1 〇 〇 %。當so濃度增加時,被蝕刻層的垂直蝕 刻速率與側向蝕刻速率均減少,其s〇之最佳比例約為 8 0 %。其中’乾式顯影製程的上電極功率約為1 5 〇至6 〇 〇瓦 特之間’無線電頻率(RF)下電極功率约為3〇至2 〇〇瓦特 之間’氧氣流量約為50至300sccm( standard cubic cent i me ter per minute)之間,二氧化硫流量約為5〇至 30 0 seem之間,壓力約為5至i 00毫托耳之間。 雖然利用〇 2/so 2電漿蝕刻可以改善臨界尺寸控制的問As shown in FIG. 6, a dry development process is then performed, using an anisotropic plasma as an etching gas, and transferring the silicon-containing photoresist layer 26 pattern to the photoresist layer at room temperature. In 24, a pattern having an opening 28 is formed. 〇2 / s〇2 Plasma etching has good anisotropy, and can suppress the lateral etching of the photoresist layer 24 under the silicon-containing photoresist layer 26. Sodium oxide composition in the etching gas accounts for about 50% to 100%. When the so concentration increases, both the vertical etch rate and the lateral etch rate of the etched layer decrease, and the optimal ratio of s0 is about 80%. Among them, the power of the upper electrode of the dry development process is about 150 to 600 watts. The power of the electrode at the radio frequency (RF) is about 30 to 2000 watts. The oxygen flow rate is about 50 to 300 sccm ( standard cubic cent i me per per minute), the sulfur dioxide flow is about 50 to 300 seem, and the pressure is about 5 to i 00 millitorr. Although the use of 0 2 / so 2 plasma etching can improve the critical dimension control problem
第9頁 505978 五、發明說明(6) 2 : ^ : : : f刻罩幕的含矽光阻層26被侵蝕的緣 :二殘"勿。因此,本發明方法在完成〇以〇2電 水乾式,j於後,必須隨即進行_道乾式去殘留物 j >程序,以去除少量剩餘的殘留物。此乾 式去殘留物程序係在室溫下,务丨 g r山儿人t # Φ^丨 如 至舰卜 利用一亂石反化合物氣體/軋 氣電漿蝕’在一預定無線電頻率下電極功率以及一預定 壓力下,在一預定時間内去除乾式電漿蝕刻過程中所產生 的殘留物,完成了無殘留物雙層微影方法的製作。其中, 乾式去殘留物程序之無線電頻率(RF)下電極功率^為5 至30瓦特(watts)之間,上電極功率約為15〇至6㈣瓦特 之間其壓力約為5至100¾托耳(fflT〇rr)之間,其預定 時間小於6 0秒鐘,而氟碳化合物氣體可以是CF 4、c疋6、 CHF3、CH2F2、CHF、CF3H、C2F2H2、C2F5H以及 C2F3H3,其氣體 流量约為30至150sccm之間,氧氣流量約為10至5〇sccm之 間0 本發明中的乾式顯影製程為利用〇 2/SO 2電漿蝕刻,由 於SO分子的解離,使得硫原子與氧原子會在被蝕刻層的 表面產生競爭吸附反應。當在室溫下,硫原子不會與碳原 子產生自發性反應,只有當溫度高於1 5 (TC時,才會自發 產生二硫化碳(CS 〇 ,因此硫原子可以阻擋蝕刻製程中 光阻層24側壁的自發性(spontaneous)蝕刻,硫原子使 * 得開口 28底部的離子誘導(i on-i nduced)化學蝕刻速率 變慢,減少側向#刻速率。然後為了去除少量剩餘的殘留Page 9 505978 V. Description of the invention (6) 2: ^::: f Engraved edge of the silicon-containing photoresist layer 26 of the mask: Two residues " Do not. Therefore, after the method of the present invention is completed, the electro-hydraulic dry method is completed. After that, the dry-type residue removal procedure must be performed immediately to remove a small amount of remaining residue. This dry-type residue removal procedure is performed at room temperature. If the electrode is used at a predetermined radio frequency, the electrode power and Under a predetermined pressure, the residue generated during the dry plasma etching process is removed within a predetermined time, and the production of the double-layer lithography method without residue is completed. Among them, the radio frequency (RF) lower electrode power of the dry residue removal process is between 5 and 30 watts, and the upper electrode power is between about 15 and 6 watts, and its pressure is about 5 to 100 ¾ Torr ( fflTrr), the predetermined time is less than 60 seconds, and the fluorocarbon gas can be CF 4, c 疋 6, CHF3, CH2F2, CHF, CF3H, C2F2H2, C2F5H, and C2F3H3, and the gas flow rate is about 30 Between 150 and 150 sccm, and the oxygen flow rate is between 10 and 50 sccm. The dry development process in the present invention uses 〇2 / SO 2 plasma etching. Due to the dissociation of SO molecules, sulfur atoms and oxygen atoms are A competitive adsorption reaction occurs on the surface of the etching layer. At room temperature, sulfur atoms do not react spontaneously with carbon atoms. Only when the temperature is higher than 15 ° C, carbon disulfide (CS 〇) is generated spontaneously, so sulfur atoms can block the photoresist layer 24 in the etching process. Spontaneous etching of the sidewalls, sulfur atoms slow down the on-i nduced chemical etching rate at the bottom of the opening 28, reducing the lateral #etching rate. Then in order to remove a small amount of remaining residue
第10頁 505978 五、發明說明(7) 物,再利用由氟碳化合物氣體與0所組成的蝕刻氣體進行 去殘留物製程,只需短短的數秒鐘,含有氟原子、碳原子 與氧原子的蝕刻氣體會與殘留物反應,進而達到去除殘留 物之效果。 相較於習知技術,本發明之特徵在於利用具有良好非 等向性之0 2/二氧化硫(S0 2)電漿蝕刻來取代習知的氧氣 電漿或者CS2/Η 2電漿蝕刻,並且增加一道乾式去殘留物的 製程,只需要氟碳化合物氣體與氧氣的混合氣體電漿衝擊 開口處殘餘的殘留物數秒鐘,便可以去除在雙層光阻微影 中所產生的殘留物。如此一來,使0 2/S0乾式顯影技術能 夠真正應用於量產上。 以上所述僅為本發明之較佳實施例,凡依本發明申請 專利範圍所做之均等變化與修飾,皆應屬本發明專利之涵 蓋範圍。Page 10 505978 V. Description of the invention (7), and then use the etching gas composed of fluorocarbon gas and 0 to carry out the process of removing residues, it only takes a few seconds, containing fluorine atoms, carbon atoms and oxygen atoms The etching gas will react with the residue, thereby achieving the effect of removing the residue. Compared with the conventional technology, the present invention is characterized by replacing the conventional oxygen plasma or CS2 / Η 2 plasma etching with 0 2 / sulfur dioxide (S0 2) plasma etching with good anisotropy, and increasing In a dry-type residue removal process, only a mixed gas of fluorocarbon gas and oxygen plasma is required to strike the remaining residue at the opening for a few seconds, and the residue generated in the double-layer photoresist lithography can be removed. In this way, the 0 2 / S0 dry development technology can be truly applied to mass production. The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made in accordance with the scope of the patent application for the present invention shall fall within the scope of the invention patent.
第11頁 505978 圖式簡單說明 圖示之簡單說明 圖一至圖三為習知雙層微影方法之示意圖。 圖四至圖六為本發明雙層微影方法示意圖。 圖示之符號說明Page 11 505978 Simple illustration of the diagrams Simple illustration of the diagrams Figures 1 to 3 are schematic diagrams of the conventional double-layer lithography method. FIG. 4 to FIG. 6 are schematic diagrams of a double-layer lithography method according to the present invention. Symbol description
第12頁 10 半 導 體 晶 片 11 曝 光 區 域 12 矽 基 底 13 未 曝 光 區 域 14 光 阻 層 ( 底 層) 15 光 罩 16 含 矽 光 阻 層 18 開 Ό 19 殘 留 物 20 半 導 體 晶 片 21 雙 層 光 阻 結 構 22 矽 基 底 24 光 阻 層 26 含 矽 光 阻 層 27 未 曝 光 區 域 28 開 Π 29 曝 光 區 域Page 12 10 Semiconductor wafer 11 Exposed area 12 Silicon substrate 13 Unexposed area 14 Photoresist layer (bottom layer) 15 Photomask 16 Silicon-containing photoresist layer 18 Slit 19 Residue 20 Semiconductor wafer 21 Double-layer photoresist structure 22 Silicon substrate 24 Photoresist layer 26 Silicon-containing photoresist layer 27 Unexposed area 28 On Π 29 Exposed area
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TW90122203A TW505978B (en) | 2001-09-07 | 2001-09-07 | Residue-free bi-layer lithographic process |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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US7309871B2 (en) | 2003-04-08 | 2007-12-18 | Cymer, Inc. | Collector for EUV light source |
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2001
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7309871B2 (en) | 2003-04-08 | 2007-12-18 | Cymer, Inc. | Collector for EUV light source |
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