TW504784B - Using refractory metal silicidation phase transition temperature points to control and/or calibrate RTP low temperature operation - Google Patents

Using refractory metal silicidation phase transition temperature points to control and/or calibrate RTP low temperature operation Download PDF

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TW504784B
TW504784B TW90121823A TW90121823A TW504784B TW 504784 B TW504784 B TW 504784B TW 90121823 A TW90121823 A TW 90121823A TW 90121823 A TW90121823 A TW 90121823A TW 504784 B TW504784 B TW 504784B
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temperature
item
refractory metal
scope
patent application
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TW90121823A
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Yun-Zhu Zhong
Rajneesh Jaiswal
Karim Haznita Abd
Bei-Chao Zhang
Johnny Cham
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Chartered Semiconductor Mfg
Lucent Technologies Inc
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Abstract

A method for controlling and/or calibrating rapid thermal process systems is described. One or more wafers comprising a silicon semiconductor substrate having a refractory metal layer thereon are silicided in a RTP system at different temperatures. Sheet resistance uniformity of the wafer is measured thereby detecting silicidation phase transition temperature points at the highest uniformity points. The temperature points are used to calibrate or to reset the RTP system. A plurality of wafers comprising a silicon semiconductor substrate having a refractory metal layer thereon can be silicided in each of a plurality of rapid thermal process systems. Sheet resistance uniformity of each of the wafers is measured thereby detecting silicidation phase transition temperature points by highest sheet resistance uniformity for each of the RTP systems. The temperature points are used to match temperatures for each of the RTP systems. The temperature point depend upon the type of refractory metal used and can range from about 200 to 800 DEG C.

Description

川4784Chuan 4784

【發明之背景】 (1)發明之領域 本發明係有關於積體電路元件的製造,並且特別是有 員於種在R τ P溫低操作中準碟溫度控制及在積體電路製 造中監控之方法。 (2)習知技藝之說明[Background of the Invention] (1) Field of the Invention The present invention relates to the manufacture of integrated circuit components, and in particular, it is used to control the temperature of a quasi-disc during R τ P low temperature operation and the monitoring during the manufacture of integrated circuits. Method. (2) Explanation of learned skills

在積體電路的製造中,快速加熱製程(RTP)已實施於 =^加熱製造步驟中,對於在RTP製程中的可再生結果而 a時間及溫度的準確控制係必要的,此特別困難去控制快 速加熱退火製程(RTA)系統,且符合在20 0到80(Tc之間的、 低溫區的系統之間的溫度,通常,一高溫計感應器係使用 於RTP /m度控制’感應器可藉由晶圓的發射出光訊號而偵 測出實際的晶圓溫度,此光訊號與高溫放射相較之下係相 當的低’晶圓的訊號··In the manufacture of integrated circuits, the rapid heating process (RTP) has been implemented in the heating process. For the reproducible results in the RTP process, accurate control of time and temperature is necessary. This is particularly difficult to control. Rapid heating annealing process (RTA) system, and the temperature between 200 to 80 (Tc, between low-temperature system systems, usually, a pyrometer sensor is used for RTP / m degree control 'sensor can The actual wafer temperature is detected by the optical signal emitted from the wafer. This optical signal is quite low compared to high-temperature radiation.

其中Τ係為晶圓溫度。對於一個較低的溫度而言,從晶圓 發射出的訊號係較小,若一個熱電偶係使用於偵測溫度, 一個較低溫度亦會導致一個熱電偶的較低電壓訊號。 在晶圓廠中或在晶圓廠之間,相同或不同 ^ 使用於相同製程的RTP及相同程式溫度設定,在目前糸校充正了 模組糸統中,相同栽忒、、田庚訊a 硬俨系雄么t ? 又疋的絕對溫度可不同於每個 硬體糸統’為了與系統相配,此差異必須減到最小。 溫度敏感度曲線(顯示電阻對溫度)已使用於系統設T is the wafer temperature. For a lower temperature, the signal emitted from the wafer is smaller. If a thermocouple is used to detect the temperature, a lower temperature will also result in a lower voltage signal of the thermocouple. In the fab or between fabs, the same or different ^ RTP used in the same process and the same program temperature setting, in the current module correction system of the school, the same plant, Tian Gengxun a Hard cock is male? t The absolute temperature of each cock can be different from each hardware cockroach 'To match the system, this difference must be minimized. Temperature sensitivity curve (showing resistance versus temperature) has been used in system design

第9頁 504784 五、發明說明(2) 定,然而,晶圓條件及基板組成於RTP製程的輸出片電阻 上具有主要作用,這些因素不被包含於溫度敏感度曲線 中’此希望得到一種更準確溫度控制及在系統之間溫度相 配之方法。 美國專利第6,132,081號(Han)揭露一種決定rtp溫度 之方法,以形成碎化欽,溫度係設定為在片電阻及/或非 均勻度不變之後的溫度,那就是’對溫度並不敏感,此方 法亦使用於校準一光感應器,此方法將無法符合一個溫度 傾向到較高的部分,且無法使用於每日系統相配。美國專 利第6, 136, 613號(Lin等)教導一種循環監控晶圓之方法, 係包含有退火及測量片電阻。美國專利第5, 33丨,676號 (Lambert等)顯示一種使用一溫度探針的校準爐管溫度之 方法。美國專利第5, 326, 1 70號(Moslehi等)顯示具有確實 元件的熔點之校準晶圓,如校準溫度點。 【發明之概要] 本發明之一主要目的,係在於提供一種在快速加熱 程(RTP)系統中溫度控制有效及極有製造性之方法。’、、、、 本發明之另一目的,係在於提供一種控制RTp溫 作之方法。 保 本發明之又一 作之方法。 目的,係在於提供一種校準RTP溫低操 的,係在於提供一種控制及/或校準 係藉由監視片電阻均勻度尖峰及均 本發明之又一目 RTP低溫操作之方法Page 9 504784 V. Description of the invention (2) However, wafer conditions and substrate composition play a major role in the output chip resistance of the RTP process. These factors are not included in the temperature sensitivity curve. Methods for accurate temperature control and temperature matching between systems. U.S. Patent No. 6,132,081 (Han) discloses a method for determining the rtp temperature to form a fragmented chimney. The temperature is set to a temperature after the sheet resistance and / or non-uniformity are constant, that is, the temperature It is not sensitive. This method is also used to calibrate a light sensor. This method cannot meet a temperature trend to a higher part, and cannot be used for daily system matching. US Patent No. 6, 136, 613 (Lin et al.) Teaches a method for cyclically monitoring wafers, which includes annealing and measuring sheet resistance. U.S. Patent No. 5, 33, 676 (Lambert et al.) Shows a method for calibrating furnace tube temperature using a temperature probe. U.S. Patent No. 5,326, 1 70 (Moslehi et al.) Shows a calibration wafer with a solid component melting point, such as a calibration temperature point. [Summary of the Invention] One of the main objects of the present invention is to provide a method for effective temperature control and extremely manufacturability in a rapid heating process (RTP) system. Another object of the present invention is to provide a method for controlling RTp operation. Another method of the present invention. The purpose is to provide a method for calibrating RTP temperature and low operation, and to provide a control and / or calibration method.

504784 五、發明說明(3) 勻度變化。 夕μ ί ί明之又一目’係在於提供-種符合在rtp系統 ^二二又之方法,係藉由監視片電阻均勻度尖峰及均勻度 化的溫度變化而獲得。 夂 本發明之又一目的,係在於提供一種控制及/ RTP低溫操作之方法,係藉由監視片 = 勻度變化的溫度變化而獲得。 』』度大峄及均 本發明之又一目的,伤Aω ^ ^ 中監視溫度之方法。糸在於獒供-種在加熱製程系統 作之ί ^明之上述目的’係獲致一種校準RTP低溫操 RTPΛ Λ 種係由料導體基板組成的晶圓係在 於Λ;ρ/Λ’該石夕半導體基板係具有一耐火金屬層 .;;,“里出晶圓的尖峰片電阻均勻度,因此,偵測出 尖峰片電阻均勾度,表亍度轉換到另-個溫度的 設及/或控制RTP系統。 轉換’溢度轉換係使用於重 操作:ΐ潁ίϊ本!明之目的,係獲致-種控瓣低溫 RTP f έ* Φ 種係由矽半導體基板組成的晶圓係在 於其上’測量出晶圓的尖學 火金屬層 矽化處理相轉換第一溫度點 二二::债測出 板組成的第二晶圓俜在RTp系轉巾1 ^種由矽半導體基 圓係在K ^ P糸統中被矽化,該矽半導體其 個不同的耐火金屬層於其上,測量出第Λ圓 、大 t阻均勻度,因此,偵測出矽化處理相轉換第二504784 V. Description of the invention (3) Evenness change. Xi μ ί Another bright point is to provide a method that is compatible with the rtp system. It is obtained by monitoring the uniformity spikes of the chip resistance and the temperature change of the uniformity.又一 Another object of the present invention is to provide a method for controlling and / or low-temperature operation of RTP, which is obtained by monitoring the temperature change of the film = uniformity change.峄 』大大 峄 和 均 Another object of the present invention is a method for monitoring temperature in Aω ^^.糸 lies in the supply-species of the above-mentioned purpose made in the heating process system 'is to obtain a calibrated RTP low-temperature operation RTP Λ Λ The wafer system is composed of a material conductor substrate Λ; ρ / Λ' the Shixi semiconductor substrate It has a refractory metal layer ;;, "The uniformity of the peak chip resistance of the wafer coming out, therefore, the average peak resistance of the peak chip resistance is detected, and the surface temperature is converted to another temperature setting and / or control RTP The system. The conversion of the 'overflow conversion system is used for heavy operations: ΐ 颍 ΐ 颍 copy! For the purpose of the purpose, it is obtained-a kind of controlled flap low temperature RTP f * * Φ The system is a wafer composed of a silicon semiconductor substrate on which' measured ' The first point of temperature of the wafer is to convert the silicon layer to silicon. The first temperature point is 22: The second wafer composed of the bond test board is in the RTp system, and it is a kind of silicon semiconductor based system in K ^ P. It is silicified in the system. The silicon semiconductor has a different refractory metal layer on it. The uniformity of the Λ circle and the large t resistance is measured. Therefore, the second phase transition of the silicidation process is detected.

第11頁Page 11

/JBL度站第及第二溫度點係使用於溫度校準。 站、、w 根據本發明之目的,係獲致—種符合多種RTP系 # Γ s t Γ賴方法,由一石夕半導體基板組成的複數個晶圓 二稷數個快速加熱製程系統中被矽化,該矽半導體基 反係具有一耐火金屬層於其上,測量出各晶圓的尖峰片電 ϊ ί勻度,!1,,谓測出各RTP系統的石夕化處理相轉換溫 ^ ^ ’具有取尚均勻度的溫度點係使用於各Μ?系統的溫 又’根據本發明之目的 溫之新穎方法,由一矽半導 了快速加熱製程系統中被矽 ,種類的耐火金屬層於其上 蓋出各晶圓的尖峰片電阻均 ,的矽化處理相轉換溫度點 HP系統。 ’係獲致一種控制RTP系統低 體基板組成的複數個晶圓係在 化’該矽半導體基板係具有不 ’溫度可與200 °C —樣低,測 勻度’因此,偵測出各晶圓種 ’這些溫度點可使用於控制 【圖號對照說明】 晶圓 14耐火金屬層 16蓋層 18金屬矽層 31線段 3 3線段 34The first and second temperature points of the / JBL degree station are used for temperature calibration. Station, w According to the purpose of the present invention, a system is obtained—a method that conforms to a variety of RTP systems. Γ st Γ Lai, a plurality of wafers composed of a semiconductor substrate and a plurality of rapid heating process systems are siliconized. The semiconductor-based system has a refractory metal layer on it, and measures the uniformity of the peaks of each wafer.! 1, It is said that the phase transition temperature of the petrification process of each RTP system is measured. ^ ^ The temperature point of the uniformity is the temperature used in each M? System. According to the novel method of the present invention, a novel method of warming a silicon semiconducting rapid heating process system is covered with silicon and a type of refractory metal layer. The peak chip resistance of each wafer is equal to the siliconized phase transition temperature point HP system. 'Due to the control of the formation of a plurality of wafers of the low-body substrate of the RTP system, the silicon semiconductor substrate system has no' temperature can be as low as 200 ° C-the sample is low, the uniformity is measured 'Therefore, each wafer is detected These kinds of temperature points can be used for control. [Pattern number comparison description] Wafer 14 refractory metal layer 16 cap layer 18 metal silicon layer 31 line segment 3 3 line segment 34

f 第12頁f p.12

五、發明說明(5) 35溫度 41曲線 42曲線 43曲線 【較佳實施例之說明】 準確溫度控制對於快速加熱製程(RTp)系統而言係 i:重;二在RTP系統中的溫度變化會造成大量的晶圓 相毀’對於早期偵測的任何溫度變化而言是一個關鍵性V. Description of the invention (5) 35 temperature 41 curve 42 curve 43 curve [Explanation of the preferred embodiment] Accurate temperature control is i: heavy for the rapid heating process (RTp) system; Second, the temperature change in the RTP system will 'Most wafer phase destruction' is critical for any temperature change detected early

以致於可排除晶圓損毁。本發明的製程可使用於系統啟重 的溫度設定及維持系統使用中的溫度控制,再者,本發日」 的製程可符合系統之間的溫度。 例如,一個矽化鈦處理目標温度的5t:溫度趨向極會 影響窄片電阻’且會造成嚴重的良率損失,低溫rtp應用 〔於低於750 ),包括有耐火金屬矽化處理、低溫退火、及 加熱’溫度控制在這些操作中特別重要。So that wafer damage can be ruled out. The process of the present invention can be used to set the temperature of the starting weight of the system and maintain the temperature control during the use of the system. Furthermore, the process of the present day can meet the temperature between the systems. For example, a 5t target temperature for a titanium silicide treatment: the temperature trend will greatly affect the narrow sheet resistance and cause serious yield loss. Low temperature RTP applications (less than 750) include refractory metal silicidation, low temperature annealing, and Heating 'temperature control is particularly important in these operations.

耐火金屬自行對準矽化處理相轉移顯示一個明顯的上 升,且材料的片電阻均勻度下降,耐火金屬的最高均勻度 將會發生於表示矽化處理相轉換的溫度點處,對於大部份 的耐火金屬矽化處理實例而言,轉換溫度會位於低溫區, j新的材料而吕低溫將會成為工業趨勢,石夕化處理相轉換 二度點可使用於偵測RTP低溫控制及/或系統的不同溫度設 定點而符合系統。 旦精準的找到每個不同耐火金屬的溫度設定點,這The refractory metal self-aligned with the silicified phase transfer shows a significant increase, and the sheet resistance uniformity of the material decreases. The highest uniformity of the refractory metal will occur at the temperature point indicating the silicified phase transition. For most refractory In the case of metal silicidation, the transition temperature will be in the low temperature region, and new materials and low temperatures will become an industrial trend. The second point of the phase transition of Shixi Chemical treatment can be used to detect the difference in RTP low temperature control and / or system. The temperature setpoint matches the system. Once you accurately find the temperature set point for each different refractory metal, this

第13頁 504784 - 五、發明說明(6) __ =設定點可使用於校準RTP系統,本發明 比t用技藝的校準方法較佳的效果,卩 法八t 今系統會出現錯誤’係因為在熱電偶中或的現 中出現的錯誤。 /在日日ϋ杈準條件 溫度設定點可使用於控制一RTP系統的溫度,小 電阻均句度將不同於不同的耐火金^ , 又大峰片 勻度,若尖峰片電阻均句度出現於一個 或較低的溫度*,此表示一個溫度趨向,校:方:二:: 關掉系統,以防止損壞及再校準系統。 :、、、 以片電阻測量為基礎的現今溫度控制並不靈敏,3 :=踵而來的晶圓差異的關係、,片電阻的變化會由於^ ’的晶圓的差異,不同晶圓具有不同的表面條件: 度:及電阻值,這些因素和爐管溫度一樣會影響片電阻, 不會影響片電阻均勻度,在片電阻均勻度的改變只备 目轉換溫度而影響,因此,本發明的製程(以片電阻 基礎)會比習用技藝更為準確。 … 本發明的製程亦可使用於符合系統之間的溫度,藉由 在^同的系統中以相同的製程進行相同種類的晶圓及测量 ^電阻,可偵測出一溫度差異,只要找到此差異或補償, 系統可調整為互相符合相同製程。 ▲本發明的方法使用片電阻均勻度的觀測,以偵測出溫 度隻化,片電阻均勻度對於溫度是很敏感的,是因為耐火 金屬矽化處理相轉換。 大部份的敏感溫度可從一個或更多的石夕化處理方法而 1^1 第14頁 504784 五、發明說明 獲得二係使用不同的耐火金屬厚度及/或蓋層及偵測溫度 點’這些在膜厚度或蓋層的改變可容許更多要確認的H奥 溫度點,更多溫度點可提供一個更準確的RTp系統。 、 例如,為了決定相轉換溫度,一耐火金屬層,(如 鈷三鎳、鈦、鎢、鉬、鈕、鉑、或其他相似的),係沈積 覆蓋於一晶圓上,以達到一個小於丨0 0埃到丨〇 〇 〇埃的厚 度,一蓋層(如鈦、氮化鈦、或其他相似的材料)可沈浐 蓋於耐火金屬層上,以達到一個小於100埃到50()埃的 度,第1圖係說明一晶圓1 〇 (例如),耐火金屬層1 4已沈積 覆蓋於基板上且一蓋層16覆蓋於耐火金屬層上。 彳、 、現在,晶圓係使用溫度在200到800。(:之間的快速加熱 退火(RTA)而被退火,係依使用的晶圓種類而定,退火將 會造成金屬層與矽半導體基板反應,以形成一金屬矽層、 在RTA之後,幾個面的片電阻係使用一個四點爐管或 其他裝置而被測量出來,片電阻均勻度⑽^ σ/χ)χ ι〇〇 其中σ為所有測量出的點標準誤差,及χ係為所有測量點 的平均值。Page 13 504784-V. Description of the invention (6) __ = The set point can be used to calibrate the RTP system. The present invention has a better effect than the calibration method using the technique. An error occurred in or in the thermocouple. / In daily conditions, the quasi-conditional temperature set point can be used to control the temperature of an RTP system. The average resistance of small resistors will be different from that of different refractory gold ^, and the uniformity of peaks will be large. One or lower temperature *, which indicates a temperature trend, calibration: square: two :: Turn off the system to prevent damage and recalibrate the system. : ,,, The current temperature control based on chip resistance measurement is not sensitive. 3: = the relationship between wafer differences, and the change in chip resistance will be due to the difference in wafers. Different surface conditions: Degree: and resistance value, these factors will affect the sheet resistance as well as the temperature of the furnace tube, and will not affect the uniformity of the sheet resistance. The change in the uniformity of the sheet resistance is only affected by the conversion temperature. Therefore, the present invention The manufacturing process (based on chip resistors) will be more accurate than conventional techniques. … The process of the present invention can also be used to meet the temperature between the systems. By performing the same kind of wafer and measuring the resistance in the same system in the same process, a temperature difference can be detected, as long as this is found Difference or compensation, the system can be adjusted to conform to the same process. ▲ The method of the present invention uses the observation of the uniformity of the sheet resistance to detect that the temperature is only reduced. The uniformity of the sheet resistance is very sensitive to temperature because of the phase conversion of the refractory metal silicidation treatment. Most of the sensitive temperatures can be obtained from one or more petrochemical treatment methods. 1 ^ 1 Page 14 504784 V. Description of the invention The second series uses different refractory metal thicknesses and / or cover layers and detects temperature points. ' These changes in film thickness or cap layer may allow more Hau temperature points to be confirmed, and more temperature points may provide a more accurate RTp system. For example, in order to determine the phase transition temperature, a refractory metal layer (such as cobalt trinickel, titanium, tungsten, molybdenum, button, platinum, or other similar) is deposited on a wafer to achieve a temperature less than 丨A thickness of 0 0 Angstroms to 丨 00 Angstroms, a capping layer (such as titanium, titanium nitride, or other similar materials) can be sunk on the refractory metal layer to achieve a thickness of less than 100 angstroms to 50 (50 angstroms). FIG. 1 illustrates a wafer 10 (for example), a refractory metal layer 14 has been deposited on a substrate, and a capping layer 16 covers the refractory metal layer. Well, now, wafers are used at temperatures between 200 and 800. (: The rapid thermal annealing (RTA) between is annealed, depending on the type of wafer used. Annealing will cause the metal layer to react with the silicon semiconductor substrate to form a metal silicon layer. After the RTA, several The sheet resistance on the surface is measured using a four-point furnace tube or other device. The sheet resistance uniformity is ⑽ ^ σ / χ) χ ι〇〇 where σ is the standard error of all measured points, and χ is all measurements. The average of the points.

〇第3圖係為圖表說明Ti/Co/Si的溫度敏感性,這些晶 圓已具有一層鈷130埃厚及一層2〇〇埃的蓋鈦層,在RTp製 程期間,已在四溫度點上測量到片電阻及片電阻均勻度, 線段31顯示增加溫度的電阻值,線段33顯示增加溫度^均 勻度值’因為發生相轉換,所以相轉換溫度可從最高均勻 度線而確認,也就是,在此案例中,溫度35表示一個相轉〇 Figure 3 is a graph illustrating the temperature sensitivity of Ti / Co / Si. These wafers already have a layer of cobalt 130 angstroms thick and a 200 angstrom titanium cap layer. During the RTp process, the temperature has reached four temperature points. The sheet resistance and the uniformity of the sheet resistance were measured. Segment 31 shows the resistance value that increases the temperature, and segment 33 shows the increase temperature ^ uniformity value. Because the phase transition occurs, the phase transition temperature can be confirmed from the highest uniformity line, that is, In this case, the temperature 35 represents a phase inversion

五、發明說明(8) —------------ 換^ ^片電阻均勻度(U%)表示程式溫度設定點。 示一、、w # 3圖中溫度35的任何在程式溫度設定點的改變表 顏* ::轉換及若轉換過度所需關閉系統的溫度,依製程 沾固疋任何溫度轉換將會造成在測量片電阻均勻度中 的-個巨大的改變,且可容易偵測到。 表1係顯示決定三種晶圓的某些設定溫度。 表1 膜的種類 在RTP之後的 最高u%V. Description of the invention (8) —------------ Change the resistance uniformity (U%) of the chip resistor to indicate the programmed temperature set point. Show one, w # 3 in the graph of any change in temperature 35 at the program temperature set point. *: Conversion and if the conversion is required to shut down the system temperature, any temperature conversion will result in the measurement. A huge change in chip resistance uniformity that can be easily detected. Table 1 shows some set temperatures that determine the three wafers. Table 1 The highest u% of membrane types after RTP

Ni/Si Ti/Co/Si Ti/Si 200 °C 〜675 〇C 〜730 〇CNi / Si Ti / Co / Si Ti / Si 200 ° C ~ 675 〇C ~ 730 〇C

:旦準確的找到上述溫度,這些多點可使用於校準。 第4圖說明一個特別晶圓種類的基線均勻度曲線41, 樣板1係為由最高均勻度點所決定的溫度設定,在使用本 發明的製程以監測一個單獨RTp系統,若最高均勻度轉換 到樣板2或樣板3(分別為曲線42或43),此表示一個溫度轉 換及重設系統所需的溫度。在符合RTp系統中,若系統1在 樣板1上具有最高u%,且系統2在樣板2或樣板3上具有最高 u%,系統2需要調整。: Once the above temperature is accurately found, these multiple points can be used for calibration. FIG. 4 illustrates a baseline uniformity curve 41 for a particular wafer type. The template 1 is a temperature setting determined by the highest uniformity point. In the process of the present invention, a single RTp system is monitored. Template 2 or Template 3 (curves 42 or 43 respectively), this represents the temperature required for a temperature conversion and reset system. In an RTp-compliant system, if system 1 has the highest u% on template 1, and system 2 has the highest u% on template 2 or template 3, system 2 needs to be adjusted.

第5圖係說明一第一種類的耐火晶圓的基線均勻度曲 線51 ’此設定點係為樣板4,一第二種類的耐火晶圓的基 線均勻度曲線52具有樣板5的設定點,由於不同種類的耐 火晶圓具有不同相轉換溫度,兩個或更多種類的晶圓可使 用於校準RTP溫度感應器,在此案例中,兩溫度樣板4及樣 板5將使用於校準RTP溫度感應器,校準溫度可和200 °C —FIG. 5 illustrates the baseline uniformity curve 51 of a first type of refractory wafer. This set point is a template 4 and the baseline uniformity curve 52 of a second type of refractory wafer has a set point of template 5. Different types of refractory wafers have different phase transition temperatures. Two or more types of wafers can be used to calibrate the RTP temperature sensor. In this case, two temperature templates 4 and 5 will be used to calibrate the RTP temperature sensor. , Calibration temperature and 200 ° C —

第16頁 504784 五、發明說明(9) 樣低,且跟8 0 0 °C —樣高,例如,N i S ix相轉換溫度係接近 200 °C,TiSix係為73(TC且WSix可為更高。 本發明之製程使用尖峰片電阻均勻度,以決定快速加 熱製程低溫應用的相轉換溫度設定點。這些溫度設定點可 使用於校準RTP系統,以控制RTP系統,且符合RTP系統之 間的溫度。Page 16 504784 V. Description of the invention (9) Sample low and 800 ° C — sample high, for example, the Ni S ix phase transition temperature is close to 200 ° C, TiSix is 73 (TC and WSix can be Higher. The process of the present invention uses the uniformity of the peak chip resistance to determine the phase transition temperature setpoints for low temperature applications in fast heating processes. These temperature setpoints can be used to calibrate the RTP system to control the RTP system and conform to the RTP system. temperature.

雖然本發明已被特別地表示,並參考其較佳實施例做 說明,惟各種形式上及細節的改變可於不背離本發明之精 神與範疇下為之,係為熟習本技藝之人士所能瞭解的。Although the present invention has been particularly shown and described with reference to the preferred embodiments thereof, various changes in form and detail may be made without departing from the spirit and scope of the present invention, which can be done by those skilled in the art. understand.

第17頁 504784 圖式簡單說明 在形成本說明之内容部分的附圖中,所示為: 第1圖及第2圖係圖示說明使用於本發明一較佳實施例 的晶圓之横剖面圖。 第3圖係圖示說明一種晶圓的溫度對片電阻及均勻度 之關係圖。 第4圖係圖示說明不同RTP系統的溫度對片電阻及均勻 度之關係圖。Page 17 504784 Brief description of the drawings In the drawings that form the content of this description, the following are shown: Figures 1 and 2 illustrate cross sections of a wafer used in a preferred embodiment of the present invention Illustration. Figure 3 is a graph illustrating the relationship between the temperature of a wafer, chip resistance, and uniformity. Figure 4 is a diagram illustrating the relationship between temperature, chip resistance and uniformity of different RTP systems.

苐5圖係圖不說明兩種晶圓的溫度對片電阻及均勻度 之關係圖。Figure 5 is a graph that does not explain the relationship between the temperature of the two wafers, chip resistance, and uniformity.

第18頁Page 18

Claims (1)

504784 六、申請專利範圍 1 種校 2 4 5 67 在該快 有一 屬層 測量該 電阻 使用該 如申請 層係選 群。 如申請 層係濺 如申請 蓋層覆 如申請 自含有 積至一 如申請 製程糸 如申請 製程系 8 ·如申請 溫度點 準/快速加熱製程系統之方法,係包括有: 速加熱製程系統中矽化一晶圓,該晶圓係包括 矽半導體基板,該半導體基板係具有一耐火金 於其上; 晶圓的片電阻均勻度,且因此偵測出在最高片 均勻度上的矽化處理相轉換溫度點;及 溫度點’以校準該快速加熱製程系統。 專利fc圍第1項所述之方法,其中該耐火金屬 自於含有銘、鈦、鎳、鎢、鉬、钽、及鉑的組 專利範圍第1項所述之方法,其中該耐火金屬 鑛沈積至一個在100埃到1 000埃之間的厚度。 專利範圍第1項所述之方法,尚包括有沈積一 蓋於該耐火金屬層上。 專利乾,第4項所述之方法,其中該蓋層係選 鈦、及氮化鈦的組群,且其中該蓋層係 個小於100埃到500埃的厚度。 專利範圍第1項所述之方法,其中該快速加熱 統係選自含有矽化處理、及低溫退火的組群了 專利範圍第1項所述之方法,其中該快速加熱 統係為一低溫製程,其溫度在200到800 t之間 =圍第1項所述之方法’尚包括有使用該 以权準該快速加熱系統,以符合另一個該快速504784 VI. Scope of patent application 1 type of school 2 4 5 67 There is a subordinate layer in the fast measurement of the resistance. Use the same as the application to select the group system. If the application layer is splashed, if the cover layer is applied, if the application is self-contained, the application process is the same as the application process. If the application process is 8, such as the method of temperature point precision / rapid heating process system, including: Siliconized in the rapid heating process system A wafer including a silicon semiconductor substrate having a refractory gold on it; the chip resistance uniformity of the wafer, and thus detecting the siliconized phase transition temperature at the highest wafer uniformity Point; and temperature point 'to calibrate the rapid heating process system. The method described in item 1 of the patent fc, wherein the refractory metal is from the method described in item 1 of the group of patents containing titanium, titanium, nickel, tungsten, molybdenum, tantalum, and platinum, wherein the refractory metal ore is deposited To a thickness between 100 Angstroms and 1,000 Angstroms. The method described in item 1 of the patent scope further includes depositing a cap on the refractory metal layer. The method described in item 4, wherein the capping layer is selected from the group consisting of titanium and titanium nitride, and wherein the capping layer has a thickness of less than 100 angstroms to 500 angstroms. The method described in item 1 of the patent scope, wherein the rapid heating system is selected from the group containing silicidation treatment and low temperature annealing. The method described in item 1 of the patent scope, wherein the rapid heating system is a low temperature process, Its temperature is between 200 and 800 t = the method described in item 1 still includes the use of this to standardize the rapid heating system to meet another rapid I麵 第19頁 504784 六、申請專利範圍 加熱系統。 9 如申請專利範圍第1項所述之方 數個晶圓,其中該耐火金屬且尚匕括有矽化複 4人i屬具有複數個厚唐,豆 有些該複數個晶圓尚包括有一筌+ /、中 層,其中谓測出複數個石夕化處理相m= 中該複數個溫度點係使用於校準該快速加^製程系統 10 一種重设一快速加数製程系你Φ ^ ^ …表狂糸統至一没定溫度點之方法 ’包括有· 在該快速加熱製程中矽化一第一晶圓,該第一晶 括有矽半導體基板,且具有一耐火金屬層於其上 在該快速加熱製程中矽化一第二晶圓,該第二晶圓包 有一矽半導體基板,且具有相同的該耐火金屬層其 上; /、 測量该第一晶圓及該第二晶圓的片電阻均勻度,且因 此债測出在最高該片電阻均勻度上的矽化處理相 換溫度點; 把該最高均勻度溫度點比作該設定溫度點,以偵測出 一溫度變化;及 ' 使用該溫度變化,以重設該快速加熱製程系統。 11 ·如申請專利範圍第10項所述之方法,其中該耐火金屬 層係選自鈷、鈦、鎳、鎢、鉬、钽、及鉑的組群。 12 ·如申請專利範圍第10項所述之方法,其中該财火金屬Side I Page 19 504784 VI. Scope of patent application Heating system. 9 The number of wafers described in item 1 of the scope of the patent application, in which the refractory metal is still siliconized. 4 people have multiple thick tangs, and some of the multiple wafers include a stack of + / 、 The middle layer, where it is said that a plurality of petrified chemical processing phases are measured m = The temperature points are used for calibrating the rapid addition process system 10 A reset one rapid addition process system you Φ ^ ^… The method to reach an indefinite temperature point 'includes: siliconizing a first wafer in the rapid heating process, the first crystal including a silicon semiconductor substrate, and having a refractory metal layer on the rapid heating process; During the process, a second wafer is silicided, and the second wafer is packaged with a silicon semiconductor substrate and has the same refractory metal layer thereon; /, the sheet resistance uniformity of the first wafer and the second wafer is measured , And therefore the debt detects the temperature change point of the silicidation treatment at the highest uniformity of the chip resistance; compares the highest uniformity temperature point to the set temperature point to detect a temperature change; and 'use the temperature change To reset the quick Heating process system. 11. The method according to item 10 of the scope of patent application, wherein the refractory metal layer is selected from the group consisting of cobalt, titanium, nickel, tungsten, molybdenum, tantalum, and platinum. 12 · The method according to item 10 of the scope of patent application, wherein the rich metal 504784 六、申請專利範圍Scope of patent application 13 · 層係濺鍍沈積至一個在1 0 0埃到1 〇 〇 0埃之間、 如申請專利範圍第1 〇項所述之方法,尚包5括的厚度 蓋層覆蓋於該耐火金屬層上。 有沈積 1 4 ·如申請專利範圍第1 3.項所述之方法,发巾 _ 自含有鈦、及氮化鈦的組群’且其中該蓋層係賤二^ 積至一個小於1 0 0埃到5 0 〇埃的厚度。 … 1 5 ·如申請專利範圍第1 〇項所述之方法,其中該快速加熱 製程系統係選自含有矽化處理、低溫退火、及加熱^ 組群。13. The layer is sputter-deposited to a method between 100 angstroms and 1,000 angstroms, as described in item 10 of the scope of patent application, with a cover layer of 5 thicknesses covering the refractory metal layer. on. With deposition 1 4 · As described in item 13 of the scope of the patent application, the hair towel _ from the group containing titanium and titanium nitride 'and wherein the cover layer is a base product of less than 1 0 0 Angstroms to 500 Angstroms in thickness. … 15 • The method as described in item 10 of the scope of patent application, wherein the rapid heating process system is selected from the group consisting of silicidation, low temperature annealing, and heating ^. 1 6 ·如申請專利範圍第1 〇項所述之方法,其中該快速加熱 製程系統係為一低溫製程,其溫度在2〇0到800 °C之間 1 7 ·如申請專利範圍第1 〇項所述之方法,尚包括有矽化複 數個第一及第二晶圓,其中該耐火金屬層係具有複數 個厚度,且其中有些該複數個晶圓尚包括有一蓋層覆 蓋於該耐火金屬層上,其中偵測出複個第一及第二矽 化處理相轉換溫度點,且其中複數個第一及第二溫度 點係作為偵測該第二溫度變化。 1 8 · —種溫度符合複數個快速加熱製程系統之方法,係包 括有: 在每個該複數個快速加熱製程系統中矽化一晶圓,該 晶圓係包括有一矽半導體基板,且具有一耐火金屬 層於其上; 測里出母個該晶圓的片電阻均勻度,且因此摘測出每16 · The method as described in item 10 of the scope of patent application, wherein the rapid heating process system is a low temperature process, the temperature of which is between 200 and 800 ° C. 17 · As in the scope of patent application 10 The method described in the item further includes silicifying the plurality of first and second wafers, wherein the refractory metal layer has a plurality of thicknesses, and some of the plurality of wafers further include a capping layer covering the refractory metal layer. In the above, a plurality of first and second silicidation phase transition temperature points are detected, and a plurality of the first and second temperature points are used to detect the second temperature change. 1 8 · A method that meets a plurality of rapid heating process systems, including: silicifying a wafer in each of the plurality of rapid heating process systems, the wafer system including a silicon semiconductor substrate, and having a refractory The metal layer is on it; the uniformity of the sheet resistance of the mother wafer is measured, and therefore each 第21頁 504784 六、申請專利範圍 個該快速加熱製程系統的最高該片電阻均勻度的矽 化處理相轉換溫度點;及 使用該溫度點,以符合每個該快速製程系統的溫度。 1 9 ·如申請專利範圍第18項所述之方法,其中該耐火金屬 層係選自鈷、鈦、鎳、鎢、錮、鈕、及鉑的組群。 20 ·如申請專利範圍第18項所述之方法,其中該耐火金屬 層係濺鍍沈積至一個在1 0 〇埃到1 〇 〇 〇埃之間的厚度。 2 1 ·如申請專利範圍第1 8項所述之方法,尚包括有沈積一 蓋層覆蓋於該耐火金屬層上。 2 2 ·如申請專利範圍第2 1項所述之方法,其中該蓋層係選 自含有鈦、及氮化鈦的組群,且其中該蓋層係濺鍍沈 積至一個小於1 〇 〇埃到5 0 0埃的厚度。 23 ·如申請專利範圍第18項所述之方法,其中該快速加熱 製知糸統係選自含有石夕化處理、低溫退火、及加熱的 組群。 24 ·如申請專利範圍第18項所述之方法,其中該快速加熱 製程系統係為一低溫製程,其溫度在2〇0到8〇〇它之間 25 ·如申請專利範圍第18項所述之方法,尚包括有矽化複 數個第一及第二晶圓,其中該耐火金屬層係具有複數 ,厚度,且其中有些該複數個晶圓尚包括有一蓋層覆 蓋於該耐火金屬層上,其中偵測出複個第一及第二矽 化處理相轉換溫度點,且其中複數個第一及第二溫度 點係作為偵測該第二溫度變化。Page 21 504784 VI. Application for patent The siliconized phase transition temperature point of the rapid heating process system with the highest uniformity of the sheet resistance; and the temperature point is used to meet the temperature of each rapid process system. [19] The method according to item 18 of the scope of patent application, wherein the refractory metal layer is selected from the group consisting of cobalt, titanium, nickel, tungsten, rhenium, buttons, and platinum. 20. The method as described in claim 18, wherein the refractory metal layer is sputter deposited to a thickness between 100 angstroms and 100 angstroms. 2 1 · The method according to item 18 of the scope of patent application, further comprising depositing a capping layer on the refractory metal layer. 2 2 · The method according to item 21 of the scope of patent application, wherein the capping layer is selected from the group consisting of titanium and titanium nitride, and wherein the capping layer is sputter-deposited to less than 100 angstroms To a thickness of 500 angstroms. 23. The method according to item 18 of the scope of patent application, wherein the rapid heating system is selected from the group consisting of petrochemical treatment, low temperature annealing, and heating. 24. The method according to item 18 of the scope of patent application, wherein the rapid heating process system is a low temperature process with a temperature between 2000 and 800. 25. According to the item 18 of scope of patent application The method further includes silicifying a plurality of first and second wafers, wherein the refractory metal layer has a plurality of thicknesses, and some of the plurality of wafers further include a capping layer covering the refractory metal layer, wherein A plurality of first and second silicidation phase transition temperature points are detected, and the plurality of first and second temperature points are used to detect the second temperature change. 第22頁Page 22
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Publication number Priority date Publication date Assignee Title
CN113314434A (en) * 2020-02-26 2021-08-27 上海先进半导体制造有限公司 Method and system for monitoring oxygen leakage and temperature of cavity of rapid thermal annealing equipment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113314434A (en) * 2020-02-26 2021-08-27 上海先进半导体制造有限公司 Method and system for monitoring oxygen leakage and temperature of cavity of rapid thermal annealing equipment
CN113314434B (en) * 2020-02-26 2024-05-24 上海先进半导体制造有限公司 Method and system for monitoring oxygen leakage and temperature of cavity of rapid thermal annealing equipment

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