TW501376B - Decoding device and method of digital audio - Google Patents

Abstract

The present invention discloses a decoding device and a decoding method of digital audio. By integrating the operations of combined stereo decoding and anti-distortion processes in the digital audio decoding process, the hardware requirement is decreased, thereby reducing the area of the overall circuit, and further increasing the data processing speed.

Description

501376 V. Description of the invention 0) [Field of the invention] The present invention relates to a digital audio processing, in particular to a decoding device and method for MP3 (MPEG Audio Layer 3). [Background of the Invention] With the popularity of digital music, digital compression technology has also flourished. Among them, digital audio is popular due to its high compression and high sound quality, and many related decompression software and hardware have come out. The first picture is a block diagram of the conventional MP3 decompression. In step S10, the digital audio bit stream (MP3 Bit Stream) is subjected to synchronization and error checking (Synchronizing & Error checking) to resolve MP3 related data, such as Huo Huffman Decoding and Scalefactor Information, and check whether the data is correct, and perform Huffman decoding according to the Huffman Table to solve the corresponding value, that is, steps S1 2, and then proceed to step S1 4, which is inverse quantization (D e-quantizati ο η), which processes the data received according to the proportional information to obtain a decimal between -1 and + 1; then The data are rearranged (R e 〇rder), that is, step S 1 6. In step S20, a joint stereo decoder (Joint Stereo Decoding) is used to convert the signal into a stereo signal, and is divided into a left channel and a right channel; the two paths are respectively subjected to Anti-Aliasing processing, that is, step S22; and then Step S24 is performed, that is, Inverse Modified Discrete Cosine Transfer and Overlap; finally, a synthetic polyphase filter set (Synthesis

501376 V. Description of the invention (2)

Polyphase Filterbank) restores the frequency domain (frequency domain) signal to the time domain (t i m e d o m a i n) signal, and synthesizes and filters it to obtain the original Pulse Coded Modulation (PCM) signal. In the decoding process shown in the first figure, a large number of registers and processing time are required, mainly for joint stereo decoding S2. 0 Two channels of data need to be temporarily stored and processed, and anti-distortion processing S2 is required. 2 It is also necessary to temporarily store the data of two adjacent subbands and to process them. In the process of signal processing, the stereo decoding formula is as follows:

MS [L] [Sb] [SS] = (XY [L] [Sb] [SS] + XY [R] [Sb] [SS] / / " 2 (1) MS [R] [Sb] [SS ] = (XY [L] [Sb] [SS BU XY [R] [Sb] [SS] / (2) where MS is the output of stereo decoding; L is the left channel; R is the right channel; Sb Is the subband index; SS is the scale factor band index; Xr is the input signal. The anti-distortion formula is as follows:

An [L / R] [Sb] [17-SS] -MS [L / R] [Sb] [17-SS] XCs [SS]-MS [L / R] [Sb + 1] [SS] XCa [ SS]. (3)

An [L / R] [Sb + l] [SS] -MS [L / R] [Sb + l] [SS] XCs [SS] +

MS [L / R] [Sb] [17-SS] XCa [SS] (4) Among them, An is the output of anti-distortion processing step S22; L / R means left channel or right channel; SS is 0 ~ 7 Integer; Cs and Ca are constants between (_1, +1).

Page 5 ^ 01376 V. Description of the invention (3) Corresponding to the aforementioned formula, one is shown in. This includes the left sound St. The sound decoder is set as shown in the second figure, the three-level register B3, etc., and stores ^ B1, the right channel register B2, and 576 characters. The left sub is to provide the left channel and the right channel ^ in the capacity of each register. The tube register β 1 and the right channel register B 2 respectively B 3 are used to receive the next ^^ day $ The required memory is a buffer-level register group adder 10 and a group of two == input signals. And this architecture requires a decoding parameter for calculation, such as 1/2, two sets of multipliers 1 4 and 15, and the stereo block element [ii show: in the hardware side sub-band for anti-distortion processing s22 Temporary cry = equal register β4, the second sub-band register M, and two of them; a cry memory, which can store 3 × 18 words temporarily crying, Γ: for the sub-band operation Required memory, its calculation process; then:-an input signal of the sub-band. And in a &amp; π I /, and a set of multipliers 20 and 22, a set of adders 24, and ^ anti-distortion parameters, such as Ca [SS] and Cs [SS]. Yan Yanqiu 9 yIt! Known temporary storage needed for stereo decoding and anti-distortion processing ϊ Λ „3 × 1 8 = 1 78 2 characters, the operation requires two sets of addition = day i 'method 15 and four sets of multiplication Device, which occupies a large area of the entire decoding system, <day-to-day and film area. Since you are here, you have 2 and 2 due to the lack of the above-mentioned conventional techniques, a decoding device and method that is superior to conventional techniques. [Objective and Summary of the Invention] The main object of the present invention is to propose a digital audio demapping device.

501376 V. Invention description (4) The device and method for combining stereo decoding and anti-distortion operation integration to reduce the chip area occupied by the entire system and improve the speed and efficiency of signal processing. According to the present invention, a digital audio decoding device and method combine a stereo decoding parameter and an anti-distortion parameter first, and then switch the processing order of the stereo decoding and the anti-distortion decoding so that the output of each joint stereo decoding can be reduced by one multiplication Computing, the overall data processing speed can be nearly doubled, and its temporary memory capacity can be reduced by more than half. [Detailed description] Because the processing order of stereo decoding and anti-distortion processing will not affect the output result of digital audio decompression, therefore, the stereo decoding parameters of the above-mentioned calculation formulas of stereo decoding and anti-distortion processing and The anti-distortion parameters are merged first to obtain two new parameters, nCs [SS]: l / XCs [SS] (5) nCa [SS] = l / ^ / ~ 2) x (Ca [SS] (6) The order of stereo decoding and anti-distortion processing is reversed, and the formula for anti-distortion after the exchange is as follows:

An [L / S] [Sb] [SS] = Xr [L / S] [Sb] [17-SS] XnCs [SS]-

Xr [L / S] [Sb + 1] [SS] XnCa [SS] (7)

An [L / S] [Sb + 1] [SS] = Xr [L / S] [Sb + 1] [SS] XnCs [SS] +

Xr [L / S] [Sb] [17-SS] XnCa [SS]

501376 V. Description of the invention (5)

Sb two 0 ~ 31, SS = 0 ~ 7 After finishing the calculation formula is:

An [L / S] [Sb] [others] = Xr [L / S] [Sb] [others] / y ^ 2 (9) Where, when Sb is 0, others is SS = 0 ~ 7 When Sb is 1 to 30, others is SS = 8, 9 〇 When Sb is 31, others is SS = 8 to 17 〇 The joint stereo formula is converted to: MS [L] [Sb] [SS] = An [L] [Sb] [SS] + An [R] [Sb] [SS] (10) MS [R] [Sb] [SS] = An [L] [Sb] [SS] -An [R] [Sb] [ SS] (11) Compared with formulas (1) and (2) described in the background, the output of each MS stereo decoding can be reduced by one multiplication operation, and one channel has 3 2 X 1 8 outputs. In other words, the method proposed by the present invention can save 576 multiplication operations in the process of processing the data of one channel, and improves the overall processing speed. The fourth figure shows an embodiment of the present invention, illustrating a hardware block of the above-mentioned calculation method. First, the input signal Xr passes through the parameters provided by the multiplier 30 and the parameter provider 34, such as 1 /, nCa [SS] or nCs [SS]. Here, the number system is selected by a set of counters 32. The parameter 'multiplied by the signal Xr is 1 / / ~ 2, and the obtained result is directly stored in the register 3 5; otherwise, each &gt; X is multiplied by the corresponding nca [ss] and n C s [SS ], The obtained results are stored in the temporary registers 36 and 37 respectively, until the data of a group of sub-bands is finished.

501376 Fifth, the description of the invention (6). At this time, the data of the registers 36 and 37 are read out, and the result of the multiplication with the input signal of the next set of sub-bands is added and subtracted by the adder / subtractor 38. In this process, only one action is completed at a time. Repeat the above operation until the register 3 5 is filled, that is, one channel of data 32 XI 8 characters. When the processing of the data of one channel is completed, if the processing of the data of the next channel is completed, the data corresponding to the register 35 can be read out, and at the same time, the adder 40 and the subtractor 4 2 can be added or Subtraction. In this way, the data output of the left and right channels can be obtained at the same time. As shown in the fourth figure, the operation unit used includes a set of multipliers 30, a set of adder / subtractors 38 common to addition and subtraction, a set of adders 40 and a set of subtractors 42. Compared with the combination of stereo and anti-distortion processing in the conventional technique shown in the second figure, the present invention saves three sets of multipliers on the hardware. Regarding registers, the memory required for the circuit shown in the fourth figure includes register 36 (8 characters), register 37 (8 characters), register 35 (32X18) plus temporary The memory of 39 (8 characters) requires a total of 600 characters of memory, which is significantly reduced compared to the 172 characters required for the conventional art shown in the third figure. Therefore, in the present invention, the stereo decoding parameters and the anti-distortion parameters are combined and processed first, and then the processing order of the stereo decoding and the anti-distortion decoding is switched, so that the output of each joint stereo decoding can be reduced by one multiplication operation, thereby improving the overall operation speed. In addition, using the device and method proposed by the present invention, 'reduced the required memory, thereby saving hardware space' and reducing costs. Furthermore, if the architecture shown in the fourth figure is matched with a pipeline processing method, as shown in the fifth figure, in each cycle, each computing unit and register continuously inputs the input. digit

501376 V. Description of the invention (7) The audio data is processed and processed, and the speed of digital audio decompression can be further improved. The above description of the preferred embodiment of the present invention is for the purpose of clarification, and is not intended to limit the present invention to exactly the disclosed form. Modifications or changes are possible based on the above teaching or learning from the embodiments of the present invention. The embodiments are selected and described in order to explain the principle of the present invention and allow those skilled in the art to use the present invention in practical applications in various embodiments. The technical idea of the present invention is intended to be based on the scope of the following patent applications and their equivalents. Decision 0

501376 Schematic description for those skilled in the art, the present invention will be more clearly understood from the detailed descriptions and accompanying drawings made below, and its above and other objectives and advantages will change. It is more obvious, in which: the first picture is a conventional block diagram of MP3 decompression; the second picture is a block diagram of a joint stereo decoder in the first picture; the third picture is a block diagram of anti-distortion processing in the first picture; The fourth diagram is an embodiment of the present invention; and the fifth diagram is a schematic diagram of the pipeline signal processing in the fourth diagram. Drawing number description: 1 0, 2 4, 4 0, 4 2 Adder 1 2, 2 6 Subtractor 1 4, 1 5, 2 0, 2 2, 3 0 Multiplier 3 2 Counter 3 4 Parameter Provider 35, 36, 37, 39 Register 3 8 Adder / Subtractor

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Claims (1)

501376 6. Scope of patent application [Scope of patent application] 1. A digital audio decoding device, including: first, second, third and fourth registers; a multiplier whose output is coupled to the first and second registers And a third register for multiplying the data received by the first, second and third registers by corresponding anti-distortion parameters or stereo decoding parameters, and storing the multiplied results in the first, first and second registers. In the second and third registers, the adder / subtractor receives the output of the first and second registers, adds or subtracts the data of the two, and outputs the calculated result to the fourth register. And an adder and subtracter, which receive the outputs of the third and fourth registers, add and subtract the outputs of the third and fourth registers, respectively, and output their respective operation results . 2. The device described in item 1 of the scope of patent application, further comprising a counter for selecting the anti-distortion parameter or stereo decoding parameter and multiplying the signal received by the multiplier. 3. — A digital audio decoding method, including: pre-merging anti-distortion parameters and stereo decoding parameters required for the operation process of joint stereo decoding and anti-distortion processing; using the aforementioned parameters for anti-distortion processing; and performing according to the previous step Joint stereo decoding, which is divided into multiple channel data output. 4. The method as described in item 3 of the scope of patent application, wherein the anti-distortion processing includes using a multiplier to divide the digital audio data with its corresponding anti-distortion parameters. Page 12 501376 VI. Multiply the number of patent applications or the stereo decoding parameter, and then add or subtract the result of the multiplication with the anti-distortion parameter; while stereo decoding is the digital audio data and the stereo decoding parameter The multiplication result is added to or subtracted from the result of the anti-distortion processing step. 5. The method according to item 3 of the scope of patent application, wherein a counter is used to decide to take out the anti-distortion parameter or stereo decoding parameter and the digital audio data for multiplication. 6. — A digital audio decoding method, including: pre-merging and processing parameters required for the operation of joint stereo decoding and anti-distortion processing; and combining parameters required for the joint stereo decoding and anti-distortion processing according to the parameters obtained in the previous step. Operations are merged. 7. The method as described in item 6 of the scope of patent application, wherein the operations of the joint stereo decoding and the anti-distortion processing are combined so that the same operation is performed in the same operation unit. 8. The method as described in item 7 of the scope of patent application, wherein the step of merging further includes integrating registers required for joint stereo decoding and anti-distortion. 9. A digital audio decoding method, comprising: pre-combining anti-distortion parameters and stereo decoding parameters required for the operation process of joint stereo decoding and anti-distortion processing; multiplying digital audio data with their corresponding anti-distortion parameters or stereo decoding parameters And save the results to the first, second, or third temporary storage 3 &amp; · Take out the data of the first or second temporary register to add or subtract, and save the result Page 13 501376 6. Scope of patent application Store in the fourth register; and take out the data of the third and fourth registers and add or subtract them to produce two-channel data output. 10. The method according to item 9 of the scope of patent application, wherein a counter is used to decide to take out the anti-distortion parameters or stereo decoding parameters and multiply the digital audio data. Page 14