498471 經濟部智慧財產局員工消費合作社印製 Α7 Β7 五、發明說明（） 發明領域： 本發明係有關於一種銲料凸塊 思之製造方法，特別是有 關於一種在上光阻前塗佈抗高溫材祖” ^ 何抖以避免高溫迴銲後之 光阻殘留現象之銲料凸塊之製造方法。 發明背景： 積體電路製造完成以後’還需要與其它元件相連接、 散熱、並需要外殼加以保護，因此需要加以封裝。積體電 路封裝的形式有簡單也有複雜’且由於極大型積體電路 (ultra large scale integration ; ULSI)曰趨積集化，因此封裝 的接腳也日漸增多。此外，封裝的形式多樣化且封裝的製 程對精準度的要求也愈來愈高.另一方面，為了降低工資， 自動化與不焊線亦有其必要性。再者，為便利隨身攜帶， 也有多種輕薄短小的包裝出現。 傳統的封裝是將積體電路之晶粒加以保護，並提供電 源、散熱、且連接至其它元件。現代的封襞則是轉變為使 封裝後具備下一層次組裝之相容性。 然而封裝可能會影響積體電路的功能、加大積體電路 的體積與重量、增加測試之困難度、且使其可靠度變差。 2 本紙張尺度適用中國國家標準（CNS)A4規格（21〇 χ 297公 ^------— ^--------- (請先閱讀背面之注意事項再填寫本頁) 498471 A7 B7 五、發明說明（ (請先閱讀背面之注意事項再填寫本頁) 封裝形式除了有最早發展出來的兩排直立式封裝（dual in line package ; DIP)外，尚有晶粒承載器（chip carrier)、 覆晶、針格陣列（pin grid array ; PGA)、膠帶承載器（tape carrier)、密封包裝（hermetic package)、球格陣列（baii grid array ; BGA)、四方平面包裝（quad flat package ; QFP)、導 線架在晶粒之上（lead on chip; LOC)、晶粒尺寸封裝（chip scale package ; CSP)、裸晶（bare die)、膠帶承載器封裝（tape carrier package ； TCP)等。 經濟部智慧財產局員工消費合作社印製 以國内電腦晶片組三大廒而言，其近幾年來晶片組在 封裝上的變化，從早期的以QFP100與QFP208之組合，已 經簡化成很簡單的南橋與北橋兩顆晶片，而封裝型態也提 升至必須使用一顆多於300支腳的BGA以及另一顆高達 500支腳的BGA，方可滿足功能與高密度之需求。砮未來 再將繪圖晶片整合進去，則未來晶片組需以600支腳以上 的BGA來進行封裝。若BGA之腳數高於600支腳卻仍以 打線接合（wire bonding)來做為連接線路的方式，則元件封 裝之尺寸勢必面臨過大的問題。若改採覆晶技術之BGA封 裝，則可解決打線接合所面臨尺寸過大之問題。因此，針 對不同產品應用之覆晶封裝技術就此產生。這些新式封裝 方式需利用覆晶技術之錫鉛凸塊來達成其封裝接合之目 的。因此錫錯凸塊在新式封裝方式上扮演重要角色。以下 本紙張尺度適用中國國家標準（CNS)A4 公爱） 498471 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（） 說明錫鉛凸塊之基本結構。 以覆晶技術而言，需借重晶片表面之錫鉛凸塊才能達 成覆晶接合之目的。錫鉛凸塊之結構可分成兩個部份，分 別為凸塊下金屬層（under bump metallurgy ; UBM)以及凸塊 本體。凸塊下金屬層至少由兩層金屬所組成。第一層為黏 附層（adhesion layer)，其材質可為鈦、鉻、或鎢化鈦等， 用以使錫錯凸塊與銲塾（bonding pad)及晶片之護声 (passivation layer)間有較強之黏著性。第二層為沾錫層 (wetting layer)，其材質可為鎳、銅、鉬或鉑等’用以提升 黏附層與凸塊本體間之黏著性。基本上組成沾錫層之金屬 與凸塊本體之潤溼（wetting)程度較高，因此高溫迴銲時， 凸塊本體可完全沾附其上而成球。有些廠商會在沾錫層上 鍍上一層保護層（protection layer)，例如金等，用來保護錄 或銅等金屬免於被氧化，以保持其與凸塊本體間之濁溼效 果。至於凸塊本體方面，常用的組成有兩種。第一種是高 溫錫鉛合金，例如5%錫/95%鉛或3%錫/97%鉛，通常用於 可耐高溫之陶瓷基板。第二種是低溫錫鉛合金，例如π% 錫/63。/。鉛或40〇/。錫/60%鉛，通常用於有 ° 需成本較高温锡銘合金為低。近年來由於環保法令2 求’使付無毅之金屬凸塊進一步杰么々 ^ 艾成為各廠商研發的重點。 上述凸塊本體之製作方法有蒸鍍法(evaporation)、 本紙張尺度適用中國國家標準（CNS)A4規格（21〇 電鍍 ---------I··裝--------訂---------線Φ (請先閱讀背面之注意事項再填冩本頁) 498471 A7 B7 五、發明說明（ 法（electroplating)、以及印刷法（printing)等。蒸鍍法之產 能因製程特性之限制，使其每小時只能生產7片8吋晶圓， U成製造成本居南不下，因此已無法符合市場需求。故目 前凸塊本體之製作方法主要使用電鍍法以及印刷法。 習知使用高鉛銲料（例如5%錫/95%鉛）之銲料凸塊之製 程’其最主要的考量是，高鉛銲料凸塊之較長壽命及較佳 疲勞哥命（fatigue life)可提高覆晶產品之使用年限。然而， 根據錫錯相圖來看，銲料凸塊中鉛所佔的比例愈高，表示 迴鲜所需的溫度愈高。迴銲所需的溫度愈高，在迴銲的先 前製程所用之光阻愈容易因高迴銲溫度而殘留在晶圓上， 且不易在光阻剝除的過程中移除光阻。 發明目的及概述： 馨於上述發明背景中，在習知使用銲料凸塊之製程 中’迴if*所需的溫度愈高，在迴銲的先前製程所用之光阻 愈容易因高迴銲溫度而殘留在晶圓上，且不易在光阻剝除 的過程中移除光阻。 (請先閱讀背面之注意事項再填寫本頁)498471 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention () Field of the invention: The present invention relates to a method for manufacturing solder bumps, in particular to a method for coating high temperature resistance before coating "Material ancestor" ^ How to manufacture solder bumps to avoid photoresistance after high temperature reflow. BACKGROUND OF THE INVENTION: After the integrated circuit is manufactured, it needs to be connected to other components, dissipate heat, and protected by a casing. Therefore, packaging is required. Integrated circuit packaging has simple and complicated forms, and because ultra-large scale integration (ULSI) tends to be integrated, packaging pins are also increasing. In addition, packaging The variety of forms and the accuracy of the packaging process are increasing. On the other hand, in order to reduce wages, automation and wire bonding are also necessary. Furthermore, in order to facilitate carrying, there are also a variety of thin and short The traditional packaging is to protect the die of the integrated circuit and provide power, heat dissipation, and connection to it. Components. Modern sealing is transformed to make packaging compatible with the next level of assembly. However, packaging may affect the function of integrated circuits, increase the volume and weight of integrated circuits, increase the difficulty of testing, And make its reliability worse. 2 This paper size applies to China National Standard (CNS) A4 specifications (21〇χ 297 public ^ -------- ^ --------- (Please read the back first Please note this page before filling in this page) 498471 A7 B7 V. Description of the invention ((Please read the notes on the back before filling this page) In addition to the first developed two-row vertical package (DIP) package In addition, there are chip carriers (chip carriers), flip-chips, pin grid array (PGA), tape carriers, hermetic packages, and baii grid arrays; BGA), quad flat package (QFP), lead on chip (LOC), chip scale package (CSP), bare die, tape Device carrier (tape carrier package; TCP), etc. Printed by the Consumer Cooperative of the Ministry of Intellectual Property Bureau of the People's Republic of China. In terms of the three major domestic computer chipset packages, the changes in the chipset package in recent years have been simplified from the earlier combination of QFP100 and QFP208 to a very simple one. Southbridge and Northbridge have two chips, and the package type has also been upgraded to use a BGA with more than 300 pins and another BGA with up to 500 pins to meet the needs of functionality and high density.砮 In the future, if the graphics chip is integrated, the chipset will need to be packaged with a BGA of more than 600 pins in the future. If the number of pins of the BGA is higher than 600 pins, but still uses wire bonding as the connection line, the size of the component package is bound to face an excessive problem. If the BGA package of flip-chip technology is adopted, the problem of over-size of wire bonding can be solved. Therefore, flip-chip packaging technology for different products has been created. These new packaging methods require the use of flip-chip tin-lead bumps to achieve their packaging and bonding goals. Therefore tin bumps play an important role in new packaging methods. The following paper size applies to the Chinese National Standard (CNS) A4 Public Love) 498471 Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention () Explain the basic structure of tin-lead bumps. In terms of flip-chip technology, it is necessary to rely on tin-lead bumps on the wafer surface to achieve the purpose of flip-chip bonding. The structure of tin-lead bumps can be divided into two parts, which are under bump metallurgy (UBM) and the bump body. The metal layer under the bump is composed of at least two layers of metal. The first layer is an adhesion layer. The material can be titanium, chromium, or titanium tungsten. It is used to make tin bumps and bonding pads and the passivation layer of the wafer. Strong adhesion. The second layer is a wetting layer, which can be made of nickel, copper, molybdenum, or platinum, to improve the adhesion between the adhesion layer and the bump body. Basically, the metal constituting the soldering layer has a high degree of wetting with the bump body. Therefore, when the solder is reflowed at a high temperature, the bump body can be completely adhered to form a ball. Some manufacturers will plate a protective layer (such as gold) on the tin-soaked layer to protect metals such as copper or copper from being oxidized to maintain the turbidity and humidity effect between the metal and the bump body. As for the bump body, there are two commonly used compositions. The first is a high temperature tin-lead alloy, such as 5% tin / 95% lead or 3% tin / 97% lead, which is usually used for ceramic substrates that can withstand high temperatures. The second is a low temperature tin-lead alloy, such as π% tin / 63. /. Lead or 40〇 /. Tin / 60% lead, which is usually used when there is a higher cost. The temperature of the tin alloy is lower. In recent years, due to environmental protection decree 2 ’, Fu Wuyi ’s metal bumps have been further developed. ^ Ai has become the focus of research and development by various manufacturers. The manufacturing method of the above bump body includes evaporation, and the paper size is applicable to the Chinese National Standard (CNS) A4 specification (21〇 Plating --------- I ·· Packing ------ --Order --------- Line Φ (Please read the notes on the back before filling this page) 498471 A7 B7 V. Description of invention (electroplating) and printing (steaming). The production capacity of the plating method is limited by the process characteristics, so that it can only produce 7 8-inch wafers per hour. The manufacturing cost of U-Cup is still high in the south, so it can no longer meet the market demand. Therefore, the current production method of the bump body mainly uses electroplating Method and printing method. Knowing the process of solder bumps using high-lead solder (such as 5% tin / 95% lead), the main consideration is the longer life and better fatigue of high-lead solder bumps. (Fatigue life) can increase the useful life of flip-chip products. However, according to the tin phase diagram, the higher the proportion of lead in solder bumps, the higher the temperature required for freshness. The higher the temperature, the more easily the photoresist used in the previous process of reflow will remain on the wafer due to the high reflow temperature It is not easy to remove the photoresist in the process of photoresist stripping. Purpose and summary of the invention: In the above background of the invention, the higher the temperature required to return to if * in the conventional process of using solder bumps, the The photoresist used in the previous reflow process is more likely to remain on the wafer due to the high reflow temperature, and it is not easy to remove the photoresist during the photoresist stripping process. (Please read the precautions on the back before filling this page )
經濟部智慧財產局員工消費合作社印製 法 銲 目迴 一溫 之高 明免 發避 本以 此用 因可 為 的 供 留 殘 阻 光 之 方 造 製 之 塊 凸 。 料象 銲現 種 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公楚） 498471 A7 五、發明說明（ 依據本發明之上述 塊之製造方法。本發明 列步驟。首先，提供晶 接著，形成凸塊下金屬 一光阻層於此凸塊下金 銲墊上方。接著，以此 金屬層，並約暴露出此 約暴露出此凸塊下金屬 護層與此凸塊下金屬層 高溫材料層上，且此第_ 去除此凸塊下金屬層上 此凸塊下金屬層。接著， 且此銲料層約與此第二 料層。接著，剝除此第J 迴銲此銲料層，使此銲 目的，因此本發明提供一種 之銲料凸塊之製造方法至少 圓，此晶圓上具有銲墊以及 層於銲墊與護層上。接著， 屬層上，且此第一光阻層約 第一光阻層為罩幕，蝕刻此 護層。接著，剝除第一光阻 層。接著’塗佈抗高溫材料 上。接著，形成第二光阻層 二光阻層約位於此護層上方。 之部分抗高溫材料層，並約 形成銲料層於此凸塊下金屬 光阻層同樣高度。接著，迴 二光阻層與此抗高溫材料層。 料層形成凸塊本體。 銲料凸 包括下 護層。 形成第 位於此 凸塊下 層，並 層於此 於此抗 接著， 暴露出 層上， 銲此銲 接著， 圖式簡單說明： 本發明的較佳實施例將於往後之說明文字中辅以下列 圖表做更詳細的闡述，其中： (請先閱讀背面之注意事項再填寫本頁) 丨裝 Γ n n in"- ϋ an i mmamw imm0 n n < 經濟部智慧財產局員工消費合作社印製 第1圖為本發明之一較佳實施例之銲料凸塊之製造方 法之結構剖面圖，其中在銲墊與護層上已形成凸塊下金屬 本紙張尺度適用中國國家標準(CNS)A4規格（210x297公f ) 498471 五、發明說明（） 層； 第2圖為本發明之一較佳實施例之銲 法之έ士福立丨 斗凸塊之製造方 法之、，，。構剖面圖，其中在凸塊下金屬層上 層； 已形成第一光阻 第3圖為本發明之一較佳實施例之 沐之έ士播# Τ凸塊之製造方 法之，·，。構剖面圖’其中以第一光阻層為革 金屬層’並約暴露出護層； Χ 第4圖為本發明之一較佳實施例之Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, the welding method is so brilliant that you can avoid the bumps made by this method, which can be used to retain the remaining obstructed light. Material image welding current This paper size is applicable to Chinese National Standard (CNS) A4 specification (210 X 297 Gongchu) 498471 A7 V. Description of the invention (Based on the method of manufacturing the above-mentioned block of the invention. The steps of the invention are listed. First, provide crystals Then, a photoresist layer under the bump is formed over the gold pad under the bump. Then, the metal layer is exposed, and the metal protection layer under the bump and the metal layer under the bump are exposed. On the high-temperature material layer, and remove the metal layer under the bump on the metal layer under the bump. Then, the solder layer is about this second material layer. Then, strip off the J th solder back solder layer In order to achieve this soldering purpose, the present invention provides a method for manufacturing a solder bump which is at least round. The wafer has a solder pad and a layer on the solder pad and a protective layer. Then, it is on a layer, and the first photoresist The first photoresist layer is a mask, and the protective layer is etched. Then, the first photoresist layer is peeled off. Then, the high temperature resistant material is coated. Then, a second photoresist layer is formed. Over the protective layer. The solder layer is formed at the same height as the metal photoresist layer under this bump. Then, the second photoresist layer and this high temperature resistant material layer are formed. The material layer forms the bump body. The solder bump includes a lower protective layer. The first layer under this bump is formed. Then, the layer is here resisted, the exposed layer is welded, and the diagram is briefly explained: The preferred embodiment of the present invention will be described in more detail in the following explanatory text with the following charts, Among them: (Please read the precautions on the back before filling this page) 丨 Install Γ nn in "-ϋ an i mmamw imm0 nn < Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, Figure 1 is one of the better invention The structural cross-sectional view of the method for manufacturing the solder bumps of the embodiment, in which the metal under the bumps has been formed on the pads and the protective layer. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210x297 male f) 498471. 5. Description of the invention () Layer; FIG. 2 is a cross-sectional view of a method for manufacturing a solder bump of a soldering method according to a preferred embodiment of the present invention, in which a metal layer is formed above the bump; Forming the first light FIG. 3 is a manufacturing method of Mu Zhi Di Shi Bo #T bumps according to a preferred embodiment of the present invention, and a cross-sectional view of “the first photoresist layer is a leather metal layer” is exposed. Out protective layer; χ Figure 4 is a preferred embodiment of the present invention
面圖，其中第-光阻層已剝除，且在護SI 塊下金屬層上塗佈抗高溫材料層； 第5圖為本發明之一較佳膏祐存丨 、 仫貫施例之鲜料凸塊之製造方 法之結構剖面圖’其中已形成 — 7战弟一尤阻層於部分抗高溫材 料層上，且第二光阻層約位於護層上方； 第6圖為本發明之一較佳實施例之銲料凸塊之製造方 法之結構剖面圖，其中已去除凸塊下金屬層上之部分抗高 >JDL材料層，並約暴露出凸塊下金屬層； 第7圖為本發明之一較佳實施例之銲料凸塊之製造方 法之結構剖面圖，其中已形成銲料層於凸塊下金屬層上； 第8圖為本發明之一較佳實施例之銲料凸塊之製造方 法之結構剖面圖，其中銲料層經第一次迴銲使銲料層之頂 端略呈球形； 第9圖為本發明之一較佳實施例之銲料凸塊之製造方 法之結構剖面圖，其中第二光阻層與抗高溫材料層已剝 本紙張尺度適用中國國家標準（CNS)A4規格(21〇χ29?^Γ (請先閱讀背面之注意事項再填寫本頁) -----訂---------%« 經濟部智慧財產局員工消費合作社印製 經濟部智慧財產局員工消費合作社印製 498471 Αν _Β7_ 五、發明說明（） 除； 第10圖為本發明之一較佳實施例之銲料凸塊之製造 方法之結構剖面圖，其中經第二次迴銲形成球形之銲料凸 塊；以及 表一為苯並環丁烯之電性質、熱性質、以及機械性質。 圖號對照說明： 10 晶圓 20 銲墊 30 護層 40 凸塊下金屬層 50 第一光阻層 60 凸塊下金屬層 70 抗南溫材料層 80 第二光阻層 90 銲料層 100 銲料層 110 凸塊本體 發明詳細說明： 本發明係有關於一種銲料凸塊之製造方法。請參考第1 圖。首先，提供晶圓10，例如為矽晶圓。在先前製程中此 晶圓10上已形成有銲墊20以及護層30。且護層30僅覆 蓋部分之銲墊20，而暴露出另一部分之銲墊20。接著，形 成凸塊下金屬層40於護層30上且覆蓋暴露出之銲墊20。 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公f ) (請先閱讀背面之注意事項再填冩本頁)A plan view, in which the first photoresist layer has been peeled off, and a high-temperature-resistant material layer is coated on the metal layer under the protective SI block; FIG. 5 is one of the preferred pastes of the present invention. Sectional view of the manufacturing method of the material bumps, where '7 has been formed — a resist layer is on a part of the high-temperature resistant material layer, and the second photoresist layer is located above the protective layer; FIG. 6 is one of the inventions A structural cross-sectional view of a method for manufacturing a solder bump according to a preferred embodiment, in which a part of the high-resistance > JDL material layer on the metal layer under the bump has been removed, and the metal layer under the bump is approximately exposed; A structural cross-sectional view of a method for manufacturing a solder bump according to a preferred embodiment of the present invention, in which a solder layer has been formed on a metal layer under the bump; FIG. 8 is a view illustrating the manufacture of a solder bump according to a preferred embodiment of the present invention. A structural cross-sectional view of the method, in which the top of the solder layer is slightly spherical after the first re-soldering; FIG. 9 is a structural cross-sectional view of a method for manufacturing a solder bump according to a preferred embodiment of the present invention, in which Two photoresist layers and high temperature resistant material layers have been peeled off National Standard (CNS) A4 Specification (21〇χ29? ^ Γ (Please read the notes on the back before filling out this page) ----- Order ---------% «Staff of Intellectual Property Bureau, Ministry of Economic Affairs Printed by a consumer cooperative printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by a consumer cooperative of the Ministry of Economic Affairs 498471 Αν _Β7_ V. Description of the invention () Except; Figure 10 is a structural cross-sectional view of a solder bump manufacturing method according to a preferred embodiment of the present invention After the second re-soldering, spherical solder bumps were formed; and Table 1 shows the electrical, thermal, and mechanical properties of benzocyclobutene. Drawing number comparison description: 10 wafers 20 pads 30 protective layer 40 bumps Lower metal layer 50 First photoresist layer 60 Bump under metal layer 70 Resistant to south temperature material layer 80 Second photoresist layer 90 Solder layer 100 Solder layer 110 Bump body Detailed description of the invention: The present invention relates to a solder bump Manufacturing method. Please refer to FIG. 1. First, a wafer 10 is provided, for example, a silicon wafer. In the previous process, a bonding pad 20 and a protective layer 30 have been formed on the wafer 10. The protective layer 30 only covers a part Solder pad 20 and another portion of solder pad 20 is exposed Next, form the under bump metal layer 40 on the protective layer 30 and cover the exposed solder pads 20. This paper size is applicable to Chinese National Standard (CNS) A4 (210 X 297 male f) (Please read the note on the back first) (Please fill out this page)
五 經濟部智慧財產局員工消費合作社印製 A7 '-------------- B7 ______ 發明說明（） < 迷凸塊下金屬層至少由兩層金屬所組成。第一層 :黏附層(未繪不）’其材質可為鈦、鉻、或鎢化鈦等，用 〜锡氣凸塊（未綠示）與銲墊2 0及護層3 0間有較強之黏 者十生 〇 哲 SL、 一曰為’占锡層（未繪示），其材質可為鎳、銅、鉬 或鉬等，田以@ ^ 捉升點附層與凸塊本體（未繪示）間之黏著 ^ 基本上組成沾錫層之金屬與凸塊本體之潤溼程度較 因此A溫迴鋒時，凸塊本體可完全沾附其上而成球。 凊參考第2圖。接著，形成第一光阻層50於部分之凸 _ 金屬層40上而暴露出另一部分之凸塊下金屬層4〇, 且此第一光阻層50約位於銲墊2〇上方。此第一光阻層50 之形成可以一連串微影製程之數個步驟來達成。 凊參考第3圖。接著，以第一光阻層5 〇為罩幕，例如 以非等向性#刻法姓刻第2圖中暴露出之凸塊下金屬層 4〇 ’使凸塊下金屬層40形成凸塊下金屬層60，並約暴露 出護層3 0 〇 接著，剝除第一光阻層50，並約暴露出凸塊下金屬層 60。請參考第4圖。接著，塗佈抗高溫材料層7〇於護層 與凸塊下金屬層60上。此抗高溫材料層之厚度約為2 A m 至 5 /z m，且其材質例如可為苯並環丁烯 (benzocyclobutene; BCB)或其它材質，然本發明不限於此。 本纸張尺度適用中國國家標準（CNS)A4規格（210 X 297公t ) -----------* 裝--- (請先閱讀背面之注意事項再填寫本頁) . 498471 A7 B7 五、發明說明（） 此步驟中塗佈抗高溫材料層70於護層3 〇與凸塊下金屬層 6 0上之用意為’在銲料凸塊之製程中’迴銲所需的溫度愈 A ’在迴銲的先前步驟所用之光阻愈容易因高迴銲溫度而 殘留在B曰圓上’且不易在光阻剝除的過程中移除光阻。因 此’在後續形成第二光阻層前先塗佈抗高溫材料層，可 避免第一光阻層與護層30直接接觸而在後續的高溫迴銲 過程中造成光阻殘留。 由於此苯並環丁晞之玻態轉變溫度（glass transition temperature)Tg大於3 50°C，且此3 50°C之温度已超過高鉛 銲料凸塊之迴銲溫度，因此苯並環丁烯非常適合做為本發 明之一較佳實施例之抗高溫材料層70之材質。另外，表一 所表示者為苯並環丁烯之電性質、熱性質、以及機械性質 之數據。 表一苯並環丁烯之電性質、熱性質、以芨性j 性質 數值 __^-----—____ 介電常數（lKHz-20GHz) 2.65 熱膨脹係數（ppm/°C ) 52 玻態轉變溫度（°C ) >350 拉伸模數（Gpa) 2.9i〇.2 —----------------— -_____ 抗拉強度（Mpa) 87 士 9 斷裂點伸長量（％) 8 土 2.5 -------- -_ 10 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公發） (請先閱讀背面之注意事項再填寫本頁) ^ t--------- Sr. 經濟部智慧財產局員工消費合作社印製 498471 A7 B7五、發明說明（） 波森比（Poisson ratio) 0.34 25 t時對矽之殘留應力（MPa) 28 土 2 經濟部智慧財產局員工消費合作社印製 請參考第5圖。接著，形成第二光阻層8 0於部分抗 高溫材料層70上，且此第二光阻層80約位於護層3 0上 方。此第二光阻層80之形成可以一連串微影製程之數個步 驟來達成，且此第二光阻層80之厚度約為90/zm至130μ m。 接著，去除位在凸塊下金屬層60上之部分抗高溫材 料層70，並約暴露出凸塊下金屬層60，如第6圖所示。 去除位在凸塊下金屬層60上之部分抗高溫材料層70之方 法例如可以電漿預處理法（descum)或是其它方式來達 成，本發明不限於此。電漿預處理法原本係指利用電漿將 晶片表面之光阻加以去除。但電漿預處理法去光阻的時間 較一般電漿光阻剝除的時間為短，其目的只是在於將晶片 表面之光阻因顯影或預烤等製程所造成的光阻毛邊或細 屑加以去除，以使圖形不失真，且蝕刻後之圖案不會有殘 餘。通常做電漿預處理，均以較低的壓力及較小的功率進 行，也就是使光阻之蝕刻率降得很低，使得均勻度能提 高，以保持完整的圖形，達到電漿預處理的目的。凸塊下 金屬層60上之部分抗高溫材料層70在本發明中之用途雖 然不是做為光阻，但仍可以電漿預處理法去除。 11 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公t ) (請先閱讀背面之注意事項再填寫本頁) I · n i n n. m Hi n 訂---------· 498471 A7 —---—----- 五、發明說明（） 請參考第7圖。接著，形成銲料層9〇於凸塊下金屬 層6 0上，且此銲料層9 0約與第二光阻層8 〇同樣高度。 f請先閱讀背面之>i意事項再填寫本頁) 此絆料層9 〇之形成例如可以印刷法或是其它方式來達 成。 接著，第一次迴銲此銲料層90，以形成如第8圖之 知料層1 0 0 ’其中鮮料層1 〇 〇之頂端略呈球形。此第二心 迴銲之目的在於將第7圖中原本硬度不夠的銲料層^ 加硬化成第8圖中的鮮料層100 ,以避免後續製程中制除 第二光阻層80時，第7圖中的銲料層9〇因硬度不夠而= 塌。 接著，剝除第二光阻層8 0與抗高溫材料層7 〇以使遭 層30再度外露’如第9圖所示。接著，第二次迴銲鋒料 層100，使此銲料層100形成如第1〇圖所示之球形凸塊 本體1 1 0。 經濟部智慧財產局員工消費合作社印製 裏丁、合上述’本發明的優點為提供一種銲料凸塊之製造 方法，運用本發明之銲料凸塊之製造方法可避免高溫迴銲 後之光阻殘留現象。 如热悉此技術之人員所瞭解的，以上所述僅為本發明 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公望） 498471 A7 _B7 五、發明說明（） 之較佳實施例而已，並非用以限定本發明之申請專利範 圍；凡其它未脫離本發明所揭示之精神下所完成之等效改 變或修飾，均應包含在下述之申請專利範圍内。 (請先閱讀背面之注意事項再填寫本頁) Γ丨裝 .- 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公t )5. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 '-------------- B7 ______ Description of the invention () < The metal layer under the bump is composed of at least two layers of metal. First layer: Adhesive layer (not shown) 'The material can be titanium, chromium, or titanium tungsten, etc. There is a slight difference between the solder bumps (not shown in green) and the solder pads 20 and the protective layer 30. The tenacious sages of the strong tenth philosopher SL, one is called 'Zhan tin layer (not shown), the material can be nickel, copper, molybdenum or molybdenum, etc., Tian Yi @ ^ 升 升 点 上层 and the bump body ( (Not shown) ^ Basically, the wettability of the metal that makes up the tin layer and the bump body is higher than when the A temperature returns, the bump body can be completely adhered to form a ball.凊 Refer to Figure 2. Next, a first photoresist layer 50 is formed on a portion of the bump metal layer 40 to expose another portion of the under bump metal layer 40, and the first photoresist layer 50 is located above the solder pad 20. The formation of the first photoresist layer 50 can be achieved by several steps in a series of lithographic processes.凊 Refer to Figure 3. Next, the first photoresist layer 50 is used as a mask, for example, the under bump metal layer 40 ′ exposed in FIG. 2 is engraved with an anisotropic # 刻 法 surname to make the under bump metal layer 40 form a bump. The lower metal layer 60 exposes the protective layer 300. Next, the first photoresist layer 50 is peeled off, and the under bump metal layer 60 is exposed. Please refer to Figure 4. Next, a high temperature resistant material layer 70 is coated on the protective layer and the under bump metal layer 60. The thickness of the high-temperature-resistant material layer is about 2 A m to 5 / z m, and the material thereof may be, for example, benzocyclobutene (BCB) or other materials, but the present invention is not limited thereto. This paper size applies to China National Standard (CNS) A4 specification (210 X 297 metric t) ----------- * Loading --- (Please read the precautions on the back before filling this page). 498471 A7 B7 V. Description of the invention () In this step, the coating of the high temperature resistant material layer 70 on the protective layer 30 and the metal layer under the bump 60 is intended to be used for reflow during the process of solder bumps. The higher the temperature, A, the more the photoresist used in the previous step of reflow soldering is more likely to remain on the B circle due to the high reflow temperature, and it is not easy to remove the photoresist during the photoresist stripping process. Therefore, 'the high temperature resistant material layer is applied before the second photoresist layer is formed, which can avoid the direct contact between the first photoresist layer and the protective layer 30 and the photoresist residue in the subsequent high temperature reflow process. Because the glass transition temperature (Tg) of this benzocyclobutane is greater than 3 50 ° C, and the temperature of this 3 50 ° C has exceeded the reflow temperature of the high-lead solder bumps, the benzocyclobutene It is very suitable as the material of the high-temperature-resistant material layer 70 according to a preferred embodiment of the present invention. In addition, the data shown in Table 1 are electrical, thermal, and mechanical properties of benzocyclobutene. Table 1 Electrical properties, thermal properties, and properties of benzocyclobutene __ ^ -----—____ Dielectric constant (lKHz-20GHz) 2.65 Thermal expansion coefficient (ppm / ° C) 52 Glass state Transition temperature (° C) > 350 Tensile modulus (Gpa) 2.9i〇.2 —----------------— -_____ Tensile strength (Mpa) 87 ± 9 Elongation at break point (%) 8 soil 2.5 -------- -_ 10 This paper size applies to Chinese National Standard (CNS) A4 (210 X 297) (Please read the precautions on the back before filling (This page) ^ t --------- Sr. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 498471 A7 B7 V. Description of the invention () Poisson ratio 0.34 25t Silicon residue Stress (MPa) 28 Soil 2 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, please refer to Figure 5. Next, a second photoresist layer 80 is formed on a part of the high-temperature-resistant material layer 70, and the second photoresist layer 80 is positioned above the protective layer 30. The formation of the second photoresist layer 80 can be achieved by a series of steps in a lithography process, and the thickness of the second photoresist layer 80 is about 90 / zm to 130 m. Next, a part of the high temperature resistant material layer 70 located on the under bump metal layer 60 is removed, and the under bump metal layer 60 is exposed approximately, as shown in FIG. 6. The method for removing a part of the high-temperature-resistant material layer 70 located on the under bump metal layer 60 can be achieved by, for example, a plasma pretreatment (descum) method or other methods, and the present invention is not limited thereto. Plasma pretreatment method originally used plasma to remove the photoresist on the wafer surface. However, the time for removing the photoresist by the plasma pretreatment method is shorter than that of the ordinary plasma photoresist stripping. The purpose is only to remove the photoresist burrs or fine chips caused by the photoresist on the wafer surface due to development or pre-baking processes. It is removed so that the pattern is not distorted and there is no residue in the etched pattern. Plasma pretreatment is usually performed with lower pressure and lower power, that is, the photoresist etching rate is lowered, so that the uniformity can be improved to maintain a complete pattern and achieve plasma pretreatment. the goal of. Although the part of the high temperature resistant material layer 70 on the under bump metal layer 60 in the present invention is not used as a photoresist, it can still be removed by plasma pretreatment. 11 This paper size applies to China National Standard (CNS) A4 specification (210 X 297 g t) (Please read the precautions on the back before filling this page) I · nin n. M Hi n Order -------- -· 498471 A7 —---—----- 5. Description of the invention () Please refer to Figure 7. Next, a solder layer 90 is formed on the metal layer 60 under the bump, and the solder layer 90 is about the same height as the second photoresist layer 80. f Please read the "I & I" on the back before filling in this page) The formation of this trip layer 90 can be achieved by printing or other methods, for example. Next, the solder layer 90 is re-soldered for the first time to form the known material layer 100 'as shown in Fig. 8 in which the top end of the fresh material layer 100 is slightly spherical. The purpose of this second core reflow is to harden the solder layer in Figure 7 that is not sufficiently hard to form the fresh material layer 100 in Figure 8 to avoid the second photoresist layer 80 in the subsequent process. Solder layer 90 in the figure 7 = collapse due to insufficient hardness. Next, the second photoresist layer 80 and the high-temperature-resistant material layer 70 are peeled off so that the layer 30 is exposed again 'as shown in FIG. Next, the solder layer 100 is re-soldered a second time, so that the solder layer 100 is formed into a spherical bump body 1 10 as shown in FIG. 10. The Intellectual Property Bureau of the Ministry of Economic Affairs' employee consumer cooperative prints Liding and combines the above-mentioned advantages of the present invention is to provide a method for manufacturing solder bumps. The use of the method for manufacturing solder bumps of the present invention can avoid photoresist residues after high temperature re-soldering. phenomenon. As understood by those who are familiar with this technology, the above description is only applicable to the Chinese paper (CNS) A4 specification (210 X 297 public expectation) 498471 A7 _B7. It is not intended to limit the scope of patent application of the present invention; all other equivalent changes or modifications made without departing from the spirit disclosed by the present invention should be included in the scope of patent application described below. (Please read the precautions on the back before filling out this page) Γ 丨 Packing.- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economy