TW495936B - LED package - Google Patents

LED package Download PDF

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Publication number
TW495936B
TW495936B TW090114918A TW90114918A TW495936B TW 495936 B TW495936 B TW 495936B TW 090114918 A TW090114918 A TW 090114918A TW 90114918 A TW90114918 A TW 90114918A TW 495936 B TW495936 B TW 495936B
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TW
Taiwan
Prior art keywords
substrate
light
groove
emitting diode
led
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Application number
TW090114918A
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Chinese (zh)
Inventor
Shing Chen
Original Assignee
Solidlite Corp
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Priority to TW090114918A priority Critical patent/TW495936B/en
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Publication of TW495936B publication Critical patent/TW495936B/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

The LED package of the present invention mainly utilizes silicon chip as the substrate, perform wet etching to form concave slot using the specific orientation of the die surface, and fabricate the through hole electrode by dry etching on the back side of the silicon substrate. Form insulating oxide film layer or nitride film layer on the silicon surface, and coat the reflection layer and the electrode layer, thus an LED using silicon substrate is formed. Dispose the LED die on the silicon slot and perform bonding, wiring, encapsulation, dicing steps to complete the SMD LED product. The present invention utilizes silicon chip as the packaging substrate, which is different from the circuit board or metal frame as the packaging material in the traditional packaging method of LED. The advantage of the present invention is having good heat dissipation, temperature endurance, miniatured size, etc. which current LED does not possess.

Description

495936 A7 五 目前表面黏著型發光二極體（SMD LED)之封裝主要分有電路 板型與支架型兩種，其中支架型SMD LED係用金屬支架:某板再 以射出娜凹槽或模鎮成型（m〇lding)方式封膠後並切割形成土sm〇 型LED如第-圖所示。電路板型SM〇 LED係用複合材料電路板為 基板再以模鑄成型(molding)方式封膠並切割形成SMD型led如第 二圖所示，目前以這兩種方式所製作出來的SMD led都有一此共 同缺點，其-就料溫性不夠’ _在SMD元件與其他電路板^ 接合時_轉爐（約25〇〜遍。C )，SMD LED的封膠财 溫性不足，-般娜Tg點对12()t左右且與基域核的熱雜 係數不-樣’固在SMD LED元件過高溫爐後常會發生異常不良現 象；另一缺點為散熱性不佳，封膠材料與基板熱傳性不佳'，而led 元件本身也是個小型發倾，當散雛不辦溫昇提高對元件的發 光效率與品質會有影響；另—缺點為微小化時其反射凹槽不易製 作，在LED封裝元件中有反射凹槽與沒有反射凹槽所發出的亮度相 差L以上（以發光角度3〇度為比較基準），在微小化㈣叩如 0.7mm) ’ 0402(1.0X 〇.5mm) SmD LH)尺寸要具有凹槽反射杯在傳統 製程基本上是很難做到的。 耐溫性不佳、散熱性不佳、微小化反射凹槽不易製作，仍是傳 統SMD LED最大問題所在，而且是二十幾年來—直存在的問題。 今本發明人經長期在LED領域中研究發展，並已獲得多項專利與成 果，今特別針對傳統SMD LED之缺失，做一改善並提出一具有良 好解決方案即本發明「發光二極體之封裝」。 本發明「發光二極體之封裝」，主要係以矽晶片為封裝基板，利 用石夕晶片100幻10結晶方位(0rientati⑽可以钱刻出微丨凹槽反射 座，並經氧化處理可形成良好的絕緣效果並利用點矽膠(耐溫2〇〇它） 且不須molding製程，對本發明而言，且有耐溫性高，製作反射槽容 易、散熱性佳、微小化容易等優勢，較傳統SMD LED好太多了。 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公慶 請 先 閱 讀 背 之 注 意 事 項 再 # 頁 裝 訂 五、發明説明（厶） =、夕曰曰片基板上製作凹槽再置放LED晶粒於凹槽内這種方法仍是世 /首創本舍明結合了半導體微機光電加工技術來製作乙印專用之 矽，板」，改變了傳統使用PC板與金屬支架結合環氧樹脂物㈣ 請 先 閲 讀 背 1¾ 意 事 項 再 # 頁 =封裝結構，不僅使SMD LED元件的可靠性增加且製程縮短，良 率提高，具有市場競爭性等優勢。 LED矽基板製程(A) 1.首先選用1 〇〇結晶方位(Qrientati〇n)之石夕晶片（6忖） 2·上光阻並利用曝光顯影方式將不要之光阻去除 3 · 用非等向性濕姓刻wet etching)，#刻達到一定 床度，即形成具有傾斜角54.74。之凹槽(反射座） 4·矽晶片背面用乾蝕刻或雷射加工製作貫孔電極孔 5·經氧化或氮化處理，使表面形成一絕緣氧化矽層(Si〇2)或氮 化矽層(Si3N4) 6·鍍金屬層（鍍銀，含凹槽反射層與背面電極層） 7·利用雷射(Nd-YAG)加工分割凹槽内之電極使形成正、負電極 面兩端 在板蝕刻凹槽特別在濕蝕刻矽材料大多選用氫氧化鉀，使 =驗性氫氧化鉀(KOH)#刻時，若使用一般光阻則光阻會被K〇H所 浴蝕，固必須選用特殊的光阻液即用酸性顯影之光阻液(此種光阻市 經濟部智慧財產局S工消費合作社印製 面上不易買到）。若用一般光阻要達到蝕刻矽基板則必須改用另一製 程(B)。 LED矽基板製程(B): 1·選用100結晶方位之矽晶片 2·先送進氮氣咼溫爐加熱使石夕晶片表面形成一層氣化石夕層 (Si3N4) 3·上光阻並曝光顯影 4·用反應性離子(RIE)li刻把Si3NJ(又稱hard mask)去除(又 稱開窗） 本紙張尺度適用中國國家標隼（CNS ) Μ規格（210X297公慶） 495936 五、發明説明（3 ) 絕 5 ·利用濕I虫刻液(KOH)使姓刻出具有凹槽之結構 6·矽晶片背面上光阻並曝光顯影 7·用RIE電漿蝕刻把si3N4層去除 8·再用感應藕合電漿(ICP)做乾蝕刻製作出貫孔電極孔 9· 片經氧化或氮化處理使凹槽及貫孔之表面形成- 1〇·電鍍金屬層 11·利用雷射加工切割出凹槽内之正負電極面。 在B製程與A製程最大不同處在於B製·-般光阻，a製系 =酸性顯影光阻。B製程須先長-層啊膜層再賴E電雜刻言 層_侧石夕(Si)的速度很慢，在乾侧石夕時必須改用icp蝕刻石夕: * 卩絲本M SMD發光二極體之封裝專时基板遵 =結晶方位石夕基板利用濕_方式其餘刻深度孟 衣置/、有耐Ί鬲、政熱佳、體積小 '亮度高等優點。 於茲為了使本發明說明具有可實施與特徵功效，特為太私「恭 光二極體之封裝」例舉實施例，並配合圖示說明如下：敬^參閱， 圖示部份 第一圖係傳統金屬支架型SMD發光二極體之封裝結構剖面圖 第二圖係傳統電路板型SMD發光二極體之封裝結構剖面圖 第二圖係本發明發光二極體之封裝之矽基板剖面圖 本紙張尺度適用中國國家標準（CNS )八4規格（21〇χ 297公釐） 五、發明説明（肀） 第四圖係本發明發光二極體之封裝於石夕基板上光阻層示意圖 第五圖係=日=光二極體之難於絲板上之部份植曝光顯影 第六圖係贿光二歸之難树基板上做侧凹槽成型之結 第七圖係本^料二極體之封餘基板上絲 凹槽結構之矽基板結構圖 交办成/、有 第八圖係本發明發光二極體之難做挖或貫孔處理之剖面圖 第九®係本發.光三極體之封裝做長絕緣層及齡屬層之結構圖 第十圖A，本發明發光二極體之封裝分割金屬層使形成正、負電極 面之結構圖 第十圖B係本發明發光二極體之封裝分割金屬層使形成覆晶接合之 正、負電極面圖示 第十-圖係^明發光二極體之封裝LED晶粒固晶、打線、點封膠 之結構圖 第十二圖係本發明發光二極體之封裝利用LED晶粒以覆晶方 並點封膠之結構圖 σ 第十二圖係本發明發光二極體之封裝利用點膠封膠並切割SMD型 led元件結構圖 ^ 經濟部中央標準局員工消費合作社印製 (請先閱讀背面之注意事項再本頁) 線· 第十四圖係本發明發光二極體之封裝LED晶粒以覆晶方式形 SMD型LED元件結構圖 第十五圖係本發明發光二極體之封裝SMD型LED元件背面電極配 置圖。 第十六圖係本發明發光二極體之封裝覆晶接合之SMD型LED元件 之立體圖 第十七圖係本發明發光二極體之封裝SMD型LED元件之表面封膠 以模鑄成型方式形成。 " 本紙張尺度適用中國國家標準（CNS ) M規格（2l〇X297公釐） 第十八圖係本發明發光二極體之封裝SMD型LED元件表面封膠形 成具有凸透鏡之結構。 第十九圖係本發明發光二極體之封裝矽基板採 110結晶方位經餘刻 成垂直壁凹槽之結構圖。 第二十圖係本發明發光二極體之封裝在晶片基板上單_凹槽反射座 内可同時放置多顆LED晶粒之封裝結構圖。 圖號部份： 1·電極支架 2·射出塑膠凹槽 3· LED晶粒 4.導線 5·封膠 6·電路板 7.電極 8·石夕基板 9.光阻層 1〇·顯影區 11·钱刻凹槽 12.傾斜壁 13.半貫孔 14·電極貫孔 I5·絕緣層（氮化矽Si3N4)或氧化矽Si〇2 16·反射層 17.電極，17A凹槽内電極 18·電極，18A凹槽内電極 19·電極分割線 20·切割線 21·金屬凸塊(錫球） 22.絕緣漆 23·凸透鏡 第一圖係傳統金屬支架SMD型LED(俗稱T0PLED型)之結構 圖，其製程為先將金屬支架，與耐溫塑騎(pps)射出成型_凹槽狀 2 ’之後再固晶3、打線4、封膠5等動作，其主要封裝材料為塑膠 與環氧樹脂(EPOXY)。 " 第-圖係傳統電路板SMD㉟LED之結構圖，其製程為先將 LED晶粒固定於基板6上並打電極線4後再用模鑄成型方式形成封 膠5，後再經切割成粒狀SMD型LED之元件，盆主要封裝 透明之環氧樹脂。 、 … 495936 A7 五 經濟部智慧財產局員工消費合作社印製 、發明説明（& 頁 本發明「發光二極體之封裝」敬請參閱圖三所示，首先在矽晶 片基板8上一層光阻層9(如第四圖所示），利用曝光顯影方式將曝光 顯影區10之光阻去除(如第五圖所示"後將矽晶片經蝕刻液(K〇H) 蝕刻形成凹槽，由於矽晶片8採丨⑻結晶方位之結構，固蝕刻出之 =槽為-具傾斜肖54 74。之傾斜壁12，此傾斜财觀光的反射， 第七圖係為去阻光阻後形成具有凹槽結構之矽基板結構圖。第八圖 =將:基板8之背面上光阻及於凹槽之背面相對位置光罩設有顯影 電極貫孔圖案，利用曝光顯影及乾侧(RIE《1〇))做挖孔(半貫 孔)13 γ同時做電極導引孔14(如第八圖），半貫孔13主要目的為在做 SMDtl件顆粒切割時，切割線直接從半貫孔5的中央切過，使形成 SMD型LED元件之兩端點各具有半圓之結構如第十圖⑻及第十六 圖所不，由於在半圓内壁會鍍有金屬層以利SM〇型LED元件在與 其他電路板線路之焊接點做焊接作用。 訂 第八圖碎基板内之電極貫孔14其作用為導引電極之作用。 在已完成雜板之基板結構後，由於錄板本身為—半導體因 此必須在其表面形成_層良好的絕緣膜層，目前絕緣膜層可為氧化 石夕(Si〇2)或氮化邦㈣，只要在高溫爐中通以氧或氮氣即可形成表 面之絕緣層如第九圖15所示，在長完絕緣層15後須再鐘上金屬層 16。由於金屬層16必須將碎晶片正、反面及貫孔全要_，最好; 電錢方式-次可全部完成，同時也可形成背面金屬電極ΐ8、17 ;而 正面凹槽内之金屬電極很難神光顯影方式形成，須用雷射(脉 YAG)加工切割使形成正、負電極面，如第十圖所示電極面Μ及 ΙδΑ ’分割、線I9為絕緣區；第十圖⑷為傳统led晶粒須用打線連 接電極，第十圖(B)為針對覆晶(Flip Chip)i{ LED晶粒之電極分佈 圖。在氮化鎵係之藍光、綠絲LED晶粒其基材域日狀氧化 晶若採用覆晶封裝再加上本發明有凹肢射賴其發絲度將 統封裝結構高一倍以上。 Μ氏張尺度適用中國國家標準（CNS ) A4規^^X 297公餐- 第Η~ —圖為將LED晶粒3於置於矽基板之凹槽内電極面18Α 上，同時做打金屬線4連接電極17A並點封膠樹脂5，最後在矽基 板分割道20做切割即形成第十三圖之SMD型LED元件。第十二圖 及第十四圖為led覆晶封裝之結構，直接將LED晶粒反面使接點 21直接加溫焊合在ι7Α及18A電極面上，再點封膠樹脂5，並切割 SMD型LED，第十圖及十三圖為選用傳統LED晶粒之封裝。有關 LED Flip Chip封裝請參考本人所取得專利公告第425725號。 第十五圖為本發明發光二極體之封裝SMD型LED之元件背面 電極配置圖。在背面電極17、18須與貫孔電極14及凹槽内電極17八、 1认連接導通，由於本發明設計之結構為了連接貫孔電極i4而會形 成較大之背面電極面，對SMD元件而言並不好，有可能在焊接作業 時容易形成正、負電極短路現象，為避免17、18兩電極面太接近:、 因此必須再於其上印上一層絕緣層(漆)22如圖十五所示。 第十六圖係為本發明發光二極體之封裝以覆晶接合之SMD型 LED元件立翻，其封裝基材8全為⑨基材，並非傳統之環氧樹脂。 第十七圖係為本發明發光二極體之封裝SMD型LED元件表面 封膠採模鑄成型方^，僅正表面有娜5，其封裝紐8全為石夕基 材^此之前树基板凹槽狀封敎部份採點膠方式其優點為ί 簡單’不須賴具，但树為了使SMD元件加厚及在s娜表面 成型具有凸透細彡狀之結構23如針八所示，則可採表關模禱方 法封膠。 由以上實施例說明本發明「發光二極體之封裝」係將發光二極 體晶粒(GaAs、GaN、SiC等)直接固定於有凹槽之石夕晶片基板上，矽 晶片基板本身就是LED封裝基材，而傳統SMD型LED封裝材料通 常為環氧樹脂類產品，對本發明與傳統方式比較而言具有微小化容 易，散熱性佳、發光亮度強，耐熱性等優勢。 儿 谷 495936 A7 _____ B7_ 五、發明説明（3 ) 以上所述之實施例係以單晶矽晶片100結晶方位為基礎，若改 採用結晶方位110的晶片，經濕蝕刻出來的是垂直壁的凹槽如第十 九圖所示，但此種凹槽亦可用於發光角度較小的SMDLED元件上。 第二十圖為在同一凹槽上製作可放置多顆LED晶粒之結構以得 到單一 SMD LED元件具有高亮度之效果。 另本案發明若不用石义晶單晶片而改用其他單晶片如二氧化矽單 曰曰俗稱石英單晶(Si〇2)經餘刻亦可得有凹槽之結構，唯其頃斜壁角产 與矽就不同了，須依使用那一面結晶方位而得到不同之結果。又 (請先閲讀背面之注意事項再填寫本頁} 經濟部智慧財產局員工消費合作社印製 i適 尺 lifc> 一紙 本 一釐 公 7 9 2495936 A7 5 At present, the surface-mount light-emitting diode (SMD LED) packages are mainly divided into two types: circuit board type and bracket type. Among them, the bracket type SMD LED uses a metal bracket: a board then shoots out of the groove or mold. The molding (molding) method is used to seal and cut to form a sm0 LED, as shown in FIG. The circuit board type SMOOLED uses a composite material circuit board as a substrate, and then seals and cuts by molding to form SMD LEDs. As shown in the second figure, the SMD LEDs currently produced by these two methods All of them have a common disadvantage, which is that the temperature of the material is not enough. _When the SMD component is bonded to other circuit boards _ converter (about 250 ~ times. C), the sealing property of the SMD LED is insufficient, -Banna The Tg point is about 12 () t and it is not the same as the thermal miscellaneous coefficient of the core of the base domain. When it is fixed in the SMD LED element overheating furnace, abnormal defects often occur. Another disadvantage is that the heat dissipation is poor, the sealing material and the substrate The thermal conductivity is not good ', and the LED element itself is also a small hair dryer. When the temperature is not increased, the luminous efficiency and quality of the element will be affected. Another disadvantage is that the reflection groove is not easy to make when it is miniaturized. In the LED package, the brightness difference between the reflective groove and the non-reflective groove is more than L (based on the light emission angle of 30 degrees), and the miniaturization is 0.7mm) '0402 (1.0X 0.5mm ) SmD LH) It is basically difficult to have a reflective cup with a groove in the traditional process To. Poor temperature resistance, poor heat dissipation, and miniaturized reflective grooves are not easy to make. They are still the biggest problem of traditional SMD LEDs, and they have been problems for more than two decades. Today, the inventor has been researching and developing in the field of LED for a long time, and has obtained a number of patents and achievements. Today, especially for the lack of traditional SMD LEDs, he has made an improvement and proposed a good solution, namely the "light-emitting diode package" ". The "package for light-emitting diodes" of the present invention is mainly based on a silicon wafer as a package substrate, and can be carved out of a micro-recessed reflection seat with a crystal orientation of 100 x 10 from Shi Xi wafer (0rientati), and can be formed by oxidation treatment. Insulation effect and the use of point silicone (temperature resistance of 200 it) and no molding process, for the present invention, and has the advantages of high temperature resistance, easy to make reflective grooves, good heat dissipation, easy to miniaturize, etc., compared with traditional SMD LED is too much. This paper size applies Chinese National Standard (CNS) Α4 specification (210 × 297 during public holidays, please read the precautions on the back first, then # page binding V. Description of the invention (厶) =, Xi Yue said the substrate is made concave The method of placing the LED die in the groove is still the world's first. This method is the first of its kind. It combines semiconductor microcomputer optoelectronic processing technology to make silicon and board for special printing. It changes the traditional combination of PC board and metal bracket. Epoxy resin material ㈣ Please read the back 1¾ intentions before # page = package structure, which not only increases the reliability of SMD LED components, shortens the process, improves the yield, has market competitiveness, etc. Advantages: LED silicon substrate manufacturing process (A) 1. First select the Shi Xi wafer (6 忖) with a crystal orientation of 100 (Qrientati) 2 · Put on the photoresist and use the exposure and development method to remove the unnecessary photoresist 3 · Use Non-isotropic wet etching (wet etching), #etching reaches a certain degree, that is, a groove (reflection seat) with an inclination angle of 54.74 is formed. 4 · The back of the silicon wafer is made of dry-hole or laser processing through-hole electrode holes 5 · After oxidation or nitridation treatment, an insulating silicon oxide layer (SiO2) or silicon nitride layer (Si3N4) is formed on the surface 6 · Metal plated layer (silver plated, with groove reflection layer and back electrode layer) 7 · Laser (Nd-YAG) is used to process the electrodes in the divided grooves to form positive and negative electrode faces. The grooves are etched on the board, especially in wet etching. Most of the silicon materials are potassium hydroxide. ) # At the moment, if a general photoresist is used, the photoresist will be bath-eroded by KOH. You must choose a special photoresist solution, that is, a photoresist solution developed with acid. It is not easy to buy on the printed surface of industrial and consumer cooperatives.) If you use a general photoresist to reach the silicon substrate, you must use another system. Process (B). LED silicon substrate manufacturing process (B): 1. Select a silicon wafer with a crystal orientation of 100. 2. Feed it into a nitrogen furnace and heat it to form a layer of gasified stone (Si3N4) on the surface of Shixi wafer. 3. Glazing. Blocking and exposure development 4 · Removal of Si3NJ (also known as hard mask) with reactive ions (RIE) li (also known as window opening) This paper size is applicable to China National Standard (CNS) M specifications (210X297 public celebration) 495936 5 Description of the invention (3) Absolutely 5 Use the wet I insect solution (KOH) to make the structure with a groove on the surname 6. Photoresist on the back of the silicon wafer and expose the development 7 • Remove the si3N4 layer by RIE plasma etching 8 · Inductive Coupled Plasma (ICP) is used for dry etching to produce through-hole electrode holes 9 · The surface of the grooves and through-holes is formed by oxidation or nitridation-1〇 · Plating metal layer 11 · Using laser Machining cuts out the positive and negative electrode faces in the groove. The biggest difference between the B process and the A process is the B-type photoresist, and the a-system = acidic developing photoresist. The B process must be long-layer, film layer, and then E electric hybrid layer_Si Shi Xi (Si) speed is very slow, when dry side Shi Xi must be changed to icp etching Shi Xi: * 卩 丝 本 M SMD The packaging substrate of the light-emitting diode is dedicated to the crystalline orientation, and the Shi Xi substrate uses the wet engraving method, and has the advantages of resistance to heat, good heat, small size, and high brightness. In order to make the description of the present invention implementable and characteristic, Yu Zi is an example of the "private packaging of Gongguang diodes" which is too private, and is illustrated with the following illustrations: Traditional metal bracket type SMD light-emitting diode package structure cross-sectional view. The second figure is a traditional circuit board type SMD light-emitting diode package structure cross-sectional view. The second figure is a silicon substrate cross-sectional view of the light-emitting diode package of the present invention. The paper size is in accordance with Chinese National Standard (CNS) 8.4 (21 × χ297 mm). 5. Description of the invention (肀) The fourth picture is a schematic diagram of the photoresist layer of the light-emitting diode packaged on the Shixi substrate of the present invention. Photograph = Sun = Photodiode is difficult to be exposed and developed on the silk board. The sixth picture is the side groove forming on the substrate of the tree. The seventh picture is the seal of the material diode. The silicon substrate structure diagram of the wire groove structure on the remaining substrate is handed over, and the eighth diagram is a cross-sectional view of the light-emitting diode of the present invention that is difficult to dig or through-hole. The ninth series is the hair. The structure diagram of the package as a long insulation layer and an age layer. Figure 10 shows the structure of a packaged and divided metal layer of a light emitting diode to form positive and negative electrode surfaces. Figure 10B is a diagram of the packaged and divided metal layer of the light emitting diode of the present invention to form a flip-chip junction of positive and negative electrode surfaces. Ten-picture is the structure diagram of the LED die solid crystal, wire bonding, and spot sealing of the light-emitting diode package. The twelfth figure is the package of the light-emitting diode according to the present invention, which uses the LED die to cover the crystal and point it. Glue structure diagram σ The twelfth diagram is the structure diagram of the light-emitting diode package of the present invention using glue sealing and cutting SMD type LED components. (Further page) Line · Figure 14 shows the structure of a SMD-type LED element in which the packaged LED die of the present invention is a flip chip. Figure 15 shows the package of an SMD-type LED element in a light-emitting diode of the present invention. Rear electrode configuration diagram. The sixteenth figure is a perspective view of the SMD type LED element of the packaged flip-chip bonding of the light-emitting diode of the present invention. The seventeenth figure is the surface sealant of the packaged SMD-type LED element of the light-emitting diode of the present invention formed by die-casting. . " This paper size is in accordance with Chinese National Standard (CNS) M specification (210 × 297 mm). The eighteenth figure is the surface sealant of the packaged SMD-type LED element of the light-emitting diode of the present invention to form a structure with a convex lens. The nineteenth figure is a structure diagram in which the packaged silicon substrate of the light-emitting diode of the present invention adopts 110 crystal orientations and is engraved into vertical wall grooves. The twentieth figure is a package structure diagram in which a plurality of LED dies can be placed in a single-groove reflection base on the wafer substrate of the light-emitting diode package of the present invention. Drawing number part: 1 · electrode holder 2 · injection plastic groove 3 · LED die 4.wire 5 · sealant 6 · circuit board 7.electrode 8 · shixi substrate 9. photoresist layer 10 · development area 11 · Cutting groove 12. Sloping wall 13. Half through hole 14 · Electrode through hole I5 · Insulating layer (silicon nitride Si3N4) or silicon oxide Si〇2 16 · Reflective layer 17. Electrode, 17A groove inside electrode 18 · Electrode, 18A groove electrode 19 · Electrode dividing line 20 · Cut line 21 · Metal bump (tin ball) 22. Insulating paint 23 · Convex lens The first picture is the structure diagram of a traditional metal bracket SMD LED (commonly known as T0PLED) , Its manufacturing process is to first mold the metal bracket and the temperature-resistant plastic ride (pps) into the shape of the groove _ 2 ′, and then fix the crystal 3, wire 4, sealant 5 and so on. Its main packaging materials are plastic and epoxy resin. (EPOXY). " The first figure is the structure diagram of the traditional circuit board SMD㉟LED. The process is to first fix the LED die on the substrate 6 and hit the electrode wire 4 before forming the sealant 5 by die casting, and then cut into pellets. For SMD-type LED components, the basin is mainly packaged with transparent epoxy resin. … 495936 A7 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs (& page of the present invention“ Packaging of Light Emitting Diodes ”) Please refer to Figure 3. First, a layer of photoresistor is placed on the silicon wafer substrate 8. Layer 9 (as shown in the fourth figure), using a photolithography method to remove the photoresist of the exposed developing area 10 (as shown in the fifth figure), and etch the silicon wafer with an etching solution (KO) to form a groove, Because the silicon wafer 8 adopts a crystalline orientation structure, the solid etched = groove is-with inclined Xiao 54 74. The inclined wall 12, the reflection of this inclined structure, the seventh figure is formed by removing the photoresist. Structural diagram of the silicon substrate of the groove structure. Eighth figure = Photoresist on the back surface of the substrate 8 and the opposite position of the back surface of the groove. The photomask is provided with a development electrode through-hole pattern, which is developed by exposure and the dry side (RIE 《1 〇)) Do excavation (semi-through hole) 13 γ Simultaneously make electrode guide hole 14 (as shown in the eighth figure). The main purpose of semi-through hole 13 is to cut SMDtl particles directly from the semi-through hole 5 Cut through the center of the structure, so that the two ends of the SMD type LED element have a semi-circular structure as shown in the tenth figure As shown in Figure 16 and Figure 16, the metal layer will be plated on the inner wall of the semicircle to facilitate the soldering of SM0 LED components at the soldering points with other circuit boards. Figure 8 Breaks the electrode through holes 14 in the substrate After the substrate structure of the hybrid board has been completed, since the recording board itself is a semiconductor, a good insulating film layer must be formed on its surface. At present, the insulating film layer can be oxidized stone ( SiO2) or Nitride Nitride, as long as oxygen or nitrogen is passed in a high-temperature furnace, an insulating layer on the surface can be formed as shown in FIG. 15. After the insulating layer 15 is grown, the metal layer 16 must be clocked. Because the metal layer 16 must have all the front, back, and through holes of the broken wafer, it is best; the electricity method can be completed all at the same time, and the back metal electrodes 、 8, 17 can also be formed; and the metal electrodes in the front groove are very Difficult light development is formed. Laser (vein YAG) processing and cutting must be used to form positive and negative electrode surfaces. As shown in the tenth figure, the electrode surfaces M and ΙδΑ ′ are divided, and the line I9 is the insulation area; the tenth figure is ⑷ The traditional LED chip must be connected to the electrode by wire. The tenth figure (B) is for Flip Chip i {Electrode distribution of LED grains. In the GaN-based blue and green wire LED grains, the substrate-like sun-shaped oxide crystals in the substrate domain are covered with flip-chip packaging and the present invention has concave limbs. It depends on the hairline degree of the package structure to be more than doubled. The M's scale is applicable to the Chinese National Standard (CNS) A4 regulations ^^ X 297 meals-page Η ~ —The picture shows the LED die 3 placed on a silicon substrate On the electrode surface 18A in the groove, at the same time, a metal wire 4 is connected to the electrode 17A and the resin 5 is sealed. Finally, the silicon substrate is divided into 20 to form a SMD type LED element in the thirteenth figure. The twelfth figure and The fourteenth figure is the structure of the LED flip chip package. The reverse side of the LED die directly makes the contact 21 directly welded to the ι7A and 18A electrode surfaces, and then seals the resin 5 and cuts the SMD LED. Figures and 13 are the packages using traditional LED die. For the LED Flip Chip package, please refer to the patent bulletin No. 425725 obtained by me. The fifteenth figure is a layout diagram of the electrodes on the back side of the packaged SMD type LED of the light emitting diode of the present invention. The back electrodes 17 and 18 must be connected to the through-hole electrode 14 and the recessed inner electrode 17 and 8. Since the structure designed by the present invention is to connect the through-hole electrode i4, a larger back electrode surface is formed. It is not good. It may be easy to form a short circuit between the positive and negative electrodes during welding. In order to avoid that the two electrode surfaces of 17, 18 are too close to each other: Therefore, an insulating layer (paint) 22 must be printed on it. Fifteen. The sixteenth figure is a vertical flip of an SMD-type LED element in which the package of the light-emitting diode of the present invention is bonded with a flip chip. The packaging substrate 8 is all a base material, not a traditional epoxy resin. The seventeenth figure is the surface sealing compound of the packaged SMD type LED element of the light-emitting diode of the present invention, which is only molded on the front surface, and the package button 8 is all Shi Xi substrate. ^ Before the tree substrate The advantages of using the dispensing method for the groove-shaped sealing part are ί simple, no need to rely on it, but in order to thicken the SMD component and form a structure with a convex thin shape on the surface of the S23, as shown in Figure 8 , You can use the table close mold prayer method sealant. The above embodiments illustrate that the "light-emitting diode package" of the present invention is that the light-emitting diode die (GaAs, GaN, SiC, etc.) is directly fixed on the grooved stone chip substrate, and the silicon chip substrate itself is an LED. The packaging substrate, while the traditional SMD-type LED packaging materials are usually epoxy-based products. Compared with the traditional method, the present invention has the advantages of easy miniaturization, good heat dissipation, strong luminous brightness, and heat resistance. Ergu 495936 A7 _____ B7_ V. Description of the Invention (3) The above-mentioned embodiment is based on the crystal orientation of a single crystal silicon wafer 100. If a wafer with crystal orientation 110 is used instead, the vertical wall recesses are obtained by wet etching. The groove is shown in the nineteenth figure, but this groove can also be used for SMDLED elements with a small light emitting angle. The twentieth figure is a structure in which multiple LED dies can be placed on the same groove to obtain a single SMD LED element with high brightness. In addition, if the present invention does not use a Shi Yijing single wafer and use other single wafers, such as silicon dioxide single crystal, commonly known as quartz single crystal (Si〇2), a grooved structure can be obtained after a while. Silicon is different, and different results must be obtained depending on which side of the crystal is used. Also (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs i lifc > One paper one centimeter 7 9 2

Claims (1)

經濟部中央標率局員工消費合作杜印製 495936 六、申請專利範園 !一種發光二極體之封裝基板的製作方法，係由硬晶片基板，在发正 層鱗光顯影後利用祕刻方式㈣出具有傾斜壁i凹 槽反射座’另在石夕晶片基板之背面同樣上光阻層並在凹槽 貝孔私極孔，後去除光阻’再將石夕晶片基板經高 氧切或氮切之絕緣層，再利用= 二土板、反面及貫孔電極孔内均鑛一層金屬導電層，並利 二!5=5之雜齡割成具有正、貞電極之餘接觸面， 乂利LED毛光晶粒之置於其中並與電極接合。 2. 如申請專利範圍i項所述之發光二極體之封裝基板的製作方法， 其中鍍金屬導電層須同時具有導電與光反射功能者，其 Ag、Au、Pd、Pt 等。 ^ 3. 如申請專職Μ 1摘述之發光二極體之縣基板的製 法，其中石夕晶片基板選用100結晶方位之石夕晶片能蚀刻出傾斜壁之 凹槽者。 4. 如申請專利範圍第i項所述之發光二極體之封裝基板的製作方 法’其中石夕晶片基板選用110結晶方位之石夕晶片能餘刻出 之凹槽者。 、 主 5. 如申請專鄉圍第1項所述之發光二極體之封裝基板的製作方 法，其中祕刻液為驗性(氫氧化卸K0H)時，其光阻須用酸性 影光阻。 6-種發光二極體之封裝基板的製作方法，係岭晶片基板經氮氣高 溫爐加熱使矽晶片表面形成一層氮化矽層，再上先阻並配合光罩g 光顯影，用反應性離子蝕刻（RIE)把顯影區之氮化矽層去除，後 本紙張尺度適用中國阐家標率（CNS ) A4規格（210X297公釐） J I I I . n m 丨· i I Isi n (請先閲讀背面之注意事項再填^^頁) 、11 495936 A8 B8 C8 D8 六、申請專利範圍 再用濕姓刻法#刻出具有凹槽之結構；在矽晶片基板之背面上光阻 並配合光罩在凹槽之相對位置設有電極孔圖做曝光顯影，再用反應 性離子蝕刻(RIE)把氮化矽層去除，用乾蝕刻感應藕合電漿(Icp)^ 作出貫孔電極孔，將矽晶片基板經氧化或氮化處理使凹槽及貫孔電 極孔内壁形成一層絕緣層，後再將矽基板鍍金屬層，利用雷射加工 分割出凹槽内之正、負電極面，以利LED晶粒置於凹槽内並與電 極接合。 7·如申請專利範圍第6項所述之發光二極體之封裝基板的製作方 法，其中矽晶片基板選用1〇〇結晶方位可蝕刻出具傾斜壁之凹槽結 構。 8·如申請專利範圍第6項所述之發光二極體之封裝基板的製作方 法，其中矽晶片基板選用11〇結晶方位能蝕刻出具垂直壁之凹槽结 構。 田口 9·一種發光二極體之封裝方法，係將LED發光晶粒放置於具有凹槽 反射座之矽晶片基板凹槽内，並將LED發光晶粒之正、負電極連 接矽晶片基板凹槽之正、負電極，利用封膠樹脂包覆LED發光晶 粒且填滿整個凹槽，經加溫使封膠樹脂固化後並切割成顆粒狀之表 面黏著型發光二極體元件。 經濟部中央榡準局員工消費合作社印製 10·如申請專利範圍第9項所述之發光二極體之封裝方法，其中封膠 樹脂為一種透明耐高溫之矽膠或環氧樹脂(Ερ〇χγ) Π·—種發光二極體之封裝結構，係由晶片基板、LED發光晶粒，封 裝樹脂等所組成，其中 LED發光晶粒：具有正、負電極面之發光晶粒； 晶片基材：具有凹槽反射座、放置LED發光晶粒，並具有連接LED 發光晶粒之正、負電極面； 本姑^尺度逋用中國BI家棵率（CNS )八4現格（21〇x^F) 495936 888 8 ABCD 申請專利範圍 封膠樹脂：包覆LED發光晶粒並填滿晶片基板整個凹槽 其特徵者在於：將LED發光轉置放於具有凹槽反之晶片基 板凹槽内’並連接其正、負電極，再以點膠或模禱 成里方式使封膠樹脂填滿整個凹槽，後再切割成 SMD 型 LED 者。 ^申請^利·第η項所述之發光二極體之封裝結構，其中晶片 基板可為矽晶片⑼或二氧化石夕(Si〇2)晶片基板 13. 如申請專利範圍第„項或第12項所述之封裝結構， 美 板選用其不同晶格方位則可蝕刻出不同傾斜角之凹槽。日日土 14. 如申請專利範圍第n項所述之發光二極體之封裝結構， 樹脂以模鑄方式成型使其表_成具有凸透鏡功能之結構者。^ 15·如申請專利範圍第u項所述之發光二極體之封裝結構，其 片基板之單-凹槽反射座内可同時放置二顆咖晶牴以上者。日日 經濟部中央橾準局貝工消费合作社印聚 本紙张尺度逋用中國鲕家榡率（CNS ) Α4优格（210 X 297公釐）Consumption cooperation with employees of the Central Standards Bureau of the Ministry of Economic Affairs, printed 495936 6. Application for a patent Fanyuan! A method for manufacturing a packaging substrate for a light-emitting diode, which uses a hard wafer substrate and uses a secret engraving method after the development of a positive layer of scale Scoop out the reflective base with inclined wall i-grooves, and also put a photoresist layer on the back of the Shixi wafer substrate and make holes in the grooves, and then remove the photoresist. Then cut the Shixi wafer substrate with high oxygen or Nitrogen-cut insulation layer is reused = a metal conductive layer is mined in the two soil plates, the reverse surface and the through-hole electrode holes, and the second contact age of 5 = 5 is cut into the contact surface with positive and positive electrodes, 乂Facilitate the placement of LED hair crystal grains and join the electrodes. 2. The manufacturing method of the packaging substrate of the light-emitting diode as described in item i of the patent application, wherein the metal-plated conductive layer must have both conductive and light reflecting functions, such as Ag, Au, Pd, Pt, etc. ^ 3. If you apply for the manufacturing method of the county substrate for light-emitting diodes as summarized in the full-time M1 application, in which the Shixi wafer substrate is a 100-crystal orientation Shixi wafer that can etch the grooves of the inclined wall. 4. The manufacturing method of the package substrate of the light-emitting diode as described in item i of the patent application ', in which the wafer substrate of Shi Xi is selected from the grooves that can be engraved by Shi Xi wafer with 110 crystal orientation. 5. Master 5. According to the method for manufacturing the package substrate of the light-emitting diode described in the first item of Zhuanxiangwei, where the photoresist is testable (KOH is removed by hydroxide), the photoresist must be acidic photoresist. . 6- A method for manufacturing a packaging substrate for a light-emitting diode. The silicon wafer substrate is heated by a nitrogen high temperature furnace to form a silicon nitride layer on the surface of the silicon wafer. Etching (RIE) removes the silicon nitride layer in the developing area, and the paper size is applicable to the Chinese standard (CNS) A4 specification (210X297 mm) JIII. Nm 丨 · i I Isi n (Please read the note on the back first (Please fill in the items again ^^ page), 11 495936 A8 B8 C8 D8 VI. Patent application scope and then use the wet name engraving method # to engraved the structure with a groove; on the back of the silicon wafer substrate with a photoresist and a photomask in the groove The electrode hole pattern is provided at the relative position for exposure and development, and then the silicon nitride layer is removed by reactive ion etching (RIE), and the dry-etching induction coupling plasma (Icp) is used to make through-hole electrode holes, and the silicon wafer substrate is formed. After the oxidation or nitridation treatment, the groove and the inner wall of the through-hole electrode hole form an insulating layer, and then the silicon substrate is plated with a metal layer. The positive and negative electrode surfaces in the groove are separated by laser processing to facilitate the LED die. Place in the groove and engage the electrode. 7. The manufacturing method of the package substrate of the light emitting diode as described in item 6 of the scope of the patent application, in which the silicon wafer substrate is etched with a crystal orientation of 100 to form a groove structure with an inclined wall. 8. The manufacturing method of the package substrate of the light emitting diode as described in item 6 of the scope of the patent application, wherein the silicon wafer substrate is etched with a crystal orientation of 110 and a groove structure with a vertical wall can be etched. Taguchi 9 · A method of packaging a light emitting diode, which places an LED light emitting die in a groove of a silicon wafer substrate having a groove reflection base, and connects the positive and negative electrodes of the LED light emitting die to the silicon wafer substrate groove For the positive and negative electrodes, the LED light-emitting die is covered with a sealing resin and fills the entire groove. After heating, the sealing resin is cured and cut into granular surface-adhesive light-emitting diode elements. Printed by the Consumers' Cooperative of the Central Government Bureau of the Ministry of Economic Affairs10. The method for packaging light-emitting diodes as described in item 9 of the scope of patent application, wherein the sealing resin is a transparent high-temperature resistant silicone or epoxy resin (Eρ〇χγ ) Π · —a kind of light-emitting diode package structure, which is composed of wafer substrate, LED light-emitting die, packaging resin, etc., among which LED light-emitting die: light-emitting die with positive and negative electrode faces; Wafer substrate: It has a groove reflection base, which is used to place LED light-emitting crystals, and has positive and negative electrode surfaces connected to the LED light-emitting crystals. The standard size of China's BI family tree rate (CNS) is 8 and 4 (21 × xF). ) 495936 888 8 ABCD patent application sealant resin: It covers the LED light-emitting die and fills the entire groove of the wafer substrate. It is characterized by transposing the LED light in the groove of the wafer substrate with the groove on the contrary. The positive and negative electrodes are filled with the sealing resin to fill the entire groove by dispensing or molding, and then cut into SMD LEDs. ^ Application ^ The package structure of the light-emitting diode described in item η, wherein the wafer substrate may be a silicon wafer or a silicon dioxide (Si〇2) wafer substrate. For the package structure described in item 12, the US plate can etch grooves with different inclination angles by using different lattice orientations. Riyue soil 14. The package structure of the light emitting diode described in item n of the scope of patent application, The resin is molded by molding to form a structure with a convex lens function. ^ 15. The package structure of the light-emitting diode as described in item u of the patent application scope, in the single-groove reflection seat of the substrate Two or more coffee crystals can be placed at the same time. Printed on a paper scale printed by the Shellfish Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs of Japan, using the Chinese oolitic rate (CNS) Α4 You Ge (210 X 297 mm)
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US7821094B2 (en) 2007-02-16 2010-10-26 Touch Micro-System Technology Inc. Light emitting diode structure
US8018032B2 (en) 2008-12-31 2011-09-13 Unimicron Technology Corp. Silicon substrate and chip package structure with silicon base having stepped recess for accommodating chip
US8044474B2 (en) 2003-12-30 2011-10-25 Osram Opto Semiconductors Gmbh Optoelectronic module, and method for the production thereof
TWI415304B (en) * 2010-02-03 2013-11-11 Everlight Electronics Co Ltd Light emitting diode package strucyures, display devices and fabrication methods for light emitting diode package structures
TWI425670B (en) * 2010-09-29 2014-02-01 Advanced Optoelectronic Tech Irradiance device and the method of manufacturing the same
TWI466345B (en) * 2006-04-21 2014-12-21 Lexedis Lighting Gmbh Led platform with membrane

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8044474B2 (en) 2003-12-30 2011-10-25 Osram Opto Semiconductors Gmbh Optoelectronic module, and method for the production thereof
TWI466345B (en) * 2006-04-21 2014-12-21 Lexedis Lighting Gmbh Led platform with membrane
US7821094B2 (en) 2007-02-16 2010-10-26 Touch Micro-System Technology Inc. Light emitting diode structure
US8018032B2 (en) 2008-12-31 2011-09-13 Unimicron Technology Corp. Silicon substrate and chip package structure with silicon base having stepped recess for accommodating chip
TWI415304B (en) * 2010-02-03 2013-11-11 Everlight Electronics Co Ltd Light emitting diode package strucyures, display devices and fabrication methods for light emitting diode package structures
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