TW492107B - Method and apparatus for solving device damage problem caused by peeled particles from the inner wall of a dry etching chamber - Google Patents

Method and apparatus for solving device damage problem caused by peeled particles from the inner wall of a dry etching chamber Download PDF

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TW492107B
TW492107B TW90113883A TW90113883A TW492107B TW 492107 B TW492107 B TW 492107B TW 90113883 A TW90113883 A TW 90113883A TW 90113883 A TW90113883 A TW 90113883A TW 492107 B TW492107 B TW 492107B
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semiconductor substrate
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TW90113883A
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Yuan-Sheng Huang
Shin-Yi Chen
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Taiwan Semiconductor Mfg
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Abstract

The present invention relates to a method and the apparatus for solving device damage problem caused by the peeled particles, especially the polymer micro particles, from the inner wall of a dry etching chamber. The wafer stand of the etching chamber is located on the top portion of the dry etching chamber. When a wafer is loaded, the wafer is placed by making wafer surface face down in order to perform a plasma etching process. In order to prevent a wafer from falling down, the wafer stand is an electrostatic absorptive wafer stand with dual polarities. At first, a support frame is used to support the wafer when loading a wafer; then, the electrostatic absorptive wafer stand with dual polarities and the inductive coil are used to induce the corresponding dipole charges. After the wafer is absorbed, the support frame is removed and an etching process is conducted.

Description

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發明領域: 本發明係有關於半導體製程中乾式蝕刻缺陷之 法及其裝置’特別是指一種以倒置的蝕刻機台,以1、方 式蝕刻法中蝕刻室高分子微粒因剝落,因而造点- 決乾 的問題。 以件缺陷 發明背景:Field of the Invention: The present invention relates to a method and a device for dry etching defects in a semiconductor process, and particularly to a method of inverting an etching machine, and in a manner of 1, the polymer particles of an etching chamber are peeled off in the etching method, and thus, a point- Decisive problem. Item defect Background of the invention:

ULSI積體電路1C製程,係將至少超過五十萬以 晶體及或電容架構在一晶片(chip)上,由於元件和_之1 間需要連接,且單一元件就需要數層的材料所形成^件$ 此,1C的製程不只是要有最先進的沉積技術,更需要因 改進的微影技術和蝕刻技術才能達成上述之目的* 不勘 影技術關鍵著所能形成之最小蝕刻罩幕之極限,而餘力' 術的良窳則關鍵著是否可以充分表現上述蝕刻軍幕 ^ # 果。 致 由於1C係包含許多層的材料經不斷的微影蝕刻與沉積 才得以架構完成,此外某些元件更是架構在一元件之上。 例如’動態隨機儲取記憶體DRAM之電容和電晶體之關係, 且為了增加電容的容量更有往上疊高的趨勢,以免因電容 加大而使彳于檢向尺寸(lateral dimension)及元件尺寸 (f e a t u r e s i z e)也同時變大。因此,很明顯的這將使得形The ULSI integrated circuit 1C process is based on at least half a million crystals and / or capacitors on a chip. Since components and _ need to be connected, and a single component requires several layers of materials ^ Therefore, the 1C process requires not only the most advanced deposition technology, but also the improved lithography technology and etching technology to achieve the above-mentioned purpose. * Non-prospecting technology is critical to the limit of the smallest etching mask that can be formed. However, the good and bad of Yu Li 'technique is the key to whether the above-mentioned etching military curtain can be fully expressed ^ # Fruit. Due to the fact that the 1C-based material contains many layers, it can be constructed by continuous lithographic etching and deposition. In addition, some components are built on top of one component. For example, the relationship between the dynamic random storage memory DRAM capacitor and the transistor, and in order to increase the capacitance of the capacitor, it tends to be stacked higher, so as to avoid the lateral dimension and components due to the increased capacitance. The feature size also becomes larger at the same time. So obviously this will make the shape

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“spect ratio;簡稱 har)也加 問題,最直接二上可Λ高達12之多),har 的增大而快速增加,因為,:時=刻 :底—輪廓保持和上半部相$,-般的情況是, ^收縮’底部輪廓收縮變小最明顯的缺點是接觸 2。另::極端的情況是,尚未達到接觸洞的 速在開口處產生過多的高分子,因此在接觸洞之 生一瓶頸(necking),而底部瓶頸處所造成之電 而使得產生碗狀(bowing)。不管屬於何種情況這 點,因此,如果欲使接觸洞的輪廓筆直,適當量 形成於接觸洞側壁是必要的。除此之外,溝渠的 生適當量商高分子通常也是使溝渠輪廓筆直所必 成接觸洞 大,特別 所面臨之 的困難度 保接觸洞 底部輪廓 洞的阻值 底部就快 中段處產 漿的散射 些都是缺 之高分子 餘刻,產 要的。 然而,在形成接觸洞側壁或溝渠側壁高分子的同時, #刻室的内牆不可避免的,蝕刻用電漿氣體將也會同時造 成蝕刻室内壁同時沉積附著力甚差的高分子薄膜。這些附 著力甚差的高分子薄膜,隨著環境溫度的變化、閒置時 間、氣體進入的擾流、幫浦(pumping)條件等等外在因素 變異,都可能導致這些原來附著力不佳的高分子膜自叙列 室内牆剝落。 請參考圖一的習知蝕刻室1 〇的示意圖。其中,晶圓面"Spect ratio; abbreviated as har) also adds problems, the most direct two can be as high as 12), the increase of har increases rapidly, because: Hour = engraved: bottom-contour maintenance and the upper half phase $,- The general situation is that the most obvious disadvantage of shrinking the shrinkage of the bottom contour is contact 2. In addition: the extreme case is that the speed of the contact hole has not yet reached the point where too much polymer is generated in the opening, so the contact hole is born. A bottleneck, and the electricity caused by the bottom bottleneck creates a bowing. No matter what the situation is, it is necessary to form a proper amount on the side wall of the contact hole if the contour of the contact hole is straight. In addition, the proper amount of polymer in the trench is usually necessary to make the contour of the trench straight. The contact hole is particularly large, and the difficulty is particularly difficult to ensure. Scattering of the slurry is required in the absence of high molecular weight, which is necessary. However, while forming the macromolecules on the side wall of the contact hole or trench, the inner wall of the #etching chamber is unavoidable, and the plasma gas for etching will also At the same time, it will cause the polymer film with poor adhesion to be deposited at the same time as the interior of the etching chamber. With the change of the ambient temperature, the idle time, the turbulence of gas ingress, pumping conditions, etc. Variations in external factors may cause these original polymer films with poor adhesion to peel off the interior walls of the column. Please refer to the schematic diagram of the conventional etching chamber 10 in FIG. 1. Among them, the wafer surface

492107 五、發明說明(3) 朝上,晶圓背面由晶圓座20以單極式(m〇no-polar electric-static charge)吸附或雙極式靜電 (mono-polar electric-static charge)吸附,以對抗晶 圓背面氦氣向上氣流的冷卻方式。餘刻室1 〇侧壁則是多極 式磁力子(magnet) 30,頂端則包含一絕緣材質之觀察視 窗(dielectric window)40與感應線圈(inducti〇I1 coi 1 )50由感應式電流供應器提供,以提供足夠的磁場引 道電漿轟擊晶圓上裸露之物質。 由 膜自钱 不幸地 時,將 正確, 刻不能 取定期 蝕刻室 晶圓式 也未必 仍遭受 於高分子膜係電 牆剝落, 的時間係 刻室内 ’掉落 污染晶 因為高 如預期 清理蝕 内牆的 自動清 可以確 掉落之 圓的上表 分子一如 進行。傳 刻室内牆 高分子薄 除步驟, 保清理蝕 微粒污染 中性且帶有質量 很自然地高分子 晶圓載入尚未姓 面某些位置,而 前述,有如一保 統方法中,為克 的方法克服上述 膜,必須使蝕刻 但會因而影響產 刻室内牆的高分 。因此, 微粒將向 刻,或钱 造成該處 護膜,使 服上述的 問題。但 室停機, 品周期時 子薄膜前 當高分子 下掉,若 刻進行中 的钱刻不 得該處钱 問題係採 定期清理 以採取無 間,此外 一批晶圓492107 V. Description of the invention (3) Face up, the wafer back is adsorbed by the wafer holder 20 with a monopolar (mono-polar electric-static charge) or a bipolar electrostatic (static) charge To counter the cooling method of upward helium gas flow on the back of the wafer. The side wall of the remaining chamber 10 is a multi-pole magnet 30, and the top contains an insulating window 40 and an induction coil 50 (inducti〇I1 coi 1). Provided to provide sufficient magnetic field to guide the plasma to bombard exposed material on the wafer. Unfortunately, from the film, it will be correct, it is impossible to take the regular etching chamber wafer type, and it may not still suffer from the peeling of the polymer film electrical wall, the time it takes for the chamber to drop the contaminated crystals is as high as expected. The automatic cleaning of the wall can make sure that the molecules on the surface of the falling circle are performed as they are. The process of removing the polymer thin film on the interior wall is guaranteed to clean the particles that are neutral to the pollution and have a very natural quality. The polymer wafer is loaded into some positions on the surface, but the aforementioned method is the same as that in the uniform method. The method to overcome the above-mentioned film must be etched but will therefore affect the high score of the interior wall of the engraving. Therefore, the particles will be engraved, or money will cause the protective film there, so as to overcome the above problems. However, when the room is shut down, the polymer is dropped before the sub-film during the product cycle. If the money is in progress, you cannot get the money. The problem is to clean it regularly to take time. In addition, a batch of wafers

因此本發明之目地便是以改變蝕刻室各元件的相對位 置解決上述的問題。Therefore, the object of the present invention is to solve the above-mentioned problems by changing the relative positions of the elements of the etching chamber.

第6頁 五、發明說明(4) 發明目的及概述 本發明之目的 的高分子剝落掉至 題。 f提供一種解決蝕刻室内牆附著力不佳 曰圓上的元件,而造成餘刻失敗的問 本發明揭露一種乾式钱丨 牆剝落粒+,特別是古八;鄉f裝置;解決乾式蝕刻室内 立中姓刻室之子微粒所造成元件損傷之方法。 〆、〒蝕j至之日日座位於乾式蝕刻室頂部。 以晶圓面朝下’以進行電漿㈣。為避 =電吸附晶座。首先晶圓載入時先以支樓架:雙 圓’再以雙極性靜電吸附座及感應線圈感 荷。待晶圓被吸附冑,移除支撐架,再進行偶極電 發明詳細說明: 有鑑於如發明背景所述,蝕刻時利用適 jL. ^ a m ^ 、里之同分子形 成於Μ回接觸洞側壁對於使接觸洞或溝渠輪庵筆直很有幫 助,然而#刻用電漿氣體將也會同時造成蝕刻室内^同時 沉積高分子薄膜。然:而傳統#刻室之晶圓位置又位於姓刻 室底部,且晶圓正面朝上。若不幸地,附著性差的高分子 膜自蝕刻室内牆剝落,掉落於晶圓上,將因而造成=^的 #刻不正確而使得該處蝕刻不能如預期進行。甚至嚴Page 6 V. Description of the invention (4) Purpose and summary of the invention The purpose of the present invention is to peel off the polymer. fProvide a solution to solve the problem of poor adhesion of the wall in the interior of the etching room, which causes the failure of the remaining time. The present invention discloses a dry money 丨 wall peeling grain +, especially the ancient eight; rural f device; Method for damage to components caused by the sons of the engraving chamber. 〆, etched j to the sun seat is located on the top of the dry etching chamber. With wafer face down 'for plasma puffing. To avoid = electro-adsorption crystal base. First, the wafer is first loaded by the supporting structure: bi-circle ', then by the bipolar electrostatic adsorption base and the induction coil. After the wafer is adsorbed, the support frame is removed, and then the dipole invention is described in detail: In view of the background of the invention, suitable molecules are formed on the sidewall of the M-contact hole during etching. It is very helpful to make the contact holes or trenches straight, but the plasma etching gas will also cause the deposition of polymer film at the same time. However: The wafer position of the traditional #etching chamber is located at the bottom of the surname etching chamber, and the wafer is facing up. If unfortunately, the polymer film with poor adhesion is peeled off from the interior wall of the etching chamber and dropped on the wafer, which will cause the # ^ # inscription to be incorrect and the etching will not proceed as expected. Even strict

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五、發明說明(5) 暸解上述背景後,發明人提出一種可以解決 的方法,本發明的方法是將晶圓正面朝下,且位於上方位 置(即與傳統所認知之晶圓正面朝上,且位於底部位置互 為倒置關係)。經過上述設計改變後,姓刻室内牆脫落之 南分子膜’仍由重力貢獻而往下#,但下方已無晶圓。因 此,就不致於污染晶圓正面。 本發明所規‘劃之钱刻室相關裝置請參考圖二所示的剖 面f才"乂於傳統蝕刻室’本發明之蝕刻室i 〇 〇與傳統蝕 刻室係倒置的。晶座i i 〇在頂部的相對高位置。因此,當 晶圓11 5之晶圓正面(待蝕刻面)朝下載入蝕刻室後,以支 撐架1 2 0托住,支撐架丄2 〇再向上移動,以使晶圓丨丨5和晶 座11 0貼住。為免晶圓掉落,有兩種方式可以採用。第一 種方式疋利用支揮架1 2 0和晶座11 〇兩者互相嵌制,以固定 晶圓11 5。在進行蝕刻時支撐架1 2 〇不移開。因此,在此種 情況,支撐架托住晶圓的邊框部分需要考慮勿太突出,以 避免因而產生無效區,以達到既可防止晶圓丨丨5掉落又不 增加無效區的目的。 晶座11 0的另一種選擇係選取具有雙極性靜電吸附 座。當晶圓11 5載入雙極性靜電吸附晶座,仍係先以支撐 架1 2 0托住該半導體基板,再以雙極性靜電吸附方式將該 半導體基板後,移除支撐架120,再進行蝕刻。由於雙極V. Description of the invention (5) After understanding the above background, the inventor proposes a method that can be solved. The method of the present invention is to place the wafer face down and in an upper position (that is, face up with the conventionally known wafer face up, And the bottom position is inverted.) After the above design changes, the southern molecular film with the interior wall peeled off is still contributed by gravity, but there is no wafer below. Therefore, the front side of the wafer is not contaminated. Please refer to the cross-section f shown in FIG. 2 for the related device of the engraved etching chamber according to the present invention " in the traditional etching chamber " The etching chamber i 00 of the present invention is opposite to the conventional etching chamber. The wafer base i i 〇 is at a relatively high position on the top. Therefore, after the wafer front side (side to be etched) of the wafer 115 is loaded into the etching chamber, it is supported by the support frame 120, and the support frame 丄 20 is moved upward to make the wafer 5 and the crystal Block 11 0 clings. To prevent the wafer from falling, two methods can be used. The first method is to use a support frame 120 and a wafer base 110 to embed each other to fix the wafer 115. The support frame 120 is not removed during the etching. Therefore, in this case, the frame portion of the supporting frame supporting the wafer needs to be considered not to protrude too much, so as to avoid the occurrence of invalid areas, so as to achieve the purpose of preventing the wafer from falling and not increasing the invalid area. Another option for the crystal base 110 is to select a bipolar electrostatic adsorption base. When the wafer 115 is loaded into the bipolar electrostatic adsorption wafer, the semiconductor substrate is still supported by the supporting frame 120, and then the semiconductor substrate is removed by the bipolar electrostatic adsorption method, and then the supporting frame 120 is removed, and then Etching. Since bipolar

第8頁 五、發明說明(6) 十生 町€吸附晶座n 〇係由於晶座n 〇上產生複數個帶正負電 的偶搞 tn 產 。因此,晶圓11 5也感應相對應的負正電偶極,以 以生正負電性相吸。當雙極性靜電吸附晶圓n 5時,即可 於曰出支撑架1 2 0。當然’電性相吸的吸引力必須調至高 ;曰日圓重力及晶背冷卻液的衝擊力。 ,、他絕緣之觀察視窗15〇(dielectric wind〇w)則置於 由片 乂觀察姓刻終點。感應線圈150(induction coil) 足應式電流供應器提供,也位於下方,如圖所示。 由於晶圓面在上方’目此,電漿朿需要向±,以蝕刻 : 但電聚係帶電的粒子’因此只要適當調整蝕刻室側 力子(magnet)130之磁力,引導電漿流向上,姓刻 :Φ祕ΐ成問題。此外’姓刻電漿氣體所產生之高分子係 :性溥膜,即便自蝕刻室内牆剝落,並不會受到磁力子 舌之^磁力或雙極性靜電吸附晶座11 0的電性而吸引,而是 的方式脫落。因&,利用上述晶圓座位置在上,且 ;;=:ϋ蝕刻ϊ100設計將可避免掉傳統高分子脫落的 ° π矛'蝕刻至内牆高分子膜的周期時間,因此可以明 二❿不會有傳統蝕刻室内牆高分子膜脫落缺陷 的問題。 以上所述僅為本發明$私 —士技⑽★由杜* 赞月之較佳實施例而已,並非用以限 疋本發明之申請專利筋圚· j犯HI ’凡其它未脫離本發明所揭示之Page 8 V. Description of the invention (6) The ten-year-old adsorption crystal base n 〇 is produced by a plurality of positively and negatively charged tn products on the crystal base n 〇. Therefore, the wafer 115 also senses the corresponding negative and positive electric dipoles to attract positive and negative electricity. When the bipolar electrostatic suction wafer n 5 is used, the support frame 1 2 0 can be released. Of course, the attraction of electrical attraction must be adjusted to high; the gravity of the Japanese yen and the impact of the crystal back coolant. Then, his insulated observation window 15o (dielectric wind〇w) is placed at the end of the surname engraved by the film. The induction coil 150 (induction coil) is provided by the foot-type current supply, which is also located below, as shown in the figure. Because the wafer surface is at the top, “For this reason, the plasma plasma needs to be oriented to ± to etch: but the electro-polymerized charged particles”, so as long as the magnetic force of the magnet 130 on the side of the etching chamber is properly adjusted, the plasma flow is directed upward. Last name carved: Φ secret becomes a problem. In addition, the polymer system produced by the plasma gas: surname 溥 film, even if it peels off the interior wall of the etching room, it will not be attracted by the magnetic force of the magnetic force or the electric property of the bipolar electrostatic adsorption wafer 110. But the way comes off. Because & uses the above wafer holder position above, and ;; =: ϋetchingϊ100 design will avoid the cycle time of the traditional polymer peeling ° π spear etching to the polymer film of the inner wall, so it can be clear ❿There will be no problem of peeling defects of polymer films in traditional etching indoor walls. The above description is only for the present invention. The private embodiment of the present invention is the preferred embodiment of Du * Zanyue, and is not intended to limit the patent application of the present invention. Reveal

492107 五、發明說明(7) 精神下所完成之等效改變或修飾,均應包含在下述之申請 專利範圍内。 1^1 第10頁 492107 圖式簡單說明 圖式簡單說明: 本發明的較佳實施例將於往後之說明文字中輔以下列 圖形做更詳細的闡述: 圖一顯示傳統蝕刻室,晶圓座、晶圓、電漿相對位置關係 的剖面圖。 圖二依據本發明之方法所設計之蝕刻室,晶圓座、晶圓、 電漿相對位置關係的剖面圖,其中晶圓座和晶圓的位置與 傳統方法相比較係呈倒置的關係。492107 V. Description of the invention (7) Equivalent changes or modifications made in the spirit should be included in the scope of patent application as described below. 1 ^ 1 Page 10 492107 Simple illustrations Simple illustrations: The preferred embodiment of the present invention will be explained in more detail in the following explanatory text with the following figures: Figure 1 shows a traditional etching chamber, wafer Cross-sectional view of the relative positional relationship of the base, wafer, and plasma. FIG. 2 is a cross-sectional view of the relative positional relationship between the wafer holder, wafer, and plasma in the etching chamber designed according to the method of the present invention. The positions of the wafer holder and the wafer are in an inverted relationship compared with the conventional method.

圖號對照表: 蝕刻室 1 0、1 0 0 晶座 2 0、11 0 晶圓 1 5、11 5 支撐架 120 磁力子(magnet) 130b 絕緣材質之觀景窗40、140 應感線圈 5 0、1 5 0Drawing number comparison table: Etching chamber 1 0, 1 0 0 Wafer 2 0, 11 0 Wafer 1 5, 11 5 Support frame 120 Magnet 130b Insulating view window 40, 140 Response coil 5 0 , 1 5 0

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Claims (1)

492107492107 六、申請專利範圍 法 上 •一種解決乾式餘刻室内牆剝落粒子所造成元件 ,該方法至少包含以下步驟: % 將一半導體基板載入一位於該乾式蝕刻室頂部的晶座 ’且該半導體基板的晶圓面朝下’以進行電裝餘刻 2 ·如申請專利範圍第1項之方法,其中上述之晶座係以 支撐架托住而將該半導體基板嵌制於該晶座上。 3 ·如申請專利範圍第1項之方法,其中上述之晶座係一具 有雙極性靜電吸附晶座,可用以吸附該半導體基板。 4·如申請專利範圍第3項之方法,其中上述之半導體基板 栽入雙極性靜電吸附晶座係先以支撐架托住該半導體基 极’再以雙極性靜電吸附該半導體基板後,移除該支撐 架’再進行蝕刻。 5·如申請專利範圍第3項之方法,其中上述之半導體基板 栽入雙極性靜電吸附晶座係先以支撐架托住該半導體基 极’再以雙極性靜電吸附該半導體基板後,即逕行進行蝕 刻。 6 ·如申請專利範圍第1項之方法,其中上述之内牆剝落粒 子係電中性微粒。Sixth, the scope of patent application method: • A method for solving components caused by peeling particles in a dry-type room wall, the method includes at least the following steps:% loading a semiconductor substrate into a wafer seat on the top of the dry-etching chamber, and the semiconductor substrate The wafer is facing down to perform electrical installation. 2 · As in the method of the first scope of the patent application, wherein the above-mentioned wafer holder is supported by a support frame, the semiconductor substrate is embedded on the wafer holder. 3. The method according to item 1 of the patent application, wherein the above-mentioned crystal base is a bipolar electrostatic adsorption crystal base, which can be used to adsorb the semiconductor substrate. 4. The method according to item 3 of the scope of patent application, wherein the above-mentioned semiconductor substrate is implanted into a bipolar electrostatic adsorption crystal base, and the semiconductor base is first supported by a support frame, and then the semiconductor substrate is electrostatically adsorbed by bipolar, and then removed The support frame is then etched. 5. The method according to item 3 of the scope of patent application, wherein the above-mentioned semiconductor substrate is implanted into a bipolar electrostatic adsorption crystal base, and the semiconductor base is first supported by a support frame, and then the semiconductor substrate is electrostatically adsorbed by the bipolar, and then walk Etching. 6. The method according to item 1 of the scope of patent application, in which the above-mentioned inner wall exfoliates particles of electrically neutral particles. 第12頁 492107 年t月/曰修正/更正/_免 六、申請專利範圍 7.如申請專利範圍第6項之方法,其中上述之電中性微粒 係蝕刻電漿氣體所產生之高分子。 8 .如申請專利範圍第1項之方法,其中上述之乾式蝕刻室 電漿氣體流向係以磁力引導向上,以蝕刻該半導體基板。 9. 一種解決乾式蝕刻室内牆剝落粒子所造成元件損傷之乾 式蝕刻室裝置,該乾式蝕刻室裝置至少包含: 晶座位於該乾式蝕刻室頂部;及1 可移動式支撐架,用以托住一半導體基板,該半導體 基板之晶圓面朝下以朝向其下方的電漿氣體,該電漿氣體 以磁力引導蝕刻用電漿氣體向上。 1 0 ·如申請專利範圍第9項之裝置,其中上述之晶座係雙極 性靜電吸附晶座。 1 1.如申請專利範圍第9項之裝置,其中上述之内牆剝落粒 子係電中性微粒。 1 2 .如申請專利範圍第1 1項之裝置,其中上述之電中性微 粒係蝕刻電漿氣體所產生之高分子。 1 3.如申請專利範圍第9項之裝置,其中上述之晶座係以一 支撐架托住而將該半導體基板嵌制於該晶座上。Page 12 492107 t / revision / correction / _exemption 6. Scope of patent application 7. The method according to item 6 of the patent scope, wherein the above-mentioned electrically neutral particles are polymers produced by etching plasma gas. 8. The method according to item 1 of the patent application range, wherein the dry etching chamber in the above-mentioned plasma gas flow direction is guided upward by magnetic force to etch the semiconductor substrate. 9. A dry etching chamber device for solving the damage caused by peeling particles on the wall of a dry etching chamber, the dry etching chamber device at least comprises: a crystal seat on the top of the dry etching chamber; and a movable support frame for holding a A semiconductor substrate with a wafer surface of the semiconductor substrate facing downward to face a plasma gas below the plasma substrate, the plasma gas guiding the plasma gas for etching upward with a magnetic force. 10 · The device according to item 9 of the scope of patent application, wherein the above-mentioned crystal base is a bipolar electrostatic adsorption crystal base. 1 1. The device according to item 9 of the scope of patent application, wherein the above-mentioned inner wall exfoliates particles of electrically neutral particles. 12. The device according to item 11 of the scope of patent application, wherein the above-mentioned electrically neutral microparticles are polymers produced by etching plasma gas. 1 3. The device according to item 9 of the scope of patent application, wherein the above-mentioned crystal base is supported by a support frame and the semiconductor substrate is embedded on the crystal base.
TW90113883A 2001-06-07 2001-06-07 Method and apparatus for solving device damage problem caused by peeled particles from the inner wall of a dry etching chamber TW492107B (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102534551A (en) * 2010-12-17 2012-07-04 北京北方微电子基地设备工艺研究中心有限责任公司 Semiconductor equipment
CN102719807A (en) * 2011-03-30 2012-10-10 北京北方微电子基地设备工艺研究中心有限责任公司 An electrostatic-adsorbing support plate, an apparatus and a technology for producing film
CN105336563A (en) * 2014-07-24 2016-02-17 北京北方微电子基地设备工艺研究中心有限责任公司 Etching apparatus and etching method
CN108220874A (en) * 2017-12-26 2018-06-29 德淮半导体有限公司 Pretreatment unit and Pvd equipment
CN111508806A (en) * 2020-04-17 2020-08-07 北京北方华创微电子装备有限公司 Semiconductor process chamber and semiconductor processing equipment

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102534551A (en) * 2010-12-17 2012-07-04 北京北方微电子基地设备工艺研究中心有限责任公司 Semiconductor equipment
CN102534551B (en) * 2010-12-17 2014-08-27 北京北方微电子基地设备工艺研究中心有限责任公司 Semiconductor equipment
CN102719807A (en) * 2011-03-30 2012-10-10 北京北方微电子基地设备工艺研究中心有限责任公司 An electrostatic-adsorbing support plate, an apparatus and a technology for producing film
CN102719807B (en) * 2011-03-30 2014-08-27 北京北方微电子基地设备工艺研究中心有限责任公司 An electrostatic-adsorbing support plate, an apparatus and a technology for producing film
CN105336563A (en) * 2014-07-24 2016-02-17 北京北方微电子基地设备工艺研究中心有限责任公司 Etching apparatus and etching method
CN108220874A (en) * 2017-12-26 2018-06-29 德淮半导体有限公司 Pretreatment unit and Pvd equipment
CN111508806A (en) * 2020-04-17 2020-08-07 北京北方华创微电子装备有限公司 Semiconductor process chamber and semiconductor processing equipment
CN111508806B (en) * 2020-04-17 2023-01-17 北京北方华创微电子装备有限公司 Semiconductor process chamber and semiconductor processing equipment

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