JPH04132219A - Plasma treatment apparatus and manufacture of semiconductor device using same - Google Patents

Abstract

PURPOSE:To execute a plasma treatment at high throughput and at low damage without making an apparatus complicated and large-sized by a method wherein a wafer-mounting electrode and a grid electrode are installed so as to be moved up and down, the position of both electrodes is changed with reference to an upper-part electrode and a high-speed treatment state to form a plasma between the grid electrode and the wafer-mounting electrode and a low-damage treatment state are changed over. CONSTITUTION:At a high-speed etching operation, a grid electrode 12 comes into contact with an upper-part electrode 2 and is insulated from a chamber 1a, and a wafer-mounting electrode 5 is situated near a plasma generation part 9 and is set to a highest state. The upper-part electrode 2 is grounded by using a switch 11a. A high-frequency voltage is applied to the wafer-mounting electrode 5; the electrode is set to a cathode-coupling state. An etching gas is supplied to the inside of a chamber 1. In a low-damage treatment state, the grid electrode 12 is lowered to a position where the wafer-mounting electrode 5 is situated at a high- speed treatment. Switches 11a, 11b are changed over; the wafer-mounting electrode 5 is grounded; and the upper-part electrode 2 is set to a state that it receives a high-frequency voltage and is set to an anode-coupling state. An electric discharge is generated between the upper-part electrode 2 and the grid electrode 12.

Description

[Detailed description of the invention] The present invention will be described in the following order.

Δ, Industrial field of application B0 Overview of the invention C1 Prior art D1 Problems to be solved by the invention E1 Means for solving the problems F0 Effect G, Examples [Figures 1 to 3] a. Plasma Processing equipment [Figs. 1 and 2]b, semiconductor device manufacturing method [Fig. The present invention relates to a plasma processing apparatus that can perform plasma processing with high throughput and low damage, and a method of manufacturing a semiconductor device using the same.

A vertically movable grid electrode is provided between the wafer mounting electrode and the upper electrode, and the grid electrode is in contact with the upper electrode and electrically insulated from the chamber.
There is a high-speed processing state in which the electrode is located relatively close to the upper electrode and plasma is generated between the grid electrode and the wafer-mounted electrode, and a high-speed processing state in which the wafer-mounted electrode is located relatively close to the upper electrode and the grid electrode is also located close to the upper electrode. Grid electrode away from
The state can be switched between a low-damage processing state in which plasma is generated between the upper electrodes, and plasma processing such as dry etching and plasma CVD can be performed in a high-speed processing state using the above plasma processing equipment. This is done while the damage is being processed.

(B. Summary of the Invention) The present invention provides a structure in which the pole of the wafer holder 1 of a plasma processing apparatus can be moved up and down (C,
2. Description of the Related Art) In semiconductor devices such as ICs and LSIs, semiconductor elements are becoming smaller and smaller, and semiconductor wafers, which are semiconductor materials used in the manufacture of semiconductor devices, are becoming larger in diameter. Even as wafers become larger in diameter and semiconductor elements become smaller, it is still possible to achieve fine processing with good uniformity.
It is becoming impossible to perform film formation using conventional batch-type manufacturing equipment. Furthermore, since the area allowed for each manufacturing device in a clean room is becoming narrower, single-wafer manufacturing devices with a smaller footprint tend to be preferred over traditional batch-type manufacturing devices. Therefore,
It is becoming necessary to perform dry etching using single-wafer type equipment.

By the way, when etching is performed using a single-wafer type device, as long as the same etching method as that used in a batch type device is used, the throughput will inevitably decrease.However, a decrease in productivity will cause an increase in costs, etc. Unacceptable. Therefore, there is a strong demand for the development of an etching method with a high etching rate. The fruits of this development are beginning to appear. Specifically, the result is a technology that uses microwave plasma or magnetron discharge to form a high-density plasma to promote the dissociation of etchant, thereby increasing the etching rate.

By the way, according to the technology of forming plasma at high density to promote the dissociation of etchant, the stronger the plasma irradiation energy, the higher the etching rate and the shorter the time required for etching processing, which improves productivity. It can be said that they are certainly excellent in terms of improving their performance.

However, dry etching equipment that forms high-density plasma has a problem in that the surface of the semiconductor wafer is damaged by strong plasma irradiation.

That is, damage is caused by radiant heat from plasma and irradiation with charged particles. The damage increases as the plasma density increases and the etching process speed increases.

Therefore, the inventor of the present application has developed a method that allows for cathode coupling or anode coupling by varying the distance from the plasma generation part of the semiconductor wafer or by switching the polarity of the high-frequency applied voltage. A diverging magnetic field generating means and an auxiliary divergent magnetic field generating means for controlling the distribution of magnetic lines of force on the semiconductor wafer are provided to form a low damage state, and by turning off these two magnetic field generating means, a high speed processing state is established. We have devised a dry etching device that can be brought into a low damage processing state by turning it on or off. and,
The applicant has already filed an application for this patent application under Japanese Patent Application No. 105733/1999.

According to this technique devised by the present inventor, the state can be switched between a high-speed processing state and a low-damage processing state, and the dry etching is initially performed in the high-speed processing state so that the etching time is shortened. Then, a little before the end of etching, the state can be switched to a low damage processing state to proceed with etching and cause less damage to the underlying material.

It can be said that it is excellent in that respect.

(D. Problems to be Solved by the Invention) However, the technique proposed in Japanese Patent Application No. 2-105733 had a problem. That is, the irradiation energy of the plasma onto the semiconductor wafer can be changed by changing the distance from the plasma generation part of the semiconductor wafer or by switching the high frequency application electrode to cathode coupling or anode coupling. There is a limit to increasing the range of energy change. Therefore, the range of change in the plasma irradiation energy must be set sufficiently wide (in order to
It was also essential to provide two magnetic field generating means and to turn them on and off.

However, providing two magnetic field forming means makes the configuration of the device large-scale, resulting in an increase in the device cost and the area occupied. Further, although it is possible to create a low damage state by diverting most of the charged particles to the periphery of the semiconductor wafer using the auxiliary divergent magnetic field forming means, it is difficult to completely eliminate damage.

The present invention has been made to solve these problems, and is capable of performing plasma processing such as dry etching and plasma CVD with high throughput and low damage without significantly increasing the complexity and size of plasma processing equipment. The purpose is to make it possible to do it without any involvement.

(Means for Solving Problem E, φ) The plasma processing apparatus of the present invention enables a wafer mounting electrode to be moved up and down, and a vertically movable grid electrode is provided between the wafer mounting electrode and the upper electrode. The grid electrode is electrically insulated from the chamber in contact with the upper electrode, and the wafer mounting electrode is located relatively close to the upper electrode! The high-speed processing state generates plasma between the grid electrode and the wafer mounting electrode, and the wafer mounting electrode is relatively far away from the upper electrode, and the grid electrode is also separated from the upper electrode, generating plasma between the grid electrode and the upper electrode. This feature is characterized in that the state can be switched between a low damage processing state and a low damage processing state.

The method of manufacturing a semiconductor device of the present invention is characterized by having a step of performing plasma processing such as dry etching or plasma CVD in a high-speed processing state and a step of performing it in a low-damage processing state.

(F. Effect) According to the plasma processing apparatus of the present invention, the wafer mounting electrode is raised, the grid electrode is brought into contact with the upper electrode, and strong plasma is formed between the grid electrode and the wafer mounting electrode by cathode coupling. By lowering the wafer mounting electrode, the grid electrode is also lowered, electrically connected to the chamber, and weak plasma is generated between the grid electrode and the upper electrode by anode coupling. By forming this, low damage treatment can be achieved. During low damage processing, plasma is generated between the grid electrode and the upper electrode, and therefore the plasma forming region is separated from the wafer mounting electrode by the grid electrode, which is currently in the grounded state. Therefore, the plasma irradiation energy can be made extremely weak. Therefore, the difference in plasma energy between high-speed processing and low-damage processing can be increased. And, it does not require large-scale measures such as installing two magnetic field generating means outside the chamber, but simply provides a vertically movable wafer mounting electrode and a vertically movable grid electrode between the upper electrode. This can be achieved by providing

According to the method of manufacturing a semiconductor device of the present invention, plasma processing is first performed in a high-speed processing state, and then plasma processing is performed in a low-damage processing state for finishing, so that plasma processing such as etching and plasma CVD film formation can be performed with high throughput and low damage. can be processed.

(G. Embodiment) [FIGS. 1 to 3] Hereinafter, the plasma processing apparatus of the present invention and the method of manufacturing a semiconductor device using the same will be explained in detail according to the illustrated embodiment.

(a, Plasma processing equipment) [Fig. 1, Fig. 2] Fig. 1 (
A), (B), and FIG. 2 show one embodiment of the plasma processing apparatus of the present invention. FIG. 1 (A) is a cross-sectional view showing the state during high-speed processing, and FIG. FIG. 2 is a cross-sectional view showing the state during damage treatment, and FIG. 2 is a plan view of the grid electrode.

In the drawing, 1 is a chamber, la is a side wall of chamber 1, and 2 is an upper electrode forming a lid of chamber l.
It is electrically insulated from the side 1i1a by an insulator 3.

4 is a gas introduction pipe for introducing etching gas into the chamber 1, and 5 is a wafer mounting electrode on which a semiconductor wafer 6 is mounted. Reference numeral 7 denotes a cooling water distribution vibe through which cooling water is passed for cooling the wafer-mounted electrode. The semiconductor wafer 6 is placed on the wafer placement electrode 5! In this state, it can be raised and lowered by a lifting device (not shown).

Reference numeral 8 denotes a magnetic field forming device provided above the chamber 1, which allows plasma 9 to be formed in the upper part of the chamber 1 as shown by the broken line. The device 8 is rotated so that the plasma density becomes uniform.

lO is a high frequency generator, and lla and llb are switches that change the electrodes that apply high frequency. When switched as shown in Fig. 1 (A), the state is cathode coupled, and as shown in Fig. 1 (B). When switched to , it becomes an anode coupling state.

12 is a lifting bag (not shown) between the upper electrode 2 and the wafer mounting electrode 5! A grid electrode that can be raised and lowered by the! ! ! ! As shown in FIG. 2, a large number of plasma passage holes 13, 13, . . . are formed.

During high-speed processing, the grid electrode 12 occupies a high position where it completely contacts the upper electrode 2, as shown in FIG. 1(A). At this time, it is electrically insulated from the side wall 1a of the chamber 1 and has the same potential as the upper electrode 2. In addition, during low damage processing, as shown in FIG. 3(B), it descends and is located below the formation position of the plasma 9. Incidentally, in this case, the wafer mounting electrode 5 naturally also descends, and the grid electrode 12
Even if it is lowered, it occupies a considerably higher position than the wafer mounting electrode. During this low damage processing, this grid electrode 12
is naturally separated from the upper electrode 2, comes into contact with the side wall 1a of the chamber 1, and is electrically at the same ground potential as the side wall 1a.

First, this plasma processing equipment! The state during post-high speed etching will be explained with reference to FIG. 1(A).

The grid electrode 12 is in contact with the upper electrode 2 and is connected to the chamber 1a.
The wafer mounting electrode 5 is located near the plasma generating section 9! It is in its highest state. At this time, the distance between the wafer mounting electrode 5 and the upper electrode 2 is, for example, 5 to 50a+.
It is m.

Then, the upper electrode 2 is grounded by the switch lla, and a high frequency voltage is applied to the wafer mounting electrode 5 to bring it into a cathode coupling state. Etching gas is then supplied into the chamber 1.

In the state shown in FIG. 1(A), the semiconductor wafer 6 is close to the plasma generation section 9, and is in a cathode-coupled state where it is irradiated with strong energy ions having a negative potential due to the application of a high frequency voltage. It's below. Therefore, the etching speed becomes faster.

That is, the present dry etching apparatus in the state shown in FIG. 1 is a cathode coupling type magnetron RIE apparatus.

Moreover, since the upper electrode 2 is brought into contact with the grid electrode 12 having a large number of through holes 13 on its lower surface, the lower surface thereof becomes uneven, and the area of the anode electrode becomes substantially larger. As a result, the area ratio of the anode electrode to the cathode electrode increases, and the cathode drop voltage Vdc directly above the wafer becomes higher under the same RF power. can.

In the low damage treatment state shown in FIG. 1(B), the semiconductor wafer 6 has descended and is far away from the plasma 9 generation area. Furthermore, the grid electrode 12 is lowered to the position where the wafer placement electrode 5 was during high-speed processing. The distance between the grid electrode 12 and the wafer mounting electrode 5 is preferably 5 to 50 mm, and the switches lla and llb are switched to ground the wafer mounting electrode 5 and put the upper electrode 2 in a state where it receives a high frequency voltage. . That is, it becomes an anode coupled state.

Then, a discharge occurs between the upper electrode 2 and the grid electrode 12, and the formation region of the plasma 9 cuts through the wafer! It is separated from the semiconductor wafer 6 on the electrode S by the grid electrode 12. Therefore, etching is performed by neutral active species that have diffused to the wafer 6 through the through holes 13, 13, . . . in the grid electrode 12. Therefore, any adverse effects caused by radiant heat from plasma or irradiation with charged particles are completely eliminated. That is, damage-free etching is possible.

(b. Manufacturing method of semiconductor device) [Figure 3] Figure 3 (A)
1 to 3(C) are cross-sectional views showing one embodiment of a method for manufacturing a semiconductor device according to the present invention in the order of steps.

(A) Si formed on the surface of silicon semiconductor substrate 5
First, dry etching is performed on the film 15 using the resist film 16 as a mask using the plasma processing apparatus shown in FIG. 1 under the high speed processing state shown in FIG. 1(A).

The plasma conditions are such that the etching gas is, for example, C1Fa.
(50SCCM)/C,H, (7SCCM), the pressure is, for example, 2 Pa, and the RF power applied to the wafer mounting electrode 5 is, for example, 2.0 W/cm. The state of the semiconductor device ! is shown, and 17 is a recess formed by etching.

(B) When most (for example, 90%) or all of the etching of the 15 SiO* films is completed, the plasma processing apparatus is switched to the low damage processing state shown in FIG. 1 (B).

The plasma conditions are such that the etching gas is, for example, CF, (30
0SCCM) 101 (50SCCM), the pressure is, for example, 20 Pa, and the RF power applied to the upper electrode 2 is 1.5 W.
/c is.

This allows damage to the exposed surface of the semiconductor substrate 5 to be removed.

(C) After the damage removal is completed, the resist film 16 is removed by ashing by changing the etching conditions to O* (200S CCM) for etching gas and 1 OPa for example, while maintaining the plasma processing equipment in a low damage processing state. do.

According to such a method of manufacturing a semiconductor device, high-speed processing can be performed without damaging the base.

In this example, 5iO = etching for the film, but 1
The present invention is applicable to dry etching of thin films of various types, such as etching of aluminum films.

Furthermore, the present invention can also be applied to the formation of thin films by CVD. That is, there is a technique of forming a thin film such as a 5-ins film by plasma CVD, but if this is performed under high-speed processing conditions, the surface of the thin film will be damaged. Therefore, most of the thin film plasma CVD (for example, up to about 90%)
By performing high-speed processing for the remaining portion (for example, 10%) and performing low-damage treatment for the remainder (for example, 10%), a thin film with no surface roughness can be relatively easily formed by plasma CVD.

(H, Effect of the Invention) As described above, the plasma processing apparatus of the present invention is provided with an upper electrode electrically insulated above the chamber, and a wafer is placed below the upper electrode inside the chamber. On the right side of the plasma processing apparatus in which the mounting electrode is arranged, the wafer mounting electrode is provided so as to be movable up and down so that the distance from the upper electrode part can be changed, and the space between the wafer mounting electrode and the chamber is provided. A grid electrode is provided to be movable up and down, and the grid electrode is in contact with the upper electrode and is electrically isolated from the chamber, and the wafer mounting electrode is located at a high place relatively close to the upper electrode. A high-speed processing state in which plasma is formed between the mounting electrodes, and the wafer mounting electrode is located at a low place relatively far from the upper electrode, and the grid electrode is lowered and separated from the upper electrode and electrically connected to the chamber. The present invention is characterized in that the state can be switched between a low damage processing state in which plasma is formed between the grid electrode and the upper electrode when the electrode is located at the location where the grid electrode is located.

Therefore, according to the plasma processing apparatus of the present invention, the wafer mounting electrode is appropriately raised, the grid electrode is further raised and brought into contact with the upper electrode, and strong plasma is formed between the grid electrode and the wafer mounting electrode by cathode coupling. By lowering the wafer mounting electrode, the grid electrode is also lowered and electrically connected to the chamber to form a weak plasma between the grid electrode and the upper electrode through anode coupling. This allows for low damage processing.

During low damage processing, plasma is generated between the grid electrode and the upper electrode, and the plasma forming region is separated from the wafer mounting electrode by the grid electrode. Therefore, the plasma irradiation energy can be made extremely weak. Therefore, the difference in plasma energy between high-speed processing and low-damage processing can be increased. And, it does not require a large-scale arrangement such as providing two magnetic field generating means outside the chamber.

This can be achieved by simply providing a vertically movable grid electrode between a vertically movable wafer mounting electrode and an upper electrode.

The method for manufacturing a semiconductor device of the present invention includes the steps of placing a semiconductor substrate on a wafer mounting electrode in a plasma processing apparatus, performing plasma processing in a high-speed processing state, and a plasma processing bag! The method is characterized by comprising a step of performing plasma treatment in a low damage treatment state.

Therefore, according to the method of manufacturing a semiconductor device of the present invention, plasma processing is first performed in a high-speed processing state, and plasma processing is performed in a low-damage processing state in the finishing stage, thereby forming a thin film without etching without underlying damage and without surface damage. can be formed.

This shows one embodiment of the Zuma processing device, and Fig. 1 (A
) is a cross-sectional view of the plasma processing equipment in a high-speed processing state,
Figure 3 (B) is a cross-sectional view of the plasma processing apparatus in a low damage state, Figure 2 is a plan view of the grid electrode, and Figure 3 (A
) to (C) are cross-sectional views showing one embodiment of the semiconductor manufacturing method of the present invention in the order of steps.

Explanation of symbols l...Chamber.

la...chamber side wall, 2...upper electrode, 5... Wafer mounting electrode, 6... Wafer (semiconductor substrate), 9...Plasma, 12...grid electrode, 15... Film to be etched.

[Brief explanation of drawings]

Claims (2)

[Claims] (1) In a plasma processing apparatus in which an upper electrode is provided above a chamber and electrically insulated from the upper electrode, and a wafer mounting electrode is arranged below the upper electrode inside the chamber, the wafer mounting electrode is vertically movable so as to change the distance from the upper electrode, and a grid electrode is vertically movably provided between the wafer placement electrode and the chamber, and the grid electrode is in contact with the upper electrode. A high-speed processing state in which the wafer mounting electrode is electrically isolated from the chamber and is located at a high place relatively close to the upper electrode to form plasma between the grid electrode and the wafer mounting electrode; A low-damage method that forms plasma between the grid electrode and the upper electrode by being located in a low place relatively far from the upper electrode and in a place where the grid electrode descends and separates from the upper electrode and is electrically connected to the chamber. A plasma processing apparatus characterized by being capable of switching between processing states. (2) A step of performing plasma processing in a high-speed processing state of a plasma processing apparatus in which a semiconductor substrate is placed on an internal wafer mounting electrode, and a step of performing plasma processing in a low-damage processing state of the plasma processing apparatus. A method for manufacturing a semiconductor device using the plasma processing apparatus according to claim (1), characterized in that: