TW486901B - Low-power level shift compensation circuit - Google Patents
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486901 五、發明說明(1) 5 - 1發明領域: 本發明係有關於一種準位漂動(b a s e 1 i n e w a n d e r)補 償電路,特別是一種使用數位式迴授電路之低功率補償電 路0 5 - 2發明背景: 在一個網路系統中,例如地區網路系統(1 〇 c a 1 a r e a network, LAN),其接收電路通常需要一個變壓器來作為 隔離各個不同電源之用。但是,變壓器之低頻響應通常很 差,因此造成信號之直流成分的準'位漂動(b a s e 1 i n e wander)。此漂動可能會超出等化器的共模輸入信號可接 收範圍,或經等化器之低頻增益,使此低頻成分放大,導 致數位信號漏失或偵測錯誤。第一圖顯示一具準位漂動之 信號,其直流成份1 1部分產生漂動。再者,一般變壓器之 電感成分通常會使得接收到的信號啟始端準位漏失掉,以 致無法偵測得到正確的數位信號。 對於上述之問題,曾有許多人對其提出解決之方法。 傳統方法之一為直接對輸入信號進行補償;雖然此方法很 單純,但是卻需耗用大電流,而且通常很難真正適當的設 定差動信號之共模偏壓。另有一種方法是在等J匕器之後進486901 V. Description of the invention (1) 5-1 Field of invention: The present invention relates to a base 1 inewander compensation circuit, especially a low power compensation circuit using a digital feedback circuit. 0 5-2 BACKGROUND OF THE INVENTION: In a network system, such as a 10 ca 1 area network (LAN), the receiving circuit usually requires a transformer to isolate different power sources. However, the low-frequency response of the transformer is usually very poor, which leads to quasi-bit drift of the DC component of the signal (b a s e 1 i n e wander). This drift may exceed the common-mode input signal reception range of the equalizer, or the low-frequency gain of the equalizer may amplify this low-frequency component, resulting in missing digital signals or detection errors. The first figure shows a signal with level drift, and the DC component of the component 11 drifts. In addition, the inductance component of a general transformer usually causes the level of the initial end of the received signal to be missed, so that the correct digital signal cannot be detected. Many people have proposed solutions to the above problems. One of the traditional methods is to directly compensate the input signal; although this method is simple, it requires large current consumption, and it is often difficult to really properly set the common-mode bias voltage of the differential signal. Another way is to wait after the J Dagger
486901 五、發明說明(2) 行補償;但是,使用此法無法防止等化器輸入信號超出其 共模範圍。再者,在補償控制方面,尚有人提出一種使尸 類比式迴授電路之補償方式,雖然其可以達到連續時間之 準位補償,但是由於使用類比式迴授電路需要極大的電容 器以有效控制其回路頻寬及穩定性,因此使得其電路之體 積過於龐大,而增加成本。 鑑於上述傳統各種方法尚有許多的缺點有待改善,因 此亟待提出一種低功率準位漂動補償電路,可以即時補償 信號準位的漂動,避免傳統類比迴授電路所需要之較大面 積、複雜度及耗電量的問題,也可以避免使用大電容值來 控制回路頻寬及穩定度,更可以大幅降低所需的電流,並 且降低偏壓電路設計的困難度。 5 - 3發明目的及概述: 鑑於上述之發明背景中,傳統的準位漂動補償電路所 產生的諸多缺點,本發明提供一種以數位式迴授控制方式 的準位漂動補償電路,以即時調整準位的漂動,解決傳輸 線上的訊號(尤其是區域網路之信號)在經過變壓器的轉 換之後所產生直流準位失真的問題。 本發明其中一項目的在以數位控制迴授的方式,避免486901 V. Description of the invention (2) Line compensation; however, this method cannot prevent the equalizer input signal from exceeding its common mode range. Furthermore, in terms of compensation control, some people have proposed a compensation method that enables the analog feedback circuit. Although it can achieve continuous time level compensation, because the use of the analog feedback circuit requires a large capacitor to effectively control it. The loop bandwidth and stability make the circuit size too large and increase the cost. In view of the many shortcomings of the traditional methods mentioned above, many shortcomings need to be improved, so it is urgent to propose a low power level drift compensation circuit, which can immediately compensate for signal level drift, avoiding the large area and complexity of traditional analog feedback circuits The problem of power consumption and power consumption can also avoid the use of large capacitor values to control the loop bandwidth and stability, which can greatly reduce the required current and reduce the difficulty of the bias circuit design. 5-3 Purpose and Summary of the Invention: In view of the above-mentioned backgrounds of the invention, the conventional level drift compensation circuit has many shortcomings. The present invention provides a level drift compensation circuit using a digital feedback control method. Adjust the level drift to solve the problem of DC level distortion caused by the signal on the transmission line (especially the signal of the local network) after being transformed by the transformer. One of the objectives of the present invention is to avoid feedback in a digitally controlled manner to avoid
發明說明(3) 咦比迴授電路所需要之大 ,也可以避❖你後雜度及耗電量的 义免使用大電容值以控制回路頻寬及穩定度Description of the invention (3) 咦 is larger than required by the feedback circuit, and can also avoid the meaning of your post-hybridity and power consumption. Use a large capacitor value to control the loop bandwidth and stability.
本發明的再一目的,# M ^ 勺 係以^曰加一緩衝器在變壓琴及電 机補償電路、等化5|夕門、去$丨丄^,览又座裔汉电 且降柄狄以# π 之間,達到大幅降低所需的電流,並 牛低&制偏壓的困難度。 根據上述目的’本發明提供一種準位漂動補償電路, '、匕各、有 又壓為’其主要線圈(primary winding)連接 區域網路’而其第二線圈(secondary winding)則連接 至、緩衝器。一等化器連接至緩衝器之輸出端,用以還原傳 輸線衰減掉的訊號。再者,本發明使用一電流補償電路, 位於等化器之前端及緩衝器輸出端之間,用以補償電子信 就的電壓準位。一準位粹取電路(base 1 ine ex tract or)連 接至等化器之輸出端,用以得出電子信號的準位信號。另 外’將一數位式迴授電路連接至準位粹取電路之輸出端, 用以產生一代表電子信號之漂動量的數位信號。最後,以 一數位轉換類比電路連接至數位式迴授電路之數位信號, 用以將數位信號轉換成為一類比信號,以控制電流補償電 路0 5 - 4發明詳細說明:Yet another object of the present invention is to # M ^ spoon is to add a buffer in the transformer and motor compensation circuit, equalize 5 | Ximen, go to $ 丨 丄 ^, and look at the Chinese electric power and drop Handle between # π, to achieve a significant reduction in the required current, and to reduce the difficulty of & bias. According to the above-mentioned object, the present invention provides a level drift compensation circuit, which has a primary winding connected to a local network and a secondary winding connected to, buffer. An equalizer is connected to the output of the buffer to restore the signal attenuated by the transmission line. Furthermore, the present invention uses a current compensation circuit located between the front end of the equalizer and the buffer output end to compensate the voltage level of the electronic signal. A base 1 ine extraction circuit (base 1 ine ex tract or) is connected to the output terminal of the equalizer to obtain the level signal of the electronic signal. In addition, a digital feedback circuit is connected to the output terminal of the quasi-bit extraction circuit to generate a digital signal representing the drift of the electronic signal. Finally, a digital conversion analog circuit is connected to the digital signal of the digital feedback circuit to convert the digital signal into an analog signal to control the current compensation circuit.
第6頁 五、發明說明(4) 述如下。然而,除了詳 其他的應用場合中施行 下述之實施例,其將以 本發明的較佳實施例會詳細^ 細描述外,本發明還可以廣泛地^ 。亦即’本發明的範圍不受限定、 之後的專利範圍為準。 ; 第二圖所示為根據本發明 ^ ^ r 4- . 、 < 乙太(ether net)地區網路 傳收β ( transceiver)的訊號垃w na仏你举#办丨由 lL u接收器2 1部分電路。在本發 明車父佳貝施例中,此地區網路從Page 6 5. Description of the Invention (4) is as follows. However, in addition to implementing the following embodiments in other applications, which will be described in detail with preferred embodiments of the present invention, the present invention can also be widely used. That is, 'the scope of the present invention is not limited, and the scope of subsequent patents shall prevail. The second figure shows a signal according to the present invention ^ ^ r 4-. ≪ Ethernet (Ethernet) area network transmission β (transceiver). 2 1 part circuit. In this example of the car ’s driver Gabe, the local network from
At 糸為 1 0 0 based-乙太網路, 然而其他型悲的乙太網路,甚5 # a 7 _、丄 选至其他網路、信號傳輸或非 網路電子電路中,只要會發生準位漂動(baseiine wander )之情形者’皆可以依照本發明之精神而予以應用。 在第二圖中’接收器2 1的最前端點2 2接收來自以太網 路(在圖式中未顯示)的訊號,此接收到的訊號經由變壓 為' 2 4以隔離其直流成分。此變壓器2 4具有一^主要線圈( primary winding)2 6連接至區域網路,並具有一第二線圈 (secondary winding) 28。通常,變壓器24之第二線圈28 的兩端會連接一終端(t e r m i n a t i n g)電阻2 5,作為阻抗匹 配。另外,變壓器2 4之第二線圈2 8更連接一組緩衝器3 Ο, 用以減少受到其後級負載所產生的影響,可以大幅降低接 收器2 1電路之消耗電流,且使得電路容易加以偏壓(b i a s )At 糸 is 1 0 0 based-Ethernet, but other types of sad Ethernet, even 5 # a 7 _, can be selected to other networks, signal transmission or non-network electronic circuits, as long as it will happen Anyone who is in a situation of baseiine wander can be applied in accordance with the spirit of the present invention. In the second picture, the foremost point 2 2 of the 'receiver 21 1 receives a signal from the Ethernet circuit (not shown in the figure), and the received signal is transformed to' 2 4 to isolate its DC component. The transformer 24 has a primary winding 26 connected to the local area network, and has a secondary winding 28. Generally, two ends of the second coil 28 of the transformer 24 are connected with a terminal (t e r m i n a t i n g) resistor 25 to match the impedance. In addition, the second coil 2 8 of the transformer 24 is further connected to a set of buffers 3 0 to reduce the influence caused by its subsequent load, which can greatly reduce the current consumption of the circuit of the receiver 21 and make the circuit easy to apply. Bias (bias)
486901 五、發明說明(5) 、 接著’以一等化器3 2連接至緩衝器30之輸出端,用以 ,原=輸媒介的損耗。在此等化器3 2之輸入端,即使沒有 準位漂動之現象時,其直流電壓仍需要加以偏壓。等化器 3 2之電路本身為一種習知之技術,因此在此並未揭露其細 節。 ’、 等化器32之輸出端連接到一準位粹取電路(basel丨⑽ ex tract or) 34,用以得出電子信號的準位值。通常,係以 身又的峰值檢波裔(P e a k d e t e c t 〇 r )來實施此準位粹取電 路3 4峰值檢波器係屬於一種低通濾波電路,其可以檢知 電子L號的峰值或波封(envel〇pe)。 接著,準位粹取電路34之輸出端連接至—數位式迴授 控制,電路3 6:用以產生代表所接收電子信號之漂動量的^ 位信號。第三圖顯示本發明中數位式迴授控制電路Μ之詳 細電路實施例。雖然本發明以第三圖之電路作為迴授電路 之較佳實施例,然而其他等效性的改變都同樣適用於本發 明之整體接收電路中。此數位式迴授控制電路3 6主要包含 有一組比較器5 2 ’其係為一般類比式比較器,主要係用以 將準位信號54分別和一預設上限定信號(值)5β及一'預μ 下限定信號(值)58作比較。接著,再以互斥或(exciusi: OR)邏輯閘60、D型正反器(fiipflop)閘62及上下計數琴63 (up-down counter)所組成的邏輯電路,接收來自比^哭 5 2的輸出’用以產生代表電子信號之漂動量的數位信號。486901 V. Description of the invention (5), and then ′ is connected to the output terminal of the buffer 30 with the equalizer 3 2 for the original loss of the transmission medium. At the input of these equalizers 32, the DC voltage needs to be biased even when there is no level drift. The circuit of the equalizer 32 is a well-known technology, so its details are not disclosed here. The output end of the equalizer 32 is connected to a basel extraction circuit 34 to obtain a level value of the electronic signal. Usually, the peak detection circuit (Peakdetector) is used to implement this level detection circuit. 34 The peak detector is a low-pass filter circuit that can detect the peak or wave seal of the L number of the electron ( envel〇pe). Then, the output terminal of the level picking circuit 34 is connected to a digital feedback control. The circuit 36 is used to generate a ^ bit signal representing the drift of the received electronic signal. The third figure shows a detailed circuit embodiment of the digital feedback control circuit M in the present invention. Although the present invention uses the circuit of the third figure as a preferred embodiment of the feedback circuit, other equivalent changes are equally applicable to the overall receiving circuit of the present invention. The digital feedback control circuit 3 6 mainly includes a group of comparators 5 2 ′, which are general analog comparators, which are mainly used to respectively separate the level signal 54 and a preset upper limit signal (value) 5β and 1 'Pre-μ lower limit signal (value) 58 is compared. Then, a logic circuit composed of an exclusive-exclusive OR (exciusi: OR) logic gate 60, a D-type flip-flop gate 62 and an up-down counter 63 is received. The 'output' is used to generate a digital signal representing the amount of drift of the electronic signal.
頁 486901 五、發明說明(6) 本發明中因使用數位式之迴授控制電路3 6,可以較傳統類 比式迴授控制電路之耗電量來得小。並可藉由正反器之時 脈(clock)信號頻率之選擇,控制迴授速度,穩定迴授系 統。 再參考第二圖,以一數位轉換類比電路3 8將迴授控制 電路3 6之數位信號轉換成為一類比信號,其輸出則連接及 控制一電流補償電路3 9,其位於等化器3 2之前端及緩衝器 3 0輸出端之間,用以補償區域網路之電子信號的準位漂動 在本發明實施例中,如第二圖所示,還可以包含一複 製偏壓(replica biasing)電路,其產生一參考電壓連接 至變壓器2 4之第二線圈2 8,用以提供變壓器2 4輸出端之偏 壓,並且使此電壓經過緩衝器3 0後恰為等化器3 2所需要的 輸入共模偏壓。 根據以上實施例之描述,本發明以數位式迴授控制方 式的準位漂動補償電路,可以即時調整準位的漂動,解決 傳輸線上的訊號(尤其是區域網路之信號)在經過接收器 的轉換之後所產生直流準位失真的問題;而且,以此數位 控制迴授的方式,可避免傳統類比迴授電路所需要之較大 面積、複雜度及耗電量的問題,也可以避免使用大電容值 以控制回路頻寬及穩定度。另外,本發明實施例中使用緩Page 486901 V. Description of the invention (6) Because the digital feedback control circuit 36 is used in the present invention, the power consumption can be smaller than the traditional analog feedback control circuit. It can also control the feedback speed and stabilize the feedback system by selecting the clock signal frequency of the flip-flop. Referring again to the second figure, a digital conversion analog circuit 3 8 converts the digital signal of the feedback control circuit 36 into an analog signal, and its output is connected to and controls a current compensation circuit 39, which is located at the equalizer 3 2 Between the front end and the 30 output end of the buffer, to compensate for the level drift of the electronic signal of the local network. In the embodiment of the present invention, as shown in the second figure, a replica biasing can also be included. ) Circuit, which generates a reference voltage connected to the second coil 28 of the transformer 24 to provide a bias voltage at the output of the transformer 24, and makes this voltage pass through the buffer 30 to be equal to the equalizer 32. Required input common-mode bias. According to the description of the above embodiments, the level drift compensation circuit in the digital feedback control method of the present invention can adjust the level drift in real time, and solve the problem of the signal on the transmission line (especially the signal of the local network) after receiving The problem of DC level distortion caused by the converter's conversion; moreover, this digital control feedback method can avoid the problems of large area, complexity and power consumption required by traditional analog feedback circuits, and can also avoid Use large capacitor values to control loop bandwidth and stability. In addition, in the embodiment of the present invention,
486901 五、發明說明(7) 衝器於變壓器及電流補償電路、等化器之間,可以大幅降 低準位漂動補償及偏壓所需的電流,並且降低控制偏壓的 困難度。 以上所述僅為本發明之較佳實施例而已,並非用以限 定本發明之申請專利範圍;凡其它未脫離本發明所揭示之 精神下所完成之等效改變或修飾,均應包含在下述之申請 專利範圍内。486901 V. Description of the invention (7) The punch between the transformer and the current compensation circuit and the equalizer can greatly reduce the current required for level drift compensation and bias, and reduce the difficulty of controlling the bias. The above are merely preferred embodiments of the present invention, and are not intended to limit the scope of patent application for the present invention; all other equivalent changes or modifications made without departing from the spirit disclosed by the present invention shall be included in the following Within the scope of patent application.
第10頁 486901 圖式簡單說明 第一圖顯示一具準位漂動之信號波形圖,其直流成份 經變壓器後產生漂動。 第二圖為根據本發明之乙太(ethernet )地區網路傳收 器(t r a n s c e i v e r )的訊號接收器電路圖。 第三圖顯示本發明中數位式迴授控制電路之電路實施 例。Page 10 486901 Brief description of the diagram The first diagram shows a signal waveform diagram with level drift. The DC component of the signal drifts after passing through the transformer. The second figure is a circuit diagram of a signal receiver of an Ethernet local area network receiver (t r a n s c e i v e r) according to the present invention. The third figure shows a circuit embodiment of a digital feedback control circuit in the present invention.
主要部分之代表符號:Representative symbols of the main parts:
11 信 號 之 準 位 漂 動 21 網 路 訊 號 接 收 器 22 外 接 區 域 網 路 之 端點 24 變 壓 器 25 終 端 電 阻 26 變 壓 器 之 主 要 線 圈 28 變 壓 器 之 第 二 線 圈 29 偏 壓 設 定 電 路 30 緩 衝 器 32 等 化 器 34 準 位 粹 取 電 路 36 迴 授 控 制 電 路 38 數 位 轉 類 比 轉 換 器 39 電 流 補 償 電 路11 Signal level drift 21 Network signal receiver 22 End point of external LAN 24 Transformer 25 Termination resistance 26 Transformer main coil 28 Transformer second coil 29 Bias setting circuit 30 Buffer 32 Equalizer 34 Level taking circuit 36 Feedback control circuit 38 Digital to analog converter 39 Current compensation circuit
第11頁 486901 圖式簡單說明 5 2 電壓比較器 5 4 準位信號 56 上限信號 58 下限信號 60 互斥或閘 62 正反器 6 3 上下計數器 第12頁Page 11 486901 Brief description of the diagram 5 2 Voltage comparator 5 4 Level signal 56 Upper limit signal 58 Lower limit signal 60 Mutex OR gate 62 Flip-flop 6 3 Up-down counter Page 12
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9906211B2 (en) | 2015-10-20 | 2018-02-27 | Analog Devices Global | Compensation of baseline wander |
US10090094B2 (en) | 2016-06-06 | 2018-10-02 | Analog Devices, Inc. | Flex-based surface mount transformer |
US11295891B2 (en) | 2017-11-03 | 2022-04-05 | Analog Devices, Inc. | Electric coil structure |
-
2000
- 2000-08-21 TW TW89116912A patent/TW486901B/en not_active IP Right Cessation
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9906211B2 (en) | 2015-10-20 | 2018-02-27 | Analog Devices Global | Compensation of baseline wander |
US10090094B2 (en) | 2016-06-06 | 2018-10-02 | Analog Devices, Inc. | Flex-based surface mount transformer |
US11295891B2 (en) | 2017-11-03 | 2022-04-05 | Analog Devices, Inc. | Electric coil structure |
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