TW483108B - Manufacture method of damascene structure - Google Patents

Manufacture method of damascene structure Download PDF

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TW483108B
TW483108B TW90111916A TW90111916A TW483108B TW 483108 B TW483108 B TW 483108B TW 90111916 A TW90111916 A TW 90111916A TW 90111916 A TW90111916 A TW 90111916A TW 483108 B TW483108 B TW 483108B
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Taiwan
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dielectric layer
manufacturing
patent application
scope
item
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TW90111916A
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Chinese (zh)
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Ji-Feng Jeng
Jeng-Cheng Shiue
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Macronix Int Co Ltd
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Abstract

This invention provides a manufacture method of damascene structure. A substrate is provided and a dielectric layer is formed on the substrate, in which the dielectric layer material is oxynitride and the refraction index (RI) of the dielectric layer is 1.55 to 1.74. An opening is formed in the dielectric layer and a metal layer is formed on the substrate to fill the opening. The metal layer beyond the opening is removed by chemical mechanical polishing method using the dielectric layer as the polishing end point, in which the polishing removal rate of the dielectric layer is smaller than that of the metal layer.

Description

483108 7362twf.doc/〇〇6 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明(/ ) 本發明是有關於一種半導體元件(Semiconductor device) 製程,且特別是有關於一種鑲嵌(Damascene)結構的製造方 法。 在現今的半導體製程中,由於將導體材料埋入介電層 中以形成導線或是形成接觸窗(Contact)/介層窗(Via)的鑲嵌 製程,具有當導體材料改變時,其加工技術不須隨之改變, 而且於介電層形成開口的方法可以採用技術成熟的電漿蝕 刻法(Plasma Etching)或反應性離子蝕刻法(Reactive Icn Etch, RIE)來實施,並且配合化學機械硏磨法(Chemical Mechanical Polishing,CMP)的使用,可能能夠達成介電層的全面平坦 化等優點,因此,以鑲嵌製程配合化學機械硏磨法以形成 鑲嵌結構的製程爲非常具有魅力的技術。 習知採用上述技術以形成鑲嵌結構的方法,係在已形 成有導電區域的基底上形成介電層後,再於介電層上形成 硏磨終止層。接著,在硏磨終止層以及介電層中形成開口, 此開口可爲接觸窗開口、介層窗開口、導線溝渠、鑲嵌開 口等其中之一,並露出基底的導電區域。然後,在基底全 面沈積一層金屬層並塡滿開口。最後,再以化學機械硏磨 法去除開口之外的金屬層。 然而,以上述的製程形成的鑲嵌結構有下述的問題: 習知所形成的硏磨終止層其與金屬層的硏磨選擇比接 近,當以化學機械硏磨法對金屬層進行硏磨,且硏磨至硏 磨終止層時,在晶圓上圖案密度高的地區,會因爲金屬層 與硏磨終止層的被硏磨移除率相近以及圖案密度(Pattern (請先閱讀背面之注咅?事項再填寫本頁) 嫌483108 7362twf.doc / 〇〇6 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (/) The invention relates to a semiconductor device manufacturing process, and in particular to a damascene. Manufacturing method of structure. In today's semiconductor processes, since the conductor material is buried in the dielectric layer to form a wire or a damascene process to form a contact / via window, there is no processing technology when the conductor material changes. It must be changed accordingly, and the method for forming an opening in the dielectric layer can be implemented by a mature plasma etching method (Plasma Etching) or a reactive ion etching method (Reactive Icn Etch, RIE), and combined with a chemical mechanical honing method The use of (Chemical Mechanical Polishing, CMP) may be able to achieve the advantages of comprehensive planarization of the dielectric layer, etc. Therefore, the process of forming a damascene structure by a damascene process and a chemical mechanical honing method is a very attractive technology. The conventional method for forming a damascene structure using the above technique is to form a dielectric layer on a substrate on which a conductive region has been formed, and then to form a honing stop layer on the dielectric layer. Next, an opening is formed in the honing stop layer and the dielectric layer. The opening may be one of a contact window opening, a dielectric window opening, a wire trench, a damascene opening, etc., and exposes the conductive area of the substrate. A metal layer is then deposited on the entire surface of the substrate and fills the opening. Finally, the metal layer outside the opening is removed by chemical mechanical honing. However, the mosaic structure formed by the above process has the following problems: It is known that the honing termination layer formed is close to the honing selection ratio of the metal layer. When the metal layer is honed by a chemical mechanical honing method, And when honing to the honing stop layer, in areas with high pattern density on the wafer, the metal layer and the honing stop layer have similar honing removal rates and pattern density (Pattern (Please read the note on the back first) ? Matters then fill out this page)

— — — — — —— ·1111111! I 0 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 483108 7362twf.doc〆 006 五、發明說明(2 ) density)的效應,而造成介電層的材質流失、金屬層的腐餓 (Erosion)以及碟化效應(Dishing effect)等問題的產生。 因此,本發明提出一種鑲嵌結構的製造方法,能夠使 用與金屬層具有高硏磨選擇比的材質作爲鑲嵌結構的介電 層,不須額外形成硏磨終止層。 本發明提出一種鑲嵌結構的製造方法,能夠避免以化 學機械硏磨法對金屬層進行硏磨時,產生介電層的流失、 金屬層的腐蝕以及碟化效應等問題。 本發明提出一種鑲嵌結構的製造方法,此方法係提供 一個基底,再於基底上形成介電層,其中此介電層的材質 爲氮氧矽化物,且此氮氧矽化物在波長爲673nm的光照射 下具有1.55至L74左右的反射率,並且,此介電層與後 續製程預定形成的金屬層之間具有高硏磨選擇比。接著, 在介電層中形成開口,此開口視不同製程可爲接觸窗開 口、介層窗開口、導線溝渠亦或是鑲嵌開口。然後,在基 底上形成塡滿開口的金屬層。其後,使用化學機械硏磨法, 以介電層表面爲硏磨終止層,去除開口之外的金屬層。 由上述可知,本發明的重要特徵乃是使用一種與金屬 層具有高硏磨選擇比的材質作爲鑲嵌結構的介電層。由於 此介電層本身即與金屬層具有高硏磨選擇比,因此不須在 介電層上額外再形成一層硏磨終止層或是帽蓋層,而能夠 縮減製程的步驟。 而且,由於本發明所使用的介電層對金屬層具有高硏 磨選擇比,亦即是介電層的被硏磨移除率小於金屬層的被 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公餐) (請先閱讀背面之注咅?事項再填寫本頁) . --線· 經濟部智慧財產局員工消費合作社印製 經濟部智慧財產局員工消費合作社印製 483108 7362twf.doc/006 A7 _B7___^___ 五、發明說明(3 ) 硏磨移除率,而且高於習知所使用的硏磨終止層對金屬層 的硏磨選擇比,因此,在以化學機械硏磨法對金屬層進行 硏磨至介電層時,不會產生介電層的流失、金屬層的腐蝕 以及碟化效應等問題。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: 圖式之簡單說明: 第1A圖至第1D圖是依據本發明較佳實施例之一種雙 重金屬鑲嵌結構的製造流程的剖面示意。 圖式之標示說明: 100 :基底 - 102 :導電區域 104 :介電層 106 ··開口 108 :金屬層 l〇8a :導體層 實施例 第1A圖至第1D圖是依據本發明較佳實施例之一種雙 重金屬鑲嵌結構的製造流程的剖面示意圖。 首先,請參照第1A圖,首先提供一基底100,在基 底100上已形成有導電區域102。接著,在基底100上形 5 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公釐) (請先閱讀背面之注意事項再填寫本頁) 訂---------線 __ 483108 7 362twf. doc/ 0 06 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明(+ ) 成一層介電層104,其中此介電層104的材質爲氮氧矽-化 _,且此氮氧砂化物在673nm波長的光照射下具有1·55至 , 1.74左右的反射率,並且,此氮氧矽化物所形成的介電層 104與後續製程預定形成的金屬層之間具有高硏磨選擇 比。形成此介電層的方法例如是使用電漿增強型化學氣相 沈積法(Plasma Enhanced Chemical Vapor Deposition, PECVD),其中施行此電漿增強型化學氣相沈積法例如是 在攝氏200度至攝氏600度左右的溫度,以0.1托至5托 左右的操作壓力,並以50W至1000W左右的操作功率, 通入矽甲烷、一氧化二氮以及氮氣爲製程氣體而形成,且 矽甲烷/一氧化二氮的比値爲0.05至1.5左右,氮氣的流量 爲 10 seem 至 1000 seem 左右。 接著,請參照第1B圖,在介電層104中形成露出下 方導電區102的開口 106,此開口 106視不同製程可爲接 觸窗開口、介層窗開口、導線溝渠亦或是鐵嵌開口其中之 一。形成此開口 106的方法例如是在介電層1〇4上形成圖 案化之光阻層(未圖示),再以光阻層爲罩幕,以非等向性 蝕刻法去除部份介電層104。 接著,請參照第1C圖,在基底1〇〇上形成一層金屬 層108,且此金屬層108塡滿開口 1〇6。其中金屬層ι〇6的 材質例如是選自鋁 '銅、鎢金屬所組之族群其中之一,形 成此金屬層108的方法例如是化學氣相沈積法或是直流磁 控濺鍍法。 接著,請參照第1D圖,去除部份的金屬層ι〇8,以 (請先閱讀背面之注意事項再填寫本頁) -裝 . .線_ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 483108 7362twf.d〇c/0〇6 pj ___ B7 五、發明說明(<) 形成塡滿開口 106的導體層l〇8a。其中形成導體層108a 的方法例如是使用化學機械硏磨法,以介電層104的表面 爲硏磨終止層,去除開口 106之外的金屬層108。在此化 學機械硏磨步驟中,由於本發明所使用的介電層104與金 屬層108之間具有高硏磨選擇比,亦即是介電層1〇4的被 硏磨移除率小於金屬層108的被硏磨移除率,因此,在以 化學機械硏磨法對金屬層進行硏磨至介電層時,不會產生 介電層的流失、金屬層的腐蝕以及碟化效應等問題。 綜上所述,本發明的重要特徵爲使用一種與金屬層具 有高硏磨選擇比的材質作爲鑲嵌結構的介電層。由於此介 電層本身即與金屬層之間具有高硏磨選擇比,因此不須在 介電層上額外再形成硏磨終止層或是帽蓋層,而能夠縮減 製程的步驟。 而且’由於本發明所使用的介電層對金屬層具有高_ 磨選擇比’亦即是介電層的被硏磨移除率小於金屬層的被 硏磨移除率,並且高於習知所使用的硏磨終止層對金屬層 的硏磨選擇比,因此,在以化學機械硏磨法對金屬層進行 硏磨至介電層時,不會產生介電層的流失、金屬層的腐蝕 以及碟化效應等問題。 經濟部智慧財產局員工消費合作社印製 雖然本發明已以一較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍內,當可作不同之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 7 本紙張尺度適用中國國家標準(CNS)A4規格(21〇 X 297公爱)— — — — — —— · 1111111! I 0 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 483108 7362twf.doc〆006 5. The effect of the invention (2) density), and This causes problems such as loss of the material of the dielectric layer, Erosion of the metal layer, and Dishing effect. Therefore, the present invention proposes a method for manufacturing a damascene structure, which can use a material having a high honing selection ratio with the metal layer as the dielectric layer of the damascene structure, without the need to additionally form a honing stop layer. The invention provides a method for manufacturing a mosaic structure, which can avoid problems such as loss of dielectric layer, corrosion of metal layer, and dishing effect when honing a metal layer by a chemical mechanical honing method. The invention provides a method for manufacturing a damascene structure. This method provides a substrate, and then forms a dielectric layer on the substrate. The material of the dielectric layer is oxynitride, and the oxynitride has a wavelength of 673 nm. It has a reflectance of about 1.55 to L74 under light irradiation, and has a high honing selection ratio between this dielectric layer and a metal layer scheduled to be formed in subsequent processes. Then, an opening is formed in the dielectric layer. The opening may be a contact window opening, a dielectric window opening, a wire trench, or a mosaic opening, depending on the process. Then, a metal layer filled with openings is formed on the substrate. Thereafter, the surface of the dielectric layer is used as a honing stop layer using a chemical mechanical honing method to remove the metal layer outside the opening. From the above, it is known that an important feature of the present invention is to use a material having a high honing selection ratio with the metal layer as the dielectric layer of the mosaic structure. Since the dielectric layer itself has a high honing selection ratio with the metal layer, it is not necessary to form an additional honing stop layer or a capping layer on the dielectric layer, and the process steps can be reduced. Moreover, since the dielectric layer used in the present invention has a high honing selectivity ratio to the metal layer, that is, the honing removal rate of the dielectric layer is less than that of the metal layer, the Chinese paper standard (CNS) A4 is applicable for this paper size. Specification (210 X 297 meals) (Please read the note on the back? Matters before filling out this page) .doc / 006 A7 _B7 ___ ^ ___ V. Description of the invention (3) The honing removal rate is higher than the honing selection ratio of the conventional honing stop layer to the metal layer. Therefore, chemical mechanical honing When honing the metal layer to the dielectric layer, no problems such as loss of the dielectric layer, corrosion of the metal layer, and dishing effect will occur. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is described below in detail with the accompanying drawings as follows: Brief description of the drawings: FIG. 1A FIG. 1 to FIG. 1D are schematic cross-sectional views illustrating a manufacturing process of a dual metal damascene structure according to a preferred embodiment of the present invention. Description of the drawings: 100: substrate-102: conductive region 104: dielectric layer 106 · opening 108: metal layer 108a: conductor layer embodiment Figs. 1A to 1D are preferred embodiments according to the present invention A schematic cross-sectional view of a manufacturing process of a dual metal mosaic structure. First, referring to FIG. 1A, a substrate 100 is first provided, and a conductive region 102 has been formed on the substrate 100. Next, form 5 paper sizes on the substrate 100 to apply Chinese National Standard (CNS) A4 (210 x 297 mm) (Please read the precautions on the back before filling this page) Order --------- __ 483108 7 362twf. Doc / 0 06 A7 B7 Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (+) The dielectric layer 104 is made of silicon oxynitride- And the oxynitride has a reflectance of about 1.55 to about 1.74 under light irradiation at a wavelength of 673 nm, and the dielectric layer 104 formed by the oxynitride and a metal layer scheduled to be formed in subsequent processes There is a high honing selection ratio between. A method for forming the dielectric layer is, for example, plasma enhanced chemical vapor deposition (PECVD). The plasma enhanced chemical vapor deposition is performed at a temperature of 200 ° C to 600 ° C. The temperature is about 0.1 degrees Celsius, and the operating pressure is about 0.1 Torr to about 5 Torr, and the operating power is about 50W to 1000W, and it is formed by introducing silicon dioxide, nitrous oxide, and nitrogen as the process gas. The ratio of nitrogen is about 0.05 to 1.5, and the flow rate of nitrogen is about 10 seem to 1000 seem. Next, referring to FIG. 1B, an opening 106 is formed in the dielectric layer 104 to expose the lower conductive region 102. The opening 106 may be a contact window opening, a dielectric window opening, a wire trench, or an iron-embedded opening depending on different processes. one. The method of forming the opening 106 is, for example, forming a patterned photoresist layer (not shown) on the dielectric layer 104, and then using the photoresist layer as a mask to remove a part of the dielectric by anisotropic etching. Layer 104. Next, referring to FIG. 1C, a metal layer 108 is formed on the substrate 100, and the metal layer 108 fills the opening 106. The material of the metal layer 106 is, for example, one selected from the group consisting of aluminum, copper, and tungsten. The method of forming the metal layer 108 is, for example, a chemical vapor deposition method or a DC magnetron sputtering method. Then, please refer to Figure 1D to remove some metal layers ι〇8 (please read the precautions on the back before filling out this page) -packing. .Line_ This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 483108 7362twf.doc / 0〇6 pj ___ B7 V. Description of the invention (<) A conductive layer 108a is formed to fill the opening 106. The method for forming the conductor layer 108a is, for example, using a chemical mechanical honing method, and using the surface of the dielectric layer 104 as a honing stop layer, removing the metal layer 108 outside the opening 106. In this chemical mechanical honing step, since the dielectric layer 104 and the metal layer 108 used in the present invention have a high honing selection ratio, that is, the honing removal rate of the dielectric layer 104 is less than that of the metal. The removal rate of the layer 108 by honing. Therefore, when the metal layer is honed to the dielectric layer by a chemical mechanical honing method, the loss of the dielectric layer, the corrosion of the metal layer, and the dishing effect will not occur. . In summary, an important feature of the present invention is to use a material having a high honing selection ratio with the metal layer as the dielectric layer of the mosaic structure. Since the dielectric layer itself has a high honing selectivity between the metal layer, it is not necessary to additionally form a honing stop layer or a cap layer on the dielectric layer, and the process steps can be reduced. And 'because the dielectric layer used in the present invention has a high _ grinding selection ratio', that is, the removal rate of the dielectric layer by honing is less than the removal rate of the metal layer by honing, and is higher than the conventional The honing selection ratio of the used honing stop layer to the metal layer. Therefore, when the metal layer is honed to the dielectric layer by the chemical mechanical honing method, the loss of the dielectric layer and the corrosion of the metal layer will not occur. As well as the dishing effect. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Different modifications and retouching can be made, so the scope of protection of the present invention shall be determined by the scope of the attached patent application. 7 This paper size applies to China National Standard (CNS) A4 (21〇 X 297 public love)

Claims (1)

483108 經濟部智慧財產局員工消費合作社印製 A8 B8 7362twf.d〇c/006 C8 D8 六、申請專利範圍 1. 一種鑲嵌結構的製造方法,該製造方法包括下列步 —- 驟·· 提供一基底; 在該基底上形成一介電層,其中該介電層的材質爲氮 氧矽化物,且該介電層的反射率爲1.55至1.74左右; 在該介電層中形成一開口; 在該介電層上形成塡滿該開口之=金屬層;以及 以該介電層表面爲硏磨終點,以化學機械硏磨法移除 該開口之外之該金屬層,其中該介電層的被硏磨移除率小 於該金屬層的被硏磨移除率。 2. 如申請專利範圍第1項所述之鑲嵌結構的製造方 法,其中形成該介電層的方法包括一電漿增強型化學氣相 沈積法,且該電漿增強型化學氣相沈積法所使用之一製程 氣體包括矽甲烷、一氧化二氮以及氮。 3. 如申請專利範圍第2項所述之鑲嵌結構的製造方 法,其中該製程氣體的矽甲烷/一氧化二氮的比値爲〇.〇5 至1.5左右。 4. 如申請專利範圍第2項所述之鑲嵌結構的製造方 法,其中該製程氣體的氮氣的流量爲1〇 seem至1000 seem 左右。 5. 如申請專利範圍第2項所述之鑲結構的製造方 法,其中施行該電漿增強型化學氣相沈積法的溫度爲攝氏 200度至攝氏600度左右。 6. 如申請專利範圍第2項所述之鑲嵌結構的製造方 (請先閱讀背面之注意事項再填寫本頁) —訂---------線丨. 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 3 62twf. do c/ 006 A8 B8 C8 D8 中之 、申請專利範圍 法,其中施行該電漿增強型化學氣相沈積法的操作壓力爲 0·1托至5托左右。 ^ Μ 7·如申請專利範圍第2項所述之鑲嵌結構的製造方 法,其中施行該電漿增強型化學氣相沈積法的操作功率爲 50W至i〇〇〇w左右。 十川、 8·如申請專利範圍第丨項所述之鑲嵌結構的製造方 法,其中該金屬層的材質係選自銅、鋁、鎢所組之其 9.一種接觸窗/介層窗的製查」友法,該製造方法包括下 列步驟: 提供一基底; 在該基底上形成一介電層,其中該介電層的材質爲氮 氧砂化物,且該介電層的反射率爲155至174左右;; 在該介電層中形成一介層窗/接觸窗開口; 在該介電層上形成塡滿該介層窗/接觸窗開口之一金 屬層;以及 以該介電層表面爲硏磨終點,以化學機械硏磨法移除 該介層窗/接觸窗開口之外之該金屬層。 10·如申請專利範圍第9項所述之接觸窗/介層窗的製 造方法,其中形成該介電層的方法包括一電漿增強型化學 氣相沈積法,且該電獎增強型化學氣相沈積法所使用之一 製程氣體包括矽甲烷、一氧化二氮以及氮。 11·如申請專利範圍第10項所述之接觸窗/介層窗的製 造方法,其中該製程氣體的矽甲烷/一氧化二氮的比値爲 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 一51,· n 1 n ·1 ϋ H ϋ I n I n I n ί I n n n l I I I n I I ϋ n n n 1 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 483108 經濟部智慧財產局員工消費合作社印制π A8 / 门 0 6 B8 7362twf.d〇c/°Ub C8 _ D8 六、申請專利範園 0.05至1.5左右。 12. 如申請專利範圍第10項所述之接觸窗/介層窗的製 造方法,其中該製程氣體的氮氣的流量爲1〇 sccm至1000 seem左右° 13. 如申請專利範圍第1〇項所述之接觸窗/介層窗的製 造方法,其中施行該電漿增強型化學氣相沈積法的溫度爲 攝氏200度至攝氏600度左右;操作壓力爲〇.;[托至5托 左右;操作功率舄50W至l〇〇〇W左右。 14·如申請專利範圍第9項所述之接觸窗/介層窗的製 造方法,其中該金屬層的材質係選自銅、鋁、鎢所組之族 群其中之一。 15.—種金屬導線的製造方法,該製造方法包括下列步 驟: 提供一基底; 在該基底上形成一介電層,其中該介電層的材質爲氮 氧较化物’且該介電層的反射率爲1.55至1.74左右; 在該介電層中形成一導線溝渠; 在該介電層上形成塡滿該導線溝渠之一金屬層;以及 以該介電層表面爲硏磨終點,以化學機械硏磨法移除 該導線溝渠之外之該金凰層。 如申請專利範圍第15項所述之金屬導線的製造方 法’其中形成該介電層的方法包括一電漿增強型化學氣相 沈積法,且該電獎增強型化學氣相沈積法所使用之一製程 氣體包括矽甲烷、一氧化二氮以及氮。 10 本紙張尺度適用中國國家標準(CNS)A4規格⑵g χ观公餐) (請先閱讀背面之注意事項再填寫本頁) •雄 n ϋ n n n n n 一一^t n «1» n I an 1 n I I ϋ n ϋ I n t ϋ I n an ff— n ϋ n ϋ ϋ n n ϋ n ϋ . 483108 A8 B8 7 3 62twf.doc/ 0 0 6_g|_六、申請專利範圍 17. 如申請專利範圍第16項所述之金屬導線的製造方 法,其中該製程氣體的矽甲烷/一氧化二氮的比値爲〇·〇5 至1.5左右。 18. 如申請專利範圍第16項所述之金屬導線的製造方 法,其中該製程氣體的氮氣的流量爲1〇 seem至1000 seem 左右。 19. 如申請專利範圍第16項所述之金屬導線的製造方 法,其中施行該電漿增強型化學氣相沈積法的溫度爲攝氏 200度至攝氏600度左右;操作壓力爲0.1托至5托左右; 操作功率爲50W至1000W左右。 20. 如申請專利範圍第15項所述之金屬導線的製造方 法,其中該金屬層的材質係選自銅、鋁、鎢所組之族群其 中之一。 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 I · n n n n n I n I n n I n i.— I I I I I I ϋ «I n n n n ϋ ϋ n i I ϋ n ϋ n ϋ n «I n n I 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)483108 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A8 B8 7362twf.doc / 006 C8 D8 VI. Scope of Patent Application 1. A manufacturing method of mosaic structure, the manufacturing method includes the following steps:-Provide a substrate Forming a dielectric layer on the substrate, wherein the material of the dielectric layer is oxynitride, and the reflectivity of the dielectric layer is about 1.55 to 1.74; forming an opening in the dielectric layer; A metal layer filled with the opening is formed on the dielectric layer; and using the surface of the dielectric layer as a honing end point, the metal layer outside the opening is removed by a chemical mechanical honing method, in which the dielectric layer is The honing removal rate is less than the honing removal rate of the metal layer. 2. The method for manufacturing a mosaic structure according to item 1 of the scope of patent application, wherein the method for forming the dielectric layer includes a plasma enhanced chemical vapor deposition method, and the plasma enhanced chemical vapor deposition method One of the process gases used includes silicon methane, nitrous oxide, and nitrogen. 3. The manufacturing method of the mosaic structure according to item 2 of the scope of the patent application, wherein the ratio of silicon dioxide / nitrogen monoxide of the process gas is about 0.05 to 1.5. 4. The method of manufacturing an inlaid structure as described in item 2 of the scope of patent application, wherein the flow rate of nitrogen gas of the process gas is about 10 seem to 1000 seem. 5. The method of manufacturing a mosaic structure according to item 2 of the scope of patent application, wherein the temperature of the plasma enhanced chemical vapor deposition method is 200 ° C to 600 ° C. 6. The manufacturer of the mosaic structure as described in item 2 of the scope of patent application (please read the precautions on the back before filling this page) —Order --------- Line 丨. This paper size applies to China Standard (CNS) A4 specification (210 X 297 mm) 3 62twf. Do c / 006 A8 B8 C8 D8, the patent application method, in which the operating pressure of the plasma enhanced chemical vapor deposition method is 0 · 1 to 5 torr. ^ M7. The method for manufacturing a mosaic structure according to item 2 of the scope of the patent application, wherein the operation power of the plasma enhanced chemical vapor deposition method is about 50W to 1000w. Shichuan, 8 · The method for manufacturing a mosaic structure as described in item 丨 of the patent application scope, wherein the material of the metal layer is selected from the group consisting of copper, aluminum, and tungsten You method, the manufacturing method includes the following steps: providing a substrate; forming a dielectric layer on the substrate, wherein the material of the dielectric layer is oxynitride, and the reflectivity of the dielectric layer is 155 to 174 Left and right; forming a dielectric window / contact window opening in the dielectric layer; forming a metal layer on the dielectric layer that fills the dielectric window / contact window opening; and honing the surface of the dielectric layer At the end point, the metal layer outside the opening of the via / contact window is removed by chemical mechanical honing. 10. The method for manufacturing a contact window / interlayer window according to item 9 in the scope of the patent application, wherein the method for forming the dielectric layer includes a plasma enhanced chemical vapor deposition method, and the electric award enhanced chemical gas One of the process gases used in the phase deposition method includes silicon methane, nitrous oxide, and nitrogen. 11. The method for manufacturing a contact window / interlayer window as described in item 10 of the scope of patent application, wherein the ratio of silicon dioxide / nitrogen monoxide of the process gas is (please read the precautions on the back before filling this page) ) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 51, · n 1 n · 1 ϋ H ϋ I n I n I n ί I nnnl III n II ϋ nnn 1 This paper standard applies to China National Standard (CNS) A4 (210 X 297 mm) 483108 Printed by π A8 / Gate 0 6 B8 7362twf.d〇c / ° Ub C8 _ D8 by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 6. Apply for a patent range of 0.05 to 1.5. 12. The method for manufacturing a contact window / interlayer window as described in item 10 of the scope of patent application, wherein the flow rate of nitrogen gas of the process gas is about 10 sccm to about 1000 seem. 13. As described in item 10 of the scope of patent application The method for manufacturing a contact window / interlayer window, wherein the temperature of the plasma enhanced chemical vapor deposition method is 200 degrees Celsius to about 600 degrees Celsius; the operating pressure is 0; [To about 5 Torr; operation The power is about 50W to 1000W. 14. The method for manufacturing a contact window / interlayer window according to item 9 of the scope of the patent application, wherein the material of the metal layer is one selected from the group consisting of copper, aluminum, and tungsten. 15. A method of manufacturing a metal wire, the manufacturing method comprising the steps of: providing a substrate; forming a dielectric layer on the substrate, wherein the material of the dielectric layer is a nitrogen oxide compound and the dielectric layer is The reflectivity is about 1.55 to 1.74; a wire trench is formed in the dielectric layer; a metal layer filled with the wire trench is formed on the dielectric layer; and the surface of the dielectric layer is used as a finishing point, and The mechanical honing method removes the golden phoenix layer outside the wire trench. The method for manufacturing a metal wire according to item 15 of the scope of the patent application, wherein the method for forming the dielectric layer includes a plasma enhanced chemical vapor deposition method, and the method used in the electric award enhanced chemical vapor deposition method A process gas includes silicon methane, nitrous oxide, and nitrogen. 10 This paper size is in accordance with Chinese National Standard (CNS) A4 size ⑵g χ Viewing the public meal) (Please read the notes on the back before filling out this page) • Xiong n nn nnnnn one by one ^ tn «1» n I an 1 n II ϋ n ϋ I nt ϋ I n an ff— n ϋ n ϋ ϋ nn ϋ n ϋ. 483108 A8 B8 7 3 62twf.doc / 0 0 6_g | _ 六 、 Applicable patent scope 17. Such as the scope of patent application No. 16 The method for manufacturing a metal wire, wherein the ratio of silicon dioxide / nitrogen monoxide of the process gas is about 0.05 to 1.5. 18. The method for manufacturing a metal wire according to item 16 of the scope of the patent application, wherein the flow rate of nitrogen gas in the process gas is about 10 seem to 1000 seem. 19. The method for manufacturing a metal wire according to item 16 of the scope of patent application, wherein the temperature of the plasma enhanced chemical vapor deposition method is 200 ° C to 600 ° C; the operating pressure is 0.1 to 5 Torr Left and right; Operating power is about 50W to 1000W. 20. The method for manufacturing a metal wire according to item 15 of the scope of patent application, wherein the material of the metal layer is one selected from the group consisting of copper, aluminum, and tungsten. (Please read the notes on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs I · nnnnn I n I nn I n i.— IIIIII ϋ «I nnnn ϋ ϋ ni I ϋ n ϋ n ϋ n «I nn I This paper size applies to Chinese National Standard (CNS) A4 (210 X 297 mm)
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