TW482960B - Method for preventing process contradiction between each processors in a multi-processor computer - Google Patents

Method for preventing process contradiction between each processors in a multi-processor computer Download PDF

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TW482960B
TW482960B TW89112427A TW89112427A TW482960B TW 482960 B TW482960 B TW 482960B TW 89112427 A TW89112427 A TW 89112427A TW 89112427 A TW89112427 A TW 89112427A TW 482960 B TW482960 B TW 482960B
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processor
interrupt
processors
flag
lock
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TW89112427A
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Chinese (zh)
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Kuang-Shin Lin
Tong S Chen
Jen-Yu Wang
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Inventec Corp
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Abstract

The present invention uses a semaphore as the locking flag, which is configured in the code segment of the process control table belonging to each processor in a multi-processor computer for identifying whether there is a processor occupying the system resource currently. If there is no processor occupying the system resource, a processor can be instructed to execute the interrupt handling procedure after setting the locking flag. After completing the execution, it will release the locking flag, so that the other processors can use the system resource and regularly execute the interrupt handling procedures during receiving the interrupt signal sequentially. Therefore, when measuring the number of processors in the multi-processor computer, the present invention can effectively prevent the process contradiction between processors.

Description

482960 案號 89112427 年 月 曰 修正 五、發明說明(1) 發明背景: η 按,在現有電腦作業系統(Op era ting System)之技術 ,煩中,D0S作業系統係屬一種單行程且獨佔資源之單工系 統,該系統在其運行上只能有一個行程(P r 〇 c e s s ),故在 異|單一處理器之環境下,DOS作業系統中不可能有一個以上 之行程同時執行。若有多個行程提交該系統進行處理,即 年需依靠排班符列(Scheduling Queues)之方式,依序執行 賢㈣° 傳統上’在對一台具有多處理器計算機中之處理器數 ,為目進行測量時,一般係令每個處理器均執行一行程 4|(pr〇Cess),同時分別在記憶體中寫入—個標記,以表示 該處理器之存在。但在此種傳統量測過程中,如何能令該 等處理器均能正確地執行每個行程,令其在分別執行所屬 7程時,不致發生衝突,且在所有行程被執行完畢後,仍 此保迅DOS作業系統之正常運行,貝,丨是目前在祕作業系統 ‘下’對多處理器計算機中之處理器數目進行測量時,尚無 法有效角牛決之問題。 發明綱要: / 進一 數變 否有 源, ^鑑於傳統上對多處理器計算機中多處理器數目進行 夏測日守,易發生多處理器行程衝突之諸多缺點,發明人乃 ^研究改良,研發出本發明,切明主要係藉由一整 =(s㈣aph〇re),以其作為鎖定標諸,標識出目前是 处理正在佔用系統貢源,若無處理器佔用系統資 鎖定標諸置入後,再令—處理器執行其中斷482960 Case No. 89112427 Rev. V. Description of the invention (1) Background of the invention: η Press, in the existing computer operating system (Op era ting System) technology, the DOS operating system is a single-stroke and exclusive resource Simplex system, the system can only have one stroke (Prcess) in its operation, so under the environment of a single processor, it is impossible to have more than one stroke executed simultaneously in the DOS operating system. If there are multiple itineraries submitted to the system for processing, that is to say, it is necessary to rely on Scheduling Queues in order to execute the order. Traditionally, the number of processors in a multi-processor computer, When measuring for the purpose, it is generally required that each processor execute a stroke of 4 | (pr0Cess), and at the same time write a mark in the memory to indicate the existence of the processor. However, in this traditional measurement process, how can these processors execute each trip correctly, so that they will not conflict when they execute the 7 trips respectively, and after all the trips have been executed, The normal operation of this security DOS operating system is a problem in which the number of processors in a multi-processor computer is currently not measured under the secret operating system. Outline of the invention: / Incremental or non-active, ^ In view of the traditional short-term monitoring of the number of multi-processors in multi-processor computers, prone to the many shortcomings of multi-processor stroke conflicts, the inventor researched and improved and developed According to the present invention, it is clear that by using a whole = (s㈣aph〇re) as a lock mark, it is identified that the system is currently occupying the source of the system. If no processor occupies the system resources, the lock mark is placed. Reorder-the processor executes its interrupt

482960 正 有 無 、文482960 Zheng Yes No, Wen

I tfo 是月 年 曰 案號 89112427 五、發明說明(2) 服:務常式;俟執行完畢後 理器能夠依序使用系統資 本發明之主要目的, 定標誌,以保證一電腦中 轉Λ>〗屬行程,令各該行程間不 員^後,即釋放該鎖定標誌 |他處理器能夠依序使用系 >並確保多處理器模塊執行 于正常運行。 本發明之另一目的, 處理器所屬之行程控制 管Iff不隨行程之執行而改變, 之常式前,可將其數據段和 將保存之地址儲存在該代 、成中斷處理後,能正確地 前之狀態。 修正 ’再釋放該鎖定標誌,俾其他々 源’執行其中斷服務常式。~ 係透過設置一整數變量,作為 之多個處理器,可依序執行其所 致發生衝突,當一處理器行程社 ’並回復到中斷前之狀態,.俾Z 統貧源,執行其中斷服務常式了 完畢後,DOS作業系統仍能維持 係將該整數變量標誌設置於各該 表之代碼段内,因各該代碼段係 故各该處理器在執行該中斷服務 堆棧段内之資料先予以保存,並 碼段内,以確保各該處理器在完 查找到該等資料,並回復到中斷 詳細說明 安裝 )之責傳 器透 遞至 理。 按, 有一 主處 遞通 過系 所指 當該 在符 個含 理器 4吕訊 統總 定之 種多 合I n t e 1架構之多處理器主機板上,一般均 有局部高級可編程中斷控制器(丨〇cai Apic ,忒主處理态主要係於該多處理器系統間負 息及命令,當該主處理器接收到由其他處理 ::發^之中斷訊號時,會將該中斷訊號傳 輔處理器,俾各該輔處理器對中斷進行處 處理器主機板上之D〇s作業系統接收到一特 482960 案號 89112427 ^—月 日__正 五、·發明說明(3). 殊之中斷啟始(start-u 觸發該特殊之中 務常式(service 訊號,並呼叫特 修煩 杳讀且將其目前之狀I tfo is the monthly case number 89112427 V. Description of the invention (2) Service: routine; 后 After the implementation, the processor can sequentially use the main purpose of the system capital invention, set the mark to ensure a computer transfer Λ > 〖It is a trip, so that after the absence of each trip ^, the lock flag is released | Other processors can use the system in sequence> and ensure that the multi-processor module executes normally. Another object of the present invention is that the stroke control tube Iff of the processor does not change with the execution of the stroke. Before the routine, the data segment and the saved address can be stored in the generation and can be processed correctly after interrupt processing. The state before the ground. Modified ‘Release the lock flag, 俾 other 々 sources’ to execute its interrupt service routine. ~ By setting an integer variable, as a plurality of processors, the conflicts caused by them can be executed in sequence. When a processor travels and returns to the state before the interruption, the system will execute the interruption if it is poor. After the service routine is completed, the DOS operating system can still maintain the integer variable flag in the code segment of each table. Because each code segment is the data in the processor executing the interrupt service stack segment First save it and put it in the code segment to ensure that each processor finds such information after completion and returns to the processor responsible for interrupting the detailed instructions for installation). Press, there is a main office to pass through when referring to a multi-processor I nte 1 multi-processor motherboard with a general controller 4 and a general-purpose processor. Generally, there are local advanced programmable interrupt controllers (丨 〇cai Apic, the main processing state is mainly related to negative interest and commands between the multiprocessor systems. When the main processor receives an interrupt signal sent by other processing ::, it will pass the interrupt signal to auxiliary processing. Device, each of the sub-processors to the interrupt where the Dos operating system on the processor's motherboard received a special 482960 case number 89112427 ^-month day __ positive five, · Description of the invention (3). Special interrupt Start (start-u triggers this special service signal, and calls the special trouble to read and read its current status

I 統下,同 r q 時刻 無明 ‘示即藉由設置一整 t鎖定標誌標識出 執:行該中斷處理 該鎖定標誌置入 内 客 ;ΐέ f jJ: 月 t 所 Vi 之 執行完畢後’再 使用系統資源’ 在本發明中 均有其各別應執 中,均對應者一 斷,令 rout i 定之中 態儲存 僅允許 數變量 目前是 程序, 後,令 釋放該 執行其 ,由於 行之行 行程控 P)訊號時,其上之該主處理器將會 各該輔處理器能依序執行一中斷服 ne),俾該服務常式去檢查該中斷 斷處理程式,對該中斷進行處理, 至一記憶體中。由於在D0S作業系 一處理杰執行遠服務常式,本發明 ’作為一鎖定標誌之方法,利用該 否已有處理器正在佔用系統資源, 右無處理器佔用糸統資源,即可將 一處理器執行該中斷服務常式;俟 鎖定標誌,俾其他處理器能夠依序 中斷服務常式。 該多處理器主機板上之各處理器, (process) ’各呑亥4亍程於記憶體 制表(pr〇cess Cοntrο 1 b1〇ck), 各該行程控制表之數據段及堆棧(Stack)段互不相同,故 若該整數變量標諸係被設計置放於該數據段内,由於該數 據段内之資料,將因行程之執行而改變,令其它處理器找 不到該標誌,而導致系統崩潰。因此,本發明係將該整數 變量標誌設計置放於各該行程控制表之代碼段内,該代碼 段係不隨行程之執行而改變。如此,各該處理器在執行該 中斷服務常式前,可將該數據段和堆棧段内之資料先予以 保存,並將保存之地址儲存在該代碼段内,以確保各該處 理器在完成中斷處理後,能正確地查找到該等資料,並回 復到中斷前之狀態。Under the I system, if there is no indication at the same time at rq, the execution is performed by setting a complete lock flag: perform the interrupt processing and the lock flag is placed in the guest; press f jJ: after the execution of Vi in month t is completed, then use it again In the present invention, each of the system resources has its own implementation, and all of them should be interrupted, so that rout i can only be stored in a neutral state, and only a few variables are currently programs. After that, it should be released to execute them. When the program-controlled P) signal, each of the main processors on it can sequentially execute an interrupt service (ne). The service routine checks the interrupt handler and processes the interrupt. In memory. Since the D0S operation is a processing routine that executes remote service routines, the present invention, as a method of locking a flag, utilizes whether or not an existing processor is occupying system resources. If no processor is occupying system resources, a process can be processed. The processor executes the interrupt service routine; 俟 lock the flag, and other processors can interrupt the service routine in sequence. Each processor on the multi-processor motherboard has (process) 4 processes in a memory system table (pr0cess C1ntr 1 b1ck), data sections and stacks of the stroke control table (stack) The segments are different from each other, so if the integer variable labels are designed to be placed in the data segment, the information in the data segment will be changed due to the execution of the trip, so that other processors cannot find the flag, and Cause the system to crash. Therefore, the present invention is to place the integer variable flag design in the code segment of each of the trip control tables, and the code segment does not change with the execution of the trip. In this way, each processor can save the data in the data segment and the stack segment before executing the interrupt service routine, and store the saved address in the code segment to ensure that each processor is completed. After the interruption process, the data can be correctly found and restored to the state before the interruption.

.第6頁 482960 89112427 年 月一 修」 曰 五、發明說明(4) 、本發明中,當該多處理器主機板被開機,並完成D0S 作業系統之啟始(b〇〇t — up)程式後,參閱第1圖所示,系統 係先對主處理器完成初始化狀態設定(1 0 1);並由該主處 理裔設定各該輔處理器進行中斷之入口地址(丨〇2);嗣, 對各該輔處理器依序發出中斷訊號(103);各該輔處理 器在接收到一中斷訊號時,將調用記憶體中(位於40 : 6 7 ) ||之一中斷向量(interrupt vector),以依據該中斷向量内 所提供之中斷服務常式(Service R〇utine)之地址,執 程序(1°4)二故,各輔處理器所執行之對應中 f之該ΐ: : i:t:e’rr二置放f ?於記憶體中40 :6 7地址 ,,rj ( ter UPt VeCt〇r )内,俾各該輔處理哭的 !1能透過該中斷向量,找到對應之中斷服務 ::. Page 6 482960 89112427 First repair "fifth, invention description (4), in the present invention, when the multi-processor motherboard is turned on and completes the start of the DOS operating system (b〇〇—up) After the program, refer to Figure 1, the system first completes the initial state setting for the main processor (1 0 1); and the main processor sets the entry address of each sub-processor to interrupt (丨 〇2); Then, an interrupt signal is sequentially sent to each of the sub-processors (103); when each of the sub-processors receives an interrupt signal, it will call one of the interrupt vectors (located in 40: 6 7) || vector) to execute the program (1 ° 4) according to the address of the interrupt service routine (Service Rooutine) provided in the interrupt vector. Therefore, the corresponding f in the corresponding execution of each auxiliary processor: i: t: e'rr put f? in the memory 40:67 address, rj (ter UPt VeCt〇r), each of the auxiliary processing cry! 1 can find the corresponding through the interrupt vector Out of service ::

。之"完成對該中斷之處理;各該輔處理器係利用:: 所设β十之鎖定標誌,標識出目前已佔用系統資 X 二斷處理程序之狀態,俟執行完畢後’:、再::: 鎖定標4(105),並等待下—次之 f冉釋放该 即可令其他輔處理器依序使用$ ^ , ),如此, 常式。 $使用糸統貧源,執行該中斷服務 在本發明中,復參閱第$ 收到一中斷訊號時,需將立 各4辅處理器接 體中(107),俾在各該處理器完成 子 曰存屺憶 放該鎖定標誌後,該主處理哭、μ 断之處理,並釋 中之數據(108),正確地查拍根據保存於該暫存記憶體 態資料,以確保各該辅處理哭该輔處理器中斷前之狀 復到中斷前之狀態(1 〇 9 )。的70成中斷處理後,仍能回 482960. &Quot; Complete the processing of the interrupt; each of the auxiliary processors uses :: The lock flag of β ten is set to identify the status of the currently occupied system resources X interrupt processing program, after the execution is completed ::, then ::: Lock the mark 4 (105), and wait for the next-f next release to make other coprocessors use $ ^,) in sequence, so, the routine. $ Use the system's poor source to perform the interrupt service. In the present invention, please refer to $. When an interrupt signal is received, it is necessary to set up each of the 4 coprocessors (107), and complete the subprocessors in each of the processors. After the memory lock puts the lock mark, the main process cries, μ breaks the process, and interprets the data (108), and correctly checks and records according to the physical data stored in the temporary memory to ensure that the auxiliary processes cry. The status of the auxiliary processor before the interrupt is restored to the state before the interrupt (109). 70% of the interrupt processing can still return to 482960

在本發.明之前述處理程序中’參見第2圖所示 該主 處理器係依下列步驟,進行處理 ,首先,判斷該主處理器當前之模式,是否屬實模式 :煩、real mode) (201 ),若當前模式為保護模式' Μ 變 更 % !|(pi:〇tecti〇n mode),結束處理;否則,判斷該主處理器 |毳之識別號(ID),是否為Pentlum以上之處理器(2〇 』示否,則結束處理; f 若為Pentium以上之處理器’則將當前之操作模式切 广換到保護模式(2 0 3 ) ’並搜索浮點指針(^丨〇 a七 /(I 予 修 正 pointer),找到本地之高級可編程中斷控制器(i〇cai APIC)之基底地址(base address) (2〇4 再於該地址處分別設置任務優先級暫存器 嗣 之 …•夂几、叹节 <予裔 (register)、偽向量暫存器、目的暫存器及目的格 器(2 0 5 );並為每個待處理之輔處理器設定一對應之^子 量,並將該變量值設為0 ’同時保存其數據段(2〇6\ ;欠 再為每個處理器申請數據使用空間及4K頁空間,1由 之4K頁空間是支持每個處理器運行時所需之記憶體空^ ( 2 0 7 ); 曰] ''嗣再判斷是否申請成功(208 )?若否,結束處理, 否則’設定中斷服務常式之入口地址模塊(2〇9 ),發出 中斷啟始(start up)信號,令各該辅處理器開始執x 服務常式(2 11 ) ; ^ 俟中斷服務常式被執行完畢,再恢復中斷前之系統产 境,並釋放記憶體空間,且切換回實模式(2丨2 ),等 下一次被調用。 # 482960 案號 89112427 五、發明說明(6) 在本發明中,參見第3圖所示,各該辅處理器在利用 本發明所設計之鎖定標誌,標識出目前佔用系統資源之狀 態時,主要彳系依下列步驟,進行處理··In the aforementioned processing program of the present invention, referring to FIG. 2, the main processor is processed according to the following steps. First, determine whether the current mode of the main processor is a real mode: annoying, real mode) (201 ), If the current mode is protected mode Μ change%! | (Pi: 〇tecti〇n mode), end the processing; otherwise, determine whether the identification number (ID) of the main processor | 毳 is a processor above Pentlum (2〇 ”indicates no, the processing is terminated; f if it is a processor above Pentium, then the current operating mode is switched to the protected mode (2 0 3), and the floating-point pointer (^ 丨 〇a 七 / (I to revise the pointer), find the base address of the local advanced programmable interrupt controller (iocai APIC) (204) Then set task priority registers at this address, respectively. Sigh < register (register), pseudo-vector register, destination register and destination grid (205); and set a corresponding sub-quantity for each auxiliary processor to be processed, And set the value of this variable to 0 'while saving its data segment (2 06 \; less then Each processor applies for data usage space and 4K page space, 1 of which 4K page space is the memory space required to support the operation of each processor ^ (2 0 7); (208) If not, end the processing, otherwise 'set the entry address module (209) of the interrupt service routine, and send an interrupt start up signal, so that each sub-processor starts executing the x service routine ( 2 11); ^ 俟 The interrupt service routine is executed, and then the system production environment before the interruption is restored, and the memory space is released, and it switches back to the real mode (2 丨 2) and waits for the next call. # 482960 Case number 89112427 V. Description of the invention (6) In the present invention, as shown in FIG. 3, when each of the auxiliary processors uses the lock flag designed by the present invention to identify the current state of occupying system resources, it mainly depends on the following: Steps for processing ...

I 所 提 質 首先,偵測鎖定標誌值(3 0 1 ),並判斷該標諸是否 |已經被鎖定(302),若已被鎖定,則返回(301),繼續 |;|偵測鎖定標誌值;否則,對該標誌值進行鎖定(3〇3 )·、只 嘗示 將數據段及堆棧段改為申請之段空間(304)後,再 %年向暫存記憶體中寫入對應段空間之存在標誌(3 0 5 ),俾 該主處理器可自該暫存記憶體中,正確地讀取各該辅處理 器中斷前之狀態資料;俟完成執行該中斷處理程序,再釋 放該標誌值之鎖定(3 0 6 ),且將該標誌設定為空閒狀能 3 0 7 ),令其他輔處理器能夠使用系統資源,依序執^ 該中斷服務常式。 在本發明中,參見第4圖所示,該电服務 口地址模塊主要係依下列步驟,進行設^-1 首先,判斷0X70之入口是否為可寫(401_}_^ 否,則結束處理;否則,向0X70之入已氬入 ): 判斷0X71之入口是否為可窵狀態若是 0X71之入口窵入0Χ0Α值(402),並將务常式 址寫入記憶體地址4 0 : 6 7中(4 0 5 ) 。_ 本發明在該代碼段中,係藉設定/整數變量 (semaphore),以作為是否鎖定之標諸,俾各該處理器在 執行中斷服務程序之過程中,可先循環檢測該整數變量之 鎖定標諸是否被鎖定,若是,則令其處於等待狀態,並繼I improved the quality first, detect the lock flag value (3 0 1), and determine whether the mark | has been locked (302), if it has been locked, then return to (301), continue |; | detect the lock flag Value; otherwise, the flag value is locked (303), and only the data segment and stack segment are changed to the requested segment space (304), and then the corresponding segment is written to the temporary storage memory %% The existence flag of the space (3 0 5), 俾 the main processor can correctly read the status data before the interruption of each sub-processor from the temporary memory; 俟 finish executing the interrupt processing program, and then release the The flag value is locked (3 0 6), and the flag is set to idle state energy 3 7), so that other auxiliary processors can use system resources to execute the interrupt service routine in sequence. In the present invention, as shown in FIG. 4, the electrical service port address module is mainly set according to the following steps: ^ -1 First, determine whether the entry of 0X70 is writable (401 _) _ ^ No, then end the processing; Otherwise, the entry to 0X70 has been entered): Determine whether the entry of 0X71 is ready. If the entry of 0X71 enters the 0 × 0Α value (402), and write the routine address into the memory address 4 0: 6 7 ( 4 0 5). _ In the code segment of the present invention, the setting / integer variable (semaphore) is used as a criterion for whether to lock. Each processor can first detect the lock of the integer variable in the process of executing the interrupt service routine. Whether the flags are locked, and if so, leave them in a waiting state and continue

482960 __案號89112427_年月曰 修正_ .五、發明說明(7) 續循環檢查該鎖定標誌,否則,鎖定該標誌,並執行中斷 服務程序,俟中斷服務常式被執行完畢,即釋放該鎖定標 誌,以令其他處理器可依序執行其中斷服務程序。 如此,在對一台具有多處理器計算機中之處理器數目 進行測量時,各該處理器在依序接收到中斷訊號時,均能 正常執行其中斷處理程序,並可有效防止各處理器間行程 發生衝突之情事,確保多處理器模塊執行完畢後,DOS作 業系統仍能維持正常運行。 以上所述,僅係本發明之較佳實施例,惟,本發明所 主張之權利範圍,並不局限於此,按凡熟悉該項技藝人 士,依據本發明所揭露之技術内容,可輕易思及之等效變 化,均應屬不脫離本發明之保護範疇。 修煩482960 __Case No. 89112427_ year and month amended _. V. Description of the invention (7) Continue to check the lock flag, otherwise, lock the flag and execute the interrupt service routine, the interrupt service routine is executed, that is, released This lock flag enables other processors to sequentially execute their interrupt service routines. In this way, when measuring the number of processors in a computer with multiple processors, each processor can normally execute its interrupt handler when receiving interrupt signals in sequence, and can effectively prevent each processor In the event of a conflict in the itinerary, it is ensured that the DOS operating system can still maintain normal operation after the execution of the multiprocessor module. The above are only the preferred embodiments of the present invention. However, the scope of the rights claimed by the present invention is not limited to this. According to the technical content disclosed by those skilled in the art, those skilled in the art can easily think about it. And equivalent changes should all belong to the protection scope of the present invention. Repair

第10頁 482960 案號 89112427 年 月 曰 修正 圖式簡單說明 附圖說明: 第1圖所示乃本發明之整體流程示意圖; 第2圖所示乃本發明中主處理器之處理流程示意圖; 第3圖所示乃本發明中各輔處理器之處理流程示意 圖, 第4圖所示乃本發明中各輔處理器對其中斷服務常式 之入口進行設定之處理流程示意圖。 释煩 牛請 本委 §明 :示 予日 修所Page 10 482960 Case No. 89112427 Revised diagram Brief description Brief description of the drawings: Figure 1 is a schematic diagram of the overall process of the present invention; Figure 2 is a schematic diagram of the processing flow of the main processor in the present invention; Figure 3 is a schematic diagram of the processing flow of each auxiliary processor in the present invention, and Figure 4 is a schematic diagram of the processing flow of each auxiliary processor in the present invention to set the entry of its interrupt service routine. Relieving Niu, the Commission § Clear: Show to the Japanese Repair Center

OO

第11頁Page 11

Claims (1)

482960 Μ 號支9112427 六、申請專利範圍 1、一種防止多處理器計算機中各處理器間行程 衝突之方法,該方法係以一整數變量作為鎖定標詁,\ 於一多處理器計算機中各處理器所屬之行程控S二之$ f =未以標識出目前是否已有處理器正在佔用“資;原碼 右無處理器佔用系統資源,即可在將該鎖定標註 η yAw rt> ’心夏々复, 一處理器執行其中斷處理程序,俟執行完畢後, 亥鎖疋標認’俾其他處理器能夠使用系統資源,依於^ 翁i收到中斷訊號時,正常執行其中斷處理程序。 ;482960 M 号 91112427 6. Scope of patent application 1. A method for preventing stroke conflicts between processors in a multiprocessor computer. This method uses an integer variable as the lock standard, and processes each in a multiprocessor computer. $ F == not used to identify whether a processor is currently occupying the "data; the original code to the right without a processor occupying system resources, you can mark the lock η yAw rt > '心 夏After that, a processor executes its interrupt processing routine. After the execution is completed, the lock is identified as' other processors can use system resources and normally executes its interrupt processing routine when the interrupt signal is received. ; ) 2、如申請專利範圍第1項所述之防止多處理器計算機 各處理器間行程發生衝突之方法,該方法係先對該^多 ϋ处理器中一含有局部高級可編程中斷控制器之主處理哭了 進行初始化狀態設定,並由該主處理器設定各該輔處i哭 4進行中斷之入口地址;嗣,再對各該輔處理器依序 = f f斷訊號。 π ^出中 3、如申請專利範圍第2項所述之防止多處理器計算機 接各處理器間行程發生衝突之方法,其中各該輔處理^在 依2到一中斷訊號時,將調用記憶體中之一中斷向量,以 應 ^斷向蓋内所提供之中斷服務常式之地址,執行相 畸程序,以完成對該中斷之處理。 中各4余、如申請專利範園第3項所述之防止多處理器計算機 利用二^态間订程發生衡突之方法,其中各讀輔處理器係 執行=、貞定標誌,標識出目前已佔用系統資源,處於正在 定;^ =中斷處理程序之狀態,俟執行完畢後,再釋放該鎖 .π ‘,並等待下—次之中斷請求。) 2. The method for preventing conflicts between the processors of a multi-processor computer as described in item 1 of the scope of the patent application, the method is to firstly include a high-level programmable interrupt controller in a multi-processor processor. The main processor cries for initialization state setting, and the main processor sets the entry address of each of the auxiliary processors to interrupt; 嗣, then sequentially for each of the auxiliary processors = ff break signal. π ^ 出 中 3. The method for preventing conflicts between multi-processor computers and their processors as described in item 2 of the scope of the patent application, wherein each of the auxiliary processes ^ will call the memory when the interrupt signal is 2 to 1 One of the interrupt vectors in the system executes a phase distortion procedure with the address of the interrupt service routine provided to the cover to complete the processing of the interrupt. Each of the four or more methods, as described in item 3 of the patent application park, for a method for preventing multiprocessor computers from using the inter-state booking process to balance out, in which each reading auxiliary processor executes the =, the chastity flag, and identifies System resources are currently occupied and are in the process of being determined; ^ = the state of the interrupt handler. After the execution is completed, the lock .π 'is released and waiting for the next interrupt request. 第12頁 482960 89112427 月 曰 修正 、申請專利範圍 5、如申請專利範圍第2項所述之防止多 中各處理器間行程發生衝突 ,並。α。十异機 接收到-中斷訊號時前ς 各該輔處理器 鎖定標諸後,完成對該中斷之處理,並釋放該 數據,正確祕^ 1如可根據保存於該暫存記憶體中之 上保各該:声理”各該輔處理器中斷前之狀態資料,以 P態:辅處理…成中斷處理後,仍能回復到中“ 士 Λ柿如申請專利範圍第2項所述之防止多處理哭舛“ 中各處理器間行程骖 夕爽理-计异機 前之模式係屬每模二Β士大之方〉r、中當該主處理器當 々合規定; 核式^判斷該主處理器之識別號是否符 1¾搜’即將當前之操作模式切換到保護模式, 者1底地址;’ ’找到本地之高級可編程中斷控制器之基 :哭再於該地址處分別設置任務優先級暫存 存、目的暫存器及目的格式暫存器;並為备伽t向 定一對應之變量,並將該變量值設為二處 同枯保存其數據段; 。尽 再為每個處理器申請數據使用空間及運行空間; 蜗再判斷是否申請成功?若是,則設定中斷服務 之入口地址模塊,發出中斷啟始信號。 式 7、如申請專利範圍第6項所述之防止多處理琴 中各處理器間行程發生衝突之方法,其中俟中斷服務 if i 六 J:1Page 12 482960 89112427 Month Amendment, scope of patent application 5, as described in item 2 of the scope of patent application, to prevent conflicts in the travel between multiple processors, and. α. When the ten different machines receive the interrupt signal, the slave processor locks the flags, finishes processing the interrupt, and releases the data. It is correct and secret ^ 1 if it can be saved in the temporary memory according to Make sure that each of the auxiliary processors ’status information before interruption is in the P state: auxiliary processing ... After the interruption processing, you can still return to the prevention of" Shi Λ Persimmon as described in item 2 of the scope of patent application " "Multi-processing crying" "The process between the processors is very cool-the model before the different machines is a formula of two B + master mode" r, the main processor should be in compliance with the regulations; the core ^ judgment Does the identification number of the main processor match 1¾ search 'the current operation mode is switched to the protection mode, or the bottom address;' 'find the base of the local advanced programmable interrupt controller: cry and set tasks at this address separately Priority register, destination register, and destination format register; set a corresponding variable for the backup t, and set the value of the variable to two locations to save its data segment; Data processing space and application space for each processor; Is the application successful? If so, set the entry address module of the interrupt service and issue an interrupt start signal. Equation 7. The method for preventing conflicts between the processors of the multi-processing piano as described in item 6 of the patent application scope, where俟 Interrupt service if i six J: 1 第13頁 482960 ^_案號89112427_年月曰 修正_ 六、申請專利範圍 被執行完畢後,再恢復中斷前之系統環境,並釋放記憶體 .空間,且切換回實模式,等待下一次被調用。 : 8、如申請專利範圍第2項所述之防止多處理器計算機 中各處理器間行程發生衝突之方法,其中各該輔處理器在 :利用該鎖定標誌,標識出目前佔用系統資源之狀態時,主 要係依下列步驟,進行處理: 首先,偵測鎖定標誌值,並判斷該標誌是否已經被鎖 定,若已被鎖定,繼續偵測鎖定標諸值;否則,對該標諸 值進行鎖定; 將數據段及堆棧段改為申請之段空間後,再向暫存記 憶體中寫入對應段空間之存在標誌,俾該主處理器可自該 暫存記憶體中,正確地讀取各該輔處理器中斷前之狀態資 料;俟完成執行該中斷處理程序,再釋放該標誌值之鎖 定,且將該標誌設定為空閒狀態,令其他輔處理器能夠使 用系統資源,依序執行該中斷服務常式。 煩請委員明示P年^一月所提之 修正本有無變更實質内容是否鹿予修正。 第14頁Page 13 482960 ^ _Case No. 89112427_Year Month Amendment_ VI. After the scope of the patent application is completed, restore the system environment before the interruption, and release the memory. Space, and switch back to real mode, waiting for the next time transfer. : 8. The method for preventing conflicts among the processors in a multi-processor computer as described in item 2 of the scope of the patent application, wherein each of the sub-processors uses the lock flag to identify the status of currently occupying system resources At this time, the processing is mainly performed according to the following steps: First, detect the value of the lock flag and determine whether the flag is locked. If it is locked, continue to detect the value of the lock flag; otherwise, lock the value of the flag ; After the data segment and the stack segment are changed to the requested segment space, the existence flag of the corresponding segment space is written into the temporary storage memory, and the main processor can correctly read each segment from the temporary storage memory. Status information of the auxiliary processor before the interrupt; 俟 Finish executing the interrupt handler, then release the lock of the flag value, and set the flag to the idle state, so that other auxiliary processors can use system resources to execute the interrupt in order Service routine. Members are kindly requested to indicate whether there are any changes in the amendments mentioned in P year ^ January, and whether they will be amended. Page 14
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI550514B (en) * 2014-05-09 2016-09-21 Huawei Tech Co Ltd Computer execution method and computer system for starting a computer system having a plurality of processors
CN111722916A (en) * 2020-06-29 2020-09-29 长沙新弘软件有限公司 Method for processing MSI-X interruption by mapping table

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI550514B (en) * 2014-05-09 2016-09-21 Huawei Tech Co Ltd Computer execution method and computer system for starting a computer system having a plurality of processors
CN111722916A (en) * 2020-06-29 2020-09-29 长沙新弘软件有限公司 Method for processing MSI-X interruption by mapping table
CN111722916B (en) * 2020-06-29 2023-11-14 长沙新弘软件有限公司 Method for processing MSI-X interrupt through mapping table

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