TW480824B - Electronic circuitry - Google Patents
Electronic circuitry Download PDFInfo
- Publication number
- TW480824B TW480824B TW089112987A TW89112987A TW480824B TW 480824 B TW480824 B TW 480824B TW 089112987 A TW089112987 A TW 089112987A TW 89112987 A TW89112987 A TW 89112987A TW 480824 B TW480824 B TW 480824B
- Authority
- TW
- Taiwan
- Prior art keywords
- electronic circuit
- patent application
- signal
- scope
- transmission line
- Prior art date
Links
Landscapes
- Dc Digital Transmission (AREA)
Abstract
Description
480824 A7480824 A7
五、發明説明(彳) 發明範轉 本發明與定時訊號有關的電子電路及其製造及分配的有 關;振盪器作為該定時訊號的發生源;及根據定時訊號的 通訊。 發明背景 數位電子資料處理電路及系統需要定時訊號以達到資料 處理作業同步化。通常,該定時訊號包括一主定時訊號以便 行生其他定時訊號。該主定時訊號一般稱為”時鐘訊號。 通常希望一種時鐘訊號含一以上的相位。 装 訂 一種兩相位時鐘訊號的例子,其中現有的時鐘訊號具有 180度相位差,通常用於動態邏輯及移位暫存器電路。一 種四相位時鐘訊號的例子,其中現有的時鐘訊號具有90度 連續相位差。半導體積體電路(ICs或晶片)為標準主環境, 超大型晶片(VLSI)經常用於微處理機或記憶體。 歷史上’一般操作時鐘頻率達到約5〇 MHz已能滿足作為 片外石英振盪器含簡單點對點片上時鐘訊號分配使用。如 今’在更高的操作頻率,一般目標為3〇〇 MHz至1 GHz,使 得有關時鐘訊號反射及歪曲的固有片上分配問題變為非常 重要’因為雙態訊號寬度/周期已經不再比時鐘訊號脈衝 短太多。1C設計的自然進步使晶片實體變為較大及功能變 為更複雜,因而形成這些問題。 目前,時鐘訊號標準係由來自片外晶體時鐘振盪器使用 片上相位鎖定迥路(PLL)控制電路造成頻率倍增而產生, m電路占據有價值的晶片面積,消耗相當的電力,及遭遇 本紙張尺度適用中國國家標準(CNS) A4規格(210 x 297公釐)一 -- 480824 A7 B7 五、發明説明(2 ) 訊號反射,電容負載及電力耗損的問題並且主動地限制最 大操作頻率。與時鐘訊號分配有關,一般牽涉到含區間時 間時鐘訊號增壓緩衝器鏈的操作電路樹狀配置。即使如 此,半導體製造參數的可變性包括緩衝器内,導致片上各 位置產生不良及不可預測相延遲(歪曲),如此便會嚴重影 響可靠的同步操作及通訊包括晶片附近面積。結果,ICs必 須規定速率並在低於最大設計時鐘速率運轉。誠然,1C製 造商甚至一反長久存在的趨勢使用較小的晶片尺寸於最新 的 ICs 〇 發展更為廣泛的^矽上系統’」因缺乏用於可靠計時大 面積高密度晶片的供應而受阻。值得一提,時鐘速率限制 正趨向小於1 GHz,雖然大部份的1C電晶體功能已具有25 GHz或更大的切換能力。 本發明的產生,基本上係尋找一些替代方法,至少減少 片上PLL裝置的面積及/或電力需求,如果可能,將進一步 說明一些有用的内容以解決時鐘訊號分配問題。 發明總結 本發明的廣闊概念或特徵在於發明的理念及實現的方法 及裝置以便主動結合或協同連結反覆的脈衝或循環訊號的 分配及用於產生及保持該訊號的主動裝置。一種電子/半 導體裝置組合便於同時產生及分配定時訊號,包括一主時 鐘。一合適的該訊號路徑顯示環狀電磁連續性,提供與電 磁波型式訊號相反的訊號相位,方便的路徑相關的再生裝 置。 ___-5- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) A7V. Description of the invention (i) The invention is related to the electronic circuit related to the timing signal and its manufacturing and distribution; the oscillator is the source of the timing signal; and the communication based on the timing signal. BACKGROUND OF THE INVENTION Digital electronic data processing circuits and systems require timing signals to synchronize data processing operations. Usually, the timing signal includes a master timing signal to generate other timing signals. The main timing signal is generally called a "clock signal." It is generally desirable that a clock signal contains more than one phase. An example of binding a two-phase clock signal, in which the existing clock signal has a 180-degree phase difference and is usually used for dynamic logic and shifting. Bit register circuit. An example of a four-phase clock signal, where the existing clock signal has a continuous phase difference of 90 degrees. Semiconductor integrated circuits (ICs or chips) are the standard main environment, and very large-scale chips (VLSI) are often used in micro Processor or memory. Historically 'the general operating clock frequency reached about 50 MHz has been sufficient as an off-chip quartz oscillator with simple point-to-point on-chip clock signal distribution. Today's higher target operating frequency is generally 3 〇MHz to 1 GHz, making the inherent on-chip distribution issues related to clock signal reflection and distortion become very important because the bi-state signal width / period is no longer much shorter than the clock signal pulse. The natural progress of 1C design has made the chip physical These problems are caused by larger and more complex functions. Currently, clock signal standards are Since the off-chip crystal clock oscillator uses an on-chip phase-locked circuit (PLL) control circuit to cause frequency multiplication, the m circuit occupies a valuable chip area, consumes considerable power, and is subject to the Chinese National Standard (CNS) for this paper standard. A4 specification (210 x 297 mm) I-480824 A7 B7 V. Description of the invention (2) Signal reflection, capacitive load and power consumption issues and actively limit the maximum operating frequency. It is related to the distribution of clock signals and generally involves Interval time clock signal booster buffer chain operation circuit tree configuration. Even so, the variability of semiconductor manufacturing parameters included in the buffer, leading to bad and unpredictable phase delays (distortion) at various locations on the chip, which would seriously affect Reliable synchronous operation and communication include the area near the chip. As a result, ICs must be specified at a rate and run below the maximum design clock rate. Indeed, 1C manufacturers have even resisted the long-standing trend to use smaller chip sizes for the latest ICs. Wider development of `` System on Silicon '' due to lack of large area for reliable timing Supply of density wafers is hampered. It is worth mentioning that the clock rate limit is trending to less than 1 GHz, although most 1C transistor functions already have 25 GHz or greater switching capabilities. The invention is basically to find some alternative methods to at least reduce the area and / or power requirements of the on-chip PLL device. If possible, it will further explain some useful content to solve the problem of clock signal distribution. Summary of the Invention The broad concept or feature of the present invention lies in the concept of the invention and the method and device for realizing it, in order to actively combine or synchronize the allocation of repeated pulses or cyclic signals and active devices for generating and maintaining the signals. An electronic / semiconductor device combination facilitates the simultaneous generation and distribution of timing signals, including a master clock. A suitable signal path shows ring-shaped electromagnetic continuity, provides a signal phase opposite to the electromagnetic wave type signal, and a convenient path-related reproduction device. ___- 5- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) A7
本文已經展現出一種成姊 么丨立 命 、 成力,創意,合理的特徵,其中反 覆的脈衝或循環訊號的時間堂 二 τ间吊數與孩m號路徑電學長度在 訊號分配裝置中的主動定差古 &我有關。如果訊號路徑的繞行時 間決定該時間常數,較為理相 為里’移動電磁波電磁繼續環狀 循環該訊號路徑。 非常有趣並十分繁奋,士 & 。 ^ Ύ 本發明的發現有助於直接生產脈 衝狀循’ ?衣訊5虎具有快速上斗a 、 μ穴疋上升及下降的特性,即如已生產的 ”方形’’,不必要求在傳絲沾I 、 、 得、尤的基本王要的正弦訊號上恢復,, 方形化的作用。誠然,這種創意的電學長度/訊號繞行時 間 '吊數-決疋原理有利於導出該電學長度或該訊號一次繞 行首先主動決定一單極半循環訊號的偏差及下一次,或在 下一 ’人遁Λ號繞行主動芫成決定一完全二極循環包括二相 對半循環的偏差。#電學長度相當於完全二極循環的兩連 續脈衝偏差之一為180度。 /達成茲原理的特別發明特徵被認為涉及訊號分配路徑的 仃波性質包括具有適合的傳播性質,標準環狀傳輸線構 以,另外含訊唬再循環有關的轉置效果及反轉作用。 在:項特別的發明特徵中,所希望的反覆循環訊號牽涉 再循%仃波傳播裝置主動提供希望行波旋轉及設定各訊號 偏移時間’包括具有切換及放大性質的主動再生裝置,方 便雙向轉換效大器,供應需求的能量及設定各訊號偏移端 的短上升及下降。 以合適的行波傳播裝置含相關主動反相裝置要求的轉置 效果為例’如繞行行波顯示,由物理寬度沿本身長度扭轉 本紙張尺度適用中國i家標準(CNS)^;格(2ι〇 χ 29?^爱)----— 480824 A7 B7 五、發明説明(4 ) 以連接對面反相裝置的輸入及輸出’所謂經過Moebius頻帶 或波帶。誠然,在撓性基板上製成的積體電路可能是狹長 型其中該路徑沿本身長度及尾端相連成為Moebius頻帶或波 帶,甚至以功能電路擋住一或兩邊或跨接行波傳播裝置。 至少’循環訊號裝置的反相及行波傳播裝置的結合可伸長 到全長成為連續半導體反相器特徵,至少使用CM0S技 術。 不過,用於行波傳播平面執行裝置,標準傳輸線型式係 使用隔離路徑跟縱傳導裝置,上述Moebius扭轉效果不外乎 由這種隔離傳導裝置的相亙絕緣交又提供。替代的方法係 使用傳輸線變換變壓器或結合其他移動傳播裝置的標準傳 輸線型式。 一發明具體實施例的特徵使用隔離傳導裝置作為軌道各 含相等長度並在至少一反相器裝置的輸出與輸入之間轉 置,較為理想,連接其間的導軌。實際上,至少反相器裝 置的長度比傳導裝置長度小1 %,較為理想,沿傳導裝置或 軌道有許多隔離的反相器-除非本發明配合操作作為停止 波振盧器。 較佳的反相器裝置具有雙向性質,例如一對相反的反相 器,邊對邊或背對背,及該裝置利於直接同步產生相似或 幾乎相同的反相循環訊號元件。 本發明造特別有利的成果包括特別低電力消耗的定時訊 號裝置,能主動限制傳輸線及反相器作用損失,例如,幾 乎可忽略經反相器裝置補充電力’及備有操作電路關閉, 本紙張财S S家料(CNS) A4規格(21G X 297公釐) -- 裝 訂 480824This article has shown a trait of success, success, creativity, and reasonableness. Among them, the pulse number of repeated pulses or cyclic signals, the time interval between τ and τ, and the electrical length of the child m path are actively determined in the signal distribution device. Chaku & I am related. If the detour time of the signal path determines the time constant, it is more reasonable to say that the moving electromagnetic wave continues to circulate the signal path in a loop. Very fun and very strenuous, taxi &. ^ 的 The findings of the present invention facilitate the direct production of pulse-like cycles'? The Yixun 5 Tiger has the characteristics of rapid rise and fall of the a and μ acupoints, that is, if it has been produced as a "square", it is not necessary to restore the sinusoidal signal that the basic king wants to pass I,, De, and You. The effect of squareness. Admittedly, this creative electrical length / signal bypass time 'hanging number-determining principle is helpful to derive the electrical length or the signal once bypassed. First, the deviation of a unipolar semi-circular signal is actively determined. And the next time, or in the next 'human 遁 Λ detour active formation, determine a complete bipolar cycle including two relative half cycle deviations. #Electrical length is equivalent to one of two consecutive pulse deviations of the full dipole cycle is 180 degrees The special inventive feature of the / Dalz principle is considered to involve the wave properties of the signal distribution path, including suitable propagation properties, standard ring transmission line construction, and the transposition effect and reversal effect related to signal recirculation. : In the special inventive feature, the desired repeated cycle signal involves recirculation. The wave propagation device actively provides the desired traveling wave rotation and sets the offset time of each signal. The active regeneration device with changing and amplifying nature facilitates the two-way conversion effector to supply the required energy and set the short rise and fall of the offset end of each signal. The proper traveling wave propagation device contains the transposition effect required by the relevant active inverter device For example, as shown by the detour, the paper width is reversed from the physical width along its own length. The Chinese paper standard (CNS) ^; grid (2ι〇χ 29? ^ Love) ---- 480824 A7 B7 V. Description of the invention (4) In order to connect the input and output of the opposite inverter device, the so-called pass through the Moebius frequency band or wave band. It is true that the integrated circuit made on a flexible substrate may be a narrow type in which the path runs along its own length and tail Connected to form a Moebius frequency band or wave band, and even block one or both sides or bridge the traveling wave propagation device with a functional circuit. At least the combination of the inversion of the cyclic signal device and the traveling wave propagation device can be extended to the full length to become a continuous semiconductor inverter feature At least CM0S technology is used. However, for the traveling wave propagation plane actuator, the standard transmission line type uses an isolation path and a longitudinal conduction device. The above Moebius twist effect It is provided by the insulation of such isolated conductive devices. An alternative method is to use a transmission line conversion transformer or a standard transmission line type combined with other mobile propagation devices. A feature of a specific embodiment of the invention is that the isolated conductive devices are used as tracks. Equivalent length and transposed between the output and input of at least one inverter device, ideally, the rails connecting it. In fact, at least the length of the inverter device is 1% smaller than the length of the conduction device, which is ideal, along the conduction There are many isolated inverters in the device or track-unless the present invention operates in conjunction as a stop-wave oscillator. Preferred inverter devices have a bidirectional nature, such as a pair of opposite inverters, side-to-side or back-to-back, and The device facilitates direct synchronization to generate similar or almost identical inverting cyclic signal elements. Particularly advantageous results of the present invention include a timing signal device with a particularly low power consumption, which can actively limit the loss of transmission line and inverter action, for example, it is almost negligible to supplement the power through the inverter device 'and the operation circuit is turned off. SS Home Supplies (CNS) A4 (21G X 297mm)-Binding 480824
即起動被動電阻及/或電容及/或電感或傳輸線性質的雙向 連接路徑,或單向使用二極體或反相器,等以下將詳細說 明。 其他的有用結果為,至少原則上沒有製造不良,循環訊 號裝置不論是行波傳播的旋轉或方向並不具有先天優點, 並按規足距離或反相器裝置之間或之内的其他差異預先放 置或排列。 發明的計劃及特徵作為脈衝發生器及振盪器包括傳輸線 裝置使用導體金屬及與一般IC生產相容絕緣介電層並特別 與傳輸線有關的再生電路連接,例如,標準又方便的方法 在下面形成並由通孔連接;需要的絕緣交又或隔離傳輸線 4壓器零件也一樣為預製品包括交叉用的跨接;及有利於 作為再生裝置的雙向反相器端子的DC不穩定連接;較佳雙 向反相器的同步偵測及橋接整流作用;增強雙向反相器的 程序作用包括供應電能循環;等等。 另外,發明的特徵為定時訊號的產生及分配電路的連接/ 連結’不論由直接連接或分配磁鐵及或電磁場;及在自行 同步的基礎上運轉及擴充至不同頻率,特別具有奇次諧波 關係。ICs間連結及協調如進一步傳送資料也具有重要的發 明價值。 Λ 在以下說明中敘述的及在專利申請範圍中獨立或非獨立 列出的本發明的其他結構及特徵均併入本文。 圖式簡單說明 本發明的特別具體實施例參考下列的說明及附圖,其中 ——一.- -8 - 本紙張尺度適用中國國家標準(兩八4規格(21卩297公5 裝 訂 線 480824 A7 B7 五、發明説明( 圖1為一傳輸線裝置的外形圖; 圖2顯示一 Moebius波帶; 圖3為一行波振盪器電路外形圖; 圖4為另外的行波振盪器電路外形圖; 圖5a及5b為部份傳輸線的分配電模式的當量電路圖; 圖6a顯示差動輸出波型的理想化圖形; 圖6 b顯示傳輸線的傳播延遲,電長學度及物理長度之間的 關係; 圖7( i) - 7(ix)為訊號波型相位的理想圖形; 圖8a- 8b顯示傳輸線振盧器中一波型的瞬間相位; 圖9為1C上部份傳輸線的斷面圖; 圖10a及10b為電路外形及停止波的理想圖形; 圖11為一傳輸線含反相變壓器局部外形圖; 圖12顯示一對背對背反相器跨接部份傳輸線; 圖13a及13b為CMOS背對背反相器外形及相當電路圖; 圖14a為傳輸線及CMOS電晶體的電容元件詳細圖; 圖14b為圖14a的相當電路圖; 圖15顯示連接傳輸線的電容短線連接; 圖16顯示自行同步化傳輸線振盪器的一種連接; 圖17a-17c顯示自行同步化傳輸線振盪器的其他連接; 圖18為圖17 a的代表圖形; 圖19a及19b顯示四傳輸線振盪器的連接; 圖2 0及2 1顯示磁連結的自行同步傳輸線振靈器; 圖2 2顯示三磁連結的自行同步傳輸線振蓋器;That is, the passive resistance and / or capacitor and / or inductive or transmission line bidirectional connection path is started, or a unidirectional use of a diode or an inverter is described in detail below. Other useful results are that, at least in principle, there are no manufacturing defects, and the cyclic signal device has no inherent advantages whether it is the rotation or direction of travelling wave propagation, and according to the distance or other differences between or within the inverter device in advance Place or arrange. The plan and features of the invention include pulse generators and oscillators, including transmission line devices, using conductive metal, and insulating dielectric layers that are compatible with general IC production and are particularly connected to transmission lines. For example, standard and convenient methods are formed below and Connected by through-holes; the required insulation crossover or isolation transmission line 4 voltage transformer parts are also preforms including crossover jumpers; and DC unstable connections that are beneficial to the bidirectional inverter terminals as regeneration devices; preferably bidirectional Synchronous detection and bridge rectification of inverters; program functions to enhance bidirectional inverters include power supply cycles; etc. In addition, the invention is characterized by the timing signal generation and the connection / distribution of the distribution circuit, whether by direct connection or distribution of magnets and or electromagnetic fields; and it operates and expands to different frequencies on the basis of self-synchronization, and has an odd harmonic relationship in particular . Linking and coordinating between ICs, such as the further transmission of data, also has important inventive values. Λ Other structures and features of the invention described in the following description and listed independently or non-independently in the scope of the patent application are incorporated herein. The drawings briefly explain the specific embodiments of the present invention with reference to the following descriptions and drawings, among which:-. -8-This paper size applies to Chinese national standards (two eight four specifications (21 卩 297 male 5 binding line 480824 A7) B7 V. Description of the invention (Fig. 1 is an external view of a transmission line device; Fig. 2 is a Moebius band; Fig. 3 is an outline view of a line wave oscillator circuit; Fig. 4 is an outline view of another travel wave wave circuit; Fig. 5a And 5b is the equivalent circuit diagram of the distribution mode of some transmission lines; Figure 6a shows the idealized pattern of the differential output waveform; Figure 6b shows the relationship between the propagation delay of the transmission line, the electrical length and the physical length; Figure 7 (i)-7 (ix) are ideal patterns of signal waveform phase; Figures 8a-8b show the instantaneous phase of a waveform in a transmission line vibrator; Figure 9 is a sectional view of a part of the transmission line on 1C; Figure 10a and 10b is the ideal shape of the circuit shape and the stop wave; Figure 11 is a partial external view of a transmission line with an inverting transformer; Figure 12 shows a pair of back-to-back inverters across some transmission lines; Figures 13a and 13b are the outlines of CMOS back-to-back inverters And equivalent circuit diagram; 14a is a detailed diagram of a capacitor element of a transmission line and a CMOS transistor; FIG. 14b is a corresponding circuit diagram of FIG. 14a; FIG. 15 shows a short-circuit connection of a capacitor connected to the transmission line; FIG. 16 shows a connection of a self-synchronized transmission line oscillator; Other connections of the self-synchronizing transmission line oscillator; Figure 18 is a representative figure of Figure 17a; Figures 19a and 19b show the connection of a four-transmission line oscillator; Figures 20 and 21 show magnetically linked self-synchronizing transmission line vibrators; Figure 2 2 Shows three magnetic links of self-synchronous transmission line vibrator;
-9--9-
4刪244 delete 24
圖23顯示不同頻率自行同步化傳輸線振盪器的連接; 圖24顯示單鋰1(:的時鐘分配電路網的例子; 圖25顯示定時系統立體執行圖; 圖2 6 a及2 6 b顯示雙相位分接點的例子; 圖27顯示三同心配置傳輸線振盪器; 圖28a及28b顯示含交又迥路連接的傳輸線; 圖29a顯示四相位訊號的傳輸線配置; 圖29b顯示理想化的四相.位訊號波型; 圖30顯示開端傳輸線連接; 圖3 1兩1C的頻率及相位協調; 圖32顯示Mosfet型可選擇的數位式分路電容器; 圖33顯示經過傳輸線的電容負載及運轉資料及/或電力。 具體實施例之詳細說明 已知的傳輸線一般分為兩類,開端型或特別的部份或全 部封端型。本文計劃的傳輸線既非封端型也不是開端型。 甚至也不是如一向明白的所謂無端型;如本文所顯示,無 端是本發明一種構造特徵,包括有理由供應一種訊號路徑 顯示環狀電磁連續性。 圖1顯不一傳輸線15其裝置顯示為實體環狀結構,包括— 單連續,原始,導體結構17由兩適當隔離幾乎平行的軌遒如 迥路15a及15b組成並於19交叉,並與導體17的任何現場電 連接供關。原始導體17的長度*1丁為s相當於傳輸線1 5的隔 離兩圈迴路線15a及15b並經過交又19的長度。 傳輸線1 5的這種結構具有]vioebius波帶相當的平面,見圖 -10- 480824 A7 B7 五 發明説明( 2,其中180。單轉的環狀帶具有明顯的拓噗學能主動轉換 成兩面及兩邊,但扭轉及兩端連接的原始帶 及-邊,…心線上的環狀箭頭執跡。從沿帶::任何位 置退回,其原來的左邊及右邊都經過反向,反轉或轉置。 沿帶長度任何奇數扭轉的結果相同。該種導性材料帶符合 本發明具體實施例訊號路徑要求,及組成本發明另外的結 構性特徵。撓性基板容許配置一真M〇ebius波帶傳輸線結 構,即,與相當的平面交叉19比較,扭轉彎曲有利。如此 形成的撓性印刷電路板及其固定的ICs被認為是可行的計 劃。 圖3為脈衝發生器,真正的振盪器,的電路圖,使用圖1 傳輸線15,另外特別含多數的隔離主動再生裝置便於作為 雙向反相切換/放大電路21於導電迥路軌道15a, i5b之間連 接。電路21在本具體實施例中將作進一步說明包括兩反相 器23a及23b ’背對背連接。其他的再生裝置依賴負電阻, 負電容或另外合適非線型,及再生(如Gunn二極體)或傳輸 線性質。較為理想,電路2丨為多數並沿傳輸線丨5分配,較 理想為均勻分配;也可大量高達100或更多的電路,更為 理想,電路數量多但各個按實際合理縮小。 各切換放大器21的反相器23a,23b具有一般操作連接相 關正值及負值電壓供應軌,通常分為V+及GND。各電路21 的輸入/輸出端子如顯示於迥路15a,15b之間在單導體17的 最大間距處連接,所以,各個幾乎都在傳輸線1 5中點。 圖4為振盪器的另外電路圖使用傳輸線結構,但有三交叉 11 - 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 480824 A7 _ . _ B7 五、發明説明(9 ) 19a ’ 19b及19c ’所以’如圖3的應用具有同樣Moebius波帶 型的反向/反轉/轉置性質。 傳輸線1 5顯示為矩型及圓型只是為說明方便。可以為任 何形狀,包括不規則幾何圖形,只要長度適合的操作頻率 的需要,如,一訊號離開放大器2 1繞行「一整圈」的傳輸 線15即隔離的迥路15a,15b加交又19後返回,並在繞行時 間Tp内有效定義操作頻率的脈衝寬度或半循環振盪時間。 沿傳輸線1 5均勻分配放大器2 1的優點有兩層。第一,擴 散的離散電容主動堆在相關放大器21便於吸入傳輸線1 5特 性阻抗Ζο因而減少訊號反射效果及改善不良的波形清晰 度。第二,由供應電壓V+及GND決定的訊號振幅在整個傳 輸線15上會更穩定,易於補償傳輸線介電質及電導體材料 引起的損失。連續閉合迥路傳輸線1 5及基本上均勻分配及 連接的再生切換裝置2 1可以像似整齊結構從任何點看外觀 相同。一種良好的規則用於各再生切換製置相關的基本電 容及電感(Ce及Le)及形成一共振分流槽LC電路以便具有一 共振頻率為l/(2*pi*root(Le*Ce))大於傳輸線15自持振盧 頻率 F(F3,F5,等)。 圖5a為部份傳輸線15的分配電當量電路或模式圖。顯示 交替分配電阻(R)及電感(L)元件串連,如,R0串連然後 串連R2,如此繼續形成迥路15a的一部份;及記錄L〇串連& 然後串連L2,如此繼續形成迥路15b的一部份;分配電容元 件C〇及(^並連橫跨傳輸線15,即在迴路15a及1 5b的電阻/電 感元件R〇/Li與電感/電阻元件Lo/Rit間連接CG,及在電感 -12- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 480824 A7 B7 五、發明説明(1〇 ) /電阻元件Li/R2與電阻/電感元件Ri/L2之間連接Cl ;其中 同一原件基本上維持R0=R1 = R2,L卜L2=L3及C0=C1,顯 示的分配RLC模式擴及傳輸線1 5的全長。雖然未顯示,實 際有一寄生電阻元件與各電容元件C平行,特別具有介電 材料。 圖5b為另外的簡化替代的分配電當量電路或可忽略電阻 模式,以圖5a顯示量(L)的半量(L/2)電感元件串連分配取 代圖5a的元件。這種模式有助了解本發明具體實施例傳輸 線的基本操作原理。 在「啟動」階段,即電力首次供給放大器2丨後,因放大 器21内部固有噪音放大產生振盪,因而開始發生混亂並迅 速沉靜在基本頻率F振盪,標準為十億分之一秒内。各別 來自反相器23a及23b的個別訊號經歷過傳輸線丨5的傳播延 遲Tp後反轉回到各放大器21。這種傳播延遲丁?為傳輸線^ 的黾阻及電感參數的函數;該函數以每公尺亨利(L)及每 公尺法拉(C)表示,並包括傳輸線的所有電容負載,導出 特性阻抗Z〇=SQRT (L/C)及一直線繞行或傳播或相位速度Fig. 23 shows the connection of self-synchronized transmission line oscillators with different frequencies; Fig. 24 shows an example of a clock distribution circuit network of single lithium 1 (:); Fig. 25 shows a three-dimensional execution diagram of a timing system; Figs. 2 6 a and 2 6 b show dual phase Examples of tapping points; Figure 27 shows three concentrically configured transmission line oscillators; Figures 28a and 28b show transmission lines with alternating and multiplexed connections; Figure 29a shows a transmission line configuration with four-phase signals; Figure 29b shows an idealized four-phase. Signal waveform; Figure 30 shows the beginning of the transmission line connection; Figure 3 1 2 1C frequency and phase coordination; Figure 32 shows the Mosfet type optional digital shunt capacitor; Figure 33 shows the capacitive load and operating data and / or the transmission line Electricity. Detailed description of specific embodiments The known transmission lines are generally divided into two types, open end type or special part or all end type. The transmission line planned in this article is neither end type nor open end type. It is not even as usual The so-called endless type is clear; as shown herein, endlessness is a structural feature of the present invention, including the reason to supply a signal path to show ring-shaped electromagnetic continuity. Figure 1 The transmission line 15 is shown as a solid ring structure, including-single continuous, primitive, conductor structure 17 is composed of two appropriately separated almost parallel rails, such as lanes 15a and 15b, and crosses at 19 and intersects with conductor 17 Any on-site electrical connection is provided. The length of the original conductor 17 * 1 is equal to the length of the isolated two loop circuit wires 15a and 15b of the transmission line 15 and passes through the length 19. The structure of the transmission line 15 has a vioebius wave The belt is quite flat, see Figure -10- 480824 A7 B7 Five invention descriptions (2 of which 180. The single-turn endless belt has obvious topology and can be actively converted into two sides and two sides, but the original of the twist and the two ends connected Bands and -sides, ... circular arrows on the heart line track. Withdraw from any position along the band, the original left and right sides are reversed, reversed or transposed. Any odd number of twists along the length of the band has the same result This kind of conductive material belt meets the signal path requirements of specific embodiments of the present invention and constitutes another structural feature of the present invention. The flexible substrate allows a true Moebius band transmission line structure to be configured, that is, to cross an equivalent plane 19 ratio It is more advantageous to twist and bend. The flexible printed circuit board thus formed and its fixed ICs are considered to be a feasible plan. Figure 3 is a circuit diagram of a pulse generator, a real oscillator, using the transmission line 15 of Figure 1, and it is especially included. Most isolated active regenerative devices are convenient to connect as two-way inverting switching / amplifying circuit 21 between conductive track 15a, i5b. Circuit 21 will be further explained in this embodiment, including two inverters 23a and 23b 'back to back Connection. Other regenerative devices rely on negative resistance, negative capacitance or another suitable non-linear, and regeneration (such as Gunn diode) or transmission line properties. Ideally, the circuit 2 丨 is a majority and is distributed along the transmission line 5 and ideally it is uniform Distribution; can also be a large number of circuits up to 100 or more, more ideal, the number of circuits is large but each is reasonably reduced according to the actual situation. The inverters 23a, 23b of each switching amplifier 21 have positive and negative voltage supply rails related to normal operation connections, and are generally divided into V + and GND. The input / output terminals of each circuit 21 are connected at the maximum distance between the single conductors 17 as shown in the circuits 15a and 15b, so each is almost at the midpoint of the transmission line 15. Figure 4 is another circuit diagram of the oscillator using the transmission line structure, but there are three crosses 11-This paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 mm) 480824 A7 _. _ B7 V. Description of the invention (9) 19a ' 19b and 19c 'so' applications with the same Moebius band-type inversion / inversion / transposition properties as in Figure 3. The transmission lines 15 are shown as rectangular and round for convenience of explanation. It can be any shape, including irregular geometry, as long as the length is suitable for the operating frequency. For example, a signal leaves the amplifier 2 1 and detours a "full circle" of the transmission line 15, which is an isolated circuit 15a, 15b, and 19 Then return, and effectively define the pulse width or half-cycle oscillation time of the operating frequency within the bypass time Tp. The advantages of evenly distributing the amplifiers 21 along the transmission line 15 are twofold. First, the active capacitors of the diffused discrete capacitors are stored in the relevant amplifier 21 to facilitate the absorption of the 15 characteristic impedance of the transmission line, thereby reducing the signal reflection effect and improving poor waveform clarity. Secondly, the signal amplitude determined by the supply voltage V + and GND will be more stable on the entire transmission line 15, and it is easy to compensate for the losses caused by the dielectric and electrical conductor materials of the transmission line. The continuous closed loop transmission line 15 and the regeneration switching device 21, which is substantially uniformly distributed and connected, can look like a neat structure and have the same appearance from any point. A good rule is used for the basic capacitors and inductors (Ce and Le) related to each regenerative switching system and to form a resonant shunt LC circuit so as to have a resonance frequency of 1 / (2 * pi * root (Le * Ce)) The frequency F (F3, F5, etc.) is greater than the self-sustained vibration frequency of the transmission line 15. FIG. 5 a is a circuit or pattern diagram of the power distribution equivalent of a part of the transmission line 15. Display alternately distributed resistance (R) and inductance (L) components in series, for example, R0 in series and then R2, so continue to form part of circuit 15a; and record L0 in series & then in series L2, This continues to form part of the circuit 15b; the distributed capacitive elements C0 and (^ are connected in parallel across the transmission line 15, that is, the resistance / inductance element R0 / Li and the inductance / resistance element Lo / Rit in the loop 15a and 15b Connect CG between inductors and -12- This paper size applies Chinese National Standard (CNS) A4 specifications (210 X 297 mm) 480824 A7 B7 V. Description of the invention (1〇) / Resistance element Li / R2 and resistance / inductance The components Ri / L2 are connected to Cl; the same original basically maintains R0 = R1 = R2, L2 = L3, and C0 = C1, and the distribution shown in RLC mode extends to the full length of the transmission line 15. Although not shown, there is actually one The parasitic resistance element is parallel to each capacitive element C, and especially has a dielectric material. Figure 5b is another simplified alternative electric equivalent circuit or negligible resistance mode, and the half (L / 2) inductance of the quantity (L) is shown in Figure 5a. Component serial allocation replaces the components of Figure 5a. This mode helps to understand the specific embodiment of the present invention The basic operating principle of the transmission line. In the "start-up" phase, that is, after the power is first supplied to the amplifier 2 oscillates due to the inherent noise amplification in the amplifier 21, it begins to confuse and quickly quietly oscillates at the basic frequency F, the standard is one billion Within one second, the individual signals from the inverters 23a and 23b respectively experienced the propagation delay Tp of the transmission line 5 and then reversed back to each amplifier 21. This propagation delay D? Is the resistance and inductance parameter of the transmission line ^ This function is expressed in Henry (L) per meter and Farad (C) per meter, and includes all capacitive loads of the transmission line, and derives the characteristic impedance Z〇 = SQRT (L / C) and the line bypass or propagate or Phase velocity
Pv=l/SQRT (L/C)。增強頻率,即選擇放大,使延遲❶成 為半循環時間的整數再除數以產生主要的最低頻率,即基 本頻率F 1 /( 2 Tp),並滿足再除數條件。所有其他整數乘 此頻率也能滿足再除數條件,但是,頻率較高,放大器以 的增益下Ρ奪,即;咸少,因此傳輸線15會迅速沉降至基本振 I頻率F。 傳輸線15具有環狀電磁連續性,隨反相器23a及23b的標 ----- -------------------------- · 13 - 本紙張尺度適用中國國家標年(CJNS) A4規格(210 X 2的公董)------------ 480824 A7 五、發明説明(~~) " -- 準電晶體的快速切換時間發展成強烈方波型含有效增強振 盪的基本頻率F的奇次諧波。在基本振盪頻率F,包括奇次 $白波頻率,由於傳輸線1 5為,閉合迥路,無任何型式的端 子放大器2 1的^子出現無載,如此非常適合於低電力消 耗及低動力需求。傳輸線15每單位長度的電感及電容可獨 立變化,這也是優點及合乎需要 圖6a顯示切換放大器21含反相器23a及23b的理想化波 型。起動後不久,放大器21的輸入/輸出端子出現元件振盪 波型Φ1,Φ2,並於正常操作中繼續存在。波型φι,〇2基 本上為方型及差動,即兩相反轉度後不同相。這種差 動波型Φ 1 ’ Φ2在最大訊號振幅(ν+)的中點(V+/2)相交。 這中點(V+ / 2)可當作可當作’零點,,因為波型φ 1,φ 2同 電勢’而瞬間導體迥路軌道15a及15b之間沒有位移電流, 也無任何差動電壓存在。對於本發明的這種較佳循環行波 特徵而言,這種零點以非常快速上升及下降時間及非常,清 楚’的方型波環繞傳輸線1 5進行有效掃描。這種零點也成為 全循環二極時鐘訊號的反向偏移的基準電壓。 考慮傳輸線1 5,以行波繞行的整圈長度及原始導軌17的 總長S,兩者都用「電學長度」表示,較為方便。圖6b顯 示原始導線/軌道17的傳播延遲或繞行時間(Tp),電學長度 (° )及物理長度(S)之間的關係。對各錯失相位波型φ 1,φ 2 及如所示由行波反覆繞行傳輸線1 5而言,每個方波偏移相 當於一整圈,即一繞行時間Τρ,而後續的相反波偏移需要 兩連續圈,即,二繞行時間(2χΤρ)。傳輸線丨5的一圈具有 ________-14- 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公釐) 480824 A7 B7 五、發明説明(12 ) 180° ’電學長度’,而兩圈需要一完全〇。- 360。二極訊號循 環,即,相當於原始導體17的全長。 例如,180°電學長度相當一圈及1/2波長1 GHz可形成一 50 mm傳輸線具有等於30 %光速(c)的相速度(pv),即, Pv=0.3*c,或 5 mm 其中 Pv=0.03*c,或 166 mm 自由空間, 即,其中Pv= 1 * c。 圖7(i)-7(ix)顯示波型Φ 1,Φ2經過一全循環至下一循環 的起點,特別在8個沿導體線或軌道π樣品位置,其間距 離同為45°電學長度。相位標示依照圖7( i)可以是軌道17 的任何地方,即,傳輸線15二圈,例如,隨意標示φ 1,Φ2 波型15的上升/下降為0/360° 。設定7(i)為時間t0,圖7(ii) 顯示繞行線17全長S的1/8(0.125 S)後在時間t〇+ (0.25 Tp) 的波型Φ 1,Φ2,等於繞行1/4傳輸線15,及45。電學長 度。時間 t0+ (0.5 Tp),t0+ (0.75 Tp),t0+ (0·75 Τρ)......t0 + (2 Τρ);繞行 0·25 S,0·375 S,0· 5 S,..... 1·0 S及90。,135 ° ,180° ·····360° 分別如圖 7(iii)-(ix)所示。 圖8a及8b顯示偏移極性的抽印(如圓圈所示),偏移電流 (如箭頭所示),及瞬間相位,從電磁環狀傳輸線15上的任 意0/ 360°位置涵蓋二圈傳輸線(等於連續原始導體17的全 長)。圖7只顯示一種差動行走電磁(EM)波型(取φ 1),但 沿傳輸線1 5的旋轉傳播可以為任何相反方向,即,順時鐘 或反時鐘。另外的波型(Φ 2)當然與顯示波型(φ 1)相錯180°。 EM波的實際旋轉方向用Poyntings向量表示,即,電及磁向 量交叉乘積。交叉區19當EM波繞行時產生無影響的訊號 _-15- 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 480824 A7 B7 五、發明説明(13 ) φ 1或Φ 2的微攪動。結果,快速上升/下降變換以相速pv繞 傳輸線移動,切換放大器2 1在第一次在供應電壓之間切換 時放大該變換。 傳輸線1 5的波型φ 1及φ 2的相位可從傳輸線1 5上的任何任 意基準點準確決定,結果具有強烈的相位關聯性及穩定 性。 用於雙向操作的適當(確實適合現有1C製造技術及習慣) 切換放大器2 1係以背對背]viosfet反相器23a,b為準,沿本文 傳輸線結構標準長度可裝備該種切換反轉放大器達1 〇〇〇對 以上。 切換放大器2 1的雙向反轉操作為同步調整性質。與一向 的傳統定時訊號比較’波型φ 1及φ 2的上升及下降時間, 以反相器23a,b的Mosfet電晶體的電子變換時間為基準,確 實是非常迅速。另外’傳輸線15具有比較佳雙向切換放大 器2 1的反相器的任何’開’電晶體為低的阻抗需要增強,雖 然全部並聯對同樣問題有用。切換反向器裝置使各放大器 21藉由對稱小能量脈衝造成的波極性必須向兩方向傳播, 如需要,向前引導EM波脈衝以達成作用。退回到先前切換 放大器21的反向EM波脈衝極性與現有相同,因而增強原有 切換狀態。電力供應軌與傳輸線1 5之間經過切換放大器2 1 的,開,電晶體之電阻路徑確保反向EM波脈衝的能量被電力 供應軌V+,GND吸收,如此對能源節省有用。 必須了解可用CMOS以外的技術執行,例如,使用小頻 道上拉,P-頻道下拉,二極電晶體,負電阻裝置例如Gunn ____ - 16 - 本紙張尺度適用中國國家標準(CNS) A4说格moX 297公袭^ 裝 訂 k 480824 A7 B7 五、發明説明(14) 二極體,Mesfet,等。 關於傳輸線15,例如,適當媒體應用於ICs及pcBs及連接 成一般所謂微波帶或同平面波導或帶線,及熟知的可成型 石印,如,電阻提花及蝕刻。實用IC上面傳輸線的介電質 包括二氧化矽(Si〇2)通常當作磁場氧化物,内金屬介電 質’及基板介電質(至少用於半絕緣裝置,如矽絕緣體 型。) 圖9為1C上面傳輸線層範例的部份斷面圖包括三金屬層 56,58及60及二介電層62外64。中間金屬層58如圖示包括 兩傳輸線迴路導軌15a及15b至少大約平行。上金屬層go可 作為AC ·接地’平面連接至正供應電壓v +,下金屬層5 6係 一 ’接地,平面而可被連接至負供應電壓GND。介電層62及 64在5 8金屬傳輸線軌道與1接地’平面56之間及5 8標準使用 二氧化矽形成。整個顯示的結構係按照需要,實用上可能 不必要,如包括一或二,接地,平面及介電層62 , 64。導執 15a,15b之間的物理間隔66影響訊號傳播的差動及共同模 式,較理想,速度必須相等,或大致相等,以便達到間隔 66電磁場的最小散播。使用接地平面改善濾波性質,如提 供結構能力以便驅動不對稱負載,即不平衡,的導軌 15a , 15b 〇 標準IC CMOS方法上面的内金屬介電層很薄,約為〇7#m, 由於微波帶傳輸線特性含低訊號損失,必須具有低特性阻 抗Zo (—向用於無端接,部份端接或串連端接點以減少訊 號折射至可控制量)。自持,無端接,閉合迴路傳輸線i 5 __ ·17- 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公釐) 裝 訂 k 480824 A7 B7 五、發明説明( 具有很低電力消耗以維持移動EM波振盪,而須要克復的介 電及導體損失很低。從圖5b,必須了解,如果傳輸線15及 放大器21沒有電阻損失,則傳輸線15除原來充電傳輸線15 電感及電客元件需要的能量不再需要能量。EM波利用傳輸 線15的全部能量繼續繞傳輸線15移動,在電及磁場之間, 即電容Ce及電感Le元件,傳送或循環。雖然傳輸線15及放 大器21必須有一些電阻損失,見圖5a傳輸線電阻元件反〇_ R2,標準電阻很低,而產生的電阻損失也很低。使用低阻 抗傳輸線15並無不利,而且有電容負載少影響的優點,因 而造成邏輯閘有較「強力」的驅動。 1C上的交又19可藉由金屬層之間的「通孔」完成,較理 想各處孔僅使用傳輸線15總長度s的一小部份。 傳輸線15只有一放大器21連接該傳輸線時會有誤差,而 且EM波不再繞傳輸線15移動因而產生停止波振盪,見圖 l〇a單一放大器21及圖10b差動波型。該種放大器不超出放 大益15電學總長的5。,如果該單一放大器21不能完全「通 過」或「離開」停止正弦波移動,傳輸線15會產生振盪, 並改變含相同相位的振幅於相同位置包括兩固定,兩 區域。 7 然後的行波操作使用少分隔或只有—長型cm〇s雙向放 大器:造,雖然多數小反相器會產生較平滑快速的結果。 放大器21的偏離構造,甚至只有輸入/輸出端子,可預先安 排EM波向傳輸線繞行的—方向移動,例如根據特別起動= 電路將第-及及稍候第二脈衝在不同位置驅上傳輸線,或 -18 - 本紙張尺度適用中H SI家標準(CNS) A4規格(21GX29^爱) *— ---- 裝 訂 k 480824 A7 B7 五、發明説明(16 ) 併入一些已知的微波方向耦合器。 反相傳輸線變壓器可以用來取代交叉(19)並且仍然具有 環狀電磁連續性,見圖11局部詳細2 1T。 圖12顯示一對背對背反相器2 3 a,2 3 b含電源線接頭及如 圖5b傳輸線分配電感(L/2)及電容(C)元件顯示。圖13a顯示 背對背反相器14a及14b的N-頻道及P-頻道Mosfet執行,見 NM0S及PM0S電晶體以外。 圖13b顯示NM0S(N1,N2)及PM0S(P1,P2)電晶體含寄 生電容的當量電路圖,電晶體P2及N2的閘端子連接導軌 15a及電晶體P2及N2的汲極端子。同樣,電晶體P2及N2的. 閘端子連接導軌15b及電晶體P1及N1的汲極端子。PM0S閘 源電容CgsPl及CgsP2,PM0S閘汲電容CgdPl及CgdP2,及 PM0S汲極源及基板電容CdbPl及CdbP2,同樣NM0S閘源電 容CgsNl及CgsN2,NM0S閘汲極電容CgdNl及CgdN2,及 NMOS汲源及基板電容CdbNl及CdbN2均主動吸入傳輸線特 性阻抗Zo,所以對各NM0S及PM0S電晶體的變換時間影響 大幅減少。波型φ 1及φ 2的上升及下降時間比先前電路快 許多。 為了容易了解圖12- 14省略相關的電阻元件(R),圖23a只 顯示傳輸線15及N/PMOS的電容元件(如圖12及13 b)。圖14b 顯示圖14a其他當量電路圖包括該傳輸線分配電感(L/2)元 件及主動電容係數Ceff ··Pv = l / SQRT (L / C). Enhance the frequency, that is, select amplification, so that the delay becomes an integer half-cycle time and divisor to produce the main lowest frequency, that is, the basic frequency F 1 / (2 Tp), and meet the divisor condition. All other integer multiplications of this frequency can also satisfy the divisor condition. However, the higher the frequency, the amplifier gains at a gain of, that is, less, so the transmission line 15 will quickly settle to the fundamental frequency I frequency F. The transmission line 15 has a ring-shaped electromagnetic continuity, which follows the standards of the inverters 23a and 23b ----- -------------------------- · 13-This paper size applies to China National Standard Year (CJNS) A4 specification (210 X 2 public director) ------------ 480824 A7 V. Description of the invention (~~) "- The fast switching time of the transistor develops into a strong square wave of odd harmonics with a fundamental frequency F that effectively enhances oscillation. At the basic oscillation frequency F, including the odd-order $ white wave frequency, since the transmission line 15 is a closed circuit, there is no load in the terminal amplifier 2 1 without any type, which is very suitable for low power consumption and low power demand. The inductance and capacitance per unit length of the transmission line 15 can be changed independently, which is also an advantage and desirable. Figure 6a shows the idealized waveform of the switching amplifier 21 with inverters 23a and 23b. Shortly after start-up, component oscillation waveforms Φ1, Φ2 appeared at the input / output terminals of the amplifier 21, and continued to exist during normal operation. The wave shape φι, 〇2 is basically square and differential, that is, they are out of phase after two opposite rotations. This differential wave pattern Φ 1 ′ Φ2 intersects at the midpoint (V + / 2) of the maximum signal amplitude (ν +). This midpoint (V + / 2) can be regarded as 'zero point', because the wave shape φ 1, φ 2 has the same potential, and there is no displacement current between the conductor tracks 15a and 15b and no differential voltage. presence. For this preferred cyclic traveling wave characteristic of the present invention, this zero point is effectively scanned around the transmission line 15 with very fast rise and fall times and very, clear 'square waves. This zero point also becomes the reference voltage for the reverse offset of the full-cycle dipole clock signal. Considering the transmission line 15, it is convenient to use the full length of the traveling wave and the total length S of the original guide rail 17, both of which are expressed by "electrical length". Figure 6b shows the relationship between the propagation delay or bypass time (Tp), electrical length (°), and physical length (S) of the original wire / track 17. For each of the missing phase waveforms φ 1, φ 2 and the transmission line 15 that is repeatedly detoured by the traveling wave as shown, each square wave offset is equivalent to a full turn, that is, a detour time τρ, and the subsequent reverse Wave migration requires two consecutive turns, that is, two detour times (2xΤρ). Transmission line 丨 5 has a circle of ________- 14- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 480824 A7 B7 V. Description of the invention (12) 180 ° 'electrical length', and two The circle needs to be complete. -360. The two-pole signal loop is equivalent to the full length of the original conductor 17. For example, an electrical length of 180 ° is equivalent to one turn and 1/2 wavelength 1 GHz can form a 50 mm transmission line with a phase velocity (pv) equal to 30% of the speed of light (c), that is, Pv = 0.3 * c, or 5 mm where Pv = 0.03 * c, or 166 mm free space, ie, where Pv = 1 * c. Figures 7 (i) -7 (ix) show that the waveforms Φ1, Φ2 pass through a full cycle to the beginning of the next cycle, especially at 8 samples along the conductor line or track, and the distance is 45 ° electrical length. The phase indication according to FIG. 7 (i) can be anywhere on the orbit 17, that is, two turns of the transmission line 15, for example, arbitrarily marked φ1, φ2, the rise / fall of the waveform 15 is 0/360 °. Set 7 (i) to time t0, and Figure 7 (ii) shows the wave pattern Φ1, Φ2 at time t0 + (0.25 Tp) after the detour of the full length S of the detour 17 is 1/8 (0.125 S), which is equal to the detour 1/4 transmission lines 15, and 45. Electrical length. Time t0 + (0.5 Tp), t0 + (0.75 Tp), t0 + (0 · 75 Τρ) ... t0 + (2 Τρ); bypass 0 · 25 S, 0 · 375 S, 0 · 5 S, ..... 1.0 S and 90. , 135 °, 180 ° ···· 360 ° are shown in Figure 7 (iii)-(ix), respectively. Figures 8a and 8b show a drawing of the offset polarity (as shown by the circle), the offset current (as shown by the arrow), and the instantaneous phase, covering two turns of the transmission line from any 0/360 ° position on the electromagnetic ring transmission line 15 ( Equal to the full length of the continuous original conductor 17). Figure 7 shows only one differential walking electromagnetic (EM) wave pattern (taken φ 1), but the rotation propagation along the transmission line 15 can be in any opposite direction, i.e. clockwise or counterclockwise. The other wave pattern (Φ 2) is of course 180 ° out of phase with the display wave pattern (Φ 1). The actual rotation direction of the EM wave is represented by the Poyntings vector, that is, the cross product of electric and magnetic vectors. Crossing area 19 has no influence signal when EM wave detours _-15- This paper size applies Chinese National Standard (CNS) A4 specification (210X 297 mm) 480824 A7 B7 V. Description of invention (13) φ 1 or Φ 2 agitation. As a result, the fast up / down transition moves around the transmission line at the phase velocity pv, and the switching amplifier 21 amplifies the transition when switching between the supply voltages for the first time. The phases of the wave patterns φ 1 and φ 2 of the transmission line 15 can be accurately determined from any arbitrary reference point on the transmission line 15, and the result has strong phase correlation and stability. Appropriate for bidirectional operation (really suitable for the existing 1C manufacturing technology and habits) Switching amplifier 2 1 is based on back-to-back] viosfet inverters 23a, b, which can be equipped with this type of switching inverting amplifier along the standard length of the transmission line structure in this article. 〇〇〇 Above. The bidirectional inversion operation of the switching amplifier 21 is a synchronous adjustment property. Compared with the conventional conventional timing signal, the rise and fall times of the waveforms φ 1 and φ 2 are indeed very fast based on the electronic conversion time of the Mosfet transistors of the inverters 23a, b. In addition, any 'on' transistor whose transmission line 15 has a better two-way switching amplifier 21's inverter needs to be low impedance, although all parallels are useful for the same problem. The inverter device is switched so that the wave polarity of each amplifier 21 caused by the symmetrical small energy pulse must propagate in both directions. If necessary, the EM wave pulse is guided forward to achieve the effect. The polarity of the reverse EM wave pulse returned to the previously switched amplifier 21 is the same as the existing one, thereby enhancing the original switching state. The switching path between the power supply rail and the transmission line 15 through the switching amplifier 2 1, the resistance of the transistor ensures that the energy of the reverse EM wave pulse is absorbed by the power supply rail V +, GND, which is useful for energy saving. It must be understood that it can be implemented using technologies other than CMOS, such as using small channel pull-ups, P-channel pull-downs, diodes, and negative resistance devices such as Gunn ____-16-This paper standard applies to China National Standard (CNS) A4 grid moX 297 attack ^ Binding k 480824 A7 B7 V. Description of the invention (14) Diode, Mesfet, etc. Regarding the transmission line 15, for example, appropriate media are applied to ICs and pcBs and connected into so-called microwave bands or coplanar waveguides or strip lines, and well-known formable lithographs such as resistance jacquard and etching. The dielectrics of transmission lines on practical ICs include silicon dioxide (SiO2), which is commonly used as magnetic field oxides, internal metal dielectrics, and substrate dielectrics (at least for semi-insulating devices, such as silicon insulators.) Figure 9 is a partial cross-sectional view of an example of a transmission line layer above 1C, including three metal layers 56, 58 and 60 and two dielectric layers 62 and 64. The intermediate metal layer 58 includes two transmission line loop rails 15a and 15b at least approximately parallel as shown. The upper metal layer go can be connected to the positive supply voltage v + as the AC · ground 'plane, and the lower metal layer 5 6 can be connected to the ground. The plane can be connected to the negative supply voltage GND. Dielectric layers 62 and 64 are formed between 58 metal transmission line tracks and 1 ground 'plane 56 and 58 standards using silicon dioxide. The structure of the entire display is as needed and may not be practical, such as including one or two, ground, plane and dielectric layers 62, 64. The physical interval 66 between the guides 15a and 15b affects the differential and common mode of signal propagation. Ideally, the speed must be equal, or approximately equal, in order to achieve the minimum spread of the electromagnetic field at the interval 66. Use the ground plane to improve the filtering properties. For example, to provide structural capability to drive asymmetric loads, that is, unbalanced, the guide rails 15a, 15b. The inner metal dielectric layer on the standard IC CMOS method is very thin, about 0 # m. With transmission line characteristics including low signal loss, it must have low characteristic impedance Zo (—used for unterminated, partially terminated or serially terminated points to reduce signal refraction to a controllable amount). Self-supporting, unterminated, closed-loop transmission line i 5 __ · 17- This paper size applies to Chinese National Standard (CNS) A4 specifications (210 X 297 mm) binding k 480824 A7 B7 V. Description of the invention (with very low power consumption to maintain The mobile EM wave oscillates, and the dielectric and conductor losses that need to be overcome are very low. From Figure 5b, it must be understood that if the transmission line 15 and the amplifier 21 have no resistance loss, the transmission line 15 divides the original charging transmission line 15 and the energy required by the inductor and the passenger components No more energy is needed. The EM wave uses the entire energy of the transmission line 15 to continue to move around the transmission line 15 and is transmitted or circulated between the electric and magnetic fields, that is, the capacitance Ce and the inductance Le element. Although the transmission line 15 and the amplifier 21 must have some resistance loss, As shown in Figure 5a, the resistance of the transmission line resistance element is 0 R2, the standard resistance is very low, and the resistance loss generated is also very low. The use of a low-impedance transmission line 15 is not disadvantageous, and has the advantage of less influence of the capacitive load. "Powerful" drive. Crossover 19 on 1C can be completed by "through holes" between metal layers, and ideally, only the total length of the transmission line is 15 A small part of s. The transmission line 15 has an error when only one amplifier 21 is connected to the transmission line, and the EM wave no longer moves around the transmission line 15 and thus stops the oscillation of the wave. See Figure 10a. Single amplifier 21 and Figure 10b. Differential wave This type of amplifier does not exceed the total electrical length of the amplification amplifier 15. If the single amplifier 21 cannot completely "pass" or "leave" to stop the sine wave movement, the transmission line 15 will oscillate and change the amplitude with the same phase to the same The position consists of two fixed and two regions. 7 The traveling wave operation then uses a less-separated or only-long cm0s bidirectional amplifier: manufactured, although most small inverters will produce smoother and faster results. The deviation structure of the amplifier 21, Even only the input / output terminals can be pre-arranged to move the EM wave in the direction of the transmission line. For example, according to the special start = circuit, the first and second pulses are driven on the transmission line at different positions, or -18-this paper The standard is applicable to the H SI home standard (CNS) A4 specification (21GX29 ^ love) * — ---- binding k 480824 A7 B7 V. Description of the invention (16) incorporates some known microwave methods Coupler. The inverting transmission line transformer can be used to replace the crossover (19) and still have ring-shaped electromagnetic continuity, see Figure 11 for details. 2 1T. Figure 12 shows a pair of back-to-back inverters 2 3 a, 2 3 b with power supply Figure 5b shows the transmission line distribution inductance (L / 2) and capacitor (C) components shown in Figure 5b. Figure 13a shows the N-channel and P-channel Mosfet implementation of back-to-back inverters 14a and 14b, see other than NMOS and PM0S transistors Figure 13b shows the equivalent circuit diagram of the NMOS (N1, N2) and PM0S (P1, P2) transistors with parasitic capacitance. The gate terminals of the transistors P2 and N2 are connected to the rail 15a and the drain terminals of the transistors P2 and N2. Similarly, the gate terminals of the transistors P2 and N2 are connected to the rail 15b and the drain terminals of the transistors P1 and N1. PM0S gate-source capacitors CgsPl and CgsP2, PM0S gate-source capacitors CgdPl and CgdP2, and PM0S gate-source capacitors and substrate capacitors CdbPl and CdbP2. Similarly, NM0S gate-source capacitors CgsNl and CgsN2, NM0S gate-source capacitors CgdNl and CgdN2, and NMOS drain sources Both the substrate capacitances CdbNl and CdbN2 actively suck the characteristic impedance Zo of the transmission line, so the effect on the conversion time of each NMOS and PM0S transistors is greatly reduced. The rise and fall times of waveforms φ 1 and φ 2 are much faster than in previous circuits. For easy understanding of Figure 12-14, the relevant resistance element (R) is omitted, and Figure 23a shows only the transmission line 15 and the N / PMOS capacitor (see Figures 12 and 13 b). Figure 14b shows other equivalent circuit diagrams of Figure 14a including the transmission line distribution inductance (L / 2) element and active capacitance coefficient Ceff.
Ceff=C+CgdN+CgdP+ [(CgsN+CdbN+CgsP+CdbP)/4]; 其中·· CgdN=CgdNl + CgdN2 ; ____ -19- 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 480824 A7 B7 五、發明説明(17 )Ceff = C + CgdN + CgdP + [(CgsN + CdbN + CgsP + CdbP) / 4]; Among them, CgdN = CgdNl + CgdN2; ____ -19- This paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 public PCT) 480824 A7 B7 V. Description of the invention (17)
CgdP=CgdPl + CgdP2 ;CgdP = CgdPl + CgdP2;
CgsN=CgsNl + CgsN2 ;CgsN = CgsNl + CgsN2;
CdbN=CdbNl + CdbN2 ;CdbN = CdbNl + CdbN2;
CgsP=CgsPl + CgsP2 ;及 CdbP=CdbPl + CdbP2。 由閘,汲極,源及基板連線電容引起的電容負載,較理 想,如前述分配。 具有差動及共同模式的傳輸線的優點為Mosfet電晶體内 固有的寄生電容可由傳輸線阻抗Zo吸入,如圖14a及14b所 示,並可用來傳送及儲存能量。NMOS及PMOS電晶體的閘-源電容(Cgs)在訊號導軌15a,15b與各別供應電壓軌之間出 現並可藉由從傳輸線15連接至供應電壓軌以除去適當電容 量而補償,即導軌15a,15b適當減薄。NMOS及PMOS電晶 體的閘-汲極電容(Cgd)在導軌15a,15b之間出現並可藉由 比例增加導軌15a,15b連接反相器23a/b的NMOS及PMOS電 晶體之間的間隔66而補償。 以非電阻為例,0.35 /zm CMOS方法,可用的5 GHz非重 疊時鐘訊號必然造成相速度為30%光速而傳輸線迥路長度 (S/2)為9 mm,如電容分流負載分配及介電常數決定,導體 17的總長度(S)為18 mm。 NMOS及PMOS電晶體的基板接點電容(Cdb)因使用半絕 緣或矽絕緣器型的技術方法可大幅減少。 有一連續的DC路徑直接連接各放大器2 1的端子,即,各 輸入/輸出端子及所有反相器23a,23b,但此路徑的特性為 _-20- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 480824 A7 ______ B7 五、發明説明(~~) "" ^~~ _ 沒有穩定DC操作點。這種Dc不穩性對於各放大器21i_2h 的再生作用及正回饋作用有利。CgsP = CgsPl + CgsP2; and CdbP = CdbPl + CdbP2. The capacitive load caused by the gate, drain, source, and substrate connection capacitance is more ideal, as described above. The advantage of transmission lines with differential and common modes is that the parasitic capacitance inherent in the Mosfet transistor can be drawn in by the transmission line impedance Zo, as shown in Figures 14a and 14b, and can be used to transfer and store energy. Gate-source capacitors (Cgs) of NMOS and PMOS transistors appear between the signal rails 15a, 15b and the respective supply voltage rails and can be compensated by connecting from the transmission line 15 to the supply voltage rails to remove the appropriate capacitance, that is, the rails 15a, 15b are appropriately thinned. The gate-drain capacitance (Cgd) of the NMOS and PMOS transistors appears between the guide rails 15a, 15b and the interval between the NMOS and PMOS transistors of the inverter 23a / b can be increased by proportionally increasing the guide rails 15a, 15b 66 And compensation. Taking non-resistance as an example, the 0.35 / zm CMOS method, the available 5 GHz non-overlapping clock signal will inevitably result in a phase speed of 30% of the light speed and a transmission line circuit path length (S / 2) of 9 mm, such as capacitor shunt load distribution and dielectric The constant determines that the total length (S) of the conductor 17 is 18 mm. The substrate contact capacitance (Cdb) of NMOS and PMOS transistors can be greatly reduced by using semi-insulating or silicon insulator technology. There is a continuous DC path directly connected to the terminals of each amplifier 21, that is, each input / output terminal and all inverters 23a, 23b, but the characteristics of this path are _-20- This paper standard applies to China National Standard (CNS) A4 specification (210 X 297 mm) 480824 A7 ______ B7 V. Description of the invention (~~) " " ^ ~~ _ There is no stable DC operating point. This Dc instability is beneficial to the regeneration effect and positive feedback effect of each amplifier 21i_2h.
傳輸線15可以繞函數邏輯方塊形成閉合迥路經「分接」 獲得「現場」時鐘訊號。CM〇s反相器可作為傳輸線15的 電容「短線」「分接放大器」使用。並可藉由消除相當的 傳輸線現場電容量而脫離共振,即,如上述現場減薄導軌 (1 5a/ 15b)。電答「時鐘分接頭」可以根據間隔設計沿傳輸 線15均勾擴散,如果間隔小於振盪訊號波長,則會減緩EM 波傳播及降低傳輸線15的特性阻抗z〇,但仍然具有優退良 訊號傳輸特性。 在比時鐘訊號波長小的函數邏輯方塊内,無端連接足夠 作相位協調現場定時,見圖15。為了清楚,傳輸線15的一 對連接如顯示稍為偏離,雖然,習慣上為彼此相反。另外 無分接頭裝置包括光雙向被動電阻,電感或傳輸線性質,或 單向或反轉連接,包括以下說明的傳輸線15彼此互相連接。 多數振盪器及傳輸線15可以連接或連結成本發明的另外 一種狀態,包括兩者相位及頻率同步,假定任何標稱頻率 失配不大。電阻,電容,電感或傳輸線連接/連結的正確 長度,或其中任何合併,可以產生優良雙向訊號連接。傳 輸線之間連結或訊號連接可使用已知連結技術達成如用於 微波微帶電路,一般包括分擔相鄰傳輸線之間電磁及/或 電通。單向連接也有優點。接頭及連結器可以維持多數傳 輸線振盥器繞行大系統,不論是在ICs之内或IC之間,即, 印刷電路板(PCBs)上面的同步性及諸和性。The transmission line 15 can form a closed loop around the function logic block to obtain a "live" clock signal via "tap". The CM0s inverter can be used as a capacitor "stub" and "tap amplifier" of the transmission line 15. It is also possible to get rid of resonance by eliminating the equivalent field capacitance of the transmission line, that is, thinning the rail (15a / 15b) as described above. The "clock tap" of the electrical answer can be spread along the transmission line 15 according to the interval design. If the interval is less than the wavelength of the oscillating signal, it will slow down the EM wave propagation and reduce the characteristic impedance z of the transmission line 15, but it still has excellent signal transmission characteristics. . In a function logic block with a smaller wavelength than the clock signal, the endless connection is sufficient for phase-coordinated field timing, as shown in Figure 15. For the sake of clarity, a pair of connections of the transmission line 15 are slightly deviated as shown, although it is customary to be opposite to each other. In addition, tapless devices include optical bidirectional passive resistors, inductive or transmission line properties, or unidirectional or reverse connections, including transmission lines 15 described below that are connected to each other. Most oscillators and transmission lines 15 can be connected or linked to another state of the invention, including phase and frequency synchronization of the two, assuming that any nominal frequency mismatch is not significant. Resistors, capacitors, inductors, or the correct length of the transmission line connections / links, or any combination of them, can produce a good two-way signal connection. The connection or signal connection between the transmission lines can be achieved using known connection technologies. For example, it is used in microwave microstrip circuits, and generally includes sharing electromagnetic and / or electrical communication between adjacent transmission lines. Unidirectional connections also have advantages. Connectors and connectors can maintain the synchronization and generality of most transmission line deflectors around large systems, whether within ICs or between ICs, that is, on printed circuit boards (PCBs).
480824 A7 B7 五、發明説明(19) ""—^— 二或以上傳輸線的連接/連結及交又連接的規範與 Kirchoff電流定律相似,但是基本原理為輸入任何數目的 傳輸線接點,即,連揍或連結,的能量等於該接點輸出的 也量’即是該接點不積存能量。如果供應電壓不變,該規 範即成為Kirchoff電流定律。在實例中,三傳輸線共_接 點,取為簡單,但非唯一,解決方法為一傳輸線具有的特 性阻抗為另外二傳輸線的一半。如果是偶數連結傳輸線, 則個別的特性阻抗相等。不過,滿足Kirch〇ff電流定律的 阻抗連結數目無限。在一傳輸線内,交又連接規範與上述 二或以上傳輸線連接的規範相同。 如果符合下列規範,傳輸線網15上各點會有高品質的差 動訊號波型Φ1及Φ2,相位及振幅: ⑴ 傳輸線基本上符合電學長度 (Π) 滿足上述Kirchoff功率規範 (iii) 相位反轉 當然,無限數連結傳輸線網設計及供應電壓會符合上述三 規範’例如:的慢而低阻抗的短傳輸線連接快而高阻抗的 長傳輸線;及一及/或三維結構,等。不過,欲獲得最佳 波型及最低寄生電力損失,共同模式及差動模式的相位速 度’即,偶數及奇數模式,必須大致相等。相位速度,相 等或大致相等,可以設計成一種改變傳輸線電容系統。 供應電壓V+不需要整個系統不變,假定上述Kirchoff功 率/阻抗維持並產生電壓變換系統,則結合反向器233及23b 的同步調整,系統的不同部份可以在不同供應電壓下操作 ____· 22 - 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公 480824 A7 B7 五、發明説明(20 ) 及在系統的不同部份之間雙向傳送電力。 圖16顯示兩相同傳輸線振盪器的連接以便頻率及相位自 行同步。傳輸線1 5〖及1 52的迥路導軌共同部份係二重連 接,符合上述Kirchoff功率/阻抗規範,因為該部份的阻抗 為傳輸線15i&152其餘部份阻抗(Zo)的一半’及該共同部 份傳送兩傳輸線1 5丨及152的旋轉波能量。如上述’ 一傳輸 線的原始軌道長度S為決定振盪頻率的因素,所以,傳輸 線15 i及152使用相同媒體及其相同長度S會有相同振盪頻率 F及相位諧調。圖16中,各EM波繞傳輸線15ι及152以相反 方向行進及循環,見箭頭1L及2L (或是相對),類似齒輪嚙 合的情況。這種傳輸線雙重連接可立即按序擴及到任何數 目的「嚙合」連接傳輸線振盪器。 圖17a顯示兩相同傳輸線振盧器含傳輸線Μ!*!?〗直接連 接在分散位40及42以達到頻率及相位自行同步化的另一實 例。圖17b顯示該種經被動元件44,46直接連接成為電阻, 電容或電感或任何可行結合。圖17c顯示該種經單項裝置48 直接連接,該裝置可能是反相器5(^及502。單項裝置48確 保從一條傳輸線(152)回到另一條(15l)不發生連結或訊號 折射,即只有另一條路。循環EM波的行進方向由箭頭 1L,2L表示,根據希望作為平行連接的傳輸線對具有反向 行波,實線,但隨意,表示傳輸線振盪器丨5!,而虛表示傳 輸線振盪器152。圖18為圖17a的兩自行同步化傳輸線振盪 器的方便簡化表示,類似的表示會在下圖出現。 圖19a顯示四個自行同步化傳輸線振盪器i5i-154連接,基 __ —_-23- 本纸張尺度適用中國國豕標準(CNS) A4規格(21〇 X 297公董) 480824 A7 B7480824 A7 B7 V. Description of the invention (19) " " — ^ — The specification of the connection / linkage and cross-connection of two or more transmission lines is similar to Kirchoff's current law, but the basic principle is to input any number of transmission line contacts, that is, The energy of the flail or link is equal to the output of the contact, that is, the contact does not accumulate energy. If the supply voltage does not change, this specification becomes Kirchoff's current law. In the example, the three transmission lines have common contacts, which is simple but not unique. The solution is that one transmission line has half the characteristic impedance of the other two transmission lines. For even-numbered transmission lines, the individual characteristic impedances are equal. However, the number of impedance connections that meet Kirchff's current law is unlimited. Within a transmission line, the cross connection specification is the same as the above two or more transmission line connection specifications. If the following specifications are met, high-quality differential signal waveforms Φ1 and Φ2, phase, and amplitude will be present at each point on the transmission line network 15: ⑴ The transmission line basically meets the electrical length (Π) and meets the above Kirchoff power specifications (iii) Phase inversion Of course, the design and supply voltage of an unlimited number of connected transmission line networks will meet the above three specifications, such as: a slow and low impedance short transmission line connected to a fast and high impedance long transmission line; and one and / or three-dimensional structure, etc. However, in order to obtain the best wave pattern and the lowest parasitic power loss, the phase speeds of common mode and differential mode ', that is, even and odd modes must be approximately equal. Phase velocity, equal or approximately equal, can be designed as a system that changes the capacitance of the transmission line. The supply voltage V + does not require the entire system to remain unchanged. Assuming that the above Kirchoff power / impedance is maintained and a voltage conversion system is generated, combined with the synchronous adjustment of the inverters 233 and 23b, different parts of the system can operate at different supply voltages ____ · 22-This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 male 480824 A7 B7) 5. Description of the invention (20) and bidirectional transmission of power between different parts of the system. Figure 16 shows two identical transmission line oscillators Connection for frequency and phase self-synchronization. The common part of the transmission rails 15 and 152 of the transmission line is a double connection, which meets the above Kirchoff power / impedance specification, because the impedance of this part is the rest of the transmission line 15i & 152 The half of the impedance (Zo) and the common part transmit the rotational wave energy of the two transmission lines 1 5 丨 and 152. As mentioned above, the original track length S of a transmission line is a factor that determines the oscillation frequency, so the transmission lines 15 i and 152 are used The same medium and its same length S will have the same oscillating frequency F and phase tune. In FIG. 16, each EM wave travels and cycles in opposite directions around the transmission lines 15m and 152 See arrows 1L and 2L (or relative), similar to the case of gear meshing. This dual connection of the transmission line can be immediately expanded to any number of "meshing" connection transmission line oscillators in sequence. Figure 17a shows two identical transmission line vibrators. Contains transmission line M! * !?〗 Another example of direct connection at scattered positions 40 and 42 to achieve frequency and phase self-synchronization. Figure 17b shows that this kind of passive component 44, 46 is directly connected to become a resistor, capacitor or inductor or any A feasible combination. Figure 17c shows that this type of device is directly connected via a single device 48, which may be an inverter 5 (^ and 502. The single device 48 ensures that there is no connection or signal from one transmission line (152) to another (15l). Refraction, that is, there is only another path. The direction of travel of the circulating EM wave is indicated by arrows 1L, 2L. According to the wish to have parallel traveling transmission line pairs with reverse traveling waves, the solid line, but random, indicates the transmission line oscillator 丨 5 !, and The virtual representation of the transmission line oscillator 152. Figure 18 is a convenient simplified representation of the two self-synchronized transmission line oscillators of Figure 17a, similar representations will appear in the figure below. Figure 19a shows four autonomous Synchronized transmission line oscillator i5i-154 connection, based on __ —_- 23- This paper size applies to China National Standard (CNS) A4 specification (21〇 X 297 public director) 480824 A7 B7
本上如圖17a-17e’但另外提供本發明第五主動傳輸線定時 訊號源,根據四傳輸線振盪器15i_154 EM波的環形方向K L4提供循環行進ΕΜ波。如圖示中心第五傳輸線振靈器實 質上包括其他四振盪器的各一部份及具有一環形方向几, 與其他相反,特別為順時鐘,而1L- L4為反時鐘方向。必 須了解,這種傳輸線振盪器連接一起的方法也可擴大到任 何需要數目及任何需要的全圖案變化以覆蓋任何^要的地 方。 另外一種連接如圖19b所示,其中中心第五傳輸線振盪器 為非循環型,但是不僅有用並且有利於取得定時訊號所需 的相位。 圖20顯示兩自行同步振盪器含傳輸線15ι及152實際上並 無連接,但操作上磁連結;其目的係有利於使用延長的傳 輸線以便達到更多更好的磁連結。圖2 1顯示另一磁連結自 行同步振盪器含傳輸線1 51及1 52的實例,基本上如圖2〇 , 含一連結加強磁鐵帶52放在磁連結相鄰部份之間。 圖22顯示三自行同步傳輸線振盪器含傳輸線丨5 i 1 &及 153由放在傳輸線之間的第一磁鐵帶52,及放在傳 輸線151 2及153之間的第二磁鐵帶磁連結。作為振盪訊號 源,傳輸線152不需要任何再生裝置21只要足夠振盪能量從 構成裝置2 1的其他傳輸線1 5!及1 53連結。實用上,傳輸線 152需要較長及較大周圍面積而不需要或具有再生裝置21 , 也不需要交叉19;較理想為奇數倍長度(3S,5S,7S,等) 或至少電學長度至少等於傳輸線15!及153之一。當然,另 裝 訂 1 ______-24- 2 本紙張尺度適用中國國家標準(CNS) A4規格(210x 297公釐) 480824 A7 B7 五、發明説明(22 ) 外隱含頻率鎖定及相位鎖定的自行同步振i器於適當間隔 (如使用傳輸線151及153)。 另外的替代實例包括使用介電材料(未顯示)跨過導軌電 磁連結部份的上面及/或下面。 以不同頻率同步操作傳輸線振盪器不但可行且實際。圖 24中,兩自行同步振盪器的傳輸線為不同電學長度。特 別,使用相同傳輸線裝置/材料,第一傳輸線1 5 ^具有總導 體長度S及基礎振盪頻率F=F1,與具有總導體長度為第一 傳輸線1 5!的總導體長度三分之一,即§ / 3 ,頻率為3 F,的 傳輸線152連結及同步。虛線前頭表示em波的旋轉方向。 操作連接如圖17a-c所示,雖然其他技術也可以使用。自行 同步係由於上述強力第三諧波(3F)的第一傳輸線15l為方 型。相似的結果來自較高奇數諧波,如,5F,7F ,等頻 率。 在不同奇數諧波相關頻率操作的振盪器傳輸線之間的較 佳連結為單向,使較低自然頻率線(1 5!)不受激勵以嘗試與 較咼自然頻率線(152)同步。任何數目的不同奇數諧波相關 頻率的振盧器傳輸線可以連結在一起及同步,如圖24所 示。 循環傳輸線振盪器可用來產生及分配基準定時訊號,如 時鐘,於半導體積體電路(IC)内;及也用於印刷電路板 (PCB),如,用來固定及連接電路包括多數ICs,或,其他 任何確實需要定時基準訊號的適當裝置/系統。 用於ICs如,根據1C製造方法及其發展計劃模擬使用工業 L_— —_ -25- 本紙張尺度適用中國國家標準(CNS) A4規格(21〇 χ 297公釐) 裝 訂 k 480824 A7 B7 23 五、發明説明( 標準SPICE技術證明非常高頻率,至數千GHz,的時鐘訊號 的供應潛勢。訊號產生及分配可以主動存於及用於含預定 相位及其間相位關係的1C的各部份,包括許多具有相同或 不同頻率的時鐘訊號。另外,傳輸線振盪器的操作原理及 其自行同步相亙連結不只提供任何1C内及ICs之間操作電路 可靠定時訊號服務,並且可以確信對ICS間資料傳送也很重 要並具創意。 整個傳輸線15裝置及電路網包括再生電路2 1的振盪。傳 輸線1 5無端操作,即,傳輸線形成一閉合迺路。傳輸線的 特性阻抗Zo很低及只需頂部能量維持振盡。 較理想,兩導軌1 5a,15b之間的阻抗均勻分配,以便獲 得良好平衡,有助達成良好定義差動訊號波型(φΐ , φ2)。 如果訊號Φ 1,Φ2在傳輸線15上遇到這種180。或接近180。 的所有反相放大器2 1連接傳輸線1 5的相位移位要求,便會 產生共振,即,所有放大器2 1在沿傳輸線1 5各點之間已知 相位關係的協調狀態下操作。兩種訊號能量,電感及電 容,即磁力及電力,傳送至傳輸線15,如為差動模式在訊 號導體15a,15b之間,如為兩個別共同模式則在各訊號導 體與基準接地之間(如果沒有上面及下面接地平面,則不 存在,也不用無遮屏絞線電纜連接)。 CMOS反相器為非線型操作切換及放大電器元件,具有 交又傳導電流低損失,因為正常會有損失的電晶體,輸入’ 閘及’輸出’汲極電容包括電晶體基板電容都被吸入交變的 阻抗Zo,所以電力消耗並不遵守一般1/2 · CV2公式。 -26- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 裝 訂 線 A7Figures 17a-17e 'are originally provided, but a fifth active transmission line timing signal source of the present invention is additionally provided to provide a cyclically traveling EM wave according to the circular direction K L4 of the four transmission line oscillator 15i_154 EM wave. As shown in the figure, the fifth transmission line vibrator in the center actually includes each part of the other four oscillators and has a ring direction, contrary to the others, especially clockwise, and 1L-L4 is counterclockwise. It must be understood that this method of linking the transmission line oscillators can also be extended to any required number and any required full pattern change to cover wherever it is needed. Another connection is shown in Figure 19b, in which the center fifth transmission line oscillator is a non-cyclic type, but it is not only useful but also useful for obtaining the required phase of the timing signal. Figure 20 shows that the two self-synchronous oscillators with transmission lines 15m and 152 are not actually connected, but are magnetically connected for operation; the purpose is to facilitate the use of extended transmission lines in order to achieve more and better magnetic connections. Fig. 21 shows an example of another magnetic link self-synchronizing oscillator including transmission lines 151 and 152. Basically, as shown in Fig. 20, a magnetic strip 52 including a link is placed between adjacent parts of the magnetic link. Fig. 22 shows a three self-synchronous transmission line oscillator including transmission lines 5 i 1 & 153 magnetically connected by a first magnet belt 52 placed between the transmission lines and a second magnet belt placed between the transmission lines 1512 and 153. As the oscillating signal source, the transmission line 152 does not need any reproduction device 21 as long as it has sufficient oscillating energy to be connected from the other transmission lines 15 and 153 constituting the device 21. Practically, the transmission line 152 needs a longer and larger surrounding area without the need for or with a regeneration device 21, and does not need to cross 19; ideally, it is an odd number of times (3S, 5S, 7S, etc.) or at least the electrical length is at least equal to One of transmission lines 15! And 153. Of course, additional binding 1 ______- 24- 2 This paper size applies to China National Standard (CNS) A4 (210x 297 mm) 480824 A7 B7 V. Description of the invention (22) Self-resonant vibration with implicit frequency lock and phase lock At appropriate intervals (such as using transmission lines 151 and 153). Additional alternative examples include the use of a dielectric material (not shown) across the top and / or bottom of the rail's magnetically connected portion. It is not only feasible and practical to operate transmission line oscillators at different frequencies simultaneously. In Figure 24, the transmission lines of the two self-synchronous oscillators have different electrical lengths. In particular, using the same transmission line device / material, the first transmission line 1 5 ^ has a total conductor length S and the fundamental oscillation frequency F = F1, and has a total conductor length one third of the total conductor length of the first transmission line 15! § / 3, the frequency is 3 F, and the transmission line 152 is connected and synchronized. The front of the dotted line indicates the direction of rotation of the em wave. The operational connections are shown in Figures 17a-c, although other technologies can be used. The self-synchronization is due to the above-mentioned strong third harmonic (3F) first transmission line 15l having a square shape. Similar results come from higher odd harmonics, such as 5F, 7F, iso-frequency. A better connection between the oscillator transmission lines operating at different odd harmonic-related frequencies is unidirectional, leaving the lower natural frequency line (15!) Unexcited in an attempt to synchronize with the higher natural frequency line (152). Lubricator transmission lines of any number of different odd harmonic-related frequencies can be linked together and synchronized, as shown in Figure 24. Cyclic transmission line oscillators can be used to generate and distribute reference timing signals, such as clocks, in semiconductor integrated circuits (ICs); and also printed circuit boards (PCBs), such as to fix and connect circuits including most ICs, or , Any other suitable device / system that really needs a timing reference signal. For ICs, for example, industrial use is simulated according to the 1C manufacturing method and its development plan. -25- This paper size applies Chinese National Standard (CNS) A4 specifications (21〇χ 297 mm) binding k 480824 A7 B7 23 5 Description of the invention (Standard SPICE technology proves the supply potential of clock signals at very high frequencies, up to thousands of GHz. Signal generation and distribution can be actively stored and used in various parts of 1C with predetermined phases and phase relationships between them, Including many clock signals with the same or different frequencies. In addition, the operating principle of the transmission line oscillator and its self-synchronous phase connection not only provide reliable timing signal services for any operating circuits within 1C and between ICs, but also can be confident of data transmission between ICS It is also very important and creative. The entire transmission line 15 device and circuit network includes the oscillation of the regeneration circuit 21. The transmission line 15 operates endlessly, that is, the transmission line forms a closed loop. The characteristic impedance Zo of the transmission line is very low and only the top energy is needed to maintain it. Ideally, the impedance between the two guide rails 15a and 15b is evenly distributed in order to obtain a good balance and help achieve a well-defined difference Dynamic signal waveform (φΐ, φ2). If the signal Φ1, Φ2 meets this 180. or close to 180. on the transmission line 15, all inverting amplifiers 21 connected to the phase shift requirements of the transmission line 15 will produce Resonance, that is, all amplifiers 21 operate in a coordinated state with a known phase relationship between points along the transmission line 15. Two types of signal energy, inductance and capacitance, that is, magnetic force and power, are transmitted to the transmission line 15, if differential The mode is between the signal conductors 15a and 15b. If there are two common modes, it is between the signal conductors and the reference ground (if there is no ground plane above and below, it does not exist, and it is not connected by unshielded twisted-pair cables) CMOS inverters are non-linear operation switching and amplifying electrical components, with low losses of alternating and conducting currents, because there will normally be lossy transistors. The input 'gate and' output 'drain capacitors, including the transistor substrate capacitance, are all sucked in. The alternating impedance Zo, so the power consumption does not follow the general 1/2 · CV2 formula. -26- This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 mm) Gutter A7
通常假設因咖電晶體閘電容加入及排出的電力 :可:免。不過,傳輸線15的自持振盡性質能以低;力損 t體閑的端子。這是由於事實需要的起動能量係 在靜心中,即刪問的電容的電容場及 ,場元件’之間交變”斤以,傳輸線15内含 二王at失’事貫上在循環。能量節省適用於傳輸線1 $ 所有搡作連接的電晶體閘。 設想這種低損失效率的傳輸線振盪器可作為定時NS用於 許f從前流行的邏輯系統,該系統因不能用已經廢棄,原 因是產生些問題,如,時鐘偏移,時鐘分配,電力消 =,等。非消耗型該種邏輯配置的例子包括多相邏輯及能 f回收或絕熱切換邏輯,該種邏輯配置為熟知本技藝者所 了解。 π 圖24顯7F用於單鋰IC 68的時鐘分配電路網(如其他圖, 不照比例)。1C 68貝有多數傳輸線如圖示為迥路1L· UL , 其中迥路1L-10L及13L皆具有相等的主動長度(如上述為s) 並在頻率F振盪,而迥路11L及12L各具較短的迥路長度(如 上述為S/3)並在頻率3 F振盪。迥路1L-8L及11L-13L為全 傳輸線振盪器包括再生裝置,而儿及1〇]1為前面四傳輸線 的部份’分別為1L,3L,4L及5L ; 4L,5L , 6L及8L。 迴路13L的傳輸線(15)靠近ic 68邊緣(即劃線)的側面延 長以便可以連結另外分開的配置相似的單鋰IC,使用磁連 結鎖定頻率及相位的倒裝技術,如上述。分開單鋰IC的頻 率及相位鎖定對混合系統非常有用。 ___ -27- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 25 A7 B7 五、發明説明( 圖5…、tf亙相連接傳輸線振盪器立體電路網用於訊號分 配的可行性,特別是簡單金字塔型配置,㈣任何其他構 k可以達到希望的作用,不論多複雜,只要符合連接規範 有關的電學長度,阻抗配合,任何資料傳輸的相位 等。 、ICs的汉计可以為任何構造以便達到要求的總頻率及相位 鎖Si相位相干性,包括用於二或以上自持傳輸線之間的 振I器以便在及所有1C有關各邏輯及處理方塊之間同步 控制及操作資料處理作業。 圖26a顯示一雙相位分接點的例子,使用一對cM〇s反相 器Tth* 7〇2分別連接傳輸線導軌15a及15b以提供現場時鐘 於及/或按邏輯方塊72l分配。雖然邏輯方塊72ι如圖示在傳 輸線1 5 f閉合’,另外在傳輸線丨5環繞的面積之外包括邏輯 方塊722及附屬反相器7〇3,7〇4,及跨接傳輸線15的導軌 15a,15b。如果需要,大邏輯方塊72ι及/或%,傳輸線15 可以分接多對反相器70 ’包括任何邏輯方塊72需要的現場 相位’見虛線。準確選擇振盪時鐘訊號φΐ , 〇2的能力容 許複雜的管線邏輯及多相邏輯(見圖29下方)按設計操作及 控制。 圖26b與上述不同,其中邏輯方塊711及722分別由處理元 件73!,732取代,雖然元件可以更多,而一或更多的傳輸 線可以用來定時一或更多的處理元件。二或較多的處理元 件可獨立及/或結合操作,即,併聯以便達到非常快速及 有力的資料處理ICs/系統。 -28- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 480824 A7 B7 五、發明説明(% ) 圖27a顯示三同心配置的實體長度逐漸減少的傳輸線 15广153。不過,三傳輸線15丨〜153的每個傳輸線都可以製 成在同一頻率振盪,不論是裝置或是藉由增加單位長度電 感及/或電容而減少的環繞較短傳輸線1 52及1 &的各Em波 旋轉速度。另外,傳輸線15丨〜153可以選擇性具有一或更多 的操作連接70及72以達成三傳輸線l5l〜153同步。這種連接 70,72的優點,同步性除外,為傳輸線15丨〜I、可以 (0 作為一單一多纖傳輸線; (ii) 具有較小導軌(15a,15b); (iii) 涵蓋較大的八時範圍; (iv) 產生較少的表皮效應損失;及 (v) 產生較少的串調及連結。 圖2 8a顯示傳輸線具有一交又迥路連接於a,B,C及D位 置之間,並包括另外傳輸線15c,15d,該傳輸線具有,在 本例中,90°電學長度以配合A,B及C,D位置的間距。可 以選擇其他交又連接的電學長度,但操作連接的A , B , C 及D位置的間距不同。交叉連接容許在傳輸線丨5圍繞的範 圍内有另外的分接點。部份傳輸線15d於A及C點之間連接 並與線74代表的部份傳輸線15平行。同樣,部份傳輸線i5c 於B及D點之間連接並與線76代表的部份傳輸線15平行。部 份傳輸線15c,15d,74及76會達到滿意,如果所含的阻抗 各為其餘傳輸線1 5阻抗的一半,如上述。傳輸線1 5及1 5 c,d 操作連接放大器21。圖28b顯示傳輸線15的交又迥路連接及 位置A,B,C及D相對78及80,即,代替74及76,的部份 -29- 本紙張尺度適财a S家標準(CNS) A4規格(⑽X 297公釐) 裝 訂 480824 A7 _____B7 五、發明説明(27 ) 傳輸線15的配置,但是再度應用Kirchoff型規範造成各部 份15 c,1 5 d,7 8及8 0各具阻抗為其餘相關傳輸線阻抗的一 半。按需要增加額外多數傳輸線,例如,15c,d,橫過傳 輸線1 5實屬可行。 圖29a顯示一種產生四相位時鐘訊號的方法。傳輸線15完 成其訊號傳送界限的雙繞行,如圖示為矩形,而另外重複 繞行還可產生更多的相位。如例中所示,位置A1,A2,B 1 及B2會產生現場四相位時鐘訊號,如位置c 1,C2,D1及 D2所產生一樣。重複的界限繞行須配合傳輸線丨5的隔離間 距以避免相亙連結。圖29b顯示點Al,A2,B1及B2,及 C1 ’ C2 ’ D1及D2的理想四相位訊號波型。 圖30顯示開端被動傳輸線(15e,15f)連接閉合迥路傳輸 線15並具有下列特性,180。電學長度,分接點不產生反作 用,因為作為開端電路振盪短線。沿本開端線15e ’ f沒有 放大為21 ’但疋反相益23放在各軌道15c及15d的遠端以減 少假振盪的危險。確實,調整短線丨5e,f的振盪,傳輸線 15可具有用再生效果可用於增強及/或穩定用途。 被動傳輸線連接沒有阻抗配合的特別要求,可以用來連 接相同’或大部份相同頻率的傳輸線,至少假定二系統之 間建立充分的連接,其中連接點有相同的連接電路網相關 相位。這種連接可以協助ICs及系統之間高速數位訊號同步 化’因為非時鐘訊號(如,IC/系統資料線)具有相似的延誤 特性,如果時鐘連接而未併入相同路徑(如,帶電纜,绞 線’傳輸線)’則會造成不同系統間資料及定時干擾。 I ——_______-30- 本紙張尺度適用中國國豕標準(CNS) A4規格(210X297公爱:) 480824 A7 B7 五、發明説明(28) 圖31顯示兩單鋰ICs 68l,的兩時鐘分配電路網的相干 頻率及相位操作例子,各該…具有時鐘產生及分配及1(:内 連接對E,F及G,Η。該相關兩I c會產生相干操作,即,在 相同頻率及相同相位關係,其中各連接的電學長度大約 180°或滿足360° . η+ 180°,其中η為〇或整數。 單對的1C内連接(Ε,F或G , Η)會造成頻率及相位鎖定。 多於一對的1C内連接(Ε,F及G,Η如顯示)會造成在時鐘波 方向或旋轉鎖定。 如圖3 1所示為第一及第二短線連接82及83,雖然任何一 連接可以更多。第一短線連接82具有總電學長度180。以便 協助穩定操作。第二短線連接83係為開端型,也具有電學 長度1 8 0 °及有助於穩定操作。該種短線連接§ 2,8 3對於本 發明的非1C應用特別有用’其中導軌定義比用於ics較不精 確。 連接對E ’ F及G ’ Η及連接8 2 ’ 8 3的阻抗在正常操作中可 以為任何值,一旦這些連接通電,其中沒有淨電流供校正 相位。不過,較理想,這些連接Ε,F及G,Η及82,83的阻 抗大於所連接的傳輸線1 5振盪器阻抗。這些連接支撑靜止 ΕΜ波而非移動ΕΜ波。 圖3 1的連接同樣可以應用在1C内部,1C之間,1C與PCB 及/或任何非1C,即,PCB對PCB,的系統連接。 圖32顯示可選擇數位分流電容器在Mosfet電晶體外製 成。 圖32顯示的可選擇數位分流電容器能操作連接傳輸線15 -31 - 本紙張尺度適用中覊通家標準(CNS) A4規格(210X297公釐) 裝 訂 k 480824 A7 B7 五、發明説明( 並控制稍為延遲的移動EM波,即,振盪頻率可以控制。這 種延遲對傳輸線頻率的細調整有用。如圖示,八個分流電 容器係由Mosfet電晶體裝配完成。Mosfet電晶體Ml,M2, M5及M6為PMOS電晶體而Mosfet電晶體M3,M4,M7及M8 為NMOS電晶體。It is generally assumed that the power added and discharged due to the capacitance of the transistor thyristor: Yes: Free. However, the self-sustaining vibration exhaustion property of the transmission line 15 can be low; the terminal of the body t is damaged. This is due to the fact that the required starting energy is in meditation, that is, the capacitance field of the capacitor and the field element 'alternate', and the transmission line 15 contains the two kings at the loss. Savings apply to all the thyristors connected to the transmission line for $ 1. It is envisaged that this low-loss efficiency transmission line oscillator can be used as a timing NS for the previously popular logic system. This system has been abandoned because it cannot be used because of the Some problems, such as clock offset, clock distribution, power consumption, etc. Examples of non-consumable logic configurations of this type include polyphase logic and recoverable or adiabatic switching logic. This type of logic configuration is well known to those skilled in the art. Understand. Π Figure 24 shows 7F clock distribution circuit network for single lithium IC 68 (as in other figures, not to scale). 1C 68B has most transmission lines as shown in Figure 1L · UL, of which 1L-10L Both 13L and 13L have the same active length (such as s above) and oscillate at frequency F, while 11L and 12L each have a shorter circuit length (such as S / 3) and oscillate at frequency 3 F. 1L-8L and 11L-13L for full transmission line oscillation Including the regeneration device, and 1 and 10] 1 are the first four transmission lines, which are 1L, 3L, 4L, and 5L; 4L, 5L, 6L, and 8L. The 13L transmission line (15) is near the edge of IC 68 (that is, The underside of the line is extended so that it can be connected to separate single-lithium ICs with similar configurations, using magnetic connection to lock the frequency and phase of flip-chip technology, as described above. Separating the frequency and phase lock of the single-lithium IC is very useful for hybrid systems. ___ -27- This paper size is applicable to Chinese National Standard (CNS) A4 (210 X 297 mm) 25 A7 B7 V. Description of the invention (Figure 5 ..., tf 亘 Phase-connected transmission line oscillator three-dimensional circuit network is feasible for signal distribution Performance, especially the simple pyramid configuration, any other configuration k can achieve the desired effect, no matter how complicated, as long as it meets the electrical length, impedance coordination, phase of any data transmission, etc. related to the connection specification. Any construction in order to achieve the required total frequency and phase-locked Si phase coherence, including oscillators for two or more self-sustaining transmission lines in order to address all 1C related logic and processing methods Synchronous control and operation of data processing operations. Figure 26a shows an example of a bi-phase tapping point. A pair of cM0s inverters Tth * 702 are connected to the transmission line guide rails 15a and 15b respectively to provide a field clock at and / Or allocate according to the logic block 72l. Although the logic block 72m is closed on the transmission line 15f as shown, in addition to the area surrounded by the transmission line 5, it includes the logic block 722 and the auxiliary inverters 703, 704, and The guide rails 15a, 15b of the transmission line 15 are bridged. If necessary, the large logic blocks 72m and / or%, the transmission line 15 can tap multiple pairs of inverters 70 'including the field phase required by any logic block 72'. See dotted lines. The ability to accurately select the oscillating clock signal φΐ, 〇2 allows complex pipeline logic and polyphase logic (see Figure 29 below) to operate and control as designed. Fig. 26b is different from the above, in which logic blocks 711 and 722 are replaced by processing elements 73 !, 732, respectively, although there may be more elements, and one or more transmission lines may be used to time one or more processing elements. Two or more processing elements can operate independently and / or in combination, that is, in parallel to achieve very fast and powerful data processing ICs / systems. -28- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 480824 A7 B7 V. Description of the invention (%) Figure 27a shows a three-concentric configuration with a decreasing physical length of the transmission line 15-153. However, each of the three transmission lines 15 丨 ~ 153 can be made to oscillate at the same frequency, whether it is a device or a shorter transmission line 1 52 and 1 & that is reduced by increasing the unit length inductance and / or capacitance. Rotation speed of each Em wave. In addition, the transmission lines 151 to 153 may optionally have one or more operational connections 70 and 72 to achieve synchronization of the three transmission lines 151 to 153. The advantages of this connection 70, 72, except for synchronization, are transmission lines 15 丨 ~ I. (0 as a single multi-fiber transmission line; (ii) has smaller guide rails (15a, 15b); (iii) covers larger (Iv) produces less skin-effect loss; and (v) produces less crosstalk and connection. Figure 2 8a shows that the transmission line has an intersection and a distant connection to positions a, B, C, and D Between, and includes additional transmission lines 15c, 15d, which have, in this example, a 90 ° electrical length to match the distance between A, B, and C, D positions. You can choose other electrical lengths that are connected alternately, but operate the connection The distances between A, B, C and D are different. The cross connection allows additional tapping points within the range surrounded by transmission line 5. Part of the transmission line 15d is connected between points A and C and connected to the part represented by line 74. The partial transmission line 15 is parallel. Similarly, a part of the transmission line i5c is connected between points B and D and is parallel to the partial transmission line 15 represented by the line 76. The partial transmission lines 15c, 15d, 74, and 76 will be satisfactory if the included impedance Each is half the impedance of the remaining transmission lines 15 as described above. Transmission lines 15 and 15 c, d operation is connected to the amplifier 21. Fig. 28b shows the connection and position of the transmission line 15 alternately and positions A, B, C and D relative to 78 and 80, that is to say, instead of 74 and 76, part -29- Aa House Standard (CNS) A4 Specification (⑽X 297mm) Binding 480824 A7 _____B7 V. Description of Invention (27) Configuration of Transmission Line 15 but re-applying Kirchoff-type specification causes each part 15 c, 1 5 d, 7 Each of 8 and 80 has an impedance that is half of the impedance of the other relevant transmission lines. It is feasible to add an extra majority of transmission lines, such as 15c, d, across the transmission line 15. Figure 29a shows a method for generating a four-phase clock signal. Transmission lines 15 to complete the double winding of its signal transmission limit, as shown in the figure is rectangular, and repeating the winding can also generate more phases. As shown in the example, the positions A1, A2, B 1 and B2 will generate a live four-phase Clock signal, as generated by positions c 1, C2, D1, and D2. Repeated detours must match the separation distance of the transmission line 5 to avoid interlocking connections. Figure 29b shows points Al, A2, B1, and B2, and C1 'C2' Ideal four-phase signal waveform for D1 and D2 Figure 30 shows that the open-ended passive transmission line (15e, 15f) is connected to the closed-loop transmission line 15 and has the following characteristics, 180. Electrical length, the tapping point does not have a reaction because it acts as a short-circuit oscillating short line. There is no along the open-end line 15e'f Magnified to 21 'but the reverse phase benefit 23 is placed at the far end of each track 15c and 15d to reduce the risk of false oscillations. Indeed, adjusting the short-line oscillations 5e, f, the transmission line 15 may have a regeneration effect that can be used to enhance and / Or stable use. Passive transmission line connections have no special requirements for impedance coordination. They can be used to connect transmission lines of the same frequency or most of the same frequency. At least it is assumed that sufficient connections are established between the two systems, where the connection points have the same phase of the connection circuit network. This connection can help synchronize high-speed digital signals between ICs and the system. 'Because non-clock signals (such as IC / system data lines) have similar delay characteristics, if clock connections are not merged into the same path (such as with cables, Twisted wire 'transmission line)' will cause data and timing interference between different systems. I ——_______- 30- This paper size applies to China National Standard (CNS) A4 specification (210X297 public love :) 480824 A7 B7 V. Description of the invention (28) Figure 31 shows two single lithium ICs 68l, two clock distribution circuits Examples of coherent frequency and phase operation of the network, each ... shall have clock generation and distribution and 1 (: interconnected pairs E, F and G, Η. The two I c in correlation will produce coherent operations, that is, at the same frequency and the same phase Relationship, where the electrical length of each connection is approximately 180 ° or satisfies 360 °. Η + 180 °, where η is 0 or an integer. A single pair of 1C inner connections (E, F or G, Η) will cause frequency and phase lock. More than one pair of 1C internal connections (E, F, and G, as shown) will cause clockwise or rotational lock. As shown in Figure 31, the first and second short-circuit connections 82 and 83, although either There can be more connections. The first stub connection 82 has a total electrical length of 180. In order to assist stable operation. The second stub connection 83 is an open type and also has an electrical length of 180 ° and contributes to stable operation. This type of stub connection § 2, 8 3 is particularly useful for non-1C applications of the present invention ' The rail definition is less precise than for ics. The impedance of the connection pairs E 'F and G' Η and connections 8 2 '8 3 can be any value in normal operation. Once these connections are energized, there is no net current for phase correction. However, ideally, the impedances of these connections E, F and G, Η and 82, 83 are greater than the impedance of the connected transmission line 15 oscillators. These connections support stationary EM waves rather than mobile EM waves. Figure 3 The 1 connection is also possible Used within 1C, between 1C, 1C and PCB and / or any system other than 1C, ie PCB to PCB. Figure 32 shows the optional digital shunt capacitor made outside the Mosfet transistor. Figure 32 shows the Digital shunt capacitor can be selected to operate the connection transmission line 15 -31-This paper size is applicable to CNS A4 specification (210X297mm) binding k 480824 A7 B7 5. Description of the invention (and control the mobile EM wave with a slight delay, That is, the oscillation frequency can be controlled. This delay is useful for fine adjustment of the transmission line frequency. As shown in the figure, the eight shunt capacitors are assembled by Mosfet transistors. Mosfet transistors M1, M2, M5 and M6 are PMOS Crystals Mosfet transistors M3, M4, M7 and M8 are NMOS transistors.
Mosfet Ml,M3,M5及M7具有汲極及源端子連接内傳輸 線導體,例如,15a及Mosfet M2,M4,M6及M8具有汲極 及源端子連接外傳輸線導體15b。Mosfet Ml,M2,M5及 M6的基板端子連接正電壓供應軌V+及Mosfet M3,M4, M7及M8的基板端子連接負電壓供應軌GND。 裝 訂Mosfet M1, M3, M5, and M7 have drain and source terminals connected to internal transmission line conductors. For example, 15a and Mosfet M2, M4, M6, and M8 have drain and source terminals connected to external transmission line conductors 15b. The substrate terminals of Mosfet M1, M2, M5 and M6 are connected to the positive voltage supply rail V + and the substrate terminals of Mosfet M3, M4, M7 and M8 are connected to the negative voltage supply rail GND. Binding
Mosfet Ml及M2的閘端子連接一起並由控制訊號CS0控制 及Mosfet M3及M4的閘端子連接一起並由控制訊號CS0反向 控制。同樣,Mosfet M5及M6的閘端子連接一起並由控制 訊號CS1控制及Mosfet M7及M8的閘端子連接一起並由控制 訊號CS1反向控制。 以下為Mosfet分流電容器(Ml-M8)給於傳輸線15的電 容,即· Mosfet開,,的真值表。 CS0 CS1 Mosfet ’ 開’ Mosfet 丨關’ 0 0 M1-M8 - 0 1 M1-M4 M5-M8 1 0 M5-M8 M1-M4 1 1 - M1-M8 k 較理想,連接至’内部’及’外部’傳輸線導軌15a,15b的各 分流電容器的數量及尺寸要相同,即平衡。雖然圖示八個 -32- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 480824 A7 B7 五、發明説明(3〇 )The Mosfet M1 and M2 gate terminals are connected together and controlled by the control signal CS0, and the Mosfet M3 and M4 gate terminals are connected together and controlled by the control signal CS0 in the reverse direction. Similarly, the gate terminals of Mosfet M5 and M6 are connected together and controlled by the control signal CS1, and the gate terminals of Mosfet M7 and M8 are connected together and controlled by the control signal CS1 in the reverse direction. The following is the truth table of the capacitance given to the transmission line 15 by Mosfet shunt capacitors (Ml-M8), that is, Mosfet on. CS0 CS1 Mosfet 'On' Mosfet 丨 Off '0 0 M1-M8-0 1 M1-M4 M5-M8 1 0 M5-M8 M1-M4 1 1-M1-M8 k Ideally connect to' internal 'and' external ' 'The number and size of the shunt capacitors of the transmission line guides 15a, 15b should be the same, that is, balanced. Although eight are shown in the figure -32- This paper size applies to Chinese National Standard (CNS) A4 (210 X 297 mm) 480824 A7 B7 V. Description of the invention (30)
Mosfet分流電容器M1-M8,只要傳輸線15如圖32所示為平 衡,任何數量具有適當尺寸及電容的Mosfet分流電容器都 可使用。 其他用於製造可控制數位分流電容器的構造可能會用或 不用Mosfet電晶體製成。一個已知例子,使用Mosfet,例 如,可以使用二位元加權Mosfet電容器。另外,例如, M0S電容器供應可變電容包括可變電抗器器及P/N二極 體。 電容器沿傳輸線重複標準間距排列有利阻抗分配。 圖33顯示如何安排資料及/或電力通過傳輸線的路徑及藉 由類似鐵路枕木的裝置8 8,較理想,以標準間距放置在導 軌15a,15b的下面,以便改變電容負載。另外,裝置88可 放在傳輸線導執15a’ 15b的上面及/或下面。如斷面圖所 示,軌道15a,15b較理想放在金屬層上面並與裝置88絕 緣,如,亞氧化矽層92。這種裝置88具有增加傳輸線電容 的作用及用來改變傳輸線的阻抗,即,EM波移動速度。這 種裝置88也可以用來安排資料及/或電力的路徑99。如圖 示,安排資料及/或電力的路徑99,因為傳輸線15上面的時 鐘訊號Φ1,Φ2為差動,這些時鐘訊號φΐ,φ2對安排資料 及/或電力訊號沒有影響。 雙向開關(21)使用反相器23a,23b作為時鐘頻率同步整 流器’因為可從大部份至GND負電壓供應軌及大部份至v+ 正電壓供應軌的電阻路徑推具。所以,由反相器23a及23b 背對背構成的NMOS及PMOS電晶體(見圖22b)必須由傳輸 ____ -33- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 裝 訂 480824 A7 B7 五、發明説明(31 ) 線1 5上的隅發EM波切換至一狀態其中兩’開’電晶體(分別 為NMOS及PMOS)連接大部份負傳輸線導軌至NMOS電晶體 的現場GND供應及至PMOS電晶體的現場V+供應。兩對 NMOS/PMOS電晶體因架橋整流同步振盪導致隅發EM波訊 號極性相反而產生交變,例如,DC-AC-DC轉換模式的雙 向性。所以,傳輸線1 5能雙向抽取及導引電流,以便當現 場供應電壓大於傳輸線1 5電壓時供應電流至傳輸線,及當 現場電壓供應軌電壓小於傳輸線電壓時抽取電流,而傳輸 線15在本模式中作為電導體,見下表:Mosfet shunt capacitors M1-M8, as long as the transmission line 15 is balanced as shown in FIG. 32, any number of Mosfet shunt capacitors with appropriate size and capacitance can be used. Other constructions used to make controllable digital shunt capacitors may or may not be made with Mosfet transistors. A known example uses Mosfet. For example, a two-bit weighted Mosfet capacitor can be used. In addition, for example, the M0S capacitor supply variable capacitor includes a variable reactor and a P / N diode. Capacitors repeat the standard pitch arrangement along the transmission line to facilitate impedance distribution. Figure 33 shows how to arrange the path of data and / or power through the transmission line and by means of a railway sleeper-like device 88, ideally placed under the guide rails 15a, 15b at standard intervals in order to change the capacitive load. Alternatively, the device 88 may be placed above and / or below the transmission line guides 15a '15b. As shown in the cross-sectional view, the tracks 15a, 15b are preferably placed on the metal layer and insulated from the device 88, such as the silicon oxide layer 92. This device 88 has a function of increasing the capacitance of the transmission line and is used to change the impedance of the transmission line, i.e., the EM wave moving speed. This device 88 may also be used to arrange data and / or power paths 99. As shown, the arrangement data and / or power path 99, because the clock signals Φ1 and Φ2 above the transmission line 15 are differential, and these clock signals φ 讯, φ2 have no effect on the arrangement data and / or power signals. The bidirectional switch (21) uses inverters 23a, 23b as clock frequency synchronous rectifiers' because it can be a resistance path pusher from most to the GND negative voltage supply rail and most to the v + positive voltage supply rail. Therefore, the back-to-back NMOS and PMOS transistors composed of inverters 23a and 23b (see Figure 22b) must be transmitted by ____ -33- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) binding 480824 A7 B7 V. Description of the invention (31) The burst EM wave on line 15 is switched to a state where two 'on' transistors (NMOS and PMOS respectively) connect most of the negative transmission line guides to the scene of the NMOS transistor GND supply and on-site V + supply to PMOS transistor. The two pairs of NMOS / PMOS transistors are alternated due to the opposite polarity of the burst EM wave signal caused by the synchronous oscillation of the bridge rectification, for example, the bidirectionality of the DC-AC-DC conversion mode. Therefore, the transmission line 15 can draw and guide current in both directions, so as to supply current to the transmission line when the on-site supply voltage is greater than the transmission line 15 voltage, and to draw current when the on-site voltage supply rail voltage is less than the transmission line voltage, and the transmission line 15 is in this mode. As electrical conductors, see the following table:
輸入 PMOS^f NMOS1 開· PMOS,關, 15a=GND 15b=V+ PI (15b連接現場V+) N2 (15a連接現場GND) m,P2 15a=V+ 15b=GND P2(15a連接現場V+) N1 (15b連接現場GND) N2,PI 當並聯’電阻上f可比較於供應連接之串聯D C電阻時,此種 電子循環特別適合於閘長度小於0.1 /zm之I C處理技術。這 種同步整流可作為1C的某些無法供電地方的電力分配基 準,特別可用於f充電泵’電路,即,DC對DC電流轉換。另 外基本能力為DC對AC電流轉換及其相反。其他,當然, 可應用於已知的片上變壓器。 已知的可能性為達到最高可能頻率含不可能拆開切換的 邏輯電路,包括發展相關的半導體製造技術。 誠然,傳輸線本身裝置必須與1C處理技術配合,較小及 較快電晶體裝置自然會產生較高時鐘頻率用的較短及較快 _-34- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 480824 A7 B7 五、發明説明( 的傳輸線振盪器。 另外的可能性包括保持低電力消耗;無關應用,任何電 容及電感連接都能與傳輸線共振,及特別用於相關的如位 移暫存器或預先充電/評估邏輯。 雖然證明有利,不必使用外部定時基準例如,水晶,不 用PLL技術,可能有些情況及應用,其中本發明應用須結 合外部定時晶體等。 雖然本文在目前1C主要的CMOS技術的範疇内已作了詳 細說明,但是熟悉有關原理者必然了解,本發明也適用於 其他半導體技術,例如,矽鍺(SUGe),坤化鎵(Ga_A 等。 最後,非常有利的特別用途是用來克復高頻率定時所發 生的問題,例如,其中F>1 GHz,無其他結合定時訊號^ 生及分配的適用條件須從預定的範圍排除,例如,用來操 作頻率小於1 GHz的系統及裝置。 -35- 本纸張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 裝 訂Input PMOS ^ f NMOS1 On · PMOS, Off, 15a = GND 15b = V + PI (15b connected to the field V +) N2 (15a connected to the field GND) m, P2 15a = V + 15b = GND P2 (15a connected to the field V +) N1 (15b Connection site GND) N2, PI When f on parallel resistance is comparable to series DC resistance of supply connection, this kind of electronic cycle is especially suitable for IC processing technology with gate length less than 0.1 / zm. This kind of synchronous rectification can be used as a power distribution standard for some places where 1C cannot supply power, and it can be especially used in f charge pump 'circuits, that is, DC to DC current conversion. The other basic capability is DC to AC current conversion and vice versa. Others, of course, can be applied to known on-chip transformers. Known possibilities are to reach the highest possible frequency of logic circuits with impossibility to switch apart, including the development of related semiconductor manufacturing techniques. It is true that the device of the transmission line itself must cooperate with the 1C processing technology. Smaller and faster transistor devices will naturally produce shorter and faster clock frequencies. _-34- This paper standard applies to China National Standard (CNS) A4 specifications (210 X 297 mm) 480824 A7 B7 V. Description of the transmission line oscillator. Other possibilities include keeping power consumption low; irrelevant applications, any capacitive and inductive connection can resonate with the transmission line, and is especially used for related Such as displacement registers or pre-charge / evaluation logic. Although proven to be advantageous, it is not necessary to use an external timing reference such as a crystal, without PLL technology, there may be some situations and applications where the application of the present invention must be combined with an external timing crystal, etc. 1C has been described in detail in the main CMOS technology, but those familiar with the relevant principles must understand that the present invention is also applicable to other semiconductor technologies, such as silicon germanium (SUGe), gallium Kuna (Ga_A, etc.) Finally, it is very advantageous The special purpose is to overcome the problems that occur at high frequency timing, for example, where F > 1 GHz, no other combination The applicable conditions of the timing signal ^ generation and distribution must be excluded from the predetermined range, for example, used to operate systems and devices with a frequency less than 1 GHz. -35- This paper size applies to China National Standard (CNS) A4 (210 X 297) (Mm) Staple
Claims (1)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/GB2000/000175 WO2000044093A1 (en) | 1999-01-22 | 2000-01-24 | Electronic circuitry |
US09/529,076 US6556089B2 (en) | 1999-01-22 | 2000-01-24 | Electronic circuitry |
GB0048918 | 2000-02-24 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW480824B true TW480824B (en) | 2002-03-21 |
Family
ID=26245513
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW089112987A TW480824B (en) | 2000-01-24 | 2000-06-30 | Electronic circuitry |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW480824B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI676358B (en) * | 2014-10-31 | 2019-11-01 | 日商半導體能源研究所股份有限公司 | Semiconductor device |
-
2000
- 2000-06-30 TW TW089112987A patent/TW480824B/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI676358B (en) * | 2014-10-31 | 2019-11-01 | 日商半導體能源研究所股份有限公司 | Semiconductor device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4414102B2 (en) | Electronic circuit | |
US8134415B2 (en) | Electronic circuitry | |
US8081035B2 (en) | Electronic pulse generator and oscillator | |
CN103947104B (en) | Inductance enhancement mode rotary traveling wave oscillating circuit and method | |
TW480824B (en) | Electronic circuitry | |
TW496038B (en) | Electronic circuitry | |
US20020190805A1 (en) | Electronic circuitry | |
GB2358563A (en) | Bidirectional data transfer between ICs each possessing a self-oscillating clock distribution system | |
WO2001067603A1 (en) | Electronic pulse generator and oscillator | |
GB2399243A (en) | Sleep mode in a MOS logic circuit clocked by adiabatic energy-recycling clocks | |
WO2011055103A1 (en) | A clock arrangement in an integrated circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GD4A | Issue of patent certificate for granted invention patent | ||
MK4A | Expiration of patent term of an invention patent |